update stm32f4.

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1957 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/stm32f40x/drivers/board.h

@@ -40,7 +40,9 @@
 #define STM32_SRAM_SIZE         128
 #define STM32_SRAM_END          (0x20000000 + STM32_SRAM_SIZE * 1024)
 
+//#define RT_USING_UART1
 #define RT_USING_UART2
+//#define RT_USING_UART3
 
 // <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
 // 	<i>Default: 1

bsp/stm32f40x/drivers/stm32f4xx_it.c

@@ -157,6 +157,22 @@ void DebugMon_Handler(void)
 {
 }*/
 
+void USART1_IRQHandler(void)
+{
+#ifdef RT_USING_UART1
+    extern struct rt_device uart1_device;
+	extern void rt_hw_serial_isr(struct rt_device *device);
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_hw_serial_isr(&uart1_device);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+#endif
+}
+
 void USART2_IRQHandler(void)
 {
 #ifdef RT_USING_UART2
@@ -173,6 +189,22 @@ void USART2_IRQHandler(void)
 #endif
 }
 
+void USART3_IRQHandler(void)
+{
+#ifdef RT_USING_UART3
+    extern struct rt_device uart3_device;
+	extern void rt_hw_serial_isr(struct rt_device *device);
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_hw_serial_isr(&uart3_device);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+#endif
+}
+
 /**
   * @}
   */

bsp/stm32f40x/rtconfig.py

@@ -31,7 +31,7 @@ if PLATFORM == 'gcc':
     OBJDUMP = PREFIX + 'objdump'
     OBJCPY = PREFIX + 'objcopy'
 
-    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=vfp -mfloat-abi=softfp -ffunction-sections -fdata-sections'
+    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE 
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
     LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
@@ -94,7 +94,7 @@ elif PLATFORM == 'iar':
     CFLAGS += ' --no_scheduling' 
     CFLAGS += ' --debug' 
     CFLAGS += ' --endian=little' 
-    CFLAGS += ' --cpu=Cortex-M3' 
+    CFLAGS += ' --cpu=Cortex-M4' 
     CFLAGS += ' -e' 
     CFLAGS += ' --fpu=None'
     CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'    
@@ -105,7 +105,7 @@ elif PLATFORM == 'iar':
     AFLAGS += ' -s+' 
     AFLAGS += ' -w+' 
     AFLAGS += ' -r' 
-    AFLAGS += ' --cpu Cortex-M3' 
+    AFLAGS += ' --cpu Cortex-M4' 
     AFLAGS += ' --fpu None' 
 
     LFLAGS = ' --config stm32f10x_flash.icf'