mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-08-18 20:48:41 +08:00
Merge remote-tracking branch 'upstream/master'
This commit is contained in:
Bernard Xiong
@@ -1,6 +1,6 @@
|
||||
# RT-Thread #
|
||||
|
||||
[](https://travis-ci.org/RT-Thread/rt-thread)
|
||||
[](https://travis-ci.org/RT-Thread/rt-thread)
|
||||
[](https://gitter.im/RT-Thread/rt-thread?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
|
||||
|
||||
RT-Thread is an open source real-time operating system for embedded devices from China. RT-Thread RTOS is a scalable real-time operating system: a tiny kernel for ARM Cortex-M0, Cortex-M3/4, or a full feature system in ARM Cortex-A8, ARM Cortex-A9 DualCore etc.
|
||||
|
||||
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Load Diff
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@@ -0,0 +1,27 @@
|
||||
import rtconfig
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
# get current directory
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
src = Split("""
|
||||
nrf51822/Source/templates/system_nrf51.c
|
||||
""")
|
||||
|
||||
#add for Startup script
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
|
||||
|
||||
path = [cwd + '/CMSIS/Include',
|
||||
cwd + '/nrf51822/Include']
|
||||
|
||||
CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'NRF51']
|
||||
group = DefineGroup('Startup Code', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
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@@ -0,0 +1,422 @@
|
||||
#ifndef NRF_GPIO_H__
|
||||
#define NRF_GPIO_H__
|
||||
|
||||
#include "nrf51.h"
|
||||
#include "nrf51_bitfields.h"
|
||||
|
||||
/**
|
||||
* @defgroup nrf_gpio GPIO abstraction
|
||||
* @{
|
||||
* @ingroup nrf_drivers
|
||||
* @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
|
||||
*
|
||||
* Here, the GPIO ports are defined as follows:
|
||||
* - Port 0 -> pin 0-7
|
||||
* - Port 1 -> pin 8-15
|
||||
* - Port 2 -> pin 16-23
|
||||
* - Port 3 -> pin 24-31
|
||||
*/
|
||||
|
||||
/**
|
||||
* @enum nrf_gpio_port_dir_t
|
||||
* @brief Enumerator used for setting the direction of a GPIO port.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
|
||||
NRF_GPIO_PORT_DIR_INPUT ///< Input
|
||||
} nrf_gpio_port_dir_t;
|
||||
|
||||
/**
|
||||
* @enum nrf_gpio_pin_dir_t
|
||||
* Pin direction definitions.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NRF_GPIO_PIN_DIR_INPUT, ///< Input
|
||||
NRF_GPIO_PIN_DIR_OUTPUT ///< Output
|
||||
} nrf_gpio_pin_dir_t;
|
||||
|
||||
/**
|
||||
* @enum nrf_gpio_port_select_t
|
||||
* @brief Enumerator used for selecting between port 0 - 3.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
|
||||
NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
|
||||
NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
|
||||
NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
|
||||
} nrf_gpio_port_select_t;
|
||||
|
||||
/**
|
||||
* @enum nrf_gpio_pin_pull_t
|
||||
* @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
|
||||
NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
|
||||
NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
|
||||
} nrf_gpio_pin_pull_t;
|
||||
|
||||
/**
|
||||
* @enum nrf_gpio_pin_sense_t
|
||||
* @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
|
||||
NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
|
||||
NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
|
||||
} nrf_gpio_pin_sense_t;
|
||||
|
||||
/**
|
||||
* @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
|
||||
* This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
|
||||
*
|
||||
* @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
|
||||
* Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
|
||||
{
|
||||
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
|
||||
for (; pin_range_start <= pin_range_end; pin_range_start++)
|
||||
{
|
||||
NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
|
||||
* This function can be used to configure pin range as simple input.
|
||||
*
|
||||
* @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
|
||||
*
|
||||
* @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
|
||||
* Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
|
||||
*/
|
||||
static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
|
||||
{
|
||||
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
|
||||
for (; pin_range_start <= pin_range_end; pin_range_start++)
|
||||
{
|
||||
NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (pull_config << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
|
||||
* This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
|
||||
*
|
||||
* @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
|
||||
{
|
||||
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
|
||||
NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
|
||||
* This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
|
||||
*
|
||||
* @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
|
||||
*
|
||||
* @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
|
||||
*
|
||||
* @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
|
||||
*/
|
||||
static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
|
||||
{
|
||||
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
|
||||
NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (pull_config << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
|
||||
* This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
|
||||
* Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
|
||||
*
|
||||
* @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
|
||||
*
|
||||
* @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
|
||||
*
|
||||
* @param sense_config sense level of the pin (no sense, sense low or sense high).
|
||||
*/
|
||||
static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
|
||||
{
|
||||
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
|
||||
NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (pull_config << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for setting the direction for a GPIO pin.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] for which to
|
||||
* set the direction.
|
||||
*
|
||||
* @param direction specifies the direction
|
||||
*/
|
||||
static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
|
||||
{
|
||||
if(direction == NRF_GPIO_PIN_DIR_INPUT)
|
||||
{
|
||||
NRF_GPIO->PIN_CNF[pin_number] =
|
||||
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
|
||||
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
|
||||
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
|
||||
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
|
||||
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
|
||||
}
|
||||
else
|
||||
{
|
||||
NRF_GPIO->DIRSET = (1UL << pin_number);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for setting a GPIO pin.
|
||||
*
|
||||
* Note that the pin must be configured as an output for this
|
||||
* function to have any effect.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] to
|
||||
* set.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
|
||||
{
|
||||
NRF_GPIO->OUTSET = (1UL << pin_number);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for clearing a GPIO pin.
|
||||
*
|
||||
* Note that the pin must be configured as an output for this
|
||||
* function to have any effect.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] to
|
||||
* clear.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
|
||||
{
|
||||
NRF_GPIO->OUTCLR = (1UL << pin_number);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for toggling a GPIO pin.
|
||||
*
|
||||
* Note that the pin must be configured as an output for this
|
||||
* function to have any effect.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] to
|
||||
* toggle.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
|
||||
{
|
||||
const uint32_t pin_bit = 1UL << pin_number;
|
||||
const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
|
||||
|
||||
if (pin_state == 0)
|
||||
{
|
||||
// Current state low, set high.
|
||||
NRF_GPIO->OUTSET = pin_bit;
|
||||
}
|
||||
else
|
||||
{
|
||||
// Current state high, set low.
|
||||
NRF_GPIO->OUTCLR = pin_bit;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for writing a value to a GPIO pin.
|
||||
*
|
||||
* Note that the pin must be configured as an output for this
|
||||
* function to have any effect.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] to
|
||||
* write.
|
||||
*
|
||||
* @param value specifies the value to be written to the pin.
|
||||
* @arg 0 clears the pin
|
||||
* @arg >=1 sets the pin.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
|
||||
{
|
||||
if (value == 0)
|
||||
{
|
||||
nrf_gpio_pin_clear(pin_number);
|
||||
}
|
||||
else
|
||||
{
|
||||
nrf_gpio_pin_set(pin_number);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for reading the input level of a GPIO pin.
|
||||
*
|
||||
* Note that the pin must have input connected for the value
|
||||
* returned from this function to be valid.
|
||||
*
|
||||
* @param pin_number specifies the pin number [0:31] to
|
||||
* read.
|
||||
*
|
||||
* @return
|
||||
* @retval 0 if the pin input level is low.
|
||||
* @retval 1 if the pin input level is high.
|
||||
* @retval > 1 should never occur.
|
||||
*/
|
||||
static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
|
||||
{
|
||||
return ((NRF_GPIO->IN >> pin_number) & 1UL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Generic function for writing a single byte of a 32 bit word at a given
|
||||
* address.
|
||||
*
|
||||
* This function should not be called from outside the nrf_gpio
|
||||
* abstraction layer.
|
||||
*
|
||||
* @param word_address is the address of the word to be written.
|
||||
*
|
||||
* @param byte_no is the the word byte number (0-3) to be written.
|
||||
*
|
||||
* @param value is the value to be written to byte "byte_no" of word
|
||||
* at address "word_address"
|
||||
*/
|
||||
static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
|
||||
{
|
||||
*((volatile uint8_t*)(word_address) + byte_no) = value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Generic function for reading a single byte of a 32 bit word at a given
|
||||
* address.
|
||||
*
|
||||
* This function should not be called from outside the nrf_gpio
|
||||
* abstraction layer.
|
||||
*
|
||||
* @param word_address is the address of the word to be read.
|
||||
*
|
||||
* @param byte_no is the the byte number (0-3) of the word to be read.
|
||||
*
|
||||
* @return byte "byte_no" of word at address "word_address".
|
||||
*/
|
||||
static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
|
||||
{
|
||||
return (*((const volatile uint8_t*)(word_address) + byte_no));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for setting the direction of a port.
|
||||
*
|
||||
* @param port is the port for which to set the direction.
|
||||
*
|
||||
* @param dir direction to be set for this port.
|
||||
*/
|
||||
static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
|
||||
{
|
||||
if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
|
||||
{
|
||||
nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
|
||||
}
|
||||
else
|
||||
{
|
||||
nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for reading a GPIO port.
|
||||
*
|
||||
* @param port is the port to read.
|
||||
*
|
||||
* @return the input value on this port.
|
||||
*/
|
||||
static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
|
||||
{
|
||||
return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for writing to a GPIO port.
|
||||
*
|
||||
* @param port is the port to write.
|
||||
*
|
||||
* @param value is the value to write to this port.
|
||||
*
|
||||
* @sa nrf_gpio_port_dir_set()
|
||||
*/
|
||||
static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
|
||||
{
|
||||
nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for setting individual pins on GPIO port.
|
||||
*
|
||||
* @param port is the port for which to set the pins.
|
||||
*
|
||||
* @param set_mask is a mask specifying which pins to set. A bit
|
||||
* set to 1 indicates that the corresponding port pin shall be
|
||||
* set.
|
||||
*
|
||||
* @sa nrf_gpio_port_dir_set()
|
||||
*/
|
||||
static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
|
||||
{
|
||||
nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for clearing individual pins on GPIO port.
|
||||
*
|
||||
* @param port is the port for which to clear the pins.
|
||||
*
|
||||
* @param clr_mask is a mask specifying which pins to clear. A bit
|
||||
* set to 1 indicates that the corresponding port pin shall be
|
||||
* cleared.
|
||||
*
|
||||
* @sa nrf_gpio_port_dir_set()
|
||||
*/
|
||||
static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
|
||||
{
|
||||
nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,68 @@
|
||||
/* Copyright (c) 2013, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SYSTEM_NRF51_H
|
||||
#define SYSTEM_NRF51_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the System and update the SystemCoreClock variable.
|
||||
*/
|
||||
extern void SystemInit (void);
|
||||
|
||||
/**
|
||||
* Update SystemCoreClock variable
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Updates the SystemCoreClock with current core Clock
|
||||
* retrieved from cpu registers.
|
||||
*/
|
||||
extern void SystemCoreClockUpdate (void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_NRF51_H */
|
||||
@@ -0,0 +1,249 @@
|
||||
; Copyright (c) 2013, Nordic Semiconductor ASA
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
;
|
||||
; * Redistributions of source code must retain the above copyright notice, this
|
||||
; list of conditions and the following disclaimer.
|
||||
;
|
||||
; * Redistributions in binary form must reproduce the above copyright notice,
|
||||
; this list of conditions and the following disclaimer in the documentation
|
||||
; and/or other materials provided with the distribution.
|
||||
;
|
||||
; * Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
; contributors may be used to endorse or promote products derived from
|
||||
; this software without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
; NOTE: Template files (including this one) are application specific and therefore
|
||||
; expected to be copied into the application project folder prior to its use!
|
||||
|
||||
; Description message
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
|
||||
DCD RADIO_IRQHandler ;RADIO
|
||||
DCD UART0_IRQHandler ;UART0
|
||||
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
|
||||
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
|
||||
DCD 0 ;Reserved
|
||||
DCD GPIOTE_IRQHandler ;GPIOTE
|
||||
DCD ADC_IRQHandler ;ADC
|
||||
DCD TIMER0_IRQHandler ;TIMER0
|
||||
DCD TIMER1_IRQHandler ;TIMER1
|
||||
DCD TIMER2_IRQHandler ;TIMER2
|
||||
DCD RTC0_IRQHandler ;RTC0
|
||||
DCD TEMP_IRQHandler ;TEMP
|
||||
DCD RNG_IRQHandler ;RNG
|
||||
DCD ECB_IRQHandler ;ECB
|
||||
DCD CCM_AAR_IRQHandler ;CCM_AAR
|
||||
DCD WDT_IRQHandler ;WDT
|
||||
DCD RTC1_IRQHandler ;RTC1
|
||||
DCD QDEC_IRQHandler ;QDEC
|
||||
DCD LPCOMP_IRQHandler ;LPCOMP
|
||||
DCD SWI0_IRQHandler ;SWI0
|
||||
DCD SWI1_IRQHandler ;SWI1
|
||||
DCD SWI2_IRQHandler ;SWI2
|
||||
DCD SWI3_IRQHandler ;SWI3
|
||||
DCD SWI4_IRQHandler ;SWI4
|
||||
DCD SWI5_IRQHandler ;SWI5
|
||||
DCD 0 ;Reserved
|
||||
DCD 0 ;Reserved
|
||||
DCD 0 ;Reserved
|
||||
DCD 0 ;Reserved
|
||||
DCD 0 ;Reserved
|
||||
DCD 0 ;Reserved
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset Handler
|
||||
|
||||
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
|
||||
NRF_POWER_RAMONB_ADDRESS EQU 0x40000554 ; NRF_POWER->RAMONB address
|
||||
NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
|
||||
|
||||
LDR R0, =NRF_POWER_RAMON_ADDRESS
|
||||
LDR R2, [R0]
|
||||
ORRS R2, R2, R1
|
||||
STR R2, [R0]
|
||||
|
||||
LDR R0, =NRF_POWER_RAMONB_ADDRESS
|
||||
LDR R2, [R0]
|
||||
ORRS R2, R2, R1
|
||||
STR R2, [R0]
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT POWER_CLOCK_IRQHandler [WEAK]
|
||||
EXPORT RADIO_IRQHandler [WEAK]
|
||||
EXPORT UART0_IRQHandler [WEAK]
|
||||
EXPORT SPI0_TWI0_IRQHandler [WEAK]
|
||||
EXPORT SPI1_TWI1_IRQHandler [WEAK]
|
||||
EXPORT GPIOTE_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT TIMER0_IRQHandler [WEAK]
|
||||
EXPORT TIMER1_IRQHandler [WEAK]
|
||||
EXPORT TIMER2_IRQHandler [WEAK]
|
||||
EXPORT RTC0_IRQHandler [WEAK]
|
||||
EXPORT TEMP_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT ECB_IRQHandler [WEAK]
|
||||
EXPORT CCM_AAR_IRQHandler [WEAK]
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT RTC1_IRQHandler [WEAK]
|
||||
EXPORT QDEC_IRQHandler [WEAK]
|
||||
EXPORT LPCOMP_IRQHandler [WEAK]
|
||||
EXPORT SWI0_IRQHandler [WEAK]
|
||||
EXPORT SWI1_IRQHandler [WEAK]
|
||||
EXPORT SWI2_IRQHandler [WEAK]
|
||||
EXPORT SWI3_IRQHandler [WEAK]
|
||||
EXPORT SWI4_IRQHandler [WEAK]
|
||||
EXPORT SWI5_IRQHandler [WEAK]
|
||||
POWER_CLOCK_IRQHandler
|
||||
RADIO_IRQHandler
|
||||
UART0_IRQHandler
|
||||
SPI0_TWI0_IRQHandler
|
||||
SPI1_TWI1_IRQHandler
|
||||
GPIOTE_IRQHandler
|
||||
ADC_IRQHandler
|
||||
TIMER0_IRQHandler
|
||||
TIMER1_IRQHandler
|
||||
TIMER2_IRQHandler
|
||||
RTC0_IRQHandler
|
||||
TEMP_IRQHandler
|
||||
RNG_IRQHandler
|
||||
ECB_IRQHandler
|
||||
CCM_AAR_IRQHandler
|
||||
WDT_IRQHandler
|
||||
RTC1_IRQHandler
|
||||
QDEC_IRQHandler
|
||||
LPCOMP_IRQHandler
|
||||
SWI0_IRQHandler
|
||||
SWI1_IRQHandler
|
||||
SWI2_IRQHandler
|
||||
SWI3_IRQHandler
|
||||
SWI4_IRQHandler
|
||||
SWI5_IRQHandler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
@@ -0,0 +1,121 @@
|
||||
/* Copyright (c) 2013, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
/* NOTE: Template files (including this one) are application specific and therefore expected to
|
||||
be copied into the application project folder prior to its use! */
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "nrf.h"
|
||||
#include "system_nrf51.h"
|
||||
|
||||
/*lint ++flb "Enter library region" */
|
||||
|
||||
|
||||
#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
|
||||
|
||||
static bool is_manual_peripheral_setup_needed(void);
|
||||
static bool is_disabled_in_debug_needed(void);
|
||||
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
|
||||
#elif defined ( __ICCARM__ )
|
||||
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
|
||||
#elif defined ( __GNUC__ )
|
||||
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
|
||||
#endif
|
||||
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
SystemCoreClock = __SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
|
||||
It can also be done in the application main() function. */
|
||||
|
||||
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
|
||||
to enable the use of peripherals" found at Product Anomaly document for your device found at
|
||||
https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
|
||||
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
|
||||
example) will not be available. */
|
||||
if (is_manual_peripheral_setup_needed())
|
||||
{
|
||||
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
|
||||
*(uint32_t volatile *)0x40006C18 = 0x00008000;
|
||||
}
|
||||
|
||||
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
|
||||
register is incorrect" found at Product Anomaly document four your device found at
|
||||
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
|
||||
if (is_disabled_in_debug_needed())
|
||||
{
|
||||
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static bool is_manual_peripheral_setup_needed(void)
|
||||
{
|
||||
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
|
||||
{
|
||||
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool is_disabled_in_debug_needed(void)
|
||||
{
|
||||
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
|
||||
{
|
||||
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/*lint --flb "Leave library region" */
|
||||
@@ -0,0 +1,14 @@
|
||||
# for module compiling
|
||||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,34 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread-stm32f0xx.' + rtconfig.TARGET_EXT
|
||||
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,11 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = os.path.join(str(Dir('#')), 'applications')
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,39 @@
|
||||
/*
|
||||
* File : application.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2015, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-03-01 Yangfs the first version
|
||||
* 2015-03-27 Bernard code cleanup.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup NRF51822
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
#include <finsh.h>
|
||||
#include <shell.h>
|
||||
#endif
|
||||
|
||||
int rt_application_init(void)
|
||||
{
|
||||
/* Set finsh device */
|
||||
#ifdef RT_USING_FINSH
|
||||
/* initialize finsh */
|
||||
finsh_system_init();
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* File : startup.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2015, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-03-01 Yangfs the first version
|
||||
* 2015-03-27 Bernard code cleanup.
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
|
||||
/**
|
||||
* @addtogroup NRF51822
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
extern int rt_application_init(void);
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define NRF_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define NRF_SRAM_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define NRF_SRAM_BEGIN (&__bss_end)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function will startup RT-Thread RTOS.
|
||||
*/
|
||||
void rtthread_startup(void)
|
||||
{
|
||||
/* init board */
|
||||
rt_hw_board_init();
|
||||
|
||||
/* show version */
|
||||
rt_show_version();
|
||||
|
||||
/* init tick */
|
||||
rt_system_tick_init();
|
||||
|
||||
/* init kernel object */
|
||||
rt_system_object_init();
|
||||
|
||||
/* init timer system */
|
||||
rt_system_timer_init();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)NRF_SRAM_END);
|
||||
#endif
|
||||
|
||||
/* init scheduler system */
|
||||
rt_system_scheduler_init();
|
||||
|
||||
/* init application */
|
||||
rt_application_init();
|
||||
|
||||
/* init timer thread */
|
||||
rt_system_timer_thread_init();
|
||||
|
||||
/* init idle thread */
|
||||
rt_thread_idle_init();
|
||||
|
||||
/* start scheduler */
|
||||
rt_system_scheduler_start();
|
||||
|
||||
/* never reach here */
|
||||
return ;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* disable interrupt first */
|
||||
rt_hw_interrupt_disable();
|
||||
|
||||
/* startup RT-Thread RTOS */
|
||||
rtthread_startup();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,13 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
# get current directory
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* File : board.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <nrf51.h>
|
||||
#include <nrf51_bitfields.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "uart.h"
|
||||
|
||||
/**
|
||||
* @addtogroup NRF51822
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
#define LFCLK_FREQUENCY (32768UL) /**< LFCLK frequency in Hertz, constant. */
|
||||
#define RTC_FREQUENCY (800UL) /**< Required RTC working clock RTC_FREQUENCY Hertz. Changable. */
|
||||
#define COUNTER_PRESCALER ((LFCLK_FREQUENCY / RTC_FREQUENCY) - 1) /* f = LFCLK/(prescaler + 1) */
|
||||
|
||||
|
||||
/** @brief Function starting the internal LFCLK XTAL oscillator.
|
||||
*/
|
||||
void lfclk_config(void)
|
||||
{
|
||||
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);
|
||||
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
|
||||
NRF_CLOCK->TASKS_LFCLKSTART = 1;
|
||||
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
|
||||
{
|
||||
//Do nothing.
|
||||
}
|
||||
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
|
||||
}
|
||||
|
||||
|
||||
/** @brief Function for configuring the RTC with TICK to 100Hz.
|
||||
*/
|
||||
void rtc_config(void)
|
||||
{
|
||||
NVIC_EnableIRQ(RTC0_IRQn); // Enable Interrupt for the RTC in the core.
|
||||
NRF_RTC0->PRESCALER = COUNTER_PRESCALER; // Set prescaler to a TICK of RTC_FREQUENCY.
|
||||
|
||||
// Enable TICK event and TICK interrupt:
|
||||
NRF_RTC0->EVTENSET = RTC_EVTENSET_TICK_Msk;
|
||||
NRF_RTC0->INTENSET = RTC_INTENSET_TICK_Msk;
|
||||
}
|
||||
|
||||
|
||||
/** @brief: Function for handling the RTC0 interrupts.
|
||||
* Triggered on TICK and COMPARE0 match.
|
||||
*/
|
||||
void RTC0_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
if ((NRF_RTC0->EVENTS_TICK != 0) &&
|
||||
((NRF_RTC0->INTENSET & RTC_INTENSET_TICK_Msk) != 0))
|
||||
{
|
||||
NRF_RTC0->EVENTS_TICK = 0;
|
||||
|
||||
rt_tick_increase(); //This function will notify kernel there is one tick passed
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This function will initial NRF51822 board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
lfclk_config();
|
||||
rtc_config();
|
||||
NRF_RTC0->TASKS_START = 1;
|
||||
/* Initial usart deriver, and set console device */
|
||||
rt_hw_uart_init();
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
* File : board.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,201 @@
|
||||
/*
|
||||
* File : uart.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2015 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "uart.h"
|
||||
|
||||
#include <nrf_gpio.h>
|
||||
|
||||
#define UART_RX_BUFSZ 512
|
||||
rt_uint8_t rx_buffer[UART_RX_BUFSZ];
|
||||
|
||||
struct nrf51822_uart
|
||||
{
|
||||
struct rt_device parent;
|
||||
struct rt_ringbuffer rx_rb;
|
||||
} uart_device;
|
||||
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
rt_ubase_t level;
|
||||
struct nrf51822_uart* uart = &uart_device;
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
// Wait for RXD data to be received
|
||||
while (NRF_UART0->EVENTS_RXDRDY != 1) ;
|
||||
NRF_UART0->EVENTS_RXDRDY = 0;
|
||||
|
||||
rt_hw_interrupt_enable(level);
|
||||
/* [Handling the data received over UART] */
|
||||
rt_ringbuffer_putchar_force(&(uart->rx_rb), (rt_uint8_t)NRF_UART0->RXD);
|
||||
|
||||
/* invoke callback */
|
||||
if(uart->parent.rx_indicate != RT_NULL)
|
||||
{
|
||||
uart->parent.rx_indicate(&uart->parent, rt_ringbuffer_data_len(&uart->rx_rb));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static rt_err_t rt_uart_init (rt_device_t dev)
|
||||
{
|
||||
/* UART Initialization and Enable */
|
||||
/** @snippet [Configure UART RX and TX pin] */
|
||||
nrf_gpio_cfg_output(TX_PIN_NUMBER);
|
||||
nrf_gpio_cfg_input(RX_PIN_NUMBER, NRF_GPIO_PIN_NOPULL);
|
||||
|
||||
NRF_UART0->PSELTXD = TX_PIN_NUMBER;
|
||||
NRF_UART0->PSELRXD = RX_PIN_NUMBER;
|
||||
/** @snippet [Configure UART RX and TX pin] */
|
||||
if (HWFC)
|
||||
{
|
||||
nrf_gpio_cfg_output(RTS_PIN_NUMBER);
|
||||
nrf_gpio_cfg_input(CTS_PIN_NUMBER, NRF_GPIO_PIN_NOPULL);
|
||||
NRF_UART0->PSELCTS = CTS_PIN_NUMBER;
|
||||
NRF_UART0->PSELRTS = RTS_PIN_NUMBER;
|
||||
NRF_UART0->CONFIG = (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos);
|
||||
}
|
||||
|
||||
NRF_UART0->BAUDRATE = (UART_BAUDRATE_BAUDRATE_Baud38400 << UART_BAUDRATE_BAUDRATE_Pos);
|
||||
NRF_UART0->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
|
||||
NRF_UART0->TASKS_STARTTX = 1;
|
||||
NRF_UART0->TASKS_STARTRX = 1;
|
||||
NRF_UART0->EVENTS_RXDRDY = 0;
|
||||
|
||||
NRF_UART0->INTENSET = (UART_INTENSET_RXDRDY_Enabled << UART_INTENSET_RXDRDY_Pos);
|
||||
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
/* Enable the UART Interrupt */
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_uart_close(rt_device_t dev)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
/* Disable the UART Interrupt */
|
||||
NVIC_DisableIRQ(UART0_IRQn);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_size_t length;
|
||||
struct nrf51822_uart *uart = (struct nrf51822_uart*)dev;
|
||||
/* interrupt receive */
|
||||
rt_base_t level;
|
||||
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
length = rt_ringbuffer_get(&(uart->rx_rb), buffer, size);
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||
{
|
||||
char *ptr;
|
||||
ptr = (char*) buffer;
|
||||
|
||||
if (dev->open_flag & RT_DEVICE_FLAG_STREAM)
|
||||
{
|
||||
/* stream mode */
|
||||
while (size)
|
||||
{
|
||||
if (*ptr == '\n')
|
||||
{
|
||||
NRF_UART0->TXD = (uint8_t)'\r';
|
||||
|
||||
// Wait for TXD data to be sent.
|
||||
while (NRF_UART0->EVENTS_TXDRDY != 1) ;
|
||||
|
||||
NRF_UART0->EVENTS_TXDRDY = 0;
|
||||
}
|
||||
|
||||
NRF_UART0->TXD = (uint8_t)(*ptr);
|
||||
|
||||
// Wait for TXD data to be sent.
|
||||
while (NRF_UART0->EVENTS_TXDRDY != 1) ;
|
||||
|
||||
NRF_UART0->EVENTS_TXDRDY = 0;
|
||||
|
||||
ptr ++;
|
||||
size --;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( size != 0 )
|
||||
{
|
||||
NRF_UART0->TXD = (uint8_t)(*ptr);
|
||||
|
||||
// Wait for TXD data to be sent.
|
||||
while (NRF_UART0->EVENTS_TXDRDY != 1) ;
|
||||
|
||||
NRF_UART0->EVENTS_TXDRDY = 0;
|
||||
|
||||
ptr++;
|
||||
size--;
|
||||
}
|
||||
}
|
||||
|
||||
return (rt_size_t) ptr - (rt_size_t) buffer;
|
||||
}
|
||||
|
||||
void rt_hw_uart_init(void)
|
||||
{
|
||||
struct nrf51822_uart* uart;
|
||||
|
||||
/* get uart device */
|
||||
uart = &uart_device;
|
||||
|
||||
/* device initialization */
|
||||
uart->parent.type = RT_Device_Class_Char;
|
||||
rt_ringbuffer_init(&(uart->rx_rb), rx_buffer, sizeof(rx_buffer));
|
||||
|
||||
/* device interface */
|
||||
uart->parent.init = rt_uart_init;
|
||||
uart->parent.open = rt_uart_open;
|
||||
uart->parent.close = rt_uart_close;
|
||||
uart->parent.read = rt_uart_read;
|
||||
uart->parent.write = rt_uart_write;
|
||||
uart->parent.control = RT_NULL;
|
||||
uart->parent.user_data = RT_NULL;
|
||||
|
||||
rt_device_register(&uart->parent, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
|
||||
}
|
||||
@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* File : uart.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2015, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
|
||||
|
||||
#define RX_PIN_NUMBER 23
|
||||
#define TX_PIN_NUMBER 24
|
||||
#define CTS_PIN_NUMBER 25
|
||||
#define RTS_PIN_NUMBER 22
|
||||
#define HWFC false
|
||||
|
||||
|
||||
void rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,94 @@
|
||||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
/* RT_NAME_MAX*/
|
||||
#define RT_NAME_MAX 6
|
||||
|
||||
/* RT_ALIGN_SIZE*/
|
||||
#define RT_ALIGN_SIZE 4
|
||||
|
||||
/* PRIORITY_MAX */
|
||||
#define RT_THREAD_PRIORITY_MAX 8
|
||||
|
||||
/* Tick per Second */
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
|
||||
/* SECTION: RT_DEBUG */
|
||||
/* Thread Debug */
|
||||
#define RT_DEBUG
|
||||
//#define RT_DEBUG_INIT 1
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
|
||||
/* Using Hook */
|
||||
#define RT_USING_HOOK
|
||||
|
||||
#define IDLE_THREAD_STACK_SIZE 512
|
||||
|
||||
/* Using Software Timer */
|
||||
/* #define RT_USING_TIMER_SOFT */
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_TIMER_TICK_PER_SECOND 100
|
||||
|
||||
/* SECTION: IPC */
|
||||
/* Using Semaphore*/
|
||||
#define RT_USING_SEMAPHORE
|
||||
|
||||
/* Using Mutex */
|
||||
/* #define RT_USING_MUTEX */
|
||||
|
||||
/* Using Event */
|
||||
/* #define RT_USING_EVENT */
|
||||
|
||||
/* Using MailBox */
|
||||
#define RT_USING_MAILBOX
|
||||
|
||||
/* Using Message Queue */
|
||||
/* #define RT_USING_MESSAGEQUEUE */
|
||||
|
||||
/* SECTION: Memory Management */
|
||||
/* Using Memory Pool Management*/
|
||||
/* #define RT_USING_MEMPOOL */
|
||||
|
||||
/* Using Dynamic Heap Management */
|
||||
//#define RT_USING_HEAP
|
||||
|
||||
/* Using Small MM */
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_TINY_SIZE
|
||||
|
||||
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
|
||||
//#define RT_USING_COMPONENTS_INIT
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System */
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
|
||||
#define RT_USING_DEVICE_IPC
|
||||
// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
|
||||
//#define RT_USING_SERIAL
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
/* the buffer size of console*/
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
|
||||
|
||||
|
||||
/* SECTION: finsh, a C-Express shell */
|
||||
#define RT_USING_FINSH
|
||||
/* configure finsh parameters */
|
||||
#define FINSH_THREAD_PRIORITY 6
|
||||
#define FINSH_THREAD_STACK_SIZE 512
|
||||
#define FINSH_HISTORY_LINES 1
|
||||
/* Using symbol table */
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,83 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='keil'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:/Program Files/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
print '================ERROR============================'
|
||||
print 'Not support iar yet!'
|
||||
print '================================================='
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
NRF_TYPE = 'NRF51822'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'axf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nrf51822.map,-cref,-u,Reset_Handler -T nrf51822_rom.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --device DARMSTM'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter nrf51822_rom.sct'
|
||||
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
@@ -0,0 +1,161 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U480200710 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,410 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>nRF51822_xxAA</Device>
|
||||
<Vendor>Nordic Semiconductor</Vendor>
|
||||
<PackID>NordicSemiconductor.nRF_DeviceFamilyPack.1.1.4</PackID>
|
||||
<PackURL>http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
|
||||
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x4000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51822_xxAA$Flash\nrf51xxx.flm))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:nRF51822_xxAA$Device\Include\nrf.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:nRF51822_xxAA$SVD\nrf51.xml</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\</OutputDirectory>
|
||||
<OutputName>template</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> </SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>0</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>6</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls>--c99</MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
@@ -152,8 +152,6 @@ void USART1_IRQHandler(void)
|
||||
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
@@ -186,8 +184,6 @@ void USART2_IRQHandler(void)
|
||||
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
|
||||
@@ -14,9 +14,7 @@
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F107VC</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F1xx_DFP.1.0.5</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32F051R8$Flash\STM32F0xx_64.FLM))</FlashDriverDll>
|
||||
@@ -74,8 +72,6 @@
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
@@ -132,7 +128,6 @@
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
@@ -144,10 +139,11 @@
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>0</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>6</TargetSelection>
|
||||
<TargetSelection>7</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
@@ -211,7 +207,7 @@
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0"</AdsCpuType>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F0xx_DFP.1.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32F051R8$Flash\STM32F0xx_64.FLM))</FlashDriverDll>
|
||||
|
||||
@@ -177,8 +177,6 @@ void USART1_IRQHandler(void)
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
@@ -211,8 +209,6 @@ void USART2_IRQHandler(void)
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
@@ -245,8 +241,6 @@ void USART3_IRQHandler(void)
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
|
||||
@@ -4,7 +4,7 @@ cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd + '/../include']
|
||||
|
||||
if GetDepend('RT_USING_HEAP'):
|
||||
if not GetDepend('RT_USING_HEAP'):
|
||||
SrcRemove(src, 'dataqueue.c')
|
||||
SrcRemove(src, 'pipe.c')
|
||||
|
||||
|
||||
@@ -517,6 +517,7 @@ void rt_memheap_free(void *ptr)
|
||||
|
||||
/* check magic */
|
||||
RT_ASSERT((header_ptr->magic & RT_MEMHEAP_MASK) == RT_MEMHEAP_MAGIC);
|
||||
RT_ASSERT(header_ptr->magic & RT_MEMHEAP_USED);
|
||||
/* check whether this block of memory has been over-written. */
|
||||
RT_ASSERT((header_ptr->next->magic & RT_MEMHEAP_MASK) == RT_MEMHEAP_MAGIC);
|
||||
|
||||
|
||||
@@ -90,6 +90,9 @@ def VS2012_CreateFilter(script, project_path):
|
||||
# files: c/h list
|
||||
# project_path
|
||||
def VS_add_ItemGroup(parent, file_type, files, project_path):
|
||||
from building import Rtt_Root
|
||||
RTT_ROOT = os.path.normpath(Rtt_Root)
|
||||
|
||||
file_dict = {'C':"ClCompile", 'H':'ClInclude'}
|
||||
item_tag = file_dict[file_type]
|
||||
|
||||
@@ -99,11 +102,25 @@ def VS_add_ItemGroup(parent, file_type, files, project_path):
|
||||
name = fn.name
|
||||
path = os.path.dirname(fn.abspath)
|
||||
|
||||
objpath = path.lower()
|
||||
if len(project_path) >= len(RTT_ROOT) :
|
||||
if objpath.startswith(project_path.lower()) :
|
||||
objpath = ''.join('bsp'+objpath[len(project_path):])
|
||||
else :
|
||||
objpath = ''.join('kernel'+objpath[len(RTT_ROOT):])
|
||||
else :
|
||||
if objpath.startswith(RTT_ROOT.lower()) :
|
||||
objpath = ''.join('kernel'+objpath[len(RTT_ROOT):])
|
||||
else :
|
||||
objpath = ''.join('bsp'+objpath[len(project_path):])
|
||||
path = _make_path_relative(project_path, path)
|
||||
path = os.path.join(path, name)
|
||||
|
||||
File = SubElement(ItemGroup, item_tag)
|
||||
File.set('Include', path.decode(fs_encoding))
|
||||
if file_type == 'C' :
|
||||
ObjName = SubElement(File, 'ObjectFileName')
|
||||
ObjName.text = ''.join('$(IntDir)'+objpath+'\\')
|
||||
|
||||
def VS_add_HeadFiles(program, elem, project_path):
|
||||
building.source_ext = []
|
||||
|
||||
Reference in New Issue
Block a user