mirror of
https://github.com/RT-Thread/rt-thread.git
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Add SDIO stack support, current only support SDSC and SDHC card
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1771 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
luohui2320@gmail.com
@@ -8,8 +8,8 @@ src_drv = ['console.c']
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if GetDepend('RT_USING_LED'):
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src_drv += ['led.c']
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#if GetDepend('RT_USING_DFS'):
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#src_drv += ['sdcard.c']
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if GetDepend('RT_USING_MMCSD'):
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src_drv += ['at91_mci.c']
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if GetDepend('RT_USING_LWIP'):
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src_drv += ['macb.c']
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@@ -36,6 +36,11 @@
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#include <devfs.h>
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#endif
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#ifdef RT_USING_MMCSD
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#include <mmcsd_core.h>
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#include "at91_mci.h"
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#endif
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#ifdef RT_USING_LWIP
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#include <netif/ethernetif.h>
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#include <arch/sys_arch_init.h>
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@@ -101,6 +106,19 @@ void rt_init_thread_entry(void* parameter)
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}
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#endif
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#ifdef RT_USING_MMCSD
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rt_mmcsd_core_init();
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rt_mmcsd_blk_init();
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at91_mci_init();
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rt_thread_delay(RT_TICK_PER_SECOND*2);
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/* mount sd card fat partition 1 as root directory */
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if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
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{
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rt_kprintf("File System initialized!\n");
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}
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else
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rt_kprintf("File System initialzation failed!\n");
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#endif
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}
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#endif
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@@ -109,6 +127,8 @@ void rt_init_thread_entry(void* parameter)
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/* register ethernetif device */
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eth_system_device_init();
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rt_hw_macb_init();
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/* re-init device driver */
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//rt_device_init_all();
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/* init lwip system */
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lwip_sys_init();
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rt_kprintf("TCP/IP initialized!\n");
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,114 @@
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/*
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* File : at91_mci.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-06-09 weety first version
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*/
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#ifndef __AT91_MCI_H__
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#define __AT91_MCI_H__
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#define AT91_MCI_CR 0x00 /* Control Register */
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#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */
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#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */
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#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */
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#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */
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#define AT91_MCI_SWRST (1 << 7) /* Software Reset */
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#define AT91_MCI_MR 0x04 /* Mode Register */
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#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */
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#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */
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#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */
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#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */
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#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */
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#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */
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#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */
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#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */
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#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */
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#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */
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#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */
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#define AT91_MCI_DTOMUL_1 (0 << 4)
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#define AT91_MCI_DTOMUL_16 (1 << 4)
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#define AT91_MCI_DTOMUL_128 (2 << 4)
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#define AT91_MCI_DTOMUL_256 (3 << 4)
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#define AT91_MCI_DTOMUL_1K (4 << 4)
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#define AT91_MCI_DTOMUL_4K (5 << 4)
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#define AT91_MCI_DTOMUL_64K (6 << 4)
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#define AT91_MCI_DTOMUL_1M (7 << 4)
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#define AT91_MCI_SDCR 0x0c /* SD Card Register */
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#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */
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#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */
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#define AT91_MCI_ARGR 0x10 /* Argument Register */
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#define AT91_MCI_CMDR 0x14 /* Command Register */
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#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */
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#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */
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#define AT91_MCI_RSPTYP_NONE (0 << 6)
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#define AT91_MCI_RSPTYP_48 (1 << 6)
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#define AT91_MCI_RSPTYP_136 (2 << 6)
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#define AT91_MCI_SPCMD (7 << 8) /* Special Command */
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#define AT91_MCI_SPCMD_NONE (0 << 8)
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#define AT91_MCI_SPCMD_INIT (1 << 8)
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#define AT91_MCI_SPCMD_SYNC (2 << 8)
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#define AT91_MCI_SPCMD_ICMD (4 << 8)
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#define AT91_MCI_SPCMD_IRESP (5 << 8)
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#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */
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#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */
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#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */
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#define AT91_MCI_TRCMD_NONE (0 << 16)
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#define AT91_MCI_TRCMD_START (1 << 16)
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#define AT91_MCI_TRCMD_STOP (2 << 16)
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#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */
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#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */
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#define AT91_MCI_TRTYP_BLOCK (0 << 19)
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#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
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#define AT91_MCI_TRTYP_STREAM (2 << 19)
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#define AT91_MCI_BLKR 0x18 /* Block Register */
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#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
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#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */
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#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
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#define AT91_MCR_RDR 0x30 /* Receive Data Register */
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#define AT91_MCR_TDR 0x34 /* Transmit Data Register */
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#define AT91_MCI_SR 0x40 /* Status Register */
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#define AT91_MCI_CMDRDY (1U << 0) /* Command Ready */
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#define AT91_MCI_RXRDY (1U << 1) /* Receiver Ready */
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#define AT91_MCI_TXRDY (1U << 2) /* Transmit Ready */
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#define AT91_MCI_BLKE (1U << 3) /* Data Block Ended */
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#define AT91_MCI_DTIP (1U << 4) /* Data Transfer in Progress */
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#define AT91_MCI_NOTBUSY (1U << 5) /* Data Not Busy */
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#define AT91_MCI_ENDRX (1U << 6) /* End of RX Buffer */
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#define AT91_MCI_ENDTX (1U << 7) /* End fo TX Buffer */
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#define AT91_MCI_SDIOIRQA (1U << 8) /* SDIO Interrupt for Slot A */
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#define AT91_MCI_SDIOIRQB (1U << 9) /* SDIO Interrupt for Slot B */
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#define AT91_MCI_RXBUFF (1U << 14) /* RX Buffer Full */
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#define AT91_MCI_TXBUFE (1U << 15) /* TX Buffer Empty */
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#define AT91_MCI_RINDE (1U << 16) /* Response Index Error */
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#define AT91_MCI_RDIRE (1U << 17) /* Response Direction Error */
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#define AT91_MCI_RCRCE (1U << 18) /* Response CRC Error */
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#define AT91_MCI_RENDE (1U << 19) /* Response End Bit Error */
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#define AT91_MCI_RTOE (1U << 20) /* Reponse Time-out Error */
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#define AT91_MCI_DCRCE (1U << 21) /* Data CRC Error */
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#define AT91_MCI_DTOE (1U << 22) /* Data Time-out Error */
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#define AT91_MCI_OVRE (1U << 30) /* Overrun */
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#define AT91_MCI_UNRE (1U << 31) /* Underrun */
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#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */
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#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */
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#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */
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extern rt_int32_t at91_mci_init(void);
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#endif
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@@ -118,6 +118,8 @@
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//#define RT_USING_LED
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#define RT_USING_MMCSD
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#define RT_USING_DBGU
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/* #define RT_USING_UART0 */
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/* #define RT_USING_UART1 */
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@@ -0,0 +1,16 @@
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Import('RTT_ROOT')
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from building import *
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src = Split("""
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block_dev.c
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mmcsd_core.c
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sd.c
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""")
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# The set of source files associated with this SConscript file.
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path = [RTT_ROOT + '/components/mmcsd']
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group = DefineGroup('MMCSD', src, depend = ['RT_USING_MMCSD'], CPPPATH = path)
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Return('group')
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@@ -0,0 +1,447 @@
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/*
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* File : block_dev.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-07-25 weety first version
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*/
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#include <rtthread.h>
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#include <dfs_fs.h>
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#include "list.h"
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#include "mmcsd_core.h"
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#include "mmcsd_cmd.h"
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static rt_list_t blk_devices;
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struct mmcsd_blk_device {
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struct rt_mmcsd_card *card;
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rt_list_t list;
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struct rt_device dev;
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struct dfs_partition part;
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struct rt_device_blk_geometry geometry;
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};
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#ifndef RT_MMCSD_MAX_PARTITION
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#define RT_MMCSD_MAX_PARTITION 16
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#endif
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static rt_int32_t mmcsd_num_wr_blocks(struct rt_mmcsd_card *card)
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{
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rt_int32_t err;
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rt_uint32_t blocks;
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struct rt_mmcsd_req req;
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struct rt_mmcsd_cmd cmd;
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struct rt_mmcsd_data data;
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rt_uint32_t timeout_us;
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rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
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cmd.cmd_code = APP_CMD;
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cmd.arg = card->rca << 16;
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cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_AC;
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err = mmcsd_send_cmd(card->host, &cmd, 0);
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if (err)
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return -RT_ERROR;
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if (!controller_is_spi(card->host) && !(cmd.resp[0] & R1_APP_CMD))
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return -RT_ERROR;
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rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
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cmd.cmd_code = SD_APP_SEND_NUM_WR_BLKS;
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cmd.arg = 0;
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cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
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rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
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data.timeout_ns = card->tacc_ns * 100;
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data.timeout_clks = card->tacc_clks * 100;
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timeout_us = data.timeout_ns / 1000;
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timeout_us += data.timeout_clks * 1000 /
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(card->host->io_cfg.clock / 1000);
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if (timeout_us > 100000)
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{
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data.timeout_ns = 100000000;
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data.timeout_clks = 0;
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}
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data.blksize = 4;
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data.blks = 1;
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data.flags = DATA_DIR_READ;
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data.buf = &blocks;
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rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
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req.cmd = &cmd;
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req.data = &data;
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mmcsd_send_request(card->host, &req);
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if (cmd.err || data.err)
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return -RT_ERROR;
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return blocks;
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}
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static rt_err_t rt_mmcsd_req_blk(struct rt_mmcsd_card *card, rt_uint32_t sector, void *buf, rt_size_t blks, rt_uint8_t dir)
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{
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struct rt_mmcsd_cmd cmd, stop;
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struct rt_mmcsd_data data;
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struct rt_mmcsd_req req;
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struct rt_mmcsd_host *host = card->host;
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rt_uint32_t r_cmd, w_cmd;
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mmcsd_host_lock(host);
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rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
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rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
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rt_memset(&stop, 0, sizeof(struct rt_mmcsd_cmd));
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rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
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req.cmd = &cmd;
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req.data = &data;
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cmd.arg = sector;
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if (!(card->card_type & CARD_TYPE_SDHC))
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{
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cmd.arg <<= 9;
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}
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cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
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data.blksize = SECTOR_SIZE;
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data.blks = blks;
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if (blks > 1)
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{
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if (!controller_is_spi(card->host) || !dir)
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{
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req.stop = &stop;
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stop.cmd_code = STOP_TRANSMISSION;
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stop.arg = 0;
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stop.flags = RESP_SPI_R1B | RESP_R1B | CMD_AC;
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}
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r_cmd = READ_MULTIPLE_BLOCK;
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w_cmd = WRITE_MULTIPLE_BLOCK;
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}
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else
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{
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req.stop = NULL;
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r_cmd = READ_SINGLE_BLOCK;
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w_cmd = WRITE_BLOCK;
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}
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if (!dir)
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{
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cmd.cmd_code = r_cmd;
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data.flags |= DATA_DIR_READ;
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}
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else
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{
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cmd.cmd_code = w_cmd;
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data.flags |= DATA_DIR_WRITE;
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}
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mmcsd_set_data_timeout(&data, card);
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data.buf = buf;
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mmcsd_send_request(host, &req);
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if (!controller_is_spi(card->host) && dir != 0)
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{
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do
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{
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rt_int32_t err;
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cmd.cmd_code = SEND_STATUS;
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cmd.arg = card->rca << 16;
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cmd.flags = RESP_R1 | CMD_AC;
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err = mmcsd_send_cmd(card->host, &cmd, 5);
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if (err)
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{
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rt_kprintf("error %d requesting status\n", err);
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break;
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}
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/*
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* Some cards mishandle the status bits,
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* so make sure to check both the busy
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* indication and the card state.
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*/
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} while (!(cmd.resp[0] & R1_READY_FOR_DATA) ||
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(R1_CURRENT_STATE(cmd.resp[0]) == 7));
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}
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mmcsd_host_unlock(host);
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if (cmd.err || data.err || stop.err)
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{
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rt_kprintf("mmcsd request blocks error\n");
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rt_kprintf("%d,%d,%d, 0x%08x,0x%08x\n", cmd.err, data.err, stop.err, data.flags, sector);
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t rt_mmcsd_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_mmcsd_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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}
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static rt_err_t rt_mmcsd_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_mmcsd_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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struct mmcsd_blk_device *blk_dev = (struct mmcsd_blk_device *)dev->user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_BLK_GETGEOME:
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rt_memcpy(args, &blk_dev->geometry, sizeof(struct rt_device_blk_geometry));
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break;
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default: break;
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}
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return RT_EOK;
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}
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static rt_size_t rt_mmcsd_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_err_t err;
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struct mmcsd_blk_device *blk_dev = (struct mmcsd_blk_device *)dev->user_data;
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struct dfs_partition *part = &blk_dev->part;
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||||
if ( dev == RT_NULL )
|
||||
{
|
||||
rt_set_errno(-DFS_STATUS_EINVAL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
rt_sem_take(part->lock, RT_WAITING_FOREVER);
|
||||
err = rt_mmcsd_req_blk(blk_dev->card, part->offset + pos, buffer, size, 0);
|
||||
rt_sem_release(part->lock);
|
||||
|
||||
/* the length of reading must align to SECTOR SIZE */
|
||||
if (err)
|
||||
{
|
||||
rt_set_errno(-DFS_STATUS_EIO);
|
||||
return 0;
|
||||
}
|
||||
return size;
|
||||
}
|
||||
|
||||
static rt_size_t rt_mmcsd_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_err_t err;
|
||||
struct mmcsd_blk_device *blk_dev = (struct mmcsd_blk_device *)dev->user_data;
|
||||
struct dfs_partition *part = &blk_dev->part;
|
||||
|
||||
if ( dev == RT_NULL )
|
||||
{
|
||||
rt_set_errno(-DFS_STATUS_EINVAL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
rt_sem_take(part->lock, RT_WAITING_FOREVER);
|
||||
err = rt_mmcsd_req_blk(blk_dev->card, part->offset + pos, (void *)buffer, size, 1);
|
||||
rt_sem_release(part->lock);
|
||||
|
||||
/* the length of reading must align to SECTOR SIZE */
|
||||
if (err)
|
||||
{
|
||||
rt_set_errno(-DFS_STATUS_EIO);
|
||||
return 0;
|
||||
}
|
||||
return size;
|
||||
}
|
||||
|
||||
static rt_int32_t mmcsd_set_blksize(struct rt_mmcsd_card *card)
|
||||
{
|
||||
struct rt_mmcsd_cmd cmd;
|
||||
int err;
|
||||
|
||||
/* Block-addressed cards ignore MMC_SET_BLOCKLEN. */
|
||||
if (card->card_type & CARD_TYPE_SDHC)
|
||||
return 0;
|
||||
|
||||
mmcsd_host_lock(card->host);
|
||||
cmd.cmd_code = SET_BLOCKLEN;
|
||||
cmd.arg = 512;
|
||||
cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_AC;
|
||||
err = mmcsd_send_cmd(card->host, &cmd, 5);
|
||||
mmcsd_host_unlock(card->host);
|
||||
|
||||
if (err)
|
||||
{
|
||||
rt_kprintf("MMCSD: unable to set block size to %d: %d\n",
|
||||
cmd.arg, err);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card)
|
||||
{
|
||||
rt_int32_t err = 0;
|
||||
rt_uint8_t i, status;
|
||||
rt_uint8_t *sector;
|
||||
char dname[4];
|
||||
char sname[8];
|
||||
struct mmcsd_blk_device *blk_dev = RT_NULL;
|
||||
|
||||
err = mmcsd_set_blksize(card);
|
||||
if(err)
|
||||
{
|
||||
return err;
|
||||
}
|
||||
|
||||
/* get the first sector to read partition table */
|
||||
sector = (rt_uint8_t*) rt_malloc (SECTOR_SIZE);
|
||||
if (sector == RT_NULL)
|
||||
{
|
||||
rt_kprintf("allocate partition sector buffer failed\n");
|
||||
return -RT_ENOMEM;
|
||||
}
|
||||
|
||||
status = rt_mmcsd_req_blk(card, 0, sector, 1, 0);
|
||||
if (status == RT_EOK)
|
||||
{
|
||||
for(i=0; i < RT_MMCSD_MAX_PARTITION; i++)
|
||||
{
|
||||
blk_dev = rt_malloc(sizeof(struct mmcsd_blk_device));
|
||||
if (!blk_dev)
|
||||
{
|
||||
rt_kprintf("mmcsd:malloc mem failde\n");
|
||||
break;
|
||||
}
|
||||
rt_memset((void *)blk_dev, 0, sizeof(struct mmcsd_blk_device));
|
||||
/* get the first partition */
|
||||
status = dfs_filesystem_get_partition(&blk_dev->part, sector, i);
|
||||
if (status == RT_EOK)
|
||||
{
|
||||
rt_snprintf(dname, 4, "sd%d", i);
|
||||
rt_snprintf(sname, 8, "sem_sd%d", i);
|
||||
blk_dev->part.lock = rt_sem_create(sname, 1, RT_IPC_FLAG_FIFO);
|
||||
|
||||
/* register mmcsd device */
|
||||
blk_dev->dev.type = RT_Device_Class_Block;
|
||||
blk_dev->dev.init = rt_mmcsd_init;
|
||||
blk_dev->dev.open = rt_mmcsd_open;
|
||||
blk_dev->dev.close = rt_mmcsd_close;
|
||||
blk_dev->dev.read = rt_mmcsd_read;
|
||||
blk_dev->dev.write = rt_mmcsd_write;
|
||||
blk_dev->dev.control = rt_mmcsd_control;
|
||||
blk_dev->dev.user_data = blk_dev;
|
||||
|
||||
blk_dev->card = card;
|
||||
|
||||
blk_dev->geometry.bytes_per_sector = 1<<9;
|
||||
blk_dev->geometry.block_size = card->card_blksize;
|
||||
blk_dev->geometry.sector_count = blk_dev->part.size;
|
||||
|
||||
rt_device_register(&blk_dev->dev, dname,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
|
||||
list_insert_after(&blk_devices, &blk_dev->list);
|
||||
}
|
||||
else
|
||||
{
|
||||
if(i == 0)
|
||||
{
|
||||
/* there is no partition table */
|
||||
blk_dev->part.offset = 0;
|
||||
blk_dev->part.size = 0;
|
||||
blk_dev->part.lock = rt_sem_create("sem_sd0", 1, RT_IPC_FLAG_FIFO);
|
||||
|
||||
/* register mmcsd device */
|
||||
blk_dev->dev.type = RT_Device_Class_Block;
|
||||
blk_dev->dev.init = rt_mmcsd_init;
|
||||
blk_dev->dev.open = rt_mmcsd_open;
|
||||
blk_dev->dev.close = rt_mmcsd_close;
|
||||
blk_dev->dev.read = rt_mmcsd_read;
|
||||
blk_dev->dev.write = rt_mmcsd_write;
|
||||
blk_dev->dev.control = rt_mmcsd_control;
|
||||
blk_dev->dev.user_data = blk_dev;
|
||||
|
||||
blk_dev->card = card;
|
||||
|
||||
blk_dev->geometry.bytes_per_sector = 1<<9;
|
||||
blk_dev->geometry.block_size = card->card_blksize;
|
||||
if (card->card_type | CARD_TYPE_SDHC)
|
||||
{
|
||||
blk_dev->geometry.sector_count = (card->csd.c_size + 1) * 1024;
|
||||
}
|
||||
else
|
||||
{
|
||||
blk_dev->geometry.sector_count =
|
||||
card->card_capacity * 1024 / 512;
|
||||
}
|
||||
|
||||
rt_device_register(&blk_dev->dev, "sd0",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
|
||||
list_insert_after(&blk_devices, &blk_dev->list);
|
||||
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_free(blk_dev);
|
||||
blk_dev = RT_NULL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("read mmcsd first sector failed\n");
|
||||
err = -RT_ERROR;
|
||||
}
|
||||
|
||||
/* release sector buffer */
|
||||
rt_free(sector);
|
||||
|
||||
return err;
|
||||
|
||||
|
||||
}
|
||||
|
||||
void rt_mmcsd_blk_remove(struct rt_mmcsd_card *card)
|
||||
{
|
||||
rt_list_t *l;
|
||||
struct mmcsd_blk_device *blk_dev;
|
||||
|
||||
for (l = (&blk_devices)->next; l != &blk_devices; l = l->next)
|
||||
{
|
||||
blk_dev = (struct mmcsd_blk_device *)list_entry(l, struct mmcsd_blk_device, list);
|
||||
if (blk_dev->card == card)
|
||||
{
|
||||
rt_device_unregister(&blk_dev->dev);
|
||||
list_remove(&blk_dev->list);
|
||||
rt_free(blk_dev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void rt_mmcsd_blk_init(void)
|
||||
{
|
||||
list_init(&blk_devices);
|
||||
}
|
||||
@@ -0,0 +1,106 @@
|
||||
/*
|
||||
* File : list.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-01-15 weety copy from kservice APIs
|
||||
*/
|
||||
|
||||
#ifndef __RT_LIST_H__
|
||||
#define __RT_LIST_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @addtogroup list
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
/**
|
||||
* @brief initialize a list
|
||||
*
|
||||
* @param l list to be initialized
|
||||
*/
|
||||
rt_inline void list_init(rt_list_t *l)
|
||||
{
|
||||
l->next = l->prev = l;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief insert a node after a list
|
||||
*
|
||||
* @param l list to insert it
|
||||
* @param n new node to be inserted
|
||||
*/
|
||||
rt_inline void list_insert_after(rt_list_t *l, rt_list_t *n)
|
||||
{
|
||||
l->next->prev = n;
|
||||
n->next = l->next;
|
||||
|
||||
l->next = n;
|
||||
n->prev = l;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief insert a node before a list
|
||||
*
|
||||
* @param n new node to be inserted
|
||||
* @param l list to insert it
|
||||
*/
|
||||
rt_inline void list_insert_before(rt_list_t *l, rt_list_t *n)
|
||||
{
|
||||
l->prev->next = n;
|
||||
n->prev = l->prev;
|
||||
|
||||
l->prev = n;
|
||||
n->next = l;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief remove node from list.
|
||||
* @param n the node to remove from the list.
|
||||
*/
|
||||
rt_inline void list_remove(rt_list_t *n)
|
||||
{
|
||||
n->next->prev = n->prev;
|
||||
n->prev->next = n->next;
|
||||
|
||||
n->next = n->prev = n;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief tests whether a list is empty
|
||||
* @param l the list to test.
|
||||
*/
|
||||
rt_inline int list_isempty(const rt_list_t *l)
|
||||
{
|
||||
return l->next == l;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief get the struct for this entry
|
||||
* @param node the entry point
|
||||
* @param type the type of structure
|
||||
* @param member the name of list in structure
|
||||
*/
|
||||
#define list_entry(node, type, member) \
|
||||
((type *)((char *)(node) - (unsigned long)(&((type *)0)->member)))
|
||||
|
||||
/*@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* File : mmcsd_card.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-07-25 weety first version
|
||||
*/
|
||||
|
||||
#ifndef __MMCSD_CARD_H__
|
||||
#define __MMCSD_CARD_H__
|
||||
|
||||
#include "mmcsd_host.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SD_SCR_BUS_WIDTH_1 (1 << 0)
|
||||
#define SD_SCR_BUS_WIDTH_4 (1 << 2)
|
||||
|
||||
struct rt_mmcsd_cid {
|
||||
rt_uint8_t mid; /* ManufacturerID */
|
||||
rt_uint8_t prv; /* Product Revision */
|
||||
rt_uint16_t oid; /* OEM/Application ID */
|
||||
rt_uint32_t psn; /* Product Serial Number */
|
||||
rt_uint8_t pnm[5]; /* Product Name */
|
||||
rt_uint8_t reserved1;/* reserved */
|
||||
rt_uint16_t mdt; /* Manufacturing Date */
|
||||
rt_uint8_t crc; /* CID CRC */
|
||||
rt_uint8_t reserved2;/* not used, always 1 */
|
||||
};
|
||||
|
||||
struct rt_mmcsd_csd {
|
||||
rt_uint8_t csd_structure; /* CSD register version */
|
||||
rt_uint8_t taac;
|
||||
rt_uint8_t nsac;
|
||||
rt_uint8_t tran_speed; /* max data transfer rate */
|
||||
rt_uint16_t card_cmd_class; /* card command classes */
|
||||
rt_uint8_t rd_blk_len; /* max read data block length */
|
||||
rt_uint8_t rd_blk_part;
|
||||
rt_uint8_t wr_blk_misalign;
|
||||
rt_uint8_t rd_blk_misalign;
|
||||
rt_uint8_t dsr_imp; /* DSR implemented */
|
||||
rt_uint8_t c_size_mult; /* CSD 1.0 , device size multiplier */
|
||||
rt_uint32_t c_size; /* device size */
|
||||
rt_uint8_t r2w_factor;
|
||||
rt_uint8_t wr_blk_len; /* max wtire data block length */
|
||||
rt_uint8_t wr_blk_partial;
|
||||
rt_uint8_t csd_crc;
|
||||
|
||||
};
|
||||
|
||||
struct rt_sd_scr {
|
||||
rt_uint8_t sd_version;
|
||||
rt_uint8_t sd_bus_widths;
|
||||
};
|
||||
|
||||
struct rt_mmcsd_card {
|
||||
struct rt_mmcsd_host *host;
|
||||
rt_uint32_t rca; /* card addr */
|
||||
rt_uint32_t resp_cid[4]; /* card CID register */
|
||||
rt_uint32_t resp_csd[4]; /* card CSD register */
|
||||
rt_uint32_t resp_scr[2]; /* card SCR register */
|
||||
|
||||
rt_uint16_t tacc_clks; /* data access time by ns */
|
||||
rt_uint32_t tacc_ns; /* data access time by clk cycles */
|
||||
rt_uint32_t max_data_rate; /* max data transfer rate */
|
||||
rt_uint32_t card_capacity; /* card capacity, unit:KB */
|
||||
rt_uint32_t card_blksize; /* card block size */
|
||||
rt_uint32_t card_type;
|
||||
#define CARD_TYPE_MMC (1 << 0) /* MMC card */
|
||||
#define CARD_TYPE_SD (1 << 1) /* SD card */
|
||||
#define CARD_TYPE_SDIO (1 << 2) /* SDIO card */
|
||||
#define CARD_TYPE_SDHC (1 << 3) /* SDHC card */
|
||||
struct rt_sd_scr scr;
|
||||
struct rt_mmcsd_csd csd;
|
||||
rt_uint32_t hs_max_data_rate; /* max data transfer rate in high speed mode */
|
||||
rt_uint32_t flags;
|
||||
#define CARD_MODE_HIGHSPEED (1 << 0)
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,100 @@
|
||||
/*
|
||||
* File : mmcsd_cmd.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-07-25 weety first version
|
||||
*/
|
||||
|
||||
#ifndef __CMD_H__
|
||||
#define __CMD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* class 1 */
|
||||
#define GO_IDLE_STATE 0 /* bc */
|
||||
#define SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
|
||||
#define ALL_SEND_CID 2 /* bcr R2 */
|
||||
#define SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
|
||||
#define SET_DSR 4 /* bc [31:16] RCA */
|
||||
#define SWITCH 6 /* ac [31:0] See below R1b */
|
||||
#define SELECT_CARD 7 /* ac [31:16] RCA R1 */
|
||||
#define SEND_EXT_CSD 8 /* adtc R1 */
|
||||
#define SEND_CSD 9 /* ac [31:16] RCA R2 */
|
||||
#define SEND_CID 10 /* ac [31:16] RCA R2 */
|
||||
#define READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
|
||||
#define STOP_TRANSMISSION 12 /* ac R1b */
|
||||
#define SEND_STATUS 13 /* ac [31:16] RCA R1 */
|
||||
#define GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
|
||||
#define SPI_READ_OCR 58 /* spi spi_R3 */
|
||||
#define SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
|
||||
|
||||
/* class 2 */
|
||||
#define SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
|
||||
#define READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
|
||||
#define READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
|
||||
|
||||
/* class 3 */
|
||||
#define WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
|
||||
|
||||
/* class 4 */
|
||||
#define SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
|
||||
#define WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
|
||||
#define WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
|
||||
#define PROGRAM_CID 26 /* adtc R1 */
|
||||
#define PROGRAM_CSD 27 /* adtc R1 */
|
||||
|
||||
/* class 6 */
|
||||
#define SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
|
||||
#define CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
|
||||
#define SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
|
||||
|
||||
/* class 5 */
|
||||
#define ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
|
||||
#define ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
|
||||
#define ERASE 38 /* ac R1b */
|
||||
|
||||
/* class 9 */
|
||||
#define FAST_IO 39 /* ac <Complex> R4 */
|
||||
#define GO_IRQ_STATE 40 /* bcr R5 */
|
||||
|
||||
/* class 7 */
|
||||
#define LOCK_UNLOCK 42 /* adtc R1b */
|
||||
|
||||
/* class 8 */
|
||||
#define APP_CMD 55 /* ac [31:16] RCA R1 */
|
||||
#define GEN_CMD 56 /* adtc [0] RD/WR R1 */
|
||||
|
||||
|
||||
/* SD commands type argument response */
|
||||
/* class 0 */
|
||||
/* This is basically the same command as for MMC with some quirks. */
|
||||
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
|
||||
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
|
||||
|
||||
/* class 10 */
|
||||
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
|
||||
|
||||
/* Application commands */
|
||||
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
|
||||
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
|
||||
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
|
||||
#define SD_APP_SEND_SCR 51 /* adtc R1 */
|
||||
|
||||
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
|
||||
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
|
||||
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,258 @@
|
||||
/*
|
||||
* File : mmcsd_core.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-07-25 weety first version
|
||||
*/
|
||||
|
||||
#ifndef __CORE_H__
|
||||
#define __CORE_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "mmcsd_host.h"
|
||||
#include "mmcsd_card.h"
|
||||
#include "mmcsd_cmd.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef RT_MMCSD_DBG
|
||||
#define mmcsd_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
|
||||
#else
|
||||
#define mmcsd_dbg(fmt, ...)
|
||||
#endif
|
||||
|
||||
struct rt_mmcsd_data {
|
||||
rt_uint32_t blksize;
|
||||
rt_uint32_t blks;
|
||||
rt_uint32_t *buf;
|
||||
rt_int32_t err;
|
||||
rt_uint32_t flags;
|
||||
#define DATA_DIR_WRITE (1 << 0)
|
||||
#define DATA_DIR_READ (1 << 1)
|
||||
#define DATA_STREAM (1 << 2)
|
||||
rt_uint32_t timeout_ns;
|
||||
rt_uint32_t timeout_clks;
|
||||
};
|
||||
|
||||
struct rt_mmcsd_cmd {
|
||||
rt_uint32_t cmd_code;
|
||||
rt_uint32_t arg;
|
||||
rt_uint32_t resp[4];
|
||||
rt_uint32_t flags;
|
||||
/*rsponse types
|
||||
*bits:0~3
|
||||
*/
|
||||
#define RESP_MASK (0xF)
|
||||
#define RESP_NONE (0)
|
||||
#define RESP_R1 (1 << 0)
|
||||
#define RESP_R1B (2 << 0)
|
||||
#define RESP_R2 (3 << 0)
|
||||
#define RESP_R3 (4 << 0)
|
||||
#define RESP_R4 (5 << 0)
|
||||
#define RESP_R6 (6 << 0)
|
||||
#define RESP_R7 (7 << 0)
|
||||
/*command types
|
||||
*bits:4~5
|
||||
*/
|
||||
#define CMD_MASK (3 << 4) /* command type */
|
||||
#define CMD_AC (0 << 4)
|
||||
#define CMD_ADTC (1 << 4)
|
||||
#define CMD_BC (2 << 4)
|
||||
#define CMD_BCR (3 << 4)
|
||||
|
||||
#define resp_type(cmd) ((cmd)->flags & RESP_MASK)
|
||||
|
||||
/*spi rsponse types
|
||||
*bits:6~8
|
||||
*/
|
||||
#define RESP_SPI_MASK (0x7 << 6)
|
||||
#define RESP_SPI_R1 (1 << 6)
|
||||
#define RESP_SPI_R1B (2 << 6)
|
||||
#define RESP_SPI_R2 (3 << 6)
|
||||
#define RESP_SPI_R3 (4 << 6)
|
||||
#define RESP_SPI_R4 (5 << 6)
|
||||
#define RESP_SPI_R5 (6 << 6)
|
||||
#define RESP_SPI_R7 (7 << 6)
|
||||
|
||||
#define spi_resp_type(cmd) ((cmd)->flags & RESP_SPI_MASK)
|
||||
/*
|
||||
* These are the command types.
|
||||
*/
|
||||
#define cmd_type(cmd) ((cmd)->flags & CMD_MASK)
|
||||
|
||||
rt_int32_t err;
|
||||
|
||||
struct rt_mmcsd_data *data;
|
||||
};
|
||||
|
||||
struct rt_mmcsd_req {
|
||||
struct rt_mmcsd_data *data;
|
||||
struct rt_mmcsd_cmd *cmd;
|
||||
struct rt_mmcsd_cmd *stop;
|
||||
};
|
||||
|
||||
/*the following is response bit*/
|
||||
#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
|
||||
#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
|
||||
#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
|
||||
#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
|
||||
#define R1_ERASE_PARAM (1 << 27) /* ex, c */
|
||||
#define R1_WP_VIOLATION (1 << 26) /* erx, c */
|
||||
#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
|
||||
#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
|
||||
#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
|
||||
#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
|
||||
#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
|
||||
#define R1_CC_ERROR (1 << 20) /* erx, c */
|
||||
#define R1_ERROR (1 << 19) /* erx, c */
|
||||
#define R1_UNDERRUN (1 << 18) /* ex, c */
|
||||
#define R1_OVERRUN (1 << 17) /* ex, c */
|
||||
#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
|
||||
#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
|
||||
#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
|
||||
#define R1_ERASE_RESET (1 << 13) /* sr, c */
|
||||
#define R1_STATUS(x) (x & 0xFFFFE000)
|
||||
#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
|
||||
#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
|
||||
#define R1_APP_CMD (1 << 5) /* sr, c */
|
||||
|
||||
|
||||
#define R1_SPI_IDLE (1 << 0)
|
||||
#define R1_SPI_ERASE_RESET (1 << 1)
|
||||
#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
|
||||
#define R1_SPI_COM_CRC (1 << 3)
|
||||
#define R1_SPI_ERASE_SEQ (1 << 4)
|
||||
#define R1_SPI_ADDRESS (1 << 5)
|
||||
#define R1_SPI_PARAMETER (1 << 6)
|
||||
/* R1 bit 7 is always zero */
|
||||
#define R2_SPI_CARD_LOCKED (1 << 8)
|
||||
#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
|
||||
#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
|
||||
#define R2_SPI_ERROR (1 << 10)
|
||||
#define R2_SPI_CC_ERROR (1 << 11)
|
||||
#define R2_SPI_CARD_ECC_ERROR (1 << 12)
|
||||
#define R2_SPI_WP_VIOLATION (1 << 13)
|
||||
#define R2_SPI_ERASE_PARAM (1 << 14)
|
||||
#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
|
||||
#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
|
||||
|
||||
#define CARD_BUSY 0x80000000 /* Card Power up status bit */
|
||||
|
||||
/**
|
||||
* fls - find last (most-significant) bit set
|
||||
* @x: the word to search
|
||||
*
|
||||
* This is defined the same way as ffs.
|
||||
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
|
||||
*/
|
||||
|
||||
rt_inline rt_uint32_t fls(rt_uint32_t val)
|
||||
{
|
||||
rt_uint32_t bit = 32;
|
||||
|
||||
if (!val)
|
||||
return 0;
|
||||
if (!(val & 0xffff0000u))
|
||||
{
|
||||
val <<= 16;
|
||||
bit -= 16;
|
||||
}
|
||||
if (!(val & 0xff000000u))
|
||||
{
|
||||
val <<= 8;
|
||||
bit -= 8;
|
||||
}
|
||||
if (!(val & 0xf0000000u))
|
||||
{
|
||||
val <<= 4;
|
||||
bit -= 4;
|
||||
}
|
||||
if (!(val & 0xc0000000u))
|
||||
{
|
||||
val <<= 2;
|
||||
bit -= 2;
|
||||
}
|
||||
if (!(val & 0x80000000u))
|
||||
{
|
||||
val <<= 1;
|
||||
bit -= 1;
|
||||
}
|
||||
|
||||
return bit;
|
||||
}
|
||||
|
||||
#if !defined(__GNUC__)
|
||||
rt_inline rt_uint32_t ffs(rt_uint32_t x)
|
||||
{
|
||||
int r = 1;
|
||||
|
||||
if (!x)
|
||||
return 0;
|
||||
if (!(x & 0xffff)) {
|
||||
x >>= 16;
|
||||
r += 16;
|
||||
}
|
||||
if (!(x & 0xff)) {
|
||||
x >>= 8;
|
||||
r += 8;
|
||||
}
|
||||
if (!(x & 0xf)) {
|
||||
x >>= 4;
|
||||
r += 4;
|
||||
}
|
||||
if (!(x & 3)) {
|
||||
x >>= 2;
|
||||
r += 2;
|
||||
}
|
||||
if (!(x & 1)) {
|
||||
x >>= 1;
|
||||
r += 1;
|
||||
}
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
void mmcsd_host_lock(struct rt_mmcsd_host *host);
|
||||
void mmcsd_host_unlock(struct rt_mmcsd_host *host);
|
||||
void mmcsd_req_complete(struct rt_mmcsd_host *host);
|
||||
void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req);
|
||||
rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd, int retries);
|
||||
rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host);
|
||||
rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host, rt_int32_t high_capacity, rt_uint32_t *ocr);
|
||||
rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
|
||||
rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
|
||||
rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd);
|
||||
rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card);
|
||||
rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *host);
|
||||
rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc);
|
||||
void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode);
|
||||
void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk);
|
||||
void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode);
|
||||
void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width);
|
||||
void mmcsd_set_data_timeout(struct rt_mmcsd_data *data, const struct rt_mmcsd_card *card);
|
||||
rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr);
|
||||
void mmcsd_change(struct rt_mmcsd_host *host);
|
||||
void mmcsd_detect(void *param);
|
||||
struct rt_mmcsd_host *mmcsd_alloc_host(void);
|
||||
void mmcsd_free_host(struct rt_mmcsd_host *host);
|
||||
void rt_mmcsd_core_init(void);
|
||||
|
||||
void rt_mmcsd_blk_init(void);
|
||||
rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card);
|
||||
void rt_mmcsd_blk_remove(struct rt_mmcsd_card *card);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,117 @@
|
||||
/*
|
||||
* File : mmcsd_host.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-07-25 weety first version
|
||||
*/
|
||||
|
||||
#ifndef __HOST_H__
|
||||
#define __HOST_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct rt_mmcsd_io_cfg {
|
||||
rt_uint32_t clock; /* clock rate */
|
||||
rt_uint16_t vdd;
|
||||
|
||||
/* vdd stores the bit number of the selected voltage range from below. */
|
||||
|
||||
rt_uint8_t bus_mode; /* command output mode */
|
||||
|
||||
#define MMCSD_BUSMODE_OPENDRAIN 1
|
||||
#define MMCSD_BUSMODE_PUSHPULL 2
|
||||
|
||||
rt_uint8_t chip_select; /* SPI chip select */
|
||||
|
||||
#define MMCSD_CS_IGNORE 0
|
||||
#define MMCSD_CS_HIGH 1
|
||||
#define MMCSD_CS_LOW 2
|
||||
|
||||
rt_uint8_t power_mode; /* power supply mode */
|
||||
|
||||
#define MMCSD_POWER_OFF 0
|
||||
#define MMCSD_POWER_UP 1
|
||||
#define MMCSD_POWER_ON 2
|
||||
|
||||
rt_uint8_t bus_width; /* data bus width */
|
||||
|
||||
#define MMCSD_BUS_WIDTH_1 0
|
||||
#define MMCSD_BUS_WIDTH_4 2
|
||||
#define MMCSD_BUS_WIDTH_8 3
|
||||
|
||||
};
|
||||
|
||||
struct rt_mmcsd_host;
|
||||
struct rt_mmcsd_req;
|
||||
|
||||
struct rt_mmcsd_host_ops {
|
||||
void (*request)(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req);
|
||||
void (*set_iocfg)(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg);
|
||||
rt_int32_t (*get_card_status)(struct rt_mmcsd_host *host);
|
||||
};
|
||||
|
||||
struct rt_mmcsd_host {
|
||||
struct rt_mmcsd_card *card;
|
||||
const struct rt_mmcsd_host_ops *ops;
|
||||
rt_uint32_t freq_min;
|
||||
rt_uint32_t freq_max;
|
||||
struct rt_mmcsd_io_cfg io_cfg;
|
||||
rt_uint32_t valid_ocr; /* current valid OCR */
|
||||
#define VDD_165_195 (1 << 7) /* VDD voltage 1.65 - 1.95 */
|
||||
#define VDD_20_21 (1 << 8) /* VDD voltage 2.0 ~ 2.1 */
|
||||
#define VDD_21_22 (1 << 9) /* VDD voltage 2.1 ~ 2.2 */
|
||||
#define VDD_22_23 (1 << 10) /* VDD voltage 2.2 ~ 2.3 */
|
||||
#define VDD_23_24 (1 << 11) /* VDD voltage 2.3 ~ 2.4 */
|
||||
#define VDD_24_25 (1 << 12) /* VDD voltage 2.4 ~ 2.5 */
|
||||
#define VDD_25_26 (1 << 13) /* VDD voltage 2.5 ~ 2.6 */
|
||||
#define VDD_26_27 (1 << 14) /* VDD voltage 2.6 ~ 2.7 */
|
||||
#define VDD_27_28 (1 << 15) /* VDD voltage 2.7 ~ 2.8 */
|
||||
#define VDD_28_29 (1 << 16) /* VDD voltage 2.8 ~ 2.9 */
|
||||
#define VDD_29_30 (1 << 17) /* VDD voltage 2.9 ~ 3.0 */
|
||||
#define VDD_30_31 (1 << 18) /* VDD voltage 3.0 ~ 3.1 */
|
||||
#define VDD_31_32 (1 << 19) /* VDD voltage 3.1 ~ 3.2 */
|
||||
#define VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
|
||||
#define VDD_33_34 (1 << 21) /* VDD voltage 3.3 ~ 3.4 */
|
||||
#define VDD_34_35 (1 << 22) /* VDD voltage 3.4 ~ 3.5 */
|
||||
#define VDD_35_36 (1 << 23) /* VDD voltage 3.5 ~ 3.6 */
|
||||
rt_uint32_t flags; /* define device capabilities */
|
||||
#define MMCSD_BUSWIDTH_4 (1 << 0)
|
||||
#define MMCSD_BUSWIDTH_8 (1 << 1)
|
||||
#define MMCSD_MUTBLKWRITE (1 << 2)
|
||||
#define MMCSD_HOST_IS_SPI (1 << 3)
|
||||
#define controller_is_spi(host) (host->flags & MMCSD_HOST_IS_SPI)
|
||||
rt_uint32_t spi_use_crc;
|
||||
struct rt_semaphore bus_lock;
|
||||
struct rt_semaphore sem_ack;
|
||||
|
||||
void *private_data;
|
||||
};
|
||||
|
||||
rt_inline void mmcsd_delay_ms(rt_uint32_t ms)
|
||||
{
|
||||
if (ms < 1000 / RT_TICK_PER_SECOND)
|
||||
{
|
||||
rt_thread_delay(1);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_thread_delay(ms/(1000 / RT_TICK_PER_SECOND));
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,32 @@
|
||||
#ifndef __SD_H__
|
||||
#define __SD_H__
|
||||
/*
|
||||
* File : sd.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-07-25 weety first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "mmcsd_host.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
rt_err_t mmcsd_send_if_cond(struct rt_mmcsd_host *host, rt_uint32_t ocr);
|
||||
rt_err_t mmcsd_send_app_op_cond(struct rt_mmcsd_host *host, rt_uint32_t ocr, rt_uint32_t *rocr);
|
||||
rt_int32_t init_sd(struct rt_mmcsd_host *host, rt_uint32_t ocr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user