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Merge pull request #3356 from wangyq2018/es32f369x
[bsp]add bsp essemi/es32f369x.
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@@ -0,0 +1,27 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config SOC_ES32F3696LT
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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source "drivers/Kconfig"
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@@ -0,0 +1,98 @@
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# ES-PDS-ES32F369x 开发板 BSP 说明
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标签： EastSoft、国产MCU、Cortex-M3、ES32F3696LT
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## 1. 简介
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本文档为上海东软载波微电子开发团队为 ES-PDS-ES32F369x 开发板提供的 BSP (板级支持包) 说明。
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通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
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### 1.1 开发板介绍
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主要内容如下：
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ES-PDS-ES32F369x 是东软载波微电子官方推出的一款基于 ARM Cortex-M3 内核的开发板，最高主频为 96MHz，可满足基础功能测试及高端功能扩展等开发需求。
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开发板外观如下图所示：
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ES-PDS-ES32F369x-V1.2
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该开发板常用 **板载资源** 如下：
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- MCU：ES32F3696LT，主频 96MHz，96KB SRAM，512KB FLASH，50 GPIOs
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- 外部模块：SPI FLASH (MX25L64，8MB)、I2C EEPROM (M24C04，512B)
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- 常用外设
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- 可调电阻：1个(PA05)
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- LED：2个，(PF00/PF01)
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- 按键：6个，PB02、PB12、PC10、PC11、PC12、RESET(MRST)
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- 常用接口：GPIO、UART、SPI、I2C、CAN
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- 调试接口，ESLinkⅡ(EastSoft 官方推出的开发工具，有标准版和mini版两种版本，均自带 CDC 串口功能) SWD 下载
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外设支持:
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :----------- | :----------: | :--------------- |
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| SPI FLASH | 支持 | SPI0 |
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| **片上外设** | **支持情况** | **备注** |
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| GPIO | 支持 | 50 GPIOs |
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| UART | 支持 | UART0/1/2/3/4/5 |
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| SPI | 支持 | SPI0/1/2 |
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| I2C | 支持 | I2C0/1 |
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| CAN | 支持 | CAN0 |
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### 1.2 注意事项
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更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)
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## 2. 快速上手
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本 BSP 为开发者提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
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### 硬件连接
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使用 ESLinkⅡ (自带 CDC 串口)或 Jlink 等调试工具连接开发板到 PC，拨动开关选择使用调试工具供电或使用外部电源供电。若使用 Jlink 等调试工具，还需要将 UART0_TX(PB10)、UART0_RX(PB11)、GND 接到串口工具上。
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使用ESlinkⅡ(mini)连接开发板如下图所示：
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ESLinkⅡ(mini) + ES-PDS-ES32F369x-V1.2
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### 编译下载
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双击 project.uvprojx 文件，打开 MDK5 工程，工程默认配置使用 JLink 下载程序，在通过 JLink 连接开发板的基础上，点击下载按钮即可下载程序到开发板，如果使用 ESLinkⅡ，则选择 "CMSIS-DAP Debugger"，连接正常后即可编译并下载程序到开发板。
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### 运行结果
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下载程序成功之后，系统会自动运行，观察串口输出的信息，同时开发板LED闪烁。
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 4.0.2 build Jan 23 2020
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2006 - 2019 Copyright by rt-thread team
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msh>
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```
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## 3. 进阶使用
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此 BSP 默认只开启了 GPIO 和 uart0 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下：
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1. 在 bsp 下打开 env 工具。
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2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
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3. 输入`pkgs --update`命令更新软件包。
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4. 输入`scons --target=mdk5/iar` 命令重新生成工程。
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更多 Env 工具的详细介绍请参考 [RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
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## 4. 联系人信息
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- [wangyongquan](https://github.com/wangyq2018)
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## 5. 参考
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- [ EastSoft 官网](http://www.essemi.com)
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@@ -0,0 +1,14 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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objs = []
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cwd = str(Dir('#'))
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,40 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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# make a building
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DoBuilding(TARGET, objs)
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@@ -0,0 +1,11 @@
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Import('RTT_ROOT')
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Import('rtconfig')
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from building import *
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cwd = os.path.join(str(Dir('#')), 'applications')
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src = Glob('*.c')
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CPPPATH = [cwd, str(Dir('#'))]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@@ -0,0 +1,30 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-01-14 wangyq the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#define LED_PIN 18
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int main(void)
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{
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int count = 1;
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/* set PF00 pin mode to output */
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rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
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while (count++)
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{
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rt_pin_write(LED_PIN, PIN_HIGH);
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rt_thread_mdelay(500);
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rt_pin_write(LED_PIN, PIN_LOW);
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rt_thread_mdelay(500);
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}
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return RT_EOK;
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}
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@@ -0,0 +1,93 @@
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menu "Hardware Drivers Config"
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menu "On-chip Peripheral Drivers"
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config BSP_USING_GPIO
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bool "Enable GPIO"
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select RT_USING_PIN
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default y
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menu "UART Drivers"
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config BSP_USING_UART0
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bool "Enable UART0 PB10/PB11(T/R)"
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select RT_USING_SERIAL
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default n
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config BSP_USING_UART1
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bool "Enable UART1 PC10/PC11(T/R)"
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select RT_USING_SERIAL
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default n
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config BSP_USING_UART2
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bool "Enable UART2 PC12/PD02(T/R)"
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select RT_USING_SERIAL
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default y
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depends on !BSP_USING_HWTIMER1
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config BSP_USING_UART3
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bool "Enable UART3 PC04/PC05(T/R)"
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select RT_USING_SERIAL
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default n
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depends on !BSP_USING_HWTIMER2
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config BSP_USING_UART4
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bool "Enable UART4 PB06/PB07(T/R)"
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select RT_USING_SERIAL
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default n
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depends on !BSP_USING_I2C0
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config BSP_USING_UART5
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bool "Enable UART5 PB09/PB08(T/R)"
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select RT_USING_SERIAL
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default n
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endmenu
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menu "SPI Drivers"
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config BSP_USING_SPI0
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bool "Enable SPI0 BUS PB03/PB04/PB05(CLK/MISO/MOSI)"
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select RT_USING_SPI
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select RT_USING_PIN
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default n
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config BSP_USING_SPI1
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bool "Enable SPI1 BUS PC01/PC02/PC03(CLK/MISO/MOSI)"
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select RT_USING_SPI
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select RT_USING_PIN
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default n
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config BSP_USING_SPI2
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bool "Enable SPI2 BUS PC05/PB00/PB01(CLK/MISO/MOSI)"
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select RT_USING_SPI
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select RT_USING_PIN
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default n
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endmenu
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menu "I2C Drivers"
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config BSP_USING_I2C0
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bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)"
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select RT_USING_I2C
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default n
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config BSP_USING_I2C1
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bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)"
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select RT_USING_I2C
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default n
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endmenu
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menu "CAN Drivers"
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config BSP_USING_CAN
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bool "Enable CAN BUS PB08/PB09(RX/TX)"
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select RT_USING_CAN
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default n
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endmenu
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endmenu
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menu "Onboard Peripheral Drivers"
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endmenu
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menu "Offboard Peripheral Drivers"
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endmenu
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endmenu
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@@ -0,0 +1,34 @@
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from building import *
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cwd = GetCurrentDir()
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# add the general drivers.
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src = Split('''
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board.c
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''')
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# add gpio code
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||||
if GetDepend('RT_USING_PIN'):
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src += ['drv_gpio.c']
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|
||||
# add serial driver code
|
||||
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3') or \
|
||||
GetDepend('BSP_USING_UART4') or GetDepend('BSP_USING_UART5'):
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src += ['drv_uart.c']
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||||
|
||||
# add spi driver code
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||||
if GetDepend('BSP_USING_SPI0') or GetDepend('BSP_USING_SPI1') or GetDepend('BSP_USING_SPI2'):
|
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src += ['drv_spi.c']
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|
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# add i2c driver code
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||||
if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
|
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src += ['drv_i2c.c']
|
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|
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# add can driver code
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if GetDepend('BSP_USING_CAN'):
|
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src += ['drv_can.c']
|
||||
|
||||
CPPPATH = [cwd]
|
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
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||||
#include <rtthread.h>
|
||||
#include "board.h"
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||||
#include "drv_uart.h"
|
||||
#include "drv_gpio.h"
|
||||
#include <ald_cmu.h>
|
||||
#include <ald_gpio.h>
|
||||
|
||||
/**
|
||||
* @addtogroup es32f3
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NVIC_Configuration
|
||||
* Description : Configures Vector Table base location.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SystemClock_Configuration
|
||||
* Description : Configures the System Clock.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
/* hosc 12MHz, from hosc/3 pll to 96MHz */
|
||||
ald_cmu_pll1_config(CMU_PLL1_INPUT_HOSC_3, CMU_PLL1_OUTPUT_96M);
|
||||
/* SYSCLK 96MHz */
|
||||
ald_cmu_clock_config(CMU_CLOCK_PLL1, 96000000);
|
||||
ald_cmu_perh_clock_config(CMU_PERH_ALL, ENABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SysTick_Configuration
|
||||
* Description : Configures the SysTick for OS tick.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SysTick_Configuration(void)
|
||||
{
|
||||
/* ticks = sysclk / RT_TICK_PER_SECOND */
|
||||
SysTick_Config(ald_cmu_get_sys_clock() / RT_TICK_PER_SECOND);
|
||||
}
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
rt_tick_increase();
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
/**
|
||||
* This function will initial ES32F3 board.
|
||||
*/
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
/* NVIC Configuration */
|
||||
NVIC_Configuration();
|
||||
/*System Clock Configuration */
|
||||
SystemClock_Config();
|
||||
/* Configure the SysTick */
|
||||
SysTick_Configuration();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
unsigned int start, now, delta, reload, us_tick;
|
||||
start = SysTick->VAL;
|
||||
reload = SysTick->LOAD;
|
||||
us_tick = ald_cmu_get_sys_clock() / 1000000UL;
|
||||
do
|
||||
{
|
||||
now = SysTick->VAL;
|
||||
delta = start > now ? start - now : reload + start - now;
|
||||
}
|
||||
while (delta < us_tick * us);
|
||||
}
|
||||
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <es32f36xx.h>
|
||||
|
||||
#define ES32F3_SRAM_SIZE 0x80000
|
||||
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END ES32F3_SRAM_END
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_CAN_H__
|
||||
#define DRV_CAN_H__
|
||||
|
||||
#include <board.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <ald_can.h>
|
||||
#include <ald_gpio.h>
|
||||
|
||||
struct es32f3_baud_rate_tab
|
||||
{
|
||||
rt_uint32_t baud_rate;
|
||||
rt_uint32_t config_data;
|
||||
};
|
||||
|
||||
/* es32f3 can device */
|
||||
struct es32f3_can
|
||||
{
|
||||
can_handle_t CanHandle;
|
||||
can_filter_t FilterConfig;
|
||||
struct rt_can_device device; /* inherit from can device */
|
||||
};
|
||||
|
||||
int rt_hw_can_init(void);
|
||||
|
||||
#endif /*DRV_CAN_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,160 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
* 2019-11-01 wangyq update libraries
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "board.h"
|
||||
#include "drv_i2c.h"
|
||||
#include <ald_i2c.h>
|
||||
#include <ald_gpio.h>
|
||||
|
||||
#ifdef RT_USING_I2C
|
||||
|
||||
#define TIMEOUT 0x0FFF
|
||||
|
||||
/* I2C struct definition */
|
||||
#ifdef BSP_USING_I2C0
|
||||
static i2c_handle_t _h_i2c0;
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C1
|
||||
static i2c_handle_t _h_i2c1;
|
||||
#endif
|
||||
|
||||
static void _i2c_init(void)
|
||||
{
|
||||
gpio_init_t gpio_instruct;
|
||||
|
||||
/* Initialize I2C Pin */
|
||||
gpio_instruct.mode = GPIO_MODE_OUTPUT;
|
||||
gpio_instruct.odos = GPIO_PUSH_PULL;
|
||||
gpio_instruct.pupd = GPIO_PUSH_UP;
|
||||
gpio_instruct.podrv = GPIO_OUT_DRIVE_1;
|
||||
gpio_instruct.nodrv = GPIO_OUT_DRIVE_0_1;
|
||||
gpio_instruct.flt = GPIO_FILTER_DISABLE;
|
||||
gpio_instruct.type = GPIO_TYPE_CMOS;
|
||||
gpio_instruct.func = GPIO_FUNC_5;
|
||||
|
||||
#ifdef BSP_USING_I2C0
|
||||
/* Initialize I2C Function */
|
||||
_h_i2c0.perh = I2C0;
|
||||
_h_i2c0.init.clk_speed = 100000;
|
||||
_h_i2c0.init.own_addr1 = 0x0A;
|
||||
_h_i2c0.init.addr_mode = I2C_ADDR_7BIT;
|
||||
_h_i2c0.init.general_call = I2C_GENERALCALL_DISABLE;
|
||||
_h_i2c0.init.no_stretch = I2C_NOSTRETCH_ENABLE;
|
||||
|
||||
ald_i2c_reset(&_h_i2c0);
|
||||
ald_i2c_init(&_h_i2c0);
|
||||
/* PB8->I2C0_SCL, PB9->I2C0_SDA */
|
||||
ald_gpio_init(GPIOB, GPIO_PIN_8 | GPIO_PIN_9, &gpio_instruct);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C1
|
||||
/* Initialize i2c function */
|
||||
_h_i2c1.perh = I2C1;
|
||||
_h_i2c1.init.clk_speed = 100000;
|
||||
_h_i2c1.init.own_addr1 = 0xA0;
|
||||
_h_i2c1.init.addr_mode = I2C_ADDR_7BIT;
|
||||
_h_i2c1.init.general_call = I2C_GENERALCALL_DISABLE;
|
||||
_h_i2c1.init.no_stretch = I2C_NOSTRETCH_ENABLE;
|
||||
|
||||
ald_i2c_reset(&_h_i2c1);
|
||||
ald_i2c_init(&_h_i2c1);
|
||||
/* PA05->I2C1_SCL, PA06->I2C1_SDA */
|
||||
ald_gpio_init(GPIOA, GPIO_PIN_5 | GPIO_PIN_6, &gpio_instruct);
|
||||
#endif
|
||||
}
|
||||
|
||||
static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
|
||||
struct rt_i2c_msg msgs[],
|
||||
rt_uint32_t num)
|
||||
{
|
||||
struct rt_i2c_msg *msg;
|
||||
rt_uint32_t i;
|
||||
rt_err_t ret = RT_ERROR;
|
||||
|
||||
for (i = 0; i < num; i++)
|
||||
{
|
||||
msg = &msgs[i];
|
||||
if (msg->flags & RT_I2C_RD)
|
||||
{
|
||||
if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
|
||||
{
|
||||
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ald_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
|
||||
{
|
||||
i2c_dbg("i2c bus write failed,i2c bus stop!\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
ret = i;
|
||||
|
||||
out:
|
||||
i2c_dbg("send stop condition\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
const struct rt_i2c_bus_device_ops es32f3_i2c_ops =
|
||||
{
|
||||
es32f3_master_xfer,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_i2c_init(void)
|
||||
{
|
||||
int result = RT_EOK;
|
||||
|
||||
_i2c_init();
|
||||
|
||||
#ifdef BSP_USING_I2C0
|
||||
/* define i2c Instance */
|
||||
static struct rt_i2c_bus_device _i2c_device0;
|
||||
rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
|
||||
|
||||
_i2c_device0.ops = &es32f3_i2c_ops;
|
||||
_i2c_device0.priv = &_h_i2c0;
|
||||
result = rt_i2c_bus_device_register(&_i2c_device0, "i2c0");
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C1
|
||||
/* define i2c Instance */
|
||||
static struct rt_i2c_bus_device _i2c_device1;
|
||||
rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
|
||||
|
||||
_i2c_device1.ops = &es32f3_i2c_ops;
|
||||
_i2c_device1.priv = &_h_i2c1;
|
||||
rt_i2c_bus_device_register(&_i2c_device1, "i2c1");
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_I2C_H__
|
||||
#define DRV_I2C_H__
|
||||
|
||||
int rt_hw_i2c_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H__
|
||||
#define DRV_SPI_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
struct es32f3_hw_spi_cs
|
||||
{
|
||||
rt_uint32_t pin;
|
||||
};
|
||||
|
||||
/* cannot be used before completion init */
|
||||
rt_err_t es32f3_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name);
|
||||
int rt_hw_spi_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-01-14 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_UART_H__
|
||||
#define DRV_UART_H__
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x00080000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 3.6 MiB |
Binary file not shown.
|
After Width: | Height: | Size: 2.4 MiB |
File diff suppressed because it is too large.
Load diff
+502
File diff suppressed because it is too large.
Load diff
+619
File diff suppressed because it is too large.
Load diff
+28
@@ -0,0 +1,28 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file system_es32f3xx.c
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 24 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configuring system clock before startup.
|
||||
* @note This function must be used after reset.
|
||||
* @retval None
|
||||
*/
|
||||
void system_init (void)
|
||||
{
|
||||
/* do nothing */
|
||||
}
|
||||
@@ -0,0 +1,121 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
* Description: Extern declaration for common tables
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_H
|
||||
#define _ARM_COMMON_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
extern const uint16_t armBitRevTable[1024];
|
||||
extern const q15_t armRecipTableQ15[64];
|
||||
extern const q31_t armRecipTableQ31[64];
|
||||
extern const float32_t twiddleCoef_16[32];
|
||||
extern const float32_t twiddleCoef_32[64];
|
||||
extern const float32_t twiddleCoef_64[128];
|
||||
extern const float32_t twiddleCoef_128[256];
|
||||
extern const float32_t twiddleCoef_256[512];
|
||||
extern const float32_t twiddleCoef_512[1024];
|
||||
extern const float32_t twiddleCoef_1024[2048];
|
||||
extern const float32_t twiddleCoef_2048[4096];
|
||||
extern const float32_t twiddleCoef_4096[8192];
|
||||
#define twiddleCoef twiddleCoef_4096
|
||||
extern const q31_t twiddleCoef_16_q31[24];
|
||||
extern const q31_t twiddleCoef_32_q31[48];
|
||||
extern const q31_t twiddleCoef_64_q31[96];
|
||||
extern const q31_t twiddleCoef_128_q31[192];
|
||||
extern const q31_t twiddleCoef_256_q31[384];
|
||||
extern const q31_t twiddleCoef_512_q31[768];
|
||||
extern const q31_t twiddleCoef_1024_q31[1536];
|
||||
extern const q31_t twiddleCoef_2048_q31[3072];
|
||||
extern const q31_t twiddleCoef_4096_q31[6144];
|
||||
extern const q15_t twiddleCoef_16_q15[24];
|
||||
extern const q15_t twiddleCoef_32_q15[48];
|
||||
extern const q15_t twiddleCoef_64_q15[96];
|
||||
extern const q15_t twiddleCoef_128_q15[192];
|
||||
extern const q15_t twiddleCoef_256_q15[384];
|
||||
extern const q15_t twiddleCoef_512_q15[768];
|
||||
extern const q15_t twiddleCoef_1024_q15[1536];
|
||||
extern const q15_t twiddleCoef_2048_q15[3072];
|
||||
extern const q15_t twiddleCoef_4096_q15[6144];
|
||||
extern const float32_t twiddleCoef_rfft_32[32];
|
||||
extern const float32_t twiddleCoef_rfft_64[64];
|
||||
extern const float32_t twiddleCoef_rfft_128[128];
|
||||
extern const float32_t twiddleCoef_rfft_256[256];
|
||||
extern const float32_t twiddleCoef_rfft_512[512];
|
||||
extern const float32_t twiddleCoef_rfft_1024[1024];
|
||||
extern const float32_t twiddleCoef_rfft_2048[2048];
|
||||
extern const float32_t twiddleCoef_rfft_4096[4096];
|
||||
|
||||
/* floating-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
|
||||
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
|
||||
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
|
||||
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
|
||||
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
|
||||
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
|
||||
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
|
||||
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
|
||||
|
||||
/* fixed-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
|
||||
|
||||
/* Tables for Fast Math Sine and Cosine */
|
||||
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
|
||||
|
||||
#endif /* ARM_COMMON_TABLES_H */
|
||||
@@ -0,0 +1,66 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
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@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.2
|
||||
* @date 19. April 2017
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
File diff suppressed because it is too large.
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@@ -0,0 +1,197 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U)
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U)
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U)
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU)
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU)
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU)
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU)
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU)
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU)
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU)
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU)
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU)
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU)
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU)
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU)
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U
|
||||
#define ARM_MPU_AP_PRIV 1U
|
||||
#define ARM_MPU_AP_URO 2U
|
||||
#define ARM_MPU_AP_FULL 3U
|
||||
#define ARM_MPU_AP_PRO 5U
|
||||
#define ARM_MPU_AP_RO 6U
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size ) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(MPU_RASR_ENABLE_Msk))
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,70 @@
|
||||
/******************************************************************************
|
||||
* @file tz_context.h
|
||||
* @brief Context Management for Armv8-M TrustZone
|
||||
* @version V1.0.1
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef TZ_CONTEXT_H
|
||||
#define TZ_CONTEXT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef TZ_MODULEID_T
|
||||
#define TZ_MODULEID_T
|
||||
/// \details Data type that identifies secure software modules called by a process.
|
||||
typedef uint32_t TZ_ModuleId_t;
|
||||
#endif
|
||||
|
||||
/// \details TZ Memory ID identifies an allocated memory slot.
|
||||
typedef uint32_t TZ_MemoryId_t;
|
||||
|
||||
/// Initialize secure context memory system
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_InitContextSystem_S (void);
|
||||
|
||||
/// Allocate context memory for calling secure software modules in TrustZone
|
||||
/// \param[in] module identifies software modules called from non-secure mode
|
||||
/// \return value != 0 id TrustZone memory slot identifier
|
||||
/// \return value 0 no memory available or internal error
|
||||
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
|
||||
|
||||
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Load secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Store secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
|
||||
|
||||
#endif // TZ_CONTEXT_H
|
||||
BIN
Binary file not shown.
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,194 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_bkpc.h
|
||||
* @brief Header file of BKPC module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 15 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_BKPC_H__
|
||||
#define __ALD_BKPC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup BKPC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup BKPC_Public_Macros BKPC Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define BKPC_LOCK() (WRITE_REG(BKPC->PROT, 0))
|
||||
#define BKPC_UNLOCK() (WRITE_REG(BKPC->PROT, 0x9669AA55))
|
||||
#define BKPC_LRC_ENABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
SET_BIT(BKPC->CR, BKPC_CR_LRCEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_LRC_DISABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
CLEAR_BIT(BKPC->CR, BKPC_CR_LRCEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_LOSM_ENABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
SET_BIT(BKPC->CR, BKPC_CR_LOSMEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_LOSM_DISABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
CLEAR_BIT(BKPC->CR, BKPC_CR_LOSMEN_MSK);\
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_LOSC_ENABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
SET_BIT(BKPC->CR, BKPC_CR_LOSCEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_LOSC_DISABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
CLEAR_BIT(BKPC->CR, BKPC_CR_LOSCEN_MSK);\
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define BKPC_MRST_WAKEUP_ENABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
SET_BIT(BKPC->CR, BKPC_CR_MRST_WKPEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
#define BKPC_MRST_WAKEUP_DISABLE() \
|
||||
do { \
|
||||
BKPC_UNLOCK(); \
|
||||
CLEAR_BIT(BKPC->CR, BKPC_CR_MRST_WKPEN_MSK); \
|
||||
BKPC_LOCK(); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup BKPC_Public_Types BKPC Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief BKPC preipheral clock select.
|
||||
*/
|
||||
typedef enum {
|
||||
BKPC_PREH_CLK_LOSM = 0x0, /**< LOSM */
|
||||
BKPC_PREH_CLK_LRC = 0x1, /**< LRC */
|
||||
BKPC_PREH_CLK_HRC_1M = 0x2, /**< HRC down to 1MHz */
|
||||
BKPC_PREH_CLK_HOSC_1M = 0x3, /**< HOSC down to 1MHz */
|
||||
} bkpc_preh_clk_t;
|
||||
|
||||
/**
|
||||
* @brief Standby wakeup port select
|
||||
*/
|
||||
typedef enum {
|
||||
PMU_STANDBY_PORT_SEL_PA0 = 0x0, /**< PA0 */
|
||||
PMU_STANDBY_PORT_SEL_PA1 = 0x1, /**< PA1 */
|
||||
PMU_STANDBY_PORT_SEL_PA2 = 0x2, /**< PA2 */
|
||||
PMU_STANDBY_PORT_SEL_PA3 = 0x3, /**< PA3 */
|
||||
PMU_STANDBY_PORT_SEL_PA4 = 0x4, /**< PA4 */
|
||||
PMU_STANDBY_PORT_SEL_PA5 = 0x5, /**< PA5 */
|
||||
PMU_STANDBY_PORT_SEL_PA6 = 0x6, /**< PA6 */
|
||||
PMU_STANDBY_PORT_SEL_PA7 = 0x7, /**< PA7 */
|
||||
} bkpc_wakeup_port_t;
|
||||
|
||||
/**
|
||||
* @brief Standby wakeup level
|
||||
*/
|
||||
typedef enum {
|
||||
PMU_STANDBY_LEVEL_HIGH = 0x0, /**< PA0 */
|
||||
PMU_STANDBY_LEVEL_LOW = 0x1, /**< PA1 */
|
||||
} bkpc_wakeup_level_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup BKPC_Private_Macros BKPC Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_BKPC_WAKEUP_PORT(x) (((x) == PMU_STANDBY_PORT_SEL_PA0) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA1) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA2) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA3) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA4) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA5) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA6) || \
|
||||
((x) == PMU_STANDBY_PORT_SEL_PA7))
|
||||
#define IS_BKPC_WAKEUP_LEVEL(x) (((x) == PMU_STANDBY_LEVEL_HIGH) || \
|
||||
((x) == PMU_STANDBY_LEVEL_LOW))
|
||||
#define IS_BKPC_PREH_CLOCK(x) (((x) == BKPC_PREH_CLK_LOSM) || \
|
||||
((x) == BKPC_PREH_CLK_LRC) || \
|
||||
((x) == BKPC_PREH_CLK_HRC_1M) || \
|
||||
((x) == BKPC_PREH_CLK_HOSC_1M))
|
||||
#define IS_BKPC_RAM_IDX(x) ((x) < 32)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup BKPC_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup BKPC_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* control functions */
|
||||
extern void ald_bkpc_standby_wakeup_config(bkpc_wakeup_port_t port, bkpc_wakeup_level_t level);
|
||||
extern void ald_bkpc_rtc_clock_config(bkpc_preh_clk_t clock);
|
||||
extern void ald_bkpc_tsense_clock_config(bkpc_preh_clk_t clock);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup BKPC_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions */
|
||||
extern void ald_bkpc_write_ram(uint8_t idx, uint32_t value);
|
||||
extern uint32_t ald_bkpc_read_ram(uint8_t idx);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_BKPC_H__ */
|
||||
@@ -0,0 +1,57 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_calc.h
|
||||
* @brief Header file of CALC module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 26 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_CALC_H__
|
||||
#define __ALD_CALC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CALC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CALC_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
extern uint32_t ald_calc_sqrt(uint32_t data);
|
||||
extern uint32_t ald_calc_div(uint32_t dividend, uint32_t divisor, uint32_t *remainder);
|
||||
extern int32_t ald_calc_div_sign(int32_t dividend, int32_t divisor, int32_t *remainder);
|
||||
extern flag_status_t ald_calc_get_dz_status(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_CALC_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,64 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_conf.h
|
||||
* @brief Enable/Disable the peripheral module.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 01 Jul 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __ALD_CONF_H__
|
||||
#define __ALD_CONF_H__
|
||||
|
||||
|
||||
#define ALD_DMA
|
||||
#define ALD_GPIO
|
||||
#define ALD_UART
|
||||
#define ALD_LPUART
|
||||
#define ALD_I2C
|
||||
#define ALD_CMU
|
||||
#define ALD_RMU
|
||||
#define ALD_PMU
|
||||
#define ALD_WDT
|
||||
#define ALD_LCD
|
||||
#define ALD_RTC
|
||||
#define ALD_CAN
|
||||
#define ALD_FLASH
|
||||
#define ALD_ADC
|
||||
#define ALD_CRC
|
||||
#define ALD_CRYPT
|
||||
#define ALD_TIMER
|
||||
#define ALD_LPTIM
|
||||
#define ALD_PIS
|
||||
#define ALD_SPI
|
||||
#define ALD_CALC
|
||||
#define ALD_ACMP
|
||||
#define ALD_OPAMP
|
||||
#define ALD_TRNG
|
||||
#define ALD_TSENSE
|
||||
#define ALD_BKPC
|
||||
#define ALD_DAC
|
||||
#define ALD_IAP
|
||||
#define ALD_I2S
|
||||
#define ALD_ECC
|
||||
#define ALD_NAND
|
||||
#define ALD_QSPI
|
||||
#define ALD_NOR
|
||||
#define ALD_SRAM
|
||||
#define ALD_USB
|
||||
|
||||
#if defined(ALD_NAND) || defined(ALD_NOR) || defined(ALD_SRAM)
|
||||
#define ALD_EBI
|
||||
#endif
|
||||
|
||||
#define TICK_INT_PRIORITY 3
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,196 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_crc.h
|
||||
* @brief Header file of CRC module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 18 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_CRC_H__
|
||||
#define __ALD_CRC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
#include "ald_dma.h"
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Public_Types CRC Public Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRC mode
|
||||
*/
|
||||
typedef enum {
|
||||
CRC_MODE_CCITT = 0, /**< Ccitt */
|
||||
CRC_MODE_8 = 1, /**< Crc8 */
|
||||
CRC_MODE_16 = 2, /**< Crc16 */
|
||||
CRC_MODE_32 = 3, /**< Crc32 */
|
||||
} crc_mode_t;
|
||||
|
||||
/**
|
||||
* @brief CRC input length
|
||||
*/
|
||||
typedef enum {
|
||||
CRC_LEN_AUTO = 0, /**< Auto */
|
||||
CRC_DATASIZE_8 = 1, /**< Byte */
|
||||
CRC_DATASIZE_16 = 2, /**< Half word */
|
||||
CRC_DATASIZE_32 = 3, /**< Word */
|
||||
} crc_datasize_t;
|
||||
|
||||
/**
|
||||
* @brief CRC whether write error or no
|
||||
*/
|
||||
typedef enum {
|
||||
CRC_WERR_NO = 0, /**< No error */
|
||||
CRC_WERR_ERR = 1, /**< Error */
|
||||
} crc_werr_t;
|
||||
|
||||
/**
|
||||
* @brief CRC state structures definition
|
||||
*/
|
||||
typedef enum {
|
||||
CRC_STATE_RESET = 0x0, /**< Peripheral is not initialized */
|
||||
CRC_STATE_READY = 0x1, /**< Peripheral Initialized and ready for use */
|
||||
CRC_STATE_BUSY = 0x2, /**< An internal process is ongoing */
|
||||
CRC_STATE_ERROR = 0x4, /**< Error */
|
||||
} crc_state_t;
|
||||
|
||||
/**
|
||||
* @brief CRC init structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
crc_mode_t mode; /**< CRC mode */
|
||||
type_func_t data_rev; /**< CRC data reverse or no */
|
||||
type_func_t data_inv; /**< CRC data inverse or no */
|
||||
type_func_t chs_rev; /**< CRC check sum reverse or no */
|
||||
type_func_t chs_inv; /**< CRC check sum inverse or no */
|
||||
uint32_t seed; /**< CRC seed */
|
||||
} crc_init_t;
|
||||
|
||||
/**
|
||||
* @brief CRC Handle Structure definition
|
||||
*/
|
||||
typedef struct crc_handle_s {
|
||||
CRC_TypeDef *perh; /**< Register base address */
|
||||
crc_init_t init; /**< CRC required parameters */
|
||||
uint8_t *cal_buf; /**< The pointer of preparing buffer */
|
||||
uint32_t *cal_res; /**< The pointer of result */
|
||||
#ifdef ALD_DMA
|
||||
dma_handle_t hdma; /**< CRC DMA handle parameters */
|
||||
#endif
|
||||
lock_state_t lock; /**< Locking object */
|
||||
crc_state_t state; /**< CRC operation state */
|
||||
|
||||
void (*cal_cplt_cbk)(struct crc_handle_s *arg); /**< Calculate completed callback */
|
||||
void (*err_cplt_cbk)(struct crc_handle_s *arg); /**< Calculate error callback */
|
||||
} crc_handle_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Public_Macros CRC Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define CRC_ENABLE(handle) (SET_BIT((handle)->perh->CR, CRC_CR_EN_MSK))
|
||||
#define CRC_DISABLE(handle) (CLEAR_BIT((handle)->perh->CR, CRC_CR_EN_MSK))
|
||||
#define CRC_RESET(handle) (SET_BIT((handle)->perh->CR, CRC_CR_RST_MSK))
|
||||
#define CRC_DMA_ENABLE(handle) (SET_BIT((handle)->perh->CR, CRC_CR_DMAEN_MSK))
|
||||
#define CRC_DMA_DISABLE(handle) (CLEAR_BIT((handle)->perh->CR, CRC_CR_DMAEN_MSK))
|
||||
#define CRC_CLEAR_ERROR_FLAG(handle) (SET_BIT((handle)->perh->CR, CRC_CR_WERR_MSK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Private_Macros CRC Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_CRC(x) ((x) == CRC)
|
||||
#define IS_CRC_MODE(x) (((x) == CRC_MODE_CCITT) || \
|
||||
((x) == CRC_MODE_8) || \
|
||||
((x) == CRC_MODE_16) || \
|
||||
((x) == CRC_MODE_32))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
ald_status_t ald_crc_init(crc_handle_t *hperh);
|
||||
void ald_crc_reset(crc_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
uint32_t ald_crc_calculate(crc_handle_t *hperh, uint8_t *buf, uint32_t size);
|
||||
uint32_t ald_crc_calculate_halfword(crc_handle_t *hperh, uint16_t *buf, uint32_t size);
|
||||
uint32_t ald_crc_calculate_word(crc_handle_t *hperh, uint32_t *buf, uint32_t size);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef ALD_DMA
|
||||
/** @addtogroup CRC_Public_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
ald_status_t ald_crc_calculate_by_dma(crc_handle_t *hperh, uint8_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
|
||||
ald_status_t ald_crc_calculate_halfword_by_dma(crc_handle_t *hperh, uint16_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
|
||||
ald_status_t ald_crc_calculate_word_by_dma(crc_handle_t *hperh, uint32_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
|
||||
ald_status_t ald_crc_dma_pause(crc_handle_t *hperh);
|
||||
ald_status_t ald_crc_dma_resume(crc_handle_t *hperh);
|
||||
ald_status_t ald_crc_dma_stop(crc_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif
|
||||
/** @addtogroup CRC_Public_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
crc_state_t ald_crc_get_state(crc_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_CRC_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,156 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_dbgc.h
|
||||
* @brief DEBUGCON module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 04 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_DBGC_H__
|
||||
#define __ALD_DBGC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DBGC DBGC
|
||||
* @brief DBGC module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/** @defgroup DBGC_Public_Types DBGC Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Debug mode select
|
||||
*/
|
||||
typedef enum {
|
||||
DEBC_MODE_SLEEP = (1u << 0), /**< Sleep mode */
|
||||
DEBC_MODE_STOP1 = (1u << 1), /**< STOP1 mode */
|
||||
DEBC_MODE_STOP2 = (1u << 2), /**< STOP2 mode */
|
||||
DEBC_MODE_STANDBY = (1u << 3), /**< Standby mode */
|
||||
} dbgc_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Debug peripheral select
|
||||
*/
|
||||
typedef enum {
|
||||
DEBC_PERH_TIMER0 = (1u << 0), /**< AD16C4T0 */
|
||||
DEBC_PERH_TIMER1 = (1u << 1), /**< BS16T0 */
|
||||
DEBC_PERH_TIMER2 = (1u << 2), /**< GP16C2T0 */
|
||||
DEBC_PERH_TIMER3 = (1u << 3), /**< GP16C2T1 */
|
||||
DEBC_PERH_TIMER4 = (1u << 4), /**< BS16T1 */
|
||||
DEBC_PERH_TIMER5 = (1u << 5), /**< BS16T2 */
|
||||
DEBC_PERH_TIMER6 = (1u << 6), /**< GP16C4T0 */
|
||||
DEBC_PERH_TIMER7 = (1u << 7), /**< BS16T3 */
|
||||
DEBC_PERH_I2C0 = (1u << 8), /**< I2C0 SMBUS */
|
||||
DEBC_PERH_I2C1 = (1u << 9), /**< I2C1 SMBUS */
|
||||
DEBC_PERH_CAN = (1u << 12), /**< CAN */
|
||||
DEBC_PERH_LPTIM0 = (1u << 0) | (1u << 16), /**< LPTIM0 */
|
||||
DEBC_PERH_IWDT = (1u << 8) | (1u << 16), /**< IWDT */
|
||||
DEBC_PERH_WWDT = (1u << 9) | (1u << 16), /**< WWDT */
|
||||
DEBC_PERH_RTC = (1u << 10) | (1u << 16), /**< RTC */
|
||||
} dbgc_perh_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DBGC_Public_Functions DBGC Public Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Gets version.
|
||||
* @retval Version
|
||||
*/
|
||||
__INLINE uint32_t ald_dbgc_get_rev_id(void)
|
||||
{
|
||||
return (DBGC->IDCODE >> 16);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets core id.
|
||||
* @retval Core id
|
||||
*/
|
||||
__INLINE uint32_t ald_dbgc_get_core_id(void)
|
||||
{
|
||||
return (DBGC->IDCODE >> 12) & 0xF;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets device id
|
||||
* @retval device id
|
||||
*/
|
||||
__INLINE uint32_t ald_dbgc_get_device_id(void)
|
||||
{
|
||||
return DBGC->IDCODE & 0xFFF;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures low power debug mode
|
||||
* @param mode: The mode of low power.
|
||||
* @param state: ENABLE/DISABLE
|
||||
* @retval None
|
||||
*/
|
||||
__INLINE void ald_dbgc_mode_config(dbgc_mode_t mode, type_func_t state)
|
||||
{
|
||||
if (state)
|
||||
SET_BIT(DBGC->CR, mode);
|
||||
else
|
||||
CLEAR_BIT(DBGC->CR, mode);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures peripheral debug mode
|
||||
* @param perh: The peripheral.
|
||||
* @param state: ENABLE/DISABLE
|
||||
* @retval None
|
||||
*/
|
||||
__INLINE void ald_dbgc_perh_config(dbgc_perh_t perh, type_func_t state)
|
||||
{
|
||||
if ((perh >> 16) & 0x1) {
|
||||
if (state)
|
||||
SET_BIT(DBGC->APB2FZ, perh);
|
||||
else
|
||||
CLEAR_BIT(DBGC->APB2FZ, perh);
|
||||
}
|
||||
else {
|
||||
if (state)
|
||||
SET_BIT(DBGC->APB1FZ, perh);
|
||||
else
|
||||
CLEAR_BIT(DBGC->APB1FZ, perh);
|
||||
}
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,130 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_flash.h
|
||||
* @brief Header file of FLASH driver
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 17 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_FLASH_H__
|
||||
#define __ALD_FLASH_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup FLASH_Private_Macros FLASH Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_REG_UNLOCK() \
|
||||
do { \
|
||||
if (op_cmd == OP_FLASH) { \
|
||||
WRITE_REG(MSC->FLASHKEY, 0x8ACE0246); \
|
||||
WRITE_REG(MSC->FLASHKEY, 0x9BDF1357); \
|
||||
} \
|
||||
else { \
|
||||
WRITE_REG(MSC->INFOKEY, 0x7153BFD9); \
|
||||
WRITE_REG(MSC->INFOKEY, 0x0642CEA8); \
|
||||
} \
|
||||
} while (0)
|
||||
#define FLASH_REQ() (SET_BIT(MSC->FLASHCR, MSC_FLASHCR_FLASHREQ_MSK))
|
||||
#define FLASH_REQ_FIN() (CLEAR_BIT(MSC->FLASHCR, MSC_FLASHCR_FLASHREQ_MSK))
|
||||
#define FLASH_IAP_ENABLE() (SET_BIT(MSC->FLASHCR, MSC_FLASHCR_IAPEN_MSK))
|
||||
#define FLASH_IAP_DISABLE() (CLEAR_BIT(MSC->FLASHCR, MSC_FLASHCR_IAPEN_MSK))
|
||||
#define FLASH_BASE_ADDR 0x00000000
|
||||
#define FLASH_PAGE_SIZE 1024UL
|
||||
#define FLASH_WORD_SIZE 8UL
|
||||
#define FLASH_TOTAL_SIZE 512UL
|
||||
#define FLASH_PAGE_MASK (FLASH_PAGE_SIZE - 1)
|
||||
#define FLASH_WORD_MASK (FLASH_WORD_SIZE - 1)
|
||||
#define IS_FLASH_ADDRESS(ADDR) ((ADDR) < (FLASH_BASE_ADDR + FLASH_PAGE_SIZE * FLASH_TOTAL_SIZE))
|
||||
#define IS_4BYTES_ALIGN(ADDR) (((uint32_t)(ADDR) & 0x3) == 0 ? 1 : 0)
|
||||
#define FLASH_PAGE_ADDR(ADDR) ((ADDR) & (~FLASH_PAGE_MASK))
|
||||
#define FLASH_PAGEEND_ADDR(ADDR) ((ADDR) | FLASH_PAGE_MASK)
|
||||
#define FLASH_WORD_ADDR(ADDR) ((ADDR) & (~FLASH_WORD_MASK))
|
||||
#define FLASH_WORDEND_ADDR(ADDR) ((ADDR) | FLASH_WORD_MASK)
|
||||
#define INFO_PAGE_SIZE 1024UL
|
||||
#define INFO_PAGE_MASK (INFO_PAGE_SIZE - 1)
|
||||
#define INFO_PAGE_ADDR(ADDR) ((ADDR) & (~INFO_PAGE_MASK))
|
||||
|
||||
#ifdef USE_FLASH_FIFO
|
||||
#define FLASH_FIFO 1
|
||||
#else
|
||||
#define FLASH_FIFO 0
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Private_Types FLASH Private Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum {
|
||||
FLASH_CMD_AE = 0x000051AE, /**< Program area erase all */
|
||||
FLASH_CMD_PE = 0x00005EA1, /**< Page erase */
|
||||
FLASH_CMD_WP = 0x00005DA2, /**< Word program */
|
||||
FLASH_CMD_WP_FAST = 0x00005CA3, /**< Flash quickly program */
|
||||
FLASH_CMD_DATAPE = 0x00005BA4, /**< Data flash page page erase */
|
||||
FLASH_CMD_DATAWP = 0x00005AA5, /**< Data flash word program */
|
||||
FLASH_CMD_DATAWP_FAST = 0x000059A6, /**< Data flash quickly program */
|
||||
FLASH_CMD_NP_AE = 0x000050AF, /**< No-private area erase all */
|
||||
} flash_cmd_type;
|
||||
|
||||
typedef enum {
|
||||
OP_FLASH = 0, /**< Operate Pragram area */
|
||||
OP_INFO = 1, /**< Operate info area */
|
||||
} op_cmd_type;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup Flash_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
ald_status_t flash_page_erase(uint32_t addr);
|
||||
ald_status_t flash_word_program(uint32_t addr, uint32_t *data, uint32_t len, uint32_t fifo);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Flash_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
ald_status_t ald_flash_read(uint32_t *ram_addr, uint32_t addr, uint16_t len);
|
||||
ald_status_t ald_flash_write(uint32_t addr, uint8_t *buf, uint16_t len);
|
||||
ald_status_t ald_flash_erase(uint32_t addr, uint16_t len);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_FLASH_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,80 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_iap.h
|
||||
* @brief Header file of IAP module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 04 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_IAP_H__
|
||||
#define __ALD_IAP_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup IAP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup IAP_Private_Macros IAP Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IAP_WSP_ADDR 0x10000000
|
||||
#define IAP_PE_ADDR 0x10000004
|
||||
#define IAP_WP_ADDR 0x10000008
|
||||
#define IAP_DWP_ADDR 0x1000000c
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IAP_Private_Types IAP Private Types
|
||||
* @{
|
||||
*/
|
||||
typedef uint32_t (*IAP_PE)(uint32_t addr);
|
||||
typedef uint32_t (*IAP_WP)(uint32_t addr, uint32_t data);
|
||||
typedef uint32_t (*IAP_DWP)(uint32_t addr, uint32_t data_l, uint32_t data_h);
|
||||
typedef uint32_t (*IAP_WSP)(uint32_t addr, uint8_t *data, uint32_t len, uint32_t erase);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup IAP_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
uint32_t ald_iap_erase_page(uint32_t addr);
|
||||
uint32_t ald_iap_program_word(uint32_t addr, uint32_t data);
|
||||
uint32_t ald_iap_program_dword(uint32_t addr, uint32_t data_l, uint32_t data_h);
|
||||
uint32_t ald_iap_program_words(uint32_t addr, uint8_t *data, uint32_t len, uint32_t erase);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_IAP_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,145 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ald_rtchw.h
|
||||
* @brief Header file of RTCHW Module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 16 Nov 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_RTCHW_H__
|
||||
#define __ALD_RTCHW_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
#include "ald_rtc.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RTCHW
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RTCHW_Public_Types RTCHW Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Hardware calibration algorithm
|
||||
*/
|
||||
typedef enum {
|
||||
RTC_CALI_MODE_NORMAL = 0, /**< Normal mode */
|
||||
RTC_CALI_MODE_SLEEP = 1, /**< Low power mode */
|
||||
} rtc_hw_cali_mode_t;
|
||||
|
||||
/**
|
||||
* @brief the parameters table of rtc calibration
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t MODE_CALI; /**< Calibration Mode */
|
||||
uint32_t RTC_CALCR; /**< CALCR */
|
||||
uint32_t RTC_TEMPBDR; /**< TEMPBDR */
|
||||
uint32_t TEMP_TBDR; /**< TBDR */
|
||||
uint32_t RTC_LTAXR; /**< LTAXR */
|
||||
uint32_t RTC_HTAXR; /**< HTAXR */
|
||||
uint32_t RTC_LTCAR; /**< LTCAR */
|
||||
uint32_t RTC_LTCBR; /**< LTCBR */
|
||||
uint32_t RTC_LTCCR; /**< LTCCR */
|
||||
uint32_t RTC_LTCDR; /**< LTCDR */
|
||||
uint32_t RTC_HTCAR; /**< HTCAR */
|
||||
uint32_t RTC_HTCBR; /**< HTCBR */
|
||||
uint32_t RTC_HTCCR; /**< HTCCR */
|
||||
uint32_t RTC_HTCDR; /**< HTCDR */
|
||||
uint32_t TEMP_LTGR; /**< LTGR */
|
||||
uint32_t TEMP_HTGR; /**< HTGR */
|
||||
uint32_t TEMP_CR; /**< CR */
|
||||
uint32_t rsv0; /**< Reserved */
|
||||
uint32_t RTC_LTCER; /**< LTCER */
|
||||
uint32_t RTC_HTCER; /**< HTCER */
|
||||
uint32_t TEMP_PEAK; /**< PEAK */
|
||||
uint32_t FREQ_PEAK; /**< PEAK */
|
||||
uint32_t TEMP_CALI; /**< CALI */
|
||||
uint32_t TEMP_CALI_AFTER; /**< AFTER */
|
||||
uint32_t TEMP_TCALBDR; /**< TCALBDR */
|
||||
uint32_t TEMP_TCALBDR_MINUS; /**< TCALBDR_MINUS */
|
||||
uint32_t rsv1[4]; /**< Reserved */
|
||||
uint32_t SUM; /**< SUM */
|
||||
uint32_t SUM_MINUS; /**< SUM_MINUS */
|
||||
} RTCINFO_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Hardware calibration structure
|
||||
*/
|
||||
typedef struct {
|
||||
int16_t offset_rtc_bdr; /**< offset:0x00 */
|
||||
int16_t offset_temp_bdr; /**< offset:0x02 */
|
||||
int16_t offset_ltaxr; /**< offset:0x04 */
|
||||
int16_t offset_htaxr; /**< offset:0x06 */
|
||||
int16_t offset_ltcar; /**< offset:0x08 */
|
||||
int16_t offset_ltcbr; /**< offset:0x0A */
|
||||
int16_t offset_ltccr; /**< offset:0x0C */
|
||||
int16_t offset_ltcdr; /**< offset:0x0E */
|
||||
int16_t offset_htcar; /**< offset:0x10 */
|
||||
int16_t offset_htcbr; /**< offset:0x12 */
|
||||
int16_t offset_htccr; /**< offset:0x14 */
|
||||
int16_t offset_htcdr; /**< offset:0x16 */
|
||||
int16_t offset_ltgr; /**< offset:0x18 */
|
||||
int16_t offset_htgr; /**< offset:0x1A */
|
||||
int16_t offset_ltcer; /**< offset:0x1C */
|
||||
int16_t offset_htcer; /**< offset:0x1E */
|
||||
int16_t offset_temp_peak; /**< offset:0x20 */
|
||||
int16_t offset_freq_peak; /**< offset:0x22 */
|
||||
int16_t offset_tcalbdr; /**< offset:0x24 */
|
||||
int16_t crc; /**< offset:0x26 */
|
||||
int16_t rsv[8];
|
||||
} rtc_hw_cali_offset_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup RTCHW_Private_Macros RTCHW Private Macros
|
||||
* @{
|
||||
*/
|
||||
#ifndef RTC_LOCK
|
||||
#define RTC_LOCK() (WRITE_REG(RTC->WPR, 0x0))
|
||||
#define RTC_UNLOCK() (WRITE_REG(RTC->WPR, 0x55AAAA55))
|
||||
#endif
|
||||
|
||||
#ifndef TSENSE_LOCK
|
||||
#define TSENSE_LOCK() (WRITE_REG(TSENSE->WPR, 0x0))
|
||||
#define TSENSE_UNLOCK() (WRITE_REG(TSENSE->WPR, 0xA55A9669))
|
||||
#endif
|
||||
|
||||
#define RTCINFO ((RTCINFO_TypeDef *)0x81000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup RTCHW_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
/* Calibration functions */
|
||||
void ald_rtc_hw_auto_cali(rtc_hw_cali_offset_t *config, rtc_hw_cali_mode_t mode);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,126 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_sram.h
|
||||
* @brief Header file of EBI_SRAM driver
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 07 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_SRAM_H__
|
||||
#define __ALD_SRAM_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "ald_ebi.h"
|
||||
#include "ald_dma.h"
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SRAM_Public_Types SRAM Public Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ALD SRAM State structures definition
|
||||
*/
|
||||
typedef enum {
|
||||
ALD_SRAM_STATE_RESET = 0x00U, /**< SRAM not yet initialized or disabled */
|
||||
ALD_SRAM_STATE_READY = 0x01U, /**< SRAM initialized and ready for use */
|
||||
ALD_SRAM_STATE_BUSY = 0x02U, /**< SRAM internal process is ongoing */
|
||||
ALD_SRAM_STATE_ERROR = 0x03U, /**< SRAM error state */
|
||||
ALD_SRAM_STATE_PROTECTED = 0x04U /**< SRAM peripheral NORSRAM device write protected */
|
||||
} ald_sram_state_t;
|
||||
|
||||
/**
|
||||
* @brief SRAM handle Structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
EBI_NOR_SRAM_TypeDef *instance; /**< Register base address */
|
||||
EBI_NOR_SRAM_EXTENDED_TypeDef *ext; /**< Extended mode register base address */
|
||||
ald_ebi_nor_sram_init_t init; /**< SRAM device control configuration parameters */
|
||||
lock_state_t lock; /**< SRAM locking object */
|
||||
__IO ald_sram_state_t state; /**< SRAM device access state */
|
||||
#ifdef ALD_DMA
|
||||
dma_handle_t hdma; /**< SRAM DMA Handle parameters */
|
||||
void(*cplt_cbk)(void *arg); /**< DMA transmit completely callback function */
|
||||
#endif
|
||||
} sram_handle_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SRAM_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup SRAM_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization functions */
|
||||
ald_status_t ald_sram_init(sram_handle_t *hperh, ald_ebi_nor_sram_timing_t *timing, ald_ebi_nor_sram_timing_t *ext_timing);
|
||||
ald_status_t ald_sram_deinit(sram_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup SRAM_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions */
|
||||
ald_status_t ald_sram_read_8b(sram_handle_t *hperh, uint32_t *addr, uint8_t *buf, uint32_t size);
|
||||
ald_status_t ald_sram_write_8b(sram_handle_t *hperh, uint32_t *addr, uint8_t *buf, uint32_t size);
|
||||
ald_status_t ald_sram_read_16b(sram_handle_t *hperh, uint32_t *addr, uint16_t *buf, uint32_t size);
|
||||
ald_status_t ald_sram_write_16b(sram_handle_t *hperh, uint32_t *addr, uint16_t *buf, uint32_t size);
|
||||
ald_status_t ald_sram_read_32b(sram_handle_t *hperh, uint32_t *addr, uint32_t *buf, uint32_t size);
|
||||
ald_status_t ald_sram_write_32b(sram_handle_t *hperh, uint32_t *addr, uint32_t *buf, uint32_t size);
|
||||
#ifdef ALD_DMA
|
||||
ald_status_t ald_sram_read_by_dma(sram_handle_t *hperh, uint16_t *addr, uint16_t *buf, uint16_t size, uint8_t ch);
|
||||
ald_status_t ald_sram_write_by_dma(sram_handle_t *hperh, uint16_t *addr, uint16_t *buf, uint16_t size, uint8_t ch);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup SRAM_Public_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Control functions */
|
||||
ald_status_t ald_sram_write_enable(sram_handle_t *hperh);
|
||||
ald_status_t ald_sram_write_disable(sram_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup SRAM_Public_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
/* State functions */
|
||||
ald_sram_state_t ald_sram_get_state(sram_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* __ALD_SRAM_H__ */
|
||||
@@ -0,0 +1,95 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_syscfg.h
|
||||
* @brief SYSCFG module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 04 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_SYSCFG_H__
|
||||
#define __ALD_SYSCFG_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG SYSCFG
|
||||
* @brief SYSCFG module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Public_Macros SYSCFG Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define SYSCFG_LOCK() WRITE_REG(SYSCFG->PROT, 0x0)
|
||||
#define SYSCFG_UNLOCK() WRITE_REG(SYSCFG->PROT, 0x55AA6996)
|
||||
#define GET_SYSCFG_LOCK() READ_BIT(SYSCFG->PROT, SYSCFG_PROT_PROT_MSK)
|
||||
|
||||
#define BOOT_FROM_BOOT_ROM() \
|
||||
do { \
|
||||
SYSCFG_UNLOCK(); \
|
||||
SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BRRMPEN_MSK); \
|
||||
CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BFRMPEN_MSK); \
|
||||
SYSCFG_LOCK(); \
|
||||
} while (0)
|
||||
|
||||
#define BOOT_FROM_BOOT_FLASH() \
|
||||
do { \
|
||||
SYSCFG_UNLOCK(); \
|
||||
CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BRRMPEN_MSK); \
|
||||
SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BFRMPEN_MSK); \
|
||||
SYSCFG_LOCK(); \
|
||||
} while (0)
|
||||
|
||||
#define BOOT_FROM_FLASH() \
|
||||
do { \
|
||||
SYSCFG_UNLOCK(); \
|
||||
CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BRRMPEN_MSK); \
|
||||
CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BFRMPEN_MSK); \
|
||||
SYSCFG_LOCK(); \
|
||||
} while (0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SYSCFG_Public_Functions SYSCFG Public Functions
|
||||
* @{
|
||||
*/
|
||||
__STATIC_INLINE__ void ald_vtor_config(uint32_t offset, type_func_t status)
|
||||
{
|
||||
SCB->VTOR = status ? (offset & ~0x3F) : 0;
|
||||
return;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,200 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_trng.h
|
||||
* @brief Header file of TRNG module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 26 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_TRNG_H__
|
||||
#define __ALD_TRNG_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup TRNG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup TRNG_Public_Types TRNG Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Data width
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_DSEL_1B = 0x0, /**< 1-bit */
|
||||
TRNG_DSEL_8B = 0x1, /**< 8-bits */
|
||||
TRNG_DSEL_16B = 0x2, /**< 16-bits */
|
||||
TRNG_DSEL_32B = 0x3, /**< 32-bits */
|
||||
} trng_data_width_t;
|
||||
|
||||
/**
|
||||
* @brief seed type
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_SEED_TYPE_0 = 0x0, /**< Using 0 as seed */
|
||||
TRNG_SEED_TYPE_1 = 0x1, /**< Using 1 as seed */
|
||||
TRNG_SEED_TYPE_LAST = 0x2, /**< Using last seed */
|
||||
TRNG_SEED_TYPE_SEED = 0x3, /**< Using value of register */
|
||||
} trng_seed_type_t;
|
||||
|
||||
/**
|
||||
* @brief TRNG init structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
trng_data_width_t data_width; /**< The width of data */
|
||||
trng_seed_type_t seed_type; /**< The seed type */
|
||||
uint32_t seed; /**< The value of seed */
|
||||
uint16_t t_start; /**< T(start) = T(hclk) * (t_start + 1), T(start) > 1ms */
|
||||
uint8_t adjc; /**< Adjust parameter */
|
||||
type_func_t posten; /**< Data back handle function */
|
||||
} trng_init_t;
|
||||
|
||||
/**
|
||||
* @brief TRNG state structures definition
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_STATE_RESET = 0x0, /**< Peripheral is not initialized */
|
||||
TRNG_STATE_READY = 0x1, /**< Peripheral Initialized and ready for use */
|
||||
TRNG_STATE_BUSY = 0x2, /**< An internal process is ongoing */
|
||||
TRNG_STATE_ERROR = 0x4, /**< Error */
|
||||
} trng_state_t;
|
||||
|
||||
/**
|
||||
* @brief State type
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_STATUS_START = (1U << 0), /**< Start state */
|
||||
TRNG_STATUS_DAVLD = (1U << 1), /**< Data valid state */
|
||||
TRNG_STATUS_SERR = (1U << 2), /**< Error state */
|
||||
} trng_status_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt type
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_IT_START = (1U << 0), /**< Start */
|
||||
TRNG_IT_DAVLD = (1U << 1), /**< Data valid */
|
||||
TRNG_IT_SERR = (1U << 2), /**< Error */
|
||||
} trng_it_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt flag type
|
||||
*/
|
||||
typedef enum {
|
||||
TRNG_IF_START = (1U << 0), /**< Start */
|
||||
TRNG_IF_DAVLD = (1U << 1), /**< Data valid */
|
||||
TRNG_IF_SERR = (1U << 2), /**< Error */
|
||||
} trng_flag_t;
|
||||
|
||||
/**
|
||||
* @brief TRNG Handle Structure definition
|
||||
*/
|
||||
typedef struct trng_handle_s {
|
||||
TRNG_TypeDef *perh; /**< Register base address */
|
||||
trng_init_t init; /**< TRNG required parameters */
|
||||
uint32_t data; /**< result data */
|
||||
lock_state_t lock; /**< Locking object */
|
||||
trng_state_t state; /**< TRNG operation state */
|
||||
|
||||
void (*trng_cplt_cbk)(struct trng_handle_s *arg); /**< Trng completed callback */
|
||||
void (*err_cplt_cbk)(struct trng_handle_s *arg); /**< Trng error callback */
|
||||
void (*init_cplt_cbk)(struct trng_handle_s *arg); /**< Trng init completed callback */
|
||||
} trng_handle_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TRNG_Public_Macros TRNG Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define TRNG_ENABLE() (SET_BIT(TRNG->CR, TRNG_CR_TRNGEN_MSK))
|
||||
#define TRNG_DISABLE() (CLEAR_BIT(TRNG->CR, TRNG_CR_TRNGEN_MSK))
|
||||
#define TRNG_ADJM_ENABLE() (SET_BIT(TRNG->CR, TRNG_CR_ADJM_MSK))
|
||||
#define TRNG_ADJM_DISABLE() (CLEAR_BIT(TRNG->CR, TRNG_CR_ADJM_MSK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup TRNG_Private_Macros TRNG Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_TRNG_DATA_WIDTH(x) (((x) == TRNG_DSEL_1B) || \
|
||||
((x) == TRNG_DSEL_8B) || \
|
||||
((x) == TRNG_DSEL_16B) || \
|
||||
((x) == TRNG_DSEL_32B))
|
||||
#define IS_TRNG_SEED_TYPE(x) (((x) == TRNG_SEED_TYPE_0) || \
|
||||
((x) == TRNG_SEED_TYPE_1) || \
|
||||
((x) == TRNG_SEED_TYPE_LAST) || \
|
||||
((x) == TRNG_SEED_TYPE_SEED))
|
||||
#define IS_TRNG_STATUS(x) (((x) == TRNG_STATUS_START) || \
|
||||
((x) == TRNG_STATUS_DAVLD) || \
|
||||
((x) == TRNG_STATUS_SERR))
|
||||
#define IS_TRNG_IT(x) (((x) == TRNG_IT_START) || \
|
||||
((x) == TRNG_IT_DAVLD) || \
|
||||
((x) == TRNG_IT_SERR))
|
||||
#define IS_TRNG_FLAG(x) (((x) == TRNG_IF_START) || \
|
||||
((x) == TRNG_IF_DAVLD) || \
|
||||
((x) == TRNG_IF_SERR))
|
||||
#define IS_TRNG_ADJC(x) ((x) < 4)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup TRNG_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup TRNG_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization functions */
|
||||
extern ald_status_t ald_trng_init(trng_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup TRNG_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Control functions */
|
||||
extern uint32_t ald_trng_get_result(trng_handle_t *hperh);
|
||||
extern void ald_trng_interrupt_config(trng_handle_t *hperh, trng_it_t it, type_func_t state);
|
||||
extern flag_status_t ald_trng_get_status(trng_handle_t *hperh, trng_status_t status);
|
||||
extern it_status_t ald_trng_get_it_status(trng_handle_t *hperh, trng_it_t it);
|
||||
extern flag_status_t ald_trng_get_flag_status(trng_handle_t *hperh, trng_flag_t flag);
|
||||
extern void ald_trng_clear_flag_status(trng_handle_t *hperh, trng_flag_t flag);
|
||||
extern void ald_trng_irq_handler(trng_handle_t *hperh);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_TRNG_H__ */
|
||||
@@ -0,0 +1,199 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_tsense.h
|
||||
* @brief Header file of TSENSE module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 26 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_TSENSE_H__
|
||||
#define __ALD_TSENSE_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup TSENSE
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup TSENSE_Public_Macros TSENSE Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define TSENSE_LOCK() (WRITE_REG(TSENSE->WPR, 0x0))
|
||||
#define TSENSE_UNLOCK() (WRITE_REG(TSENSE->WPR, 0xA55A9669))
|
||||
#define TSENSE_ENABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
SET_BIT(TSENSE->CR, TSENSE_CR_EN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_DISABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
CLEAR_BIT(TSENSE->CR, TSENSE_CR_EN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_REQ_ENABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
SET_BIT(TSENSE->CR, TSENSE_CR_REQEN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_REQ_DISABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
CLEAR_BIT(TSENSE->CR, TSENSE_CR_REQEN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_CTN_ENABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
SET_BIT(TSENSE->CR, TSENSE_CR_CTN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_CTN_DISABLE() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
CLEAR_BIT(TSENSE->CR, TSENSE_CR_CTN_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_RESET() \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
SET_BIT(TSENSE->CR, TSENSE_CR_RST_MSK); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_LTGR_WR(data) \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
WRITE_REG(TSENSE->LTGR, (data)); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_HTGR_WR(data) \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
WRITE_REG(TSENSE->HTGR, (data)); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_TBDR_WR(data) \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
WRITE_REG(TSENSE->TBDR, (data)); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
#define TSENSE_TCALBDR_WR(data) \
|
||||
do { \
|
||||
TSENSE_UNLOCK(); \
|
||||
WRITE_REG(TSENSE->TCALBDR, (data)); \
|
||||
TSENSE_LOCK(); \
|
||||
} while (0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TSENSE_Public_Types TSENSE Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Temperature update time
|
||||
*/
|
||||
typedef enum {
|
||||
TSENSE_UPDATE_CYCLE_3 = 0x3, /**< 3 Cycles */
|
||||
TSENSE_UPDATE_CYCLE_4 = 0x4, /**< 4 Cycles */
|
||||
TSENSE_UPDATE_CYCLE_5 = 0x5, /**< 5 Cycles */
|
||||
TSENSE_UPDATE_CYCLE_6 = 0x6, /**< 6 Cycles */
|
||||
TSENSE_UPDATE_CYCLE_7 = 0x7, /**< 7 Cycles */
|
||||
} tsense_update_cycle_t;
|
||||
|
||||
/**
|
||||
* @brief Temperature output mode
|
||||
*/
|
||||
typedef enum {
|
||||
TSENSE_OUTPUT_MODE_200 = 0x0, /**< 200 cycles update one temperature */
|
||||
TSENSE_OUTPUT_MODE_400 = 0x1, /**< 400 cycles update one temperature */
|
||||
TSENSE_OUTPUT_MODE_800 = 0x2, /**< 800 cycles update one temperature */
|
||||
TSENSE_OUTPUT_MODE_1600 = 0x3, /**< 1600 cycles update one temperature */
|
||||
TSENSE_OUTPUT_MODE_3200 = 0x4, /**< 3200 cycles update one temperature */
|
||||
} tsense_output_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Source select
|
||||
*/
|
||||
typedef enum {
|
||||
TSENSE_SOURCE_LOSC = 0x0, /**< LOSC */
|
||||
TSENSE_SOURCE_LRC = 0x1, /**< LRC */
|
||||
} tsense_source_sel_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Define callback function type
|
||||
*/
|
||||
typedef void (*tsense_cbk)(uint16_t value, ald_status_t status);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup TSENSE_Private_Macros TSENSE Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_TSENSE_SOURCE_SEL(x) (((x) == TSENSE_SOURCE_LOSC) || \
|
||||
((x) == TSENSE_SOURCE_LRC))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup TSENSE_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup TSENSE_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization functions */
|
||||
extern void ald_tsense_init(void);
|
||||
extern void ald_tsense_source_select(tsense_source_sel_t sel);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup TSENSE_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Control functions */
|
||||
extern ald_status_t ald_tsense_get_value(uint16_t *tsense);
|
||||
extern void ald_tsense_get_value_by_it(tsense_cbk cbk);
|
||||
extern void ald_tsense_irq_handler(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_TSENSE_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,116 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_wdt.h
|
||||
* @brief Header file of WDT module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 18 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __ALD_WDT_H__
|
||||
#define __ALD_WDT_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup WDT
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup WDT_Public_Types WDT Public Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Wwdt no dog window
|
||||
*/
|
||||
typedef enum {
|
||||
WWDT_WIN_25 = 0x0, /**< No dog window size: 25% */
|
||||
WWDT_WIN_50 = 0x1, /**< No dog window size: 50% */
|
||||
WWDT_WIN_75 = 0x2, /**< No dog window size: 75% */
|
||||
WWDT_WIN_00 = 0x3, /**< No dog window size: 0% */
|
||||
} wwdt_win_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup WDT_Private_Macros WDT Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define WWDT_UNLOCK() {WRITE_REG(WWDT->LOCK, 0x1ACCE551);}
|
||||
#define WWDT_LOCK() {WRITE_REG(WWDT->LOCK, 0xFFFFFFFF);}
|
||||
#define IWDT_UNLOCK() {WRITE_REG(IWDT->LOCK, 0x1ACCE551);}
|
||||
#define IWDT_LOCK() {WRITE_REG(IWDT->LOCK, 0xFFFFFFFF);}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup WDT_Private_Macros WDT Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_WWDT_WIN_TYPE(x) ((x == WWDT_WIN_25) || \
|
||||
(x == WWDT_WIN_50) || \
|
||||
(x == WWDT_WIN_75) || \
|
||||
(x == WWDT_WIN_00))
|
||||
#define IS_FUNC_STATE(x) (((x) == DISABLE) || \
|
||||
((x) == ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup WWDT_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
void ald_wwdt_init(uint32_t load, wwdt_win_t win, type_func_t interrupt);
|
||||
void ald_wwdt_start(void);
|
||||
uint32_t ald_wwdt_get_value(void);
|
||||
it_status_t ald_wwdt_get_flag_status(void);
|
||||
void ald_wwdt_clear_flag_status(void);
|
||||
void ald_wwdt_feed_dog(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDT_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
void ald_iwdt_init(uint32_t load, type_func_t interrupt);
|
||||
void ald_iwdt_start(void);
|
||||
uint32_t ald_iwdt_get_value(void);
|
||||
it_status_t ald_iwdt_get_flag_status(void);
|
||||
void ald_iwdt_clear_flag_status(void);
|
||||
void ald_iwdt_feed_dog(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ALD_WDT_H__ */
|
||||
@@ -0,0 +1,122 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file type.h
|
||||
* @brief define type
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 17 Apr 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __TYPE_H__
|
||||
#define __TYPE_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#define __INLINE__ __inline
|
||||
#define __STATIC_INLINE__ static __inline
|
||||
#else
|
||||
#define __INLINE__ inline
|
||||
#define __STATIC_INLINE__ static inline
|
||||
#endif
|
||||
|
||||
#define __isr__
|
||||
|
||||
typedef enum {
|
||||
RESET = 0x0,
|
||||
SET = 0x1,
|
||||
} flag_status_t, it_status_t;
|
||||
|
||||
typedef enum {
|
||||
BIT_RESET = 0x0,
|
||||
BIT_SET = 0x1,
|
||||
} bit_status_t;
|
||||
|
||||
typedef enum {
|
||||
DISABLE = 0x0,
|
||||
ENABLE = 0x1,
|
||||
} type_func_t;
|
||||
#define IS_FUNC_STATE(x) (((x) == DISABLE) || ((x) == ENABLE))
|
||||
|
||||
typedef enum {
|
||||
FALSE = 0x0,
|
||||
TRUE = 0x1,
|
||||
} type_bool_t;
|
||||
|
||||
typedef enum {
|
||||
UNLOCK = 0x0,
|
||||
LOCK = 0x1,
|
||||
} lock_state_t;
|
||||
#define IS_LOCK_STATE(x) (((x) == UNLOCK) || ((x) == LOCK))
|
||||
|
||||
|
||||
#define BIT(x) ((1U << (x)))
|
||||
#define BITS(s, e) ((0xffffffff << (s)) & (0xffffffff >> (31 - (e))))
|
||||
#define SET_BIT(reg, bit) ((reg) |= (bit))
|
||||
#define CLEAR_BIT(reg, bit) ((reg) &= ~(bit))
|
||||
#define READ_BIT(reg, bit) ((reg) & (bit))
|
||||
#define READ_BITS(reg, msk, s) (((reg) & (msk)) >> (s))
|
||||
#define CLEAR_REG(reg) ((reg) = (0x0))
|
||||
#define WRITE_REG(reg, val) ((reg) = (val))
|
||||
#define READ_REG(reg) ((reg))
|
||||
#define MODIFY_REG(reg, clearmask, setmask) \
|
||||
WRITE_REG((reg), (((READ_REG(reg)) & (~(clearmask))) | (setmask)))
|
||||
#define UNUSED(x) ((void)(x))
|
||||
|
||||
#ifdef USE_ASSERT
|
||||
#define assert_param(x) \
|
||||
do { \
|
||||
if (!(x)) { \
|
||||
__disable_irq(); \
|
||||
while (1) \
|
||||
; \
|
||||
} \
|
||||
} while (0)
|
||||
#else
|
||||
#define assert_param(x)
|
||||
#endif
|
||||
|
||||
|
||||
#define PER_MEM_BASE ((uint32_t) 0x40000000UL) /* PER base address */
|
||||
#define RAM_MEM_BASE ((uint32_t) 0x20000000UL) /* RAM base address */
|
||||
#define BITBAND_PER_BASE ((uint32_t) 0x42000000UL) /* Peripheral Address Space bit-band area */
|
||||
#define BITBAND_RAM_BASE ((uint32_t) 0x22000000UL) /* SRAM Address Space bit-band area */
|
||||
|
||||
__STATIC_INLINE__ void BITBAND_PER(volatile uint32_t *addr, uint32_t bit, uint32_t val)
|
||||
{
|
||||
uint32_t tmp = BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) << 5) + (bit << 2);
|
||||
*((volatile uint32_t *)tmp) = (uint32_t)val;
|
||||
}
|
||||
|
||||
__STATIC_INLINE__ void BITBAND_SRAM(uint32_t *addr, uint32_t bit, uint32_t val)
|
||||
{
|
||||
uint32_t tmp = BITBAND_RAM_BASE + (((uint32_t)addr - RAM_MEM_BASE) << 5) + (bit << 2);
|
||||
*((volatile uint32_t *)tmp) = (uint32_t)val;
|
||||
}
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#ifndef __packed
|
||||
#define __packed __attribute__((__packed__))
|
||||
#endif /* __packed */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __TYPE_H__ */
|
||||
@@ -0,0 +1,187 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file utils.h
|
||||
* @brief This file contains the Utilities functions/types for the driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 07 Nov 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __UTILS_H__
|
||||
#define __UTILS_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdlib.h>
|
||||
#include "ald_conf.h"
|
||||
#include "type.h"
|
||||
#ifdef ES32F36xx
|
||||
#include "es32f36xx.h"
|
||||
#elif ES32F39xx
|
||||
#include "es32f39xx.h"
|
||||
#elif ES32F336x
|
||||
#include "es32f336x.h"
|
||||
#endif
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UTILS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ALD_Public_Types Public Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SysTick interval
|
||||
*/
|
||||
extern uint32_t __systick_interval;
|
||||
|
||||
/**
|
||||
* @brief ALD Status structures definition
|
||||
*/
|
||||
typedef enum {
|
||||
OK = 0x0, /**< OK */
|
||||
ERROR = 0x1, /**< ERROR */
|
||||
BUSY = 0x2, /**< BUSY */
|
||||
TIMEOUT = 0x3 /**< TIMEOUT */
|
||||
} ald_status_t;
|
||||
|
||||
/**
|
||||
* @brief NVIC Preemption Priority Group
|
||||
*/
|
||||
typedef enum {
|
||||
NVIC_PRIORITY_GROUP_0 = 0x7, /**< 0-bits for pre-emption priority 4-bits for subpriority */
|
||||
NVIC_PRIORITY_GROUP_1 = 0x6, /**< 1-bits for pre-emption priority 3-bits for subpriority */
|
||||
NVIC_PRIORITY_GROUP_2 = 0x5, /**< 2-bits for pre-emption priority 2-bits for subpriority */
|
||||
NVIC_PRIORITY_GROUP_3 = 0x4, /**< 3-bits for pre-emption priority 1-bits for subpriority */
|
||||
NVIC_PRIORITY_GROUP_4 = 0x3, /**< 4-bits for pre-emption priority 0-bits for subpriority */
|
||||
} nvic_priority_group_t;
|
||||
|
||||
/**
|
||||
* @brief SysTick interval definition
|
||||
*/
|
||||
typedef enum {
|
||||
SYSTICK_INTERVAL_1MS = 1000, /**< Interval is 1ms */
|
||||
SYSTICK_INTERVAL_10MS = 100, /**< Interval is 10ms */
|
||||
SYSTICK_INTERVAL_100MS = 10, /**< Interval is 100ms */
|
||||
SYSTICK_INTERVAL_1000MS = 1, /**< Interval is 1s */
|
||||
} systick_interval_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ALD_Public_Macros Public Macros
|
||||
* @{
|
||||
*/
|
||||
#define ALD_MAX_DELAY 0xFFFFFFFF
|
||||
|
||||
#define IS_BIT_SET(reg, bit) (((reg) & (bit)) != RESET)
|
||||
#define IS_BIT_CLR(reg, bit) (((reg) & (bit)) == RESET)
|
||||
#define RESET_HANDLE_STATE(x) ((x)->state = 0)
|
||||
#define DWT_CR *(uint32_t *)0xE0001000
|
||||
#define DWT_CYCCNT *(volatile uint32_t *)0xE0001004
|
||||
#define DEM_CR *(uint32_t *)0xE000EDFC
|
||||
#define DEM_CR_TRCENA (1U << 24)
|
||||
#define DWT_CR_CYCCNTEA (1U << 0)
|
||||
#define __LOCK(x) \
|
||||
do { \
|
||||
if ((x)->lock == LOCK) { \
|
||||
return BUSY; \
|
||||
} \
|
||||
else { \
|
||||
(x)->lock = LOCK; \
|
||||
} \
|
||||
} while (0)
|
||||
#define __UNLOCK(x) \
|
||||
do { \
|
||||
(x)->lock = UNLOCK; \
|
||||
} while (0)
|
||||
#define ALD_PANIC() \
|
||||
do { \
|
||||
while (1) \
|
||||
; \
|
||||
} while (0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ALD_Private_Macros Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_PREEMPT_PRIO(x) ((x) < 16)
|
||||
#define IS_SUB_PRIO(x) ((x) < 16)
|
||||
#define IS_SYSTICK_INTERVAL(x) (((x) == SYSTICK_INTERVAL_1MS) || \
|
||||
((x) == SYSTICK_INTERVAL_10MS) || \
|
||||
((x) == SYSTICK_INTERVAL_100MS) || \
|
||||
((x) == SYSTICK_INTERVAL_1000MS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup ALD_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ALD_Public_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization functions */
|
||||
void ald_cmu_init(void);
|
||||
void ald_tick_init(uint32_t prio);
|
||||
void ald_systick_interval_select(systick_interval_t value);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup ALD_Public_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions */
|
||||
void ald_inc_tick(void);
|
||||
void ald_systick_irq_cbk(void);
|
||||
void ald_delay_ms(__IO uint32_t delay);
|
||||
uint32_t ald_get_tick(void);
|
||||
void ald_suspend_tick(void);
|
||||
void ald_resume_tick(void);
|
||||
uint32_t ald_get_ald_version(void);
|
||||
ald_status_t ald_wait_flag(uint32_t *reg, uint32_t bit, flag_status_t status, uint32_t timeout);
|
||||
void ald_mcu_irq_config(IRQn_Type irq, uint8_t preempt_prio, uint8_t sub_prio, type_func_t status);
|
||||
uint32_t ald_mcu_get_cpu_id(void);
|
||||
void ald_mcu_timestamp_init(void);
|
||||
uint32_t ald_mcu_get_timestamp(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __UTILS_H__ */
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,162 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_bkpc.c
|
||||
* @brief BKPC module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 15 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#include "ald_bkpc.h"
|
||||
#include "ald_rtc.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup BKPC BKPC
|
||||
* @brief BKPC module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef ALD_BKPC
|
||||
|
||||
/** @defgroup BKPC_Public_Functions BKPC Public Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup BKPC_Public_Functions_Group1 Peripheral Control functions
|
||||
* @brief Peripheral Control functions
|
||||
*
|
||||
* @verbatim
|
||||
==============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) ald_bkpc_ldo_config() API can configure LDO in backup field.
|
||||
(+) ald_bkpc_bor_config() API can configure BOR in backup field.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configure standby wakeup in backup field
|
||||
* @param port: Wakeup port
|
||||
* @param level: HIGH/LOW.
|
||||
* @retval None
|
||||
*/
|
||||
void ald_bkpc_standby_wakeup_config(bkpc_wakeup_port_t port, bkpc_wakeup_level_t level)
|
||||
{
|
||||
assert_param(IS_BKPC_WAKEUP_PORT(port));
|
||||
assert_param(IS_BKPC_WAKEUP_LEVEL(level));
|
||||
|
||||
BKPC_UNLOCK();
|
||||
SET_BIT(BKPC->CR, BKPC_CR_WKPEN_MSK);
|
||||
MODIFY_REG(BKPC->CR, BKPC_CR_WKPS_MSK, port << BKPC_CR_WKPS_POSS);
|
||||
MODIFY_REG(BKPC->CR, BKPC_CR_WKPOL_MSK, level << BKPC_CR_WKPOL_POS);
|
||||
BKPC_LOCK();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure rtc clock in backup field
|
||||
* @param clock: Clock
|
||||
* @retval None
|
||||
*/
|
||||
void ald_bkpc_rtc_clock_config(bkpc_preh_clk_t clock)
|
||||
{
|
||||
assert_param(IS_BKPC_PREH_CLOCK(clock));
|
||||
|
||||
BKPC_UNLOCK();
|
||||
MODIFY_REG(BKPC->PCCR, BKPC_PCCR_RTCCS_MSK, clock << BKPC_PCCR_RTCCS_POSS);
|
||||
BKPC_LOCK();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure tsense clock in backup field
|
||||
* @param clock: Clock
|
||||
* @retval None
|
||||
*/
|
||||
void ald_bkpc_tsense_clock_config(bkpc_preh_clk_t clock)
|
||||
{
|
||||
assert_param(IS_BKPC_PREH_CLOCK(clock));
|
||||
|
||||
BKPC_UNLOCK();
|
||||
MODIFY_REG(BKPC->PCCR, BKPC_PCCR_TSENSECS_MSK, clock << BKPC_PCCR_TSENSECS_POSS);
|
||||
BKPC_LOCK();
|
||||
|
||||
return;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup BKPC_Public_Functions_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
*
|
||||
* @verbatim
|
||||
==============================================================================
|
||||
##### IO operation functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) ald_bkpc_write_ram() API can write data in backup ram.
|
||||
(+) ald_bkpc_read_ram() API can read data from backup ram.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write data into backup ram.
|
||||
* @param idx: Index of backup word.
|
||||
* @param value: Value which will be written to backup ram.
|
||||
* @retval None
|
||||
*/
|
||||
void ald_bkpc_write_ram(uint8_t idx, uint32_t value)
|
||||
{
|
||||
assert_param(IS_BKPC_RAM_IDX(idx));
|
||||
|
||||
RTC_UNLOCK();
|
||||
WRITE_REG(RTC->BKPR[idx], value);
|
||||
RTC_LOCK();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data from backup ram.
|
||||
* @param idx: Index of backup word.
|
||||
* @retval The data.
|
||||
*/
|
||||
uint32_t ald_bkpc_read_ram(uint8_t idx)
|
||||
{
|
||||
assert_param(IS_BKPC_RAM_IDX(idx));
|
||||
|
||||
return READ_REG(RTC->BKPR[idx]);
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* ALD_BKPC */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,121 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_calc.c
|
||||
* @brief CALC module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 26 Jun 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#include "ald_calc.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CALC CALC
|
||||
* @brief CALC module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef ALD_CALC
|
||||
|
||||
/** @defgroup CALC_Public_Functions CALC Public Functions
|
||||
* @brief Accelerating calculate functions
|
||||
*
|
||||
* @verbatim
|
||||
==============================================================================
|
||||
##### Accelerating calculate functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Square root operation.
|
||||
(+) Division.
|
||||
(+) Get DZ flag.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Square root operation.
|
||||
* @param data: The data;
|
||||
* @retval The value of square root.
|
||||
*/
|
||||
uint32_t ald_calc_sqrt(uint32_t data)
|
||||
{
|
||||
WRITE_REG(CALC->RDCND, data);
|
||||
while (READ_BIT(CALC->SQRTSR, CALC_SQRTSR_BUSY_MSK));
|
||||
|
||||
return READ_REG(CALC->SQRTRES);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Calculating division.
|
||||
* @param dividend: The value of the dividend.
|
||||
* @param divisor: The value of the divisor.
|
||||
* @param remainder: The value of the remainder.
|
||||
* @retval The result of division.
|
||||
*/
|
||||
uint32_t ald_calc_div(uint32_t dividend, uint32_t divisor, uint32_t *remainder)
|
||||
{
|
||||
CLEAR_BIT(CALC->DIVCSR, CALC_DIVCSR_SIGN_MSK);
|
||||
SET_BIT(CALC->DIVCSR, CALC_DIVCSR_TRM_MSK);
|
||||
WRITE_REG(CALC->DIVDR, dividend);
|
||||
WRITE_REG(CALC->DIVSR, divisor);
|
||||
|
||||
while (READ_BIT(CALC->DIVCSR, CALC_DIVCSR_BUSY_MSK));
|
||||
|
||||
*remainder = READ_REG(CALC->DIVRR);
|
||||
return READ_REG(CALC->DIVQR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Calculating division.
|
||||
* @param dividend: The value of the dividend.
|
||||
* @param divisor: The value of the divisor.
|
||||
* @param remainder: The value of the remainder.
|
||||
* @retval The result of division.
|
||||
*/
|
||||
int32_t ald_calc_div_sign(int32_t dividend, int32_t divisor, int32_t *remainder)
|
||||
{
|
||||
SET_BIT(CALC->DIVCSR, CALC_DIVCSR_SIGN_MSK);
|
||||
SET_BIT(CALC->DIVCSR, CALC_DIVCSR_TRM_MSK);
|
||||
WRITE_REG(CALC->DIVDR, dividend);
|
||||
WRITE_REG(CALC->DIVSR, divisor);
|
||||
|
||||
while (READ_BIT(CALC->DIVCSR, CALC_DIVCSR_BUSY_MSK));
|
||||
|
||||
*remainder = READ_REG(CALC->DIVRR);
|
||||
return READ_REG(CALC->DIVQR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the flag of divisor is zero.
|
||||
* @retval The status, SET/RESET.
|
||||
*/
|
||||
flag_status_t ald_calc_get_dz_status(void)
|
||||
{
|
||||
if (READ_BIT(CALC->DIVCSR, CALC_DIVCSR_DZ_MSK))
|
||||
return SET;
|
||||
|
||||
return RESET;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* ALD_CALC */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,149 @@
|
||||
/**
|
||||
*********************************************************************************
|
||||
*
|
||||
* @file ald_iap.c
|
||||
* @brief IAP module driver.
|
||||
*
|
||||
* @version V1.0
|
||||
* @date 04 Dec 2019
|
||||
* @author AE Team
|
||||
* @note
|
||||
*
|
||||
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
|
||||
*
|
||||
*********************************************************************************
|
||||
*/
|
||||
|
||||
#include "ald_iap.h"
|
||||
|
||||
|
||||
/** @addtogroup ES32FXXX_ALD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IAP IAP
|
||||
* @brief IAP module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef ALD_IAP
|
||||
|
||||
|
||||
/** @defgroup IAP_Public_Functions IAP Public Functions
|
||||
*
|
||||
* @verbatim
|
||||
==============================================================================
|
||||
##### Erase and Program flash functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Erase flash.
|
||||
(+) Program flash.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Erases a specified page.
|
||||
* @param addr: The beginning address of the page to be erased.
|
||||
* @retval The result:
|
||||
* - 0: SUCCESS
|
||||
* - 1: ERROR
|
||||
*/
|
||||
uint32_t ald_iap_erase_page(uint32_t addr)
|
||||
{
|
||||
uint32_t status;
|
||||
IAP_PE iap_pe = (IAP_PE)(*(uint32_t *)IAP_PE_ADDR);
|
||||
|
||||
__disable_irq();
|
||||
status = (*iap_pe)(addr);
|
||||
__enable_irq();
|
||||
|
||||
return !status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs a word at a specified address.
|
||||
* @param addr: Specifies the address to be programmed.
|
||||
* Bit0-1 must be zero.
|
||||
* @param data: Specifies the data to be programmed.
|
||||
* @retval The result:
|
||||
* - 0: SUCCESS
|
||||
* - 1: ERROR
|
||||
*/
|
||||
uint32_t ald_iap_program_word(uint32_t addr, uint32_t data)
|
||||
{
|
||||
uint32_t status;
|
||||
IAP_WP iap_wp = (IAP_WP)(*(uint32_t *)IAP_WP_ADDR);
|
||||
|
||||
if (addr & 0x3)
|
||||
return 1;
|
||||
|
||||
__disable_irq();
|
||||
status = (*iap_wp)(addr, data);
|
||||
__enable_irq();
|
||||
|
||||
return !status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs double words at a specified address.
|
||||
* @param addr: Specifies the address to be programmed.
|
||||
* Bit0-1 must be zero.
|
||||
* @param data_l: Specifies the LSB data to be programmed.
|
||||
* @param data_h: Specifies the MSB data to be programmed.
|
||||
* @retval The result:
|
||||
* - 0: SUCCESS
|
||||
* - 1: ERROR
|
||||
*/
|
||||
uint32_t ald_iap_program_dword(uint32_t addr, uint32_t data_l, uint32_t data_h)
|
||||
{
|
||||
uint32_t status;
|
||||
IAP_DWP iap_dwp = (IAP_DWP)(*(uint32_t *)IAP_DWP_ADDR);
|
||||
|
||||
if (addr & 0x3)
|
||||
return 1;
|
||||
|
||||
__disable_irq();
|
||||
status = (*iap_dwp)(addr, data_l, data_h);
|
||||
__enable_irq();
|
||||
|
||||
return !status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs datas at a specified address.
|
||||
* @param addr: Specifies the address to be programmed.
|
||||
* Bit0-1 must be zero.
|
||||
* @param data: Specifies the data to be programmed.
|
||||
* @param len: Specifies the data length to be programmed.
|
||||
* Bit0-1 must be zero.
|
||||
* @param erase: Erase page flag before programming.
|
||||
* @retval The result:
|
||||
* - 0: SUCCESS
|
||||
* - 1: ERROR
|
||||
*/
|
||||
uint32_t ald_iap_program_words(uint32_t addr, uint8_t *data, uint32_t len, uint32_t erase)
|
||||
{
|
||||
uint32_t status;
|
||||
IAP_WSP iap_wsp = (IAP_WSP)(*(uint32_t *)IAP_WSP_ADDR);
|
||||
|
||||
if ((addr & 0x3) || (len & 0x3))
|
||||
return 1;
|
||||
|
||||
__disable_irq();
|
||||
status = (*iap_wsp)(addr, data, len, erase);
|
||||
__enable_irq();
|
||||
|
||||
return !status;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* ALD_IAP */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
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