mirror of
https://github.com/RT-Thread/rt-thread.git
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Add mmc and emmc drivers.
This commit is contained in:
weety
@@ -0,0 +1,206 @@
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/*
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* File : mmc.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2015-06-15 hichard first version
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*/
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#ifndef __MMC_H__
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#define __MMC_H__
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#include <rtthread.h>
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#include <drivers/mmcsd_host.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* EXT_CSD fields
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*/
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#define EXT_CSD_FLUSH_CACHE 32 /* W */
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#define EXT_CSD_CACHE_CTRL 33 /* R/W */
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#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
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#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */
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#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */
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#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
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#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
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#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
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#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
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#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
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#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
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#define EXT_CSD_HPI_MGMT 161 /* R/W */
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#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
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#define EXT_CSD_BKOPS_EN 163 /* R/W */
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#define EXT_CSD_BKOPS_START 164 /* W */
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#define EXT_CSD_SANITIZE_START 165 /* W */
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#define EXT_CSD_WR_REL_PARAM 166 /* RO */
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#define EXT_CSD_RPMB_MULT 168 /* RO */
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#define EXT_CSD_BOOT_WP 173 /* R/W */
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#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
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#define EXT_CSD_PART_CONFIG 179 /* R/W */
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#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
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#define EXT_CSD_BUS_WIDTH 183 /* R/W */
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#define EXT_CSD_HS_TIMING 185 /* R/W */
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#define EXT_CSD_POWER_CLASS 187 /* R/W */
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#define EXT_CSD_REV 192 /* RO */
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#define EXT_CSD_STRUCTURE 194 /* RO */
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#define EXT_CSD_CARD_TYPE 196 /* RO */
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#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
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#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
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#define EXT_CSD_PWR_CL_52_195 200 /* RO */
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#define EXT_CSD_PWR_CL_26_195 201 /* RO */
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#define EXT_CSD_PWR_CL_52_360 202 /* RO */
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#define EXT_CSD_PWR_CL_26_360 203 /* RO */
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#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
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#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
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#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
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#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
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#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
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#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
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#define EXT_CSD_BOOT_MULT 226 /* RO */
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#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
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#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
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#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
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#define EXT_CSD_TRIM_MULT 232 /* RO */
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#define EXT_CSD_PWR_CL_200_195 236 /* RO */
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#define EXT_CSD_PWR_CL_200_360 237 /* RO */
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#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
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#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
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#define EXT_CSD_BKOPS_STATUS 246 /* RO */
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#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
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#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
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#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
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#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
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#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
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#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
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#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
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#define EXT_CSD_MAX_PACKED_READS 501 /* RO */
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#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
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#define EXT_CSD_HPI_FEATURES 503 /* RO */
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/*
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* EXT_CSD field definitions
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*/
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#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
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#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
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#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
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#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
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#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
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#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
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#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
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#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3)
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#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
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#define EXT_CSD_PART_SUPPORT_PART_EN (0x1)
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#define EXT_CSD_CMD_SET_NORMAL (1<<0)
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#define EXT_CSD_CMD_SET_SECURE (1<<1)
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#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
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#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
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EXT_CSD_CARD_TYPE_HS_52)
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
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/* DDR mode @1.8V or 3V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
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/* DDR mode @1.2V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
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#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
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/* SDR mode @1.2V I/O */
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#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
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EXT_CSD_CARD_TYPE_HS200_1_2V)
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#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
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#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
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#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
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EXT_CSD_CARD_TYPE_HS400_1_2V)
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
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#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
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#define EXT_CSD_TIMING_HS 1 /* High speed */
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#define EXT_CSD_TIMING_HS200 2 /* HS200 */
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#define EXT_CSD_TIMING_HS400 3 /* HS400 */
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#define EXT_CSD_SEC_ER_EN BIT(0)
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#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
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#define EXT_CSD_SEC_GB_CL_EN BIT(4)
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#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
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#define EXT_CSD_RST_N_EN_MASK 0x3
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#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
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#define EXT_CSD_NO_POWER_NOTIFICATION 0
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#define EXT_CSD_POWER_ON 1
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#define EXT_CSD_POWER_OFF_SHORT 2
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#define EXT_CSD_POWER_OFF_LONG 3
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#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
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#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
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#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
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#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
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#define EXT_CSD_PACKED_EVENT_EN BIT(3)
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/*
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* EXCEPTION_EVENT_STATUS field
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*/
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#define EXT_CSD_URGENT_BKOPS BIT(0)
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#define EXT_CSD_DYNCAP_NEEDED BIT(1)
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#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
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#define EXT_CSD_PACKED_FAILURE BIT(3)
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#define EXT_CSD_PACKED_GENERIC_ERROR BIT(0)
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#define EXT_CSD_PACKED_INDEXED_ERROR BIT(1)
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/*
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* BKOPS status level
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*/
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#define EXT_CSD_BKOPS_LEVEL_2 0x2
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/*
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* MMC_SWITCH access modes
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*/
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#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
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#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
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#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
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#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
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/*
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* extern function
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*/
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rt_err_t mmc_send_op_cond(struct rt_mmcsd_host *host, rt_uint32_t ocr, rt_uint32_t *rocr);
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rt_int32_t init_mmc(struct rt_mmcsd_host *host, rt_uint32_t ocr);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -153,6 +153,7 @@ struct rt_mmcsd_card {
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rt_uint32_t max_data_rate; /* max data transfer rate */
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rt_uint32_t card_capacity; /* card capacity, unit:KB */
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rt_uint32_t card_blksize; /* card block size */
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rt_uint32_t erase_size; /* erase size in sectors */
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rt_uint16_t card_type;
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#define CARD_TYPE_MMC 0 /* MMC card */
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#define CARD_TYPE_SD 1 /* SD card */
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@@ -7,6 +7,7 @@ block_dev.c
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mmcsd_core.c
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sd.c
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sdio.c
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mmc.c
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""")
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# The set of source files associated with this SConscript file.
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@@ -149,7 +149,7 @@ static rt_err_t rt_mmcsd_req_blk(struct rt_mmcsd_card *card,
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}
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else
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{
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req.stop = NULL;
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req.stop = RT_NULL;
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r_cmd = READ_SINGLE_BLOCK;
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w_cmd = WRITE_BLOCK;
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}
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@@ -408,15 +408,8 @@ rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card)
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blk_dev->geometry.bytes_per_sector = 1<<9;
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blk_dev->geometry.block_size = card->card_blksize;
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if (card->flags & CARD_FLAG_SDHC)
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{
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blk_dev->geometry.sector_count = (card->csd.c_size + 1) * 1024;
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}
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else
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{
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blk_dev->geometry.sector_count =
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card->card_capacity * 1024 / 512;
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}
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blk_dev->geometry.sector_count =
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card->card_capacity * (1024 / 512);
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rt_device_register(&blk_dev->dev, "sd0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
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File diff suppressed because it is too large
Load Diff
@@ -25,6 +25,7 @@
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#include <rtthread.h>
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#include <drivers/mmcsd_core.h>
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#include <drivers/sd.h>
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#include <drivers/mmc.h>
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#ifndef RT_MMCSD_STACK_SIZE
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#define RT_MMCSD_STACK_SIZE 1024
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@@ -60,22 +61,29 @@ void mmcsd_req_complete(struct rt_mmcsd_host *host)
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void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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req->cmd->err = 0;
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req->cmd->mrq = req;
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if (req->data)
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{
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req->cmd->data = req->data;
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req->data->err = 0;
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req->data->mrq = req;
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if (req->stop)
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{
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req->data->stop = req->stop;
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req->stop->err = 0;
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req->stop->mrq = req;
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}
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}
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host->ops->request(host, req);
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rt_sem_take(&host->sem_ack, RT_WAITING_FOREVER);
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do {
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req->cmd->retries--;
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req->cmd->err = 0;
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req->cmd->mrq = req;
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if (req->data)
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{
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req->cmd->data = req->data;
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req->data->err = 0;
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req->data->mrq = req;
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if (req->stop)
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{
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req->data->stop = req->stop;
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req->stop->err = 0;
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req->stop->mrq = req;
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}
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}
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host->ops->request(host, req);
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rt_sem_take(&host->sem_ack, RT_WAITING_FOREVER);
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} while(req->cmd->err && req->cmd->retries);
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}
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rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host,
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@@ -86,6 +94,7 @@ rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host,
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rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
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rt_memset(cmd->resp, 0, sizeof(cmd->resp));
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cmd->retries = retries;
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req.cmd = cmd;
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cmd->data = RT_NULL;
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@@ -626,6 +635,18 @@ void mmcsd_detect(void *param)
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mmcsd_host_unlock(host);
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continue;
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}
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/*
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* detect mmc card
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*/
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err = mmc_send_op_cond(host, 0, &ocr);
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if (!err)
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{
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if (init_mmc(host, ocr))
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mmcsd_power_off(host);
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mmcsd_host_unlock(host);
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continue;
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}
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mmcsd_host_unlock(host);
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}
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}
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