mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-10-07 00:59:00 +08:00
[bsp][bluetrum] add a new board support
This commit is contained in:
greedyhao
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# Bluetrum RISC-V Processor Support Package
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File diff suppressed because it is too large
Load Diff
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*.dblite
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*.bin
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*.dcf
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*.map
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*.pyc
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*.elf
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*.old
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build
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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "board/Kconfig"
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config BOARD_BLUETRUM_EVB
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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# AB32VG1 骄龙开发板 BSP 说明
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## 简介
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主要内容如下：
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- 开发板资源介绍
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- BSP 快速上手
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- 进阶使用方法
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通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
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## 开发板介绍
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ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核的开发板，最高主频为 120Mhz，该开发板芯片为 AB5301A。
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开发板外观如下图所示：
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该开发板常用 **板载资源** 如下：
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- MCU：AB5301A，主频 120MHz，可超频至 192MHz，4Mbit FLASH ，192KB RAM。
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- 常用外设
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- LED: RGB灯
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- 按键: 3 个, USER(s2,s3) and RESET(s1)
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- 常用接口：USB 转串口、SD 卡接口
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## 外设支持
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :----------- | :----------: | :---------- |
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| USB 转串口 | 支持 | |
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| SD卡 | 即将支持 | |
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| IRDA | 即将支持 | |
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| 音频接口 | 即将支持 | |
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| **片上外设** | **支持情况** | **备注** |
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| GPIO | 支持 | PA PB PE PF |
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| UART | 支持 | UART0/1/2 |
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| SDIO | 即将支持 | |
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| ADC | 即将支持 | |
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| SPI | 即将支持 | |
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| I2C | 即将支持 | 软件 I2C |
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| RTC | 即将支持 | |
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| WDT | 即将支持 | |
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| FLASH | 即将支持 | |
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| PWM | 即将支持 | |
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| USB Device | 暂不支持 | |
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| USB Host | 暂不支持 | |
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## 使用说明
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使用说明分为如下两个章节：
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- 快速上手
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本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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- 进阶使用
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本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
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### 快速上手
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本 BSP 为开发者提供 GCC 开发环境。下面介绍如何将系统运行起来。
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#### 硬件连接
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使用数据线连接开发板到 PC，打开电源开关。
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#### 编译下载
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运行 `scons` 编译得到 `.dcf` 固件，通过 `downloader` 进行下载
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#### 运行结果
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下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED 常亮、绿色 LED 会周期性闪烁。
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连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 4.0.3 build Dec 9 2020
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2006 - 2020 Copyright by rt-thread team
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msh >
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```
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### 进阶使用
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此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
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1. 在 bsp 下打开 env 工具。
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2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
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3. 输入`pkgs --update`命令更新软件包。
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4. 输入`scons` 命令重新编译工程。
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## 注意事项
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暂无
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## 维护人信息
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- [greedyhao](https://github.com/greedyhao)
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@@ -0,0 +1,15 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,61 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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if os.path.exists(SDK_ROOT + '/libcpu'):
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libcpu_path_prefix = SDK_ROOT + '/libcpu'
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else:
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libcpu_path_prefix = os.path.dirname(SDK_ROOT) + '/libcpu'
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = True)
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bsp_library_type = 'hal_libraries'
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rtconfig.BSP_LIBRARY_TYPE = bsp_library_type
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, bsp_library_type, 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hal_drivers', 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libcpu_path_prefix, 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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@@ -0,0 +1,9 @@
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@@ -0,0 +1,34 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018/09/30 Bernard The first version
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*/
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#include <rtthread.h>
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#include "board.h"
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int main(void)
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{
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uint32_t cnt = 0;
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uint8_t pin = rt_pin_get("PE.1");
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rt_pin_mode(pin, PIN_MODE_OUTPUT);
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rt_kprintf("Hello, world\n");
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while (1)
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{
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if (cnt % 2 == 0) {
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rt_pin_write(pin, PIN_LOW);
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} else {
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rt_pin_write(pin, PIN_HIGH);
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}
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cnt++;
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rt_thread_mdelay(1000);
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}
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return 0;
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}
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@@ -0,0 +1,8 @@
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menu "General Purpose UARTs"
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menuconfig BSP_USING_UART0
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bool "Enable UART0"
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select RT_USING_SERIAL
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default y
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endmenu
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# RT-Thread building script for component
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from building import *
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cwd = GetCurrentDir()
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src = Split('''
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board.c
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ab32vg1_hal_msp.c
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''')
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CPPPATH = [cwd]
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group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
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objs = [group]
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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objs = objs + SConscript(os.path.join(item, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,65 @@
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/*
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* Copyright (c) 2020-2020, BLUETRUM Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
|
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*/
|
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#include "ab32vg1_hal.h"
|
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void hal_uart_mspinit(struct uart_handle *huart)
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{
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struct gpio_init gpio_init;
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if (huart->instance == UART0_BASE) {
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gpio_init.pin = GPIO_PIN_7;
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gpio_init.pull = GPIO_PULLUP;
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gpio_init.dir = GPIO_DIR_INPUT;
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||||
gpio_init.de = GPIO_DIGITAL;
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gpio_init.alternate = GPIO_AF_MAP_Gx(UT0TXMAP_AF, GPIO_AF_G1) | UT0RXMAP_TX;
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gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT0TXMAP_AF;
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hal_gpio_init(GPIOA_BASE, &gpio_init);
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} else if (huart->instance == UART1_BASE) {
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gpio_init.pin = GPIO_PIN_4;
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||||
gpio_init.dir = GPIO_DIR_OUTPUT;
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gpio_init.de = GPIO_DIGITAL;
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||||
gpio_init.alternate = GPIO_AF_MAP_Gx(UT1TXMAP_AF, GPIO_AF_G2);
|
||||
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1TXMAP_AF;
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||||
hal_gpio_init(GPIOA_BASE, &gpio_init);
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||||
|
||||
gpio_init.pin = GPIO_PIN_3;
|
||||
gpio_init.pull = GPIO_PULLUP;
|
||||
gpio_init.dir = GPIO_DIR_INPUT;
|
||||
gpio_init.de = GPIO_DIGITAL;
|
||||
gpio_init.alternate = GPIO_AF_MAP_Gx(UT1RXMAP_AF, GPIO_AF_G2);
|
||||
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | UT1RXMAP_AF;
|
||||
hal_gpio_init(GPIOA_BASE, &gpio_init);
|
||||
/* Interrupt */
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
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||||
void hal_dac_mspinit(struct dac_handle *hdac)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
void hal_sd_mspinit(sd_handle_t hsd)
|
||||
{
|
||||
struct gpio_init gpio_init;
|
||||
|
||||
gpio_init.pin = GPIO_PIN_0 | GPIO_PIN_2;
|
||||
gpio_init.pull = GPIO_PULLUP;
|
||||
gpio_init.dir = GPIO_DIR_INPUT;
|
||||
gpio_init.de = GPIO_DIGITAL;
|
||||
gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2);
|
||||
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF;
|
||||
hal_gpio_init(GPIOB_BASE, &gpio_init);
|
||||
|
||||
gpio_init.pin = GPIO_PIN_1;
|
||||
gpio_init.dir = GPIO_DIR_OUTPUT;
|
||||
gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2);
|
||||
gpio_init.af_con = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF;
|
||||
hal_gpio_init(GPIOB_BASE, &gpio_init);
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,101 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-18 greedyhao first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include "board.h"
|
||||
|
||||
int rt_hw_usart_init(void);
|
||||
void my_printf(const char *format, ...);
|
||||
void timer0_cfg(uint32_t ticks);
|
||||
void rt_soft_isr(int vector, void *param);
|
||||
void cpu_irq_comm(void);
|
||||
void set_cpu_irq_comm(void (*irq_hook)(void));
|
||||
extern uint32_t __aram_start, __eram_end;
|
||||
|
||||
void hal_printf(const char *format, ...)
|
||||
{
|
||||
va_list param;
|
||||
va_start(param, format);
|
||||
rt_kprintf(format, param);
|
||||
va_end(param);
|
||||
}
|
||||
|
||||
void timer0_isr(int vector, void *param)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
TMR0CPND = BIT(9);
|
||||
rt_tick_increase();
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void timer0_init(void)
|
||||
{
|
||||
TMR0CON = BIT(7); //TIE
|
||||
TMR0CNT = 0;
|
||||
|
||||
rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
|
||||
}
|
||||
|
||||
void timer0_cfg(uint32_t ticks)
|
||||
{
|
||||
TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt
|
||||
TMR0CON |= BIT(0); // EN
|
||||
}
|
||||
|
||||
void hal_mdelay(uint32_t ms)
|
||||
{
|
||||
rt_thread_mdelay(ms);
|
||||
}
|
||||
|
||||
void rt_hw_systick_init(void)
|
||||
{
|
||||
CLKCON2 &= 0x00ffffff;
|
||||
CLKCON2 |= (25 << 24); //配置x26m_div_clk = 1M (timer, ir, fmam ...用到)
|
||||
CLKCON0 &= ~(7 << 23);
|
||||
CLKCON0 |= BIT(24); //tmr_inc select x26m_div_clk = 1M
|
||||
|
||||
set_sysclk(SYSCLK_48M);
|
||||
|
||||
/* Setting software interrupt */
|
||||
set_cpu_irq_comm(cpu_irq_comm);
|
||||
rt_hw_interrupt_install(IRQ_SW_VECTOR, rt_soft_isr, RT_NULL, "sw_irq");
|
||||
|
||||
timer0_init();
|
||||
hal_set_tick_hook(timer0_cfg);
|
||||
hal_set_ticks(get_sysclk_nhz()/RT_TICK_PER_SECOND);
|
||||
|
||||
PICCON |= 0x10002;
|
||||
}
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
WDT_DIS();
|
||||
rt_hw_systick_init();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init(&__aram_start, &__eram_end);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_PIN
|
||||
rt_hw_pin_init();
|
||||
#endif // RT_USING_PIN
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_usart_init();
|
||||
#endif // RT_USING_SERIAL
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif // RT_USING_CONSOLE
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-18 greedyhao first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ab32vgx.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#endif
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 943 KiB |
@@ -0,0 +1,12 @@
|
||||
#ifndef CCONFIG_H__
|
||||
#define CCONFIG_H__
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* compiler configure file for RT-Thread in GCC*/
|
||||
|
||||
|
||||
#define STDC "1989"
|
||||
#define HAVE_SIGEVENT 1
|
||||
#define HAVE_SIGINFO 1
|
||||
#define HAVE_SIGVAL 1
|
||||
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,96 @@
|
||||
/* Define the flash max size */
|
||||
__max_flash_size = 768k;
|
||||
|
||||
__base = 0x10000000;
|
||||
|
||||
__comm_vma = 0x17000;
|
||||
__max_comm_size = 76k;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
init : org = __base, len = 512
|
||||
flash(rx) : org = __base + 512, len = __max_flash_size
|
||||
comm(rx) : org = __comm_vma, len = __max_comm_size
|
||||
data : org = 0x11000, len = 16k
|
||||
stack : org = 0x15000, len = 8k
|
||||
aram : org = 0x50000, len = 16k
|
||||
dram : org = 0x54000, len = 12k
|
||||
eram : org = 0x57000, len = 0xa00
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init : {
|
||||
*(.reset)
|
||||
} > init
|
||||
|
||||
.comm : {
|
||||
KEEP(*(.vector))
|
||||
*(.com_text*)
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
*(.com_rodata*)
|
||||
*(.rela*)
|
||||
*(.data*)
|
||||
*(.sdata*)
|
||||
LONG(0)
|
||||
} > comm AT > flash
|
||||
|
||||
.rti : {
|
||||
. = ALIGN(4);
|
||||
/* section information for initial */
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
} > comm AT > flash
|
||||
|
||||
.flash : {
|
||||
. = ALIGN(512);
|
||||
} > flash
|
||||
|
||||
.bss (NOLOAD):
|
||||
{
|
||||
__bss_start = .;
|
||||
*(COMMON)
|
||||
*(.bss)
|
||||
*(.sbss)
|
||||
*(.buf*)
|
||||
__bss_end = .;
|
||||
} > data
|
||||
__bss_size = __bss_end - __bss_start;
|
||||
|
||||
.stack (NOLOAD) : {
|
||||
__irq_stack_start = .;
|
||||
. = 0x2000;
|
||||
__irq_stack = .;
|
||||
} > stack
|
||||
__irq_stack_size = __irq_stack - __irq_stack_start;
|
||||
|
||||
.code_aecram (NOLOAD): {
|
||||
__aram_start = .;
|
||||
} > aram
|
||||
|
||||
.code_decram (NOLOAD): {
|
||||
} > dram
|
||||
|
||||
.code_encram (NOLOAD): {
|
||||
__eram_start = .;
|
||||
. = 0xa00;
|
||||
__eram_end = .;
|
||||
} > eram
|
||||
}
|
||||
|
||||
/* Calc the lma */
|
||||
__bank_size = SIZEOF(.flash);
|
||||
__comm_lma = LOADADDR(.comm);
|
||||
__comm_size = SIZEOF(.comm) + SIZEOF(.rti);
|
||||
Binary file not shown.
@@ -0,0 +1,161 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Project Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 1024
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_DEVICE_OPS
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
#define RT_VER_NUM 0x40003
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 1024
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* games: games run on RT-Thread console */
|
||||
|
||||
|
||||
/* General Purpose UARTs */
|
||||
|
||||
#define BSP_USING_UART0
|
||||
#define BOARD_BLUETRUM_EVB
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,61 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH ='risc-v'
|
||||
CPU ='bluetrum'
|
||||
CROSS_TOOL ='gcc'
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
# else:
|
||||
# RTT_ROOT = r'../../..'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
# EXEC_PATH = r'/opt/gnu-mcu-eclipse/riscv-none-gcc/8.2.0-2.1-20190425-1021/bin'
|
||||
EXEC_PATH = r'D:/Softwares/RT-ThreadStudio/repo/Extract/ToolChain_Support_Packages/RISC-V/RISC-V-GCC/10.1.0/bin'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'riscv64-unknown-elf-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
# DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -fsingle-precision-constant'
|
||||
DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32'
|
||||
# CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -ggdb'
|
||||
AFLAGS += ' -ggdb'
|
||||
else:
|
||||
CFLAGS += ' -Os'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
POST_ACTION += './riscv32-elf-xmaker -b rtthread.xm\n'
|
||||
Binary file not shown.
@@ -0,0 +1,23 @@
|
||||
# RT-Thread building script for component
|
||||
|
||||
from building import *
|
||||
|
||||
Import('rtconfig')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c') + Glob('*.cpp')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
if rtconfig.PLATFORM == 'armcc':
|
||||
src += Glob('*_rvds.S')
|
||||
|
||||
if rtconfig.PLATFORM == 'gcc':
|
||||
src += Glob('*_init.S')
|
||||
src += Glob('*_gcc.S')
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
src += Glob('*_iar.S')
|
||||
|
||||
group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020/11/18 greedyhao Bluetrum RISC-V porting code.
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
volatile rt_ubase_t rt_interrupt_from_thread = 0;
|
||||
volatile rt_ubase_t rt_interrupt_to_thread = 0;
|
||||
volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0;
|
||||
volatile rt_uint32_t rt_switch_flag = 0;
|
||||
rt_uint32_t rt_cur_thread_sp = 0;
|
||||
|
||||
/**
|
||||
* This function will initialize thread stack
|
||||
*
|
||||
* @param tentry the entry of thread
|
||||
* @param parameter the parameter of entry
|
||||
* @param stack_addr the beginning stack address
|
||||
* @param texit the function will be called when thread exit
|
||||
*
|
||||
* @return stack address
|
||||
*/
|
||||
rt_uint8_t *rt_hw_stack_init(void *tentry,
|
||||
void *parameter,
|
||||
rt_uint8_t *stack_addr,
|
||||
void *texit)
|
||||
{
|
||||
rt_uint32_t *stk;
|
||||
register int *tp asm("x3");
|
||||
|
||||
stack_addr += sizeof(rt_uint32_t);
|
||||
stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
|
||||
stk = (rt_uint32_t *)stack_addr;
|
||||
|
||||
stk--;
|
||||
*stk = (rt_uint32_t)tentry; /* Start address */
|
||||
stk -= 22;
|
||||
*stk = (rt_uint32_t)parameter; /* Register a0 parameter*/
|
||||
stk -= 6;
|
||||
*stk = (rt_uint32_t)tp; /* Register thread pointer */
|
||||
stk --;
|
||||
*stk = (rt_uint32_t)texit; /* Register ra texit*/
|
||||
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
}
|
||||
|
||||
/** shutdown CPU */
|
||||
void rt_hw_cpu_shutdown(void)
|
||||
{
|
||||
rt_uint32_t level;
|
||||
rt_kprintf("shutdown...\n");
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
while (level)
|
||||
{
|
||||
RT_ASSERT(0);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,71 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020/11/18 greedyhao Bluetrum RISC-V porting code.
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <stdbool.h>
|
||||
#include <rthw.h>
|
||||
#include "ab32vgx.h"
|
||||
|
||||
uint32_t irq_mask AT(.bss.irq_tbl);
|
||||
void *tbl_irq_vector[IRQ_TOTAL_NUM] AT(.bss.irq_tbl);
|
||||
void (*cpu_irq_comm_hook)(void);
|
||||
|
||||
void set_cpu_irq_comm(void (*irq_hook)(void))
|
||||
{
|
||||
cpu_irq_comm_hook = irq_hook;
|
||||
}
|
||||
|
||||
AT(.com_text.irq)
|
||||
void cpu_irq_comm_do(void)
|
||||
{
|
||||
void (*pfnct)(void);
|
||||
uint32_t irq_pend = PICPND & irq_mask;
|
||||
for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
|
||||
if (irq_pend & BIT(i)) {
|
||||
pfnct = tbl_irq_vector[i];
|
||||
if (pfnct) {
|
||||
pfnct(); /* call ISR */
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void rt_hw_interrupt_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function will install a interrupt service routine to a interrupt.
|
||||
*
|
||||
* @param vector
|
||||
* @param handler
|
||||
* @param param
|
||||
* @param name
|
||||
* @return rt_isr_handler_t
|
||||
*/
|
||||
rt_isr_handler_t rt_hw_interrupt_install(int vector,
|
||||
rt_isr_handler_t handler,
|
||||
void *param,
|
||||
const char *name)
|
||||
{
|
||||
rt_isr_handler_t old_handler = RT_NULL;
|
||||
|
||||
if (vector < IRQ_TOTAL_NUM) {
|
||||
uint32_t cpu_ie = PICCON&BIT(0);
|
||||
PICCON &= ~BIT(0);
|
||||
old_handler = tbl_irq_vector[vector];
|
||||
tbl_irq_vector[vector] = handler;
|
||||
irq_mask |= BIT(vector);
|
||||
PICCON |= cpu_ie;
|
||||
PICPR &= ~BIT(vector);
|
||||
PICEN |= BIT(vector);
|
||||
}
|
||||
return old_handler;
|
||||
}
|
||||
@@ -0,0 +1,25 @@
|
||||
# RT-Thread building script for component
|
||||
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
CPPPATH = [cwd]
|
||||
|
||||
if GetDepend('RT_USING_PIN'):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
if GetDepend('RT_USING_SERIAL'):
|
||||
src += ['drv_usart.c']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
objs = [group]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-18 greedyhao first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_COMMON_H__
|
||||
#define DRV_COMMON_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#endif // DRV_COMMON_H__
|
||||
@@ -0,0 +1,172 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-19 greedyhao first version
|
||||
*/
|
||||
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef RT_USING_PIN
|
||||
|
||||
// #define DRV_DEBUG
|
||||
#define LOG_TAG "drv.gpio"
|
||||
#include <drv_log.h>
|
||||
|
||||
struct port_info
|
||||
{
|
||||
uint8_t start_pin;
|
||||
uint8_t delta_pin;
|
||||
uint8_t total_pin;
|
||||
};
|
||||
|
||||
/* It needs to be adjusted to the hardware. */
|
||||
static const struct port_info port_table[] =
|
||||
{
|
||||
{0, 8, 0}, /* PA0-PA7 */
|
||||
{0, 5, 8}, /* PB0-PB5 */
|
||||
{0, 8, 13}, /* PE0-PE7 */
|
||||
{0, 6, 21}, /* PF0-PF6 */
|
||||
};
|
||||
|
||||
static const hal_sfr_t port_sfr[] =
|
||||
{
|
||||
GPIOA_BASE,
|
||||
GPIOB_BASE,
|
||||
GPIOE_BASE,
|
||||
GPIOF_BASE,
|
||||
};
|
||||
|
||||
#define PIN_NUM(port, no) ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin))
|
||||
#define _PIN_PORT(pin) (uint8_t)(((pin) >> 3) & 0xFu)
|
||||
#define PIN_PORT(pin) ((port_table[_PIN_PORT(pin)].delta_pin == 8) ? _PIN_PORT(pin) : _PIN_PORT(pin) + 1)
|
||||
#define PORT_SFR(port) (port_sfr[(port)])
|
||||
#define PIN_NO(pin) (uint8_t)((pin) & 0xFu)
|
||||
|
||||
// #define PIN_ABPIN(pin) (uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin))
|
||||
|
||||
static rt_base_t ab32_pin_get(const char *name)
|
||||
{
|
||||
rt_base_t pin = 0;
|
||||
int hw_port_num, hw_pin_num = 0;
|
||||
int i, name_len;
|
||||
|
||||
name_len = rt_strlen(name);
|
||||
|
||||
if ((name_len < 4) || (name_len >= 6))
|
||||
{
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
if ((name[0] != 'P') || (name[2] != '.'))
|
||||
{
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
||||
if ((name[1] >= 'A') && (name[1] <= 'B'))
|
||||
{
|
||||
hw_port_num = (int)(name[1] - 'A');
|
||||
}
|
||||
else if ((name[1] >= 'E') && (name[1] <= 'G'))
|
||||
{
|
||||
hw_port_num = (int)(name[1] - 'A') - 2; /* Without 'C' and 'D'. */
|
||||
}
|
||||
else
|
||||
{
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
||||
for (i = 3; i < name_len; i++)
|
||||
{
|
||||
hw_pin_num *= 10;
|
||||
hw_pin_num += name[i] - '0';
|
||||
}
|
||||
|
||||
pin = PIN_NUM(hw_port_num, hw_pin_num);
|
||||
LOG_D("name=%s", name);
|
||||
LOG_D("hw_port_num=%d hw_pin_num=%d pin=%d", hw_port_num, hw_pin_num, pin);
|
||||
|
||||
return pin;
|
||||
}
|
||||
|
||||
static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
|
||||
{
|
||||
uint8_t port = PIN_PORT(pin);
|
||||
uint8_t gpio_pin = pin - port_table[port].total_pin;
|
||||
hal_gpio_write(PORT_SFR(port), gpio_pin, value);
|
||||
}
|
||||
|
||||
static int ab32_pin_read(rt_device_t dev, rt_base_t pin)
|
||||
{
|
||||
uint8_t port = PIN_PORT(pin);
|
||||
uint8_t gpio_pin = pin - port_table[port].total_pin;
|
||||
return hal_gpio_read(PORT_SFR(port), gpio_pin);
|
||||
}
|
||||
|
||||
static void ab32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
||||
{
|
||||
struct gpio_init gpio_init;
|
||||
uint8_t port = PIN_PORT(pin);
|
||||
|
||||
gpio_init.pin = BIT(pin - port_table[port].total_pin);
|
||||
gpio_init.de = GPIO_DIGITAL;
|
||||
gpio_init.af_con = GPIO_AFDIS;
|
||||
LOG_D("port=%d pin=%d", port, gpio_init.pin);
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_MODE_INPUT:
|
||||
case PIN_MODE_INPUT_PULLUP:
|
||||
gpio_init.pull = GPIO_PULLUP;
|
||||
gpio_init.dir = GPIO_DIR_INPUT;
|
||||
break;
|
||||
case PIN_MODE_INPUT_PULLDOWN:
|
||||
gpio_init.pull = GPIO_PULLDOWN;
|
||||
gpio_init.dir = GPIO_DIR_INPUT;
|
||||
break;
|
||||
case PIN_MODE_OUTPUT:
|
||||
case PIN_MODE_OUTPUT_OD:
|
||||
default:
|
||||
gpio_init.pull = GPIO_NOPULL;
|
||||
gpio_init.dir = GPIO_DIR_OUTPUT;
|
||||
break;
|
||||
}
|
||||
hal_gpio_init(PORT_SFR(port), &gpio_init);
|
||||
}
|
||||
|
||||
static rt_err_t ab32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
static rt_err_t ab32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
static rt_err_t ab32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
|
||||
rt_uint32_t enabled)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
const static struct rt_pin_ops _ab32_pin_ops =
|
||||
{
|
||||
ab32_pin_mode,
|
||||
ab32_pin_write,
|
||||
ab32_pin_read,
|
||||
ab32_pin_attach_irq,
|
||||
ab32_pin_dettach_irq,
|
||||
ab32_pin_irq_enable,
|
||||
ab32_pin_get,
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
{
|
||||
return rt_device_pin_register("pin", &_ab32_pin_ops, RT_NULL);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,21 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-19 greedyhao first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
#include "drv_common.h"
|
||||
#include "board.h"
|
||||
|
||||
#define __AB32_PORT(port) GPIO##port
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif // DRV_GPIO_H__
|
||||
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-19 greedyhao first version
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: DO NOT include this file on the header file.
|
||||
*/
|
||||
|
||||
#ifndef LOG_TAG
|
||||
#define DBG_TAG "drv"
|
||||
#else
|
||||
#define DBG_TAG LOG_TAG
|
||||
#endif /* LOG_TAG */
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#define DBG_LVL DBG_LOG
|
||||
#else
|
||||
#define DBG_LVL DBG_INFO
|
||||
#endif /* DRV_DEBUG */
|
||||
|
||||
#include <rtdbg.h>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-11-20 greedyhao first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_USART_H__
|
||||
#define DRV_USART_H__
|
||||
|
||||
#include "drv_common.h"
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
|
||||
/* an32 config class */
|
||||
struct ab32_uart_config
|
||||
{
|
||||
const char *name;
|
||||
hal_sfr_t instance;
|
||||
// struct dma_config *dma_rx;
|
||||
// struct dma_config *dma_tx;
|
||||
};
|
||||
|
||||
/* ab32 uart driver class */
|
||||
struct ab32_uart
|
||||
{
|
||||
struct uart_handle handle;
|
||||
struct ab32_uart_config *config;
|
||||
|
||||
#ifdef RT_SERIAL_USING_DMA
|
||||
struct
|
||||
{
|
||||
DMA_HandleTypeDef handle;
|
||||
rt_size_t last_index;
|
||||
} dma_rx;
|
||||
struct
|
||||
{
|
||||
DMA_HandleTypeDef handle;
|
||||
} dma_tx;
|
||||
#endif
|
||||
rt_uint16_t uart_dma_flag;
|
||||
struct rt_serial_device serial;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
int rt_hw_usart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,12 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,85 @@
|
||||
#-*- encoding: utf-8 -*-
|
||||
#---------------------------------------------------------------------------------
|
||||
# @File: Sconscript for package
|
||||
# @Author: Rice
|
||||
# @Date: 2020-07-14 16:57:00(v0.0.1)
|
||||
#
|
||||
# @LICENSE: GPLv3: https://github.com/rtpkgs/buildpkg/blob/master/LICENSE.
|
||||
#
|
||||
#---------------------------------------------------------------------------------
|
||||
import os
|
||||
from building import *
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Package configuration
|
||||
#---------------------------------------------------------------------------------
|
||||
PKGNAME = "ab32vg1_hal"
|
||||
VERSION = "v1.0.0"
|
||||
DEPENDS = [""]
|
||||
#DEPENDS = ["PKG_USING_RW007"]
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Compile the configuration
|
||||
#
|
||||
# SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty
|
||||
#
|
||||
# LOCAL_CPPPATH: Local file path (.h/.c/.cpp)
|
||||
# LOCAL_CCFLAGS: Local compilation parameter
|
||||
# LOCAL_ASFLAGS: Local assembly parameters
|
||||
#
|
||||
# CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH
|
||||
# is empty # no pass!!!
|
||||
# CCFLAGS: Global compilation parameter
|
||||
# ASFLAGS: Global assembly parameters
|
||||
#
|
||||
# CPPDEFINES: Global macro definition
|
||||
# LOCAL_CPPDEFINES: Local macro definition
|
||||
#
|
||||
# LIBS: Specify the static library that need to be linked
|
||||
# LIBPATH: Specify the search directory for the library file (.lib/.a)
|
||||
#
|
||||
# LINKFLAGS: Link options
|
||||
#---------------------------------------------------------------------------------
|
||||
SOURCES = Glob("./source/*.c")
|
||||
|
||||
LOCAL_CPPPATH = []
|
||||
LOCAL_CCFLAGS = ""
|
||||
LOCAL_ASFLAGS = ""
|
||||
|
||||
CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')]
|
||||
CCFLAGS = ""
|
||||
ASFLAGS = ""
|
||||
|
||||
CPPDEFINES = []
|
||||
LOCAL_CPPDEFINES = []
|
||||
|
||||
LIBS = []
|
||||
LIBPATH = []
|
||||
|
||||
LINKFLAGS = ""
|
||||
|
||||
SOURCES_IGNORE = []
|
||||
CPPPATH_IGNORE = []
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Main target
|
||||
#---------------------------------------------------------------------------------
|
||||
objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS,
|
||||
CPPPATH = CPPPATH,
|
||||
CCFLAGS = CCFLAGS,
|
||||
ASFLAGS = ASFLAGS,
|
||||
LOCAL_CPPPATH = LOCAL_CPPPATH,
|
||||
LOCAL_CCFLAGS = LOCAL_CCFLAGS,
|
||||
LOCAL_ASFLAGS = LOCAL_ASFLAGS,
|
||||
CPPDEFINES = CPPDEFINES,
|
||||
LOCAL_CPPDEFINES = LOCAL_CPPDEFINES,
|
||||
LIBS = LIBS,
|
||||
LIBPATH = LIBPATH,
|
||||
LINKFLAGS = LINKFLAGS)
|
||||
|
||||
Return("objs")
|
||||
#---------------------------------------------------------------------------------
|
||||
# End
|
||||
#---------------------------------------------------------------------------------
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_H__
|
||||
#define AB32VG1_HAL_H__
|
||||
|
||||
#include "ab32vg1_hal_conf.h"
|
||||
|
||||
void hal_set_tick_hook(void (*hook)(uint32_t ticks));
|
||||
void hal_set_ticks(uint32_t ticks);
|
||||
void hal_mdelay(uint32_t nms);
|
||||
void hal_udelay(uint16_t nus);
|
||||
void hal_printf(const char *format, ...);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_CONF_H__
|
||||
#define AB32VG1_HAL_CONF_H__
|
||||
|
||||
/* System Configuration */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
#define HAL_RCU_MODULE_ENABLED
|
||||
#define HAL_WDT_MODULE_ENABLED
|
||||
// #define HAL_DAC_MODULE_ENABLED
|
||||
// #define HAL_SD_MODULE_ENABLED
|
||||
|
||||
/* Includes */
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_gpio.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_uart.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAL_RCU_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_rcu.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAL_WDT_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_wdt.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_dac.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "ab32vg1_hal_sd.h"
|
||||
#endif
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32BG1_HAL_DAC_H__
|
||||
#define AB32BG1_HAL_DAC_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
struct dac_init
|
||||
{
|
||||
|
||||
};
|
||||
|
||||
struct dac_handle
|
||||
{
|
||||
hal_sfr_t instance;
|
||||
struct dac_init init;
|
||||
};
|
||||
|
||||
/* Initialization functions */
|
||||
hal_error_t hal_dac_init(struct dac_handle *hdac);
|
||||
void hal_dac_deinit(uint32_t dacx);
|
||||
void hal_dac_mspinit(struct dac_handle *hdac);
|
||||
|
||||
void hal_dac_control(uint32_t dacx, uint32_t cntl, uint32_t param);
|
||||
void hal_dac_write(uint32_t dacx, uint32_t data);
|
||||
uint32_t hal_dac_read(uint32_t dacx);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_DEF_H__
|
||||
#define AB32VG1_HAL_DEF_H__
|
||||
|
||||
#include "ab32vgx.h"
|
||||
|
||||
typedef int hal_bool_t;
|
||||
typedef long hal_base_t;
|
||||
typedef unsigned long hal_ubase_t;
|
||||
|
||||
typedef hal_base_t hal_error_t;
|
||||
typedef volatile unsigned long* hal_sfr_t;
|
||||
|
||||
|
||||
/* HAL error code definitions */
|
||||
#define HAL_EOK 0 /**< There is no error */
|
||||
#define HAL_ERROR 1 /**< A generic error happens */
|
||||
#define HAL_ETIMEOUT 2 /**< Timed out */
|
||||
#define HAL_EFULL 3 /**< The resource is full */
|
||||
#define HAL_EEMPTY 4 /**< The resource is empty */
|
||||
#define HAL_ENOMEM 5 /**< No memory */
|
||||
#define HAL_ENOSYS 6 /**< No system */
|
||||
#define HAL_EBUSY 7 /**< Busy */
|
||||
#define HAL_EIO 8 /**< IO error */
|
||||
#define HAL_EINTR 9 /**< Interrupted system call */
|
||||
#define HAL_EINVAL 10 /**< Invalid argument */
|
||||
|
||||
#define HAL_NULL ((void *)0)
|
||||
|
||||
#define HAL_DISABLE (0)
|
||||
#define HAL_ENABLE (1)
|
||||
|
||||
#define HAL_RESET (0)
|
||||
#define HAL_SET (1)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,96 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_GPIO_H__
|
||||
#define AB32VG1_HAL_GPIO_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
struct gpio_init
|
||||
{
|
||||
uint8_t pin;
|
||||
uint8_t dir;
|
||||
uint8_t de;
|
||||
uint8_t pull;
|
||||
uint32_t alternate;
|
||||
uint32_t af_con; /*!< Alternate function control
|
||||
[4:0]: Mapping name
|
||||
[6:5]: Mapping control register
|
||||
[7]: Mapping enable bit */
|
||||
};
|
||||
typedef struct gpio_init *gpio_init_t;
|
||||
|
||||
enum
|
||||
{
|
||||
GPIOxSET = 0x00,
|
||||
GPIOxCLR,
|
||||
GPIOx,
|
||||
GPIOxDIR,
|
||||
GPIOxDE,
|
||||
GPIOxFEN,
|
||||
GPIOxDRV,
|
||||
GPIOxPU,
|
||||
GPIOxPD,
|
||||
GPIOxPU200K,
|
||||
GPIOxPD200K,
|
||||
GPIOxPU300K,
|
||||
GPIOxPD300K,
|
||||
};
|
||||
|
||||
/* Private constants */
|
||||
|
||||
#define FUNCMCONx(x) *(volatile uint32_t*)(SFR0_BASE + (0x07 + (x))*4)
|
||||
|
||||
/* Exported constants */
|
||||
#define GPIO_DIR_INPUT (0x01u)
|
||||
#define GPIO_DIR_OUTPUT (0x02u)
|
||||
|
||||
#define GPIO_DIGITAL (0x01u)
|
||||
#define GPIO_ANALOG (0x02u)
|
||||
|
||||
#define GPIO_AFDIS (0u << 7)
|
||||
#define GPIO_AFEN (1u << 7)
|
||||
#define GPIO_AFCON0 (0u << 5) /*!< When using UARTT0 UART1 HSUART SPI0 and SD0 */
|
||||
#define GPIO_AFCON1 (1u << 5) /*!< When using LPWM0 LPWM1 LPWM2 LPWM3 SPI1 UART2 and CLKOUT */
|
||||
#define GPIO_AFCON2 (2u << 5) /*!< When using IR TIMER3 TIMER4 TIMER5 and IIS */
|
||||
#define GPIO_AFCON_MASK (0x3u << 5)
|
||||
#define GPIO_GET_AFCON(af_con) (uint8_t)(((af_con) & (GPIO_AFCON_MASK)) >> 5)
|
||||
|
||||
#define GPIO_NOPULL (0x00u)
|
||||
#define GPIO_PULLUP (0x01u)
|
||||
#define GPIO_PULLDOWN (0x02u)
|
||||
|
||||
#define GPIO_PIN_LOW (0x00u)
|
||||
#define GPIO_PIN_HIGH (0x01u)
|
||||
|
||||
#define GPIOA_BASE ((hal_sfr_t)(&GPIOASET))
|
||||
#define GPIOB_BASE ((hal_sfr_t)(&GPIOBSET))
|
||||
#define GPIOE_BASE ((hal_sfr_t)(&GPIOESET))
|
||||
#define GPIOF_BASE ((hal_sfr_t)(&GPIOFSET))
|
||||
|
||||
#define GPIO_PIN_0 (BIT(0))
|
||||
#define GPIO_PIN_1 (BIT(1))
|
||||
#define GPIO_PIN_2 (BIT(2))
|
||||
#define GPIO_PIN_3 (BIT(3))
|
||||
#define GPIO_PIN_4 (BIT(4))
|
||||
#define GPIO_PIN_5 (BIT(5))
|
||||
#define GPIO_PIN_6 (BIT(6))
|
||||
#define GPIO_PIN_7 (BIT(7))
|
||||
|
||||
#define __HAL_GPIO_SET_DIR(__PORT__, __PIN__, __DIR__) (__DIR__) ? (GPIOx_REG((__PORT__), (GPIOxDIR)) |= BIT(__PIN__)) : (GPIOx_REG((__PORT__), (GPIOxDIR)) &= ~BIT(__PIN__))
|
||||
|
||||
/* Include GPIO HAL Extended module */
|
||||
#include "ab32vg1_hal_gpio_ex.h"
|
||||
|
||||
/* Initialization and de-initialization functions */
|
||||
void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init);
|
||||
|
||||
/* IO operation function */
|
||||
uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin);
|
||||
void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state);
|
||||
void hal_gpio_toggle(hal_sfr_t gpiox, uint8_t pin);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,71 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_GPIO_EX_H__
|
||||
#define AB32VG1_HAL_GPIO_EX_H__
|
||||
|
||||
/* Alternate function */
|
||||
/**
|
||||
* UART0:
|
||||
* G1: tx:PA7 rx:PA6
|
||||
* G2: tx:PB2 rx:PB1
|
||||
* G3: tx:PB3 rx:PB4
|
||||
* G4: tx:PE7 rx:PE6
|
||||
* G5: tx:PA1 rx:PA0
|
||||
* G6: tx:PE0 rx:PE1
|
||||
* G7: tx:PF2 rx:map to tx
|
||||
*
|
||||
* UART1:
|
||||
* G1: tx:PA7 rx:PA6
|
||||
* G2: tx:PA4 rx:PA3
|
||||
* G3: tx:PF2 rx:map to tx
|
||||
*/
|
||||
#define GPIO_AF_MAP_Gx(AF, Gx) ((uint32_t)((Gx) << (AF)))
|
||||
#define GPIO_AF_MAP_CLR(AF) ((uint32_t)(0xfu << (AF)))
|
||||
|
||||
#define GPIO_AF_G1 (1u)
|
||||
#define GPIO_AF_G2 (2u)
|
||||
#define GPIO_AF_G3 (3u)
|
||||
#define GPIO_AF_G4 (4u)
|
||||
#define GPIO_AF_G5 (5u)
|
||||
#define GPIO_AF_G6 (6u)
|
||||
#define GPIO_AF_G7 (7u)
|
||||
|
||||
#define UT1RXMAP_AF (28u)
|
||||
#define UT1TXMAP_AF (24u)
|
||||
#define HSUTRXMAP_AF (20u)
|
||||
#define HSUTTXMAP_AF (16u)
|
||||
#define UT0RXMAP_AF (12u)
|
||||
#define UT0TXMAP_AF ( 8u)
|
||||
#define SPI0MAP_AF ( 4u)
|
||||
#define SD0MAP_AF ( 0u)
|
||||
|
||||
#define UT1RXMAP_TX ((uint32_t)(0x3u << (UT1RXMAP_AF)))
|
||||
#define UT0RXMAP_TX ((uint32_t)(0x7u << (UT0RXMAP_AF)))
|
||||
|
||||
#define GPIO_HSUART_G1
|
||||
#define GPIO_HSUART_G2
|
||||
#define GPIO_HSUART_G3
|
||||
#define GPIO_HSUART_G4
|
||||
#define GPIO_HSUART_G5
|
||||
#define GPIO_HSUART_G6
|
||||
#define GPIO_HSUART_G7
|
||||
#define GPIO_HSUART_G8
|
||||
#define GPIO_HSUART_G9
|
||||
#define GPIO_HSUART_G10
|
||||
|
||||
#define GPIO_SPI0_G1
|
||||
#define GPIO_SPI0_G2
|
||||
#define GPIO_SPI0_G3
|
||||
|
||||
#define GPIO_SD0_G1
|
||||
#define GPIO_SD0_G2
|
||||
#define GPIO_SD0_G3
|
||||
#define GPIO_SD0_G4
|
||||
#define GPIO_SD0_G5
|
||||
#define GPIO_SD0_G6
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_RCU_H__
|
||||
#define AB32VG1_HAL_RCU_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
enum rcu_periph_type {
|
||||
RCU_ROM0 = 0,
|
||||
RCU_ROM1,
|
||||
RCU_RAM0,
|
||||
RCU_RAM1,
|
||||
RCU_RAM2,
|
||||
RCU_RAM3,
|
||||
RCU_RSV0, /*!< reserve */
|
||||
RCU_RSV1, /*!< reserve */
|
||||
RCU_TMR0 = 8,
|
||||
RCU_SD0,
|
||||
RCU_UART0,
|
||||
RCU_HSUT0,
|
||||
RCU_DAC,
|
||||
RCU_SARADC,
|
||||
RCU_USB,
|
||||
RCU_FMRX,
|
||||
RCU_AUDEC,
|
||||
RCU_PORT,
|
||||
RCU_MBIST,
|
||||
RCU_SPI0,
|
||||
RCU_UART1 = 21,
|
||||
RCU_TMR1 = 24,
|
||||
RCU_TMR2 = 25,
|
||||
RCU_FMAMFDT = 26,
|
||||
RCU_FMTX,
|
||||
RCU_IRRX = 29,
|
||||
RCU_IIS,
|
||||
RCU_TMR3 = 34,
|
||||
RCU_TMR4,
|
||||
RCU_TMR5,
|
||||
RCU_UART2,
|
||||
RCU_SPI1,
|
||||
};
|
||||
|
||||
void hal_rcu_periph_clk_enable(uint32_t periph);
|
||||
void hal_rcu_periph_clk_disable(uint32_t periph);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_SD_H__
|
||||
#define AB32VG1_HAL_SD_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
struct sd_init
|
||||
{
|
||||
// uint8_t
|
||||
};
|
||||
|
||||
struct sd_card_info
|
||||
{
|
||||
uint32_t rca; /*!< Specifies the Relative Card Address */
|
||||
uint8_t type; /*!< Specifies the card type */
|
||||
};
|
||||
typedef struct sd_card_info* sd_card_info_t;
|
||||
|
||||
struct sd_handle
|
||||
{
|
||||
hal_sfr_t instance;
|
||||
struct sd_init init;
|
||||
struct sd_card_info sdcard;
|
||||
};
|
||||
typedef struct sd_handle* sd_handle_t;
|
||||
|
||||
#define SD0N (0x00u)
|
||||
|
||||
#define CARD_V1 (0x01u)
|
||||
#define CARD_V2 (0x02u)
|
||||
#define CARD_MMC (0x03u)
|
||||
|
||||
#define SDMMC_CHECK_PATTERM (0x000001AAu)
|
||||
|
||||
/* Initialization functions */
|
||||
hal_error_t hal_sd_init(sd_handle_t hsd);
|
||||
void hal_sd_deinit(uint32_t sdx);
|
||||
void hal_sd_mspinit(sd_handle_t hsd);
|
||||
|
||||
hal_error_t hal_sd_control(uint32_t control, uint32_t arg);
|
||||
void hal_sd_write(uint32_t sdx, uint32_t data);
|
||||
uint32_t hal_sd_read(uint32_t sdx);
|
||||
// void hal_uart_write_it(uint32_t uartx, uint8_t data);
|
||||
// uint8_t hal_uart_read_it(uint32_t uartx);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,144 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_UART_H__
|
||||
#define AB32VG1_HAL_UART_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
/* Exported types */
|
||||
/** @defgroup UART_Exported_Types UART Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART Init Structure definition
|
||||
*/
|
||||
|
||||
struct uart_init
|
||||
{
|
||||
uint32_t baud; /*!< This member configures the UART communication baud rate.
|
||||
Baud Rate Register[31:16] is used to configure the rx rate.
|
||||
Baud Rate Register[15: 0] is used to configure the tx rate.
|
||||
The baud rate register is computed using the following formula:
|
||||
UARTBAUD = Fsys_clock/BaudRate-1
|
||||
for example: UARTBAUD= (26000000/2)/baud-1 */
|
||||
|
||||
uint8_t word_len; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref UARTEx_Word_Length. */
|
||||
|
||||
uint8_t stop_bits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref UART_Stop_Bits. */
|
||||
|
||||
uint8_t mode; /*!< Specifies whether the receive or one line mode is enabled or disabled.
|
||||
This parameter can be a value of @ref UART_Mode. */
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief UART handle struction definition
|
||||
*
|
||||
*/
|
||||
struct uart_handle
|
||||
{
|
||||
hal_sfr_t instance;
|
||||
struct uart_init init;
|
||||
};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants */
|
||||
|
||||
/**
|
||||
* @defgroup UARTEx_Word_Length UART Word Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_WORDLENGTH_8B (0x00u) /*!< 8 bit long UART frame */
|
||||
#define UART_WORDLENGTH_9B (0x01u) /*!< 9 bit long UART frame */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup UART_Stop_Bits UART Number of Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define UART_STOPBITS_1 (0x00u) /*!< UART frame with 1 stop bit */
|
||||
#define UART_STOPBITS_2 (0x01u) /*!< UART frame with 2 stop bit */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Mode UART Transfer Mode
|
||||
* @{
|
||||
*/
|
||||
#define UART_MODE_TX (0x00u) /*!< TX mode */
|
||||
#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define UART_FLAG_RXPND (BIT(9)) /*!< RX one byte finish flag */
|
||||
#define UART_FLAG_TXPND (BIT(8)) /*!< TX one byte finish flag */
|
||||
|
||||
#define UART_MODULE_ENABLE (BIT(0)) /*!< UART enable bit */
|
||||
#define UART_BIT9_ENABLE (BIT(1)) /*!< BIT9 enable bit */
|
||||
#define UART_RXIT_ENABLE (BIT(2)) /*!< Receive interrupt enable bit */
|
||||
#define UART_TXIT_ENABLE (BIT(3)) /*!< Transmit interrupt enable bit */
|
||||
#define UART_SB2_ENABLE (BIT(4)) /*!< Two stop bit enable bit */
|
||||
#define UART_CLK_SRC1 (BIT(5)) /*!< Clock source select bit */
|
||||
#define UART_1LINE_ENABLE (BIT(6)) /*!< One-Line mode enable bit */
|
||||
#define UART_RX_ENABLE (BIT(7)) /*!< Receive enable bit */
|
||||
|
||||
#define UART0N (0x00u) /*!< Number of UART0 */
|
||||
#define UART1N (0x01u) /*!< Number of UART1 */
|
||||
#define UART2N (0x02u) /*!< Number of UART2 */
|
||||
|
||||
#define UART0_BASE ((hal_sfr_t)(&UART0CON))
|
||||
#define UART1_BASE ((hal_sfr_t)(&UART1CON))
|
||||
#define UART2_BASE ((hal_sfr_t)(&UART2CON))
|
||||
|
||||
/* Exported function */
|
||||
/** @addtogroup UART_Exported_Functions UART Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization functions */
|
||||
hal_error_t hal_uart_init(struct uart_handle *huart);
|
||||
void hal_uart_deinit(hal_sfr_t uartx);
|
||||
void hal_uart_mspinit(struct uart_handle *huart);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param);
|
||||
void hal_uart_write(hal_sfr_t uartx, uint8_t data);
|
||||
uint8_t hal_uart_read(hal_sfr_t uartx);
|
||||
uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag);
|
||||
void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private function */
|
||||
/** @addtogroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
void uart_config_all(struct uart_handle *huart);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_WDT_H__
|
||||
#define AB32VG1_HAL_WDT_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
#define WDT_CLR() WDTCON = 0xa
|
||||
#define WDT_EN() WDTCON = 0x110
|
||||
#define WDT_DIS() WDTCON = 0xaa0
|
||||
#define WDT_RST() WDTCON = 0xa000110; while (1)
|
||||
#define WDT_RST_DELAY() WDTCON = 0xa100110; while (1)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef AB32VG1_HAL_SDIO_H__
|
||||
#define AB32VG1_HAL_SDIO_H__
|
||||
|
||||
#include "ab32vg1_hal_def.h"
|
||||
|
||||
struct sdio_init
|
||||
{
|
||||
uint32_t tmp;
|
||||
};
|
||||
typedef struct sdio_init* sdio_init_t;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,38 @@
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
static uint32_t hw_ticks = 0;
|
||||
|
||||
void timer0_cfg(uint32_t ticks);
|
||||
|
||||
static void (*tick_cfg_hook)(uint32_t ticks) = HAL_NULL;
|
||||
|
||||
void hal_set_tick_hook(void (*hook)(uint32_t ticks))
|
||||
{
|
||||
tick_cfg_hook = hook;
|
||||
}
|
||||
|
||||
void hal_set_ticks(uint32_t ticks)
|
||||
{
|
||||
if (ticks != hw_ticks) {
|
||||
hw_ticks = ticks;
|
||||
}
|
||||
if (tick_cfg_hook != HAL_NULL) {
|
||||
tick_cfg_hook(hw_ticks);
|
||||
}
|
||||
}
|
||||
|
||||
WEAK void hal_mdelay(uint32_t nms)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void hal_udelay(uint16_t nus)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < nus*10; i++) {
|
||||
asm("nop");
|
||||
}
|
||||
}
|
||||
|
||||
WEAK void hal_printf(const char *format, ...)
|
||||
{}
|
||||
@@ -0,0 +1,14 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
|
||||
WEAK void hal_dac_mspinit(struct dac_handle *hdac)
|
||||
{}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
|
||||
#if 0
|
||||
#define HAL_LOG(...) hal_printf(__VA_ARGS__)
|
||||
#else
|
||||
#define HAL_LOG(...)
|
||||
#endif
|
||||
|
||||
void gpio_afinit(hal_sfr_t gpiox, uint8_t pin, uint32_t alternate, uint32_t af_con)
|
||||
{
|
||||
uint32_t is_rx_map_tx = (alternate & UT1RXMAP_TX) || (alternate & UT0RXMAP_TX);
|
||||
if ((af_con & 0xf0u) != GPIO_AFDIS) {
|
||||
gpiox[GPIOxFEN] |= BIT(pin);
|
||||
|
||||
switch (is_rx_map_tx)
|
||||
{
|
||||
case UT1RXMAP_TX:
|
||||
FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(UT1RXMAP_AF);
|
||||
break;
|
||||
case UT0RXMAP_TX:
|
||||
FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(UT0RXMAP_AF);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
FUNCMCONx(GPIO_GET_AFCON(af_con)) |= GPIO_AF_MAP_CLR(af_con & 0x1f);
|
||||
FUNCMCONx(GPIO_GET_AFCON(af_con)) |= alternate;
|
||||
HAL_LOG("af_con=0x%X AFCON=%d alternate=%d\n", af_con, GPIO_GET_AFCON(af_con), (af_con & 0x1f));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the gpio.
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param gpio_init the configuration of the specified GPIO peripheral.
|
||||
*/
|
||||
void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init)
|
||||
{
|
||||
uint8_t iocurrent = 0;
|
||||
if (gpio_init == HAL_NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
for (iocurrent = 0; iocurrent < 8; iocurrent++) {
|
||||
if ((gpio_init->pin & BIT(iocurrent)) == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
gpio_afinit(gpiox, iocurrent, gpio_init->alternate, gpio_init->af_con);
|
||||
|
||||
switch (gpio_init->dir)
|
||||
{
|
||||
case GPIO_DIR_INPUT:
|
||||
/* When set to input, clear all pull-ups of the port. */
|
||||
gpiox[GPIOxDIR] |= BIT(iocurrent);
|
||||
gpiox[GPIOxPU] &= ~BIT(iocurrent);
|
||||
gpiox[GPIOxPU200K] &= ~BIT(iocurrent);
|
||||
gpiox[GPIOxPD200K] &= ~BIT(iocurrent);
|
||||
gpiox[GPIOxPU300K] &= ~BIT(iocurrent);
|
||||
gpiox[GPIOxPD300K] &= ~BIT(iocurrent);
|
||||
|
||||
switch (gpio_init->pull)
|
||||
{
|
||||
case GPIO_PULLUP:
|
||||
gpiox[GPIOxPU] |= BIT(iocurrent);
|
||||
break;
|
||||
case GPIO_PULLDOWN:
|
||||
gpiox[GPIOxPD] |= BIT(iocurrent);
|
||||
break;
|
||||
case GPIO_NOPULL:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case GPIO_DIR_OUTPUT:
|
||||
gpiox[GPIOxDIR] &= ~BIT(iocurrent);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
switch (gpio_init->de)
|
||||
{
|
||||
case GPIO_DIGITAL:
|
||||
gpiox[GPIOxDE] |= BIT(iocurrent);
|
||||
break;
|
||||
case GPIO_ANALOG:
|
||||
gpiox[GPIOxDE] &= ~BIT(iocurrent);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read the specified input port pin.
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
* @return uint8_t The input port pin value.
|
||||
*/
|
||||
uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin)
|
||||
{
|
||||
return ((gpiox[GPIOx] & BIT(pin)) != GPIO_PIN_LOW) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the selected data port bit.
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
* @param state specifies the value to be written to the selected bit.
|
||||
* @arg GPIO_PIN_LOW:
|
||||
* @arg GPIO_PIN_HIGH:
|
||||
*/
|
||||
void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state)
|
||||
{
|
||||
if (state == GPIO_PIN_LOW) {
|
||||
gpiox[GPIOx] &= ~BIT(pin);
|
||||
} else {
|
||||
gpiox[GPIOx] |= BIT(pin);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Toggle the specified GPIO pin.
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
*/
|
||||
void hal_gpio_toggle(hal_sfr_t gpiox, uint8_t pin)
|
||||
{
|
||||
gpiox[GPIOx] ^= BIT(pin);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
#ifdef HAL_RCU_MODULE_ENABLED
|
||||
|
||||
void hal_rcu_periph_clk_enable(uint32_t periph)
|
||||
{
|
||||
if (periph <= RCU_TMR2) {
|
||||
CLKGAT0 |= BIT(periph);
|
||||
} else if (periph <= RCU_SPI1) {
|
||||
CLKGAT1 |= BIT(periph - RCU_FMAMFDT);
|
||||
}
|
||||
}
|
||||
|
||||
void hal_rcu_periph_clk_disable(uint32_t periph)
|
||||
{
|
||||
if (periph <= RCU_TMR2) {
|
||||
CLKGAT0 &= ~BIT(periph);
|
||||
} else if (periph <= RCU_SPI1) {
|
||||
CLKGAT1 &= ~BIT(periph - RCU_FMAMFDT);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,184 @@
|
||||
#include "ab32vg1_hal.h"
|
||||
#include "ab32vg1_ll_sdio.h"
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#define HAL_LOG(...) hal_printf(__VA_ARGS__)
|
||||
|
||||
/************************* LL ************************************/
|
||||
|
||||
#define CK8E BIT(11) //在命令/数据包后加上8CLK
|
||||
#define CBUSY BIT(10) //Busy Check
|
||||
#define CLRSP BIT(9) //17Byte Long Rsp
|
||||
#define CRSP BIT(8) //Need Rsp
|
||||
|
||||
//0x40是CMD中的 01 开头。
|
||||
#define RSP_NO (0x40 | CK8E)
|
||||
#define RSP_1 (0x40 | CRSP | CK8E) //接收6BYTE
|
||||
#define RSP_1B (0x40 | CBUSY | CRSP | CK8E) //接收6BYTE，并等待BUSY
|
||||
#define RSP_2 (0x40 | CLRSP | CRSP | CK8E) //接收17BYTE
|
||||
#define RSP_3 (0x40 | CRSP | CK8E) //接收6BYTE
|
||||
#define RSP_6 (0x40 | CRSP | CK8E) //接收6BYTE
|
||||
#define RSP_7 (0x40 | CRSP | CK8E) //接收6BYTE
|
||||
#define REQ_MULTREAD (18 | 0x40 | CRSP) //多块读时，不需要增加8CLK。其实，多块读先KICK DATA，这个是无所谓的
|
||||
|
||||
#define RSP_BUSY_TIMEOUT 2400000 //大约2s
|
||||
#define RSP_TIMEOUT 6000 //大约5ms
|
||||
|
||||
enum
|
||||
{
|
||||
SDCON = 0, /* [20]:BUSY [19:17]:CRCS [16]:DCRCE [15]:NRPS [1]:Data bus width [0]:SD enable */
|
||||
SDCPND,
|
||||
SDBAUD,
|
||||
SDCMD,
|
||||
SDARG3,
|
||||
SDARG2,
|
||||
SDARG1,
|
||||
SDARG0,
|
||||
SDDMAADR,
|
||||
SDDMACNT,
|
||||
};
|
||||
|
||||
uint8_t sysclk_update_baud(uint8_t baud);
|
||||
|
||||
void sdio_setbaud(hal_sfr_t sdiox, uint8_t baud)
|
||||
{
|
||||
sdiox[SDBAUD] = sysclk_update_baud(baud);
|
||||
}
|
||||
|
||||
void sdio_init(hal_sfr_t sdiox, sdio_init_t init)
|
||||
{
|
||||
/* Set clock */
|
||||
sdio_setbaud(sdiox, 199);
|
||||
|
||||
sdiox[SDCON] = 0;
|
||||
hal_udelay(20);
|
||||
sdiox[SDCON] |= BIT(0); /* SD control enable */
|
||||
sdiox[SDCON] |= BIT(3); /* Keep clock output */
|
||||
sdiox[SDCON] |= BIT(5); /* Data interrupt enable */
|
||||
hal_mdelay(40);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if SDIO command is finished.
|
||||
*
|
||||
* @param sdiox
|
||||
* @return true is finished
|
||||
* @return false
|
||||
*/
|
||||
bool sdio_check_finish(hal_sfr_t sdiox)
|
||||
{
|
||||
if (sdiox[SDCON] & BIT(12)) {
|
||||
sdiox[SDCPND] = BIT(12);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if SDIO has a response.
|
||||
*
|
||||
* @param sdiox
|
||||
* @return true Have a response.
|
||||
* @return false No response.
|
||||
*/
|
||||
bool sdio_check_rsp(hal_sfr_t sdiox)
|
||||
{
|
||||
return !(sdiox[SDCON] & BIT(15));
|
||||
}
|
||||
|
||||
bool sdio_send_cmd(hal_sfr_t sdiox, uint32_t cmd, uint32_t arg)
|
||||
{
|
||||
uint32_t time_out = (cmd & CBUSY) ? RSP_BUSY_TIMEOUT : RSP_TIMEOUT;
|
||||
sdiox[SDCMD] = cmd;
|
||||
sdiox[SDARG3] = arg;
|
||||
|
||||
while (sdio_check_finish(sdiox) == false) {
|
||||
if (--time_out == 0) {
|
||||
HAL_LOG("cmd time out\n");
|
||||
// card.abend = 1;
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return sdio_check_rsp(sdiox);
|
||||
}
|
||||
|
||||
uint8_t sdio_get_cmd_rsp(hal_sfr_t sdiox)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint32_t sdio_get_rsp(hal_sfr_t sdiox, uint32_t rsp)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
void sdio_read_kick(hal_sfr_t sdiox, void* buf)
|
||||
{}
|
||||
|
||||
void sdio_write_kick(hal_sfr_t sdiox, void* buf)
|
||||
{}
|
||||
|
||||
bool sdio_isbusy(hal_sfr_t sdiox)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
void sdmmc_go_idle_state(hal_sfr_t sdiox)
|
||||
{
|
||||
// hal_sfr_t sdiox = hsd->instance;
|
||||
sdio_send_cmd(sdiox, 0x00 | RSP_NO, 0);
|
||||
}
|
||||
|
||||
void sdmmc_send_if_cond(hal_sfr_t sdiox)
|
||||
{
|
||||
// hal_sfr_t sdiox = hsd->instance;
|
||||
sdio_send_cmd(sdiox, 0x08 | RSP_7, SDMMC_CHECK_PATTERM);
|
||||
}
|
||||
|
||||
/************************* HAL ************************************/
|
||||
|
||||
|
||||
static void sd_poweron(sd_handle_t hsd)
|
||||
{
|
||||
sdmmc_go_idle_state(hsd->instance);
|
||||
sdmmc_send_if_cond(hsd->instance);
|
||||
if (hsd->instance[SDCMD] == 0x08) {
|
||||
hsd->sdcard.type = CARD_V2;
|
||||
HAL_LOG("SD 2.0\n");
|
||||
}
|
||||
}
|
||||
|
||||
void hal_sd_initcard(sd_handle_t hsd)
|
||||
{
|
||||
struct sdio_init init = {0};
|
||||
hal_sfr_t sdiox = hsd->instance;
|
||||
|
||||
sdio_init(sdiox, &init);
|
||||
sd_poweron(hsd);
|
||||
}
|
||||
|
||||
WEAK void hal_sd_mspinit(sd_handle_t hsd)
|
||||
{
|
||||
}
|
||||
|
||||
hal_error_t hal_sd_init(sd_handle_t hsd)
|
||||
{
|
||||
if (hsd == HAL_NULL) {
|
||||
return -HAL_ERROR;
|
||||
}
|
||||
|
||||
hal_sd_mspinit(hsd);
|
||||
hal_sd_initcard(hsd);
|
||||
|
||||
return -HAL_ERROR;
|
||||
}
|
||||
|
||||
void hal_sd_deinit(uint32_t sdx)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,172 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
|
||||
enum
|
||||
{
|
||||
UARTxCON = 0x00,
|
||||
UARTxCPND,
|
||||
UARTxBAUD,
|
||||
UARTxDATA,
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Set the UART baud rate.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param baud Baud rate.
|
||||
*/
|
||||
void hal_uart_setbaud(hal_sfr_t uartx, uint32_t baud)
|
||||
{
|
||||
uint32_t baud_cfg;
|
||||
|
||||
uartx[UARTxCON] |= UART_CLK_SRC1;
|
||||
baud_cfg = (26000000/2)/baud; //1.5M
|
||||
uartx[UARTxBAUD] = (baud_cfg << 16) | baud_cfg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the UART mode.
|
||||
*
|
||||
* @param huart UART handle.
|
||||
* @return hal_error_t
|
||||
*/
|
||||
hal_error_t hal_uart_init(struct uart_handle *huart)
|
||||
{
|
||||
if (huart == HAL_NULL) {
|
||||
return -HAL_ERROR;
|
||||
}
|
||||
|
||||
hal_uart_mspinit(huart);
|
||||
uart_config_all(huart);
|
||||
|
||||
return HAL_EOK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitialize the UART peripheral.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
*/
|
||||
void hal_uart_deinit(hal_sfr_t uartx)
|
||||
{
|
||||
uartx[UARTxCON] = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the UART MSP.
|
||||
*
|
||||
* @param huart UART handle.
|
||||
*/
|
||||
WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
||||
{}
|
||||
|
||||
/**
|
||||
* @brief Control the UART peripheral.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param cntl
|
||||
* @arg UART_MODULE_ENABLE
|
||||
* @arg UART_BIT9_ENABLE
|
||||
* @arg UART_RXIT_ENABLE
|
||||
* @arg UART_TXIT_ENABLE
|
||||
* @arg UART_SB2_ENABLE
|
||||
* @arg UART_CLK_SRC1
|
||||
* @arg UART_1LINE_ENABLE
|
||||
* @arg UART_RX_ENABLE
|
||||
* @param param
|
||||
* @arg HAL_DISABLE
|
||||
* @arg HAL_ENABLE
|
||||
*/
|
||||
void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param)
|
||||
{
|
||||
if (param == HAL_ENABLE) {
|
||||
uartx[UARTxCON] |= (cntl);
|
||||
} else {
|
||||
uartx[UARTxCON] &= ~(cntl);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send a character
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param data The characters that need to be sent
|
||||
*/
|
||||
void hal_uart_write(hal_sfr_t uartx, uint8_t data)
|
||||
{
|
||||
uartx[UARTxDATA] = data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receive a character.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @return uint8_t Received character.
|
||||
*/
|
||||
uint8_t hal_uart_read(hal_sfr_t uartx)
|
||||
{
|
||||
return (uartx[UARTxCON] & 0xff);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the UART flag.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param flag
|
||||
* @arg UART_FLAG_RXPND
|
||||
* @arg UART_FLAG_TXPND
|
||||
* @return uint32_t
|
||||
*/
|
||||
uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
||||
{
|
||||
uint32_t ret = uartx[UARTxCON] & flag;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear the UART flag.
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param flag
|
||||
* @arg UART_FLAG_RXPND
|
||||
* @arg UART_FLAG_TXPND
|
||||
*/
|
||||
void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag)
|
||||
{
|
||||
uartx[UARTxCON] |= flag;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure the UART peripheral.
|
||||
*
|
||||
* @param huart UART handle.
|
||||
*/
|
||||
void uart_config_all(struct uart_handle *huart)
|
||||
{
|
||||
hal_uart_control(huart->instance, UART_MODULE_ENABLE, HAL_DISABLE);
|
||||
|
||||
CLKCON1 |= BIT(14);
|
||||
if (huart->instance == UART0_BASE) {
|
||||
hal_rcu_periph_clk_enable(RCU_UART0);
|
||||
} else if (huart->instance == UART1_BASE) {
|
||||
hal_rcu_periph_clk_enable(RCU_UART1);
|
||||
} else {
|
||||
return; /* Not support! */
|
||||
}
|
||||
|
||||
hal_uart_setbaud(huart->instance, huart->init.baud);
|
||||
|
||||
if (huart->init.mode != UART_MODE_TX) {
|
||||
hal_uart_control(huart->instance, UART_RX_ENABLE, HAL_ENABLE);
|
||||
}
|
||||
hal_uart_control(huart->instance, UART_MODULE_ENABLE, HAL_ENABLE);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,86 @@
|
||||
#-*- encoding: utf-8 -*-
|
||||
#---------------------------------------------------------------------------------
|
||||
# @File: Sconscript for package
|
||||
# @Author: Rice
|
||||
# @Date: 2020-07-14 16:57:00(v0.0.1)
|
||||
#
|
||||
# @LICENSE: GPLv3: https://github.com/rtpkgs/buildpkg/blob/master/LICENSE.
|
||||
#
|
||||
#---------------------------------------------------------------------------------
|
||||
import os
|
||||
from building import *
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Package configuration
|
||||
#---------------------------------------------------------------------------------
|
||||
PKGNAME = "bmsis"
|
||||
VERSION = "v1.0.0"
|
||||
DEPENDS = [""]
|
||||
#DEPENDS = ["PKG_USING_RW007"]
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Compile the configuration
|
||||
#
|
||||
# SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty
|
||||
#
|
||||
# LOCAL_CPPPATH: Local file path (.h/.c/.cpp)
|
||||
# LOCAL_CCFLAGS: Local compilation parameter
|
||||
# LOCAL_ASFLAGS: Local assembly parameters
|
||||
#
|
||||
# CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH
|
||||
# is empty # no pass!!!
|
||||
# CCFLAGS: Global compilation parameter
|
||||
# ASFLAGS: Global assembly parameters
|
||||
#
|
||||
# CPPDEFINES: Global macro definition
|
||||
# LOCAL_CPPDEFINES: Local macro definition
|
||||
#
|
||||
# LIBS: Specify the static library that need to be linked
|
||||
# LIBPATH: Specify the search directory for the library file (.lib/.a)
|
||||
#
|
||||
# LINKFLAGS: Link options
|
||||
#---------------------------------------------------------------------------------
|
||||
SOURCES = Glob("./source/*.c")
|
||||
SOURCES += Glob("./source/*.S")
|
||||
|
||||
LOCAL_CPPPATH = []
|
||||
LOCAL_CCFLAGS = ""
|
||||
LOCAL_ASFLAGS = ""
|
||||
|
||||
CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')]
|
||||
CCFLAGS = ""
|
||||
ASFLAGS = ""
|
||||
|
||||
CPPDEFINES = []
|
||||
LOCAL_CPPDEFINES = []
|
||||
|
||||
LIBS = []
|
||||
LIBPATH = []
|
||||
|
||||
LINKFLAGS = ""
|
||||
|
||||
SOURCES_IGNORE = []
|
||||
CPPPATH_IGNORE = []
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# Main target
|
||||
#---------------------------------------------------------------------------------
|
||||
objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS,
|
||||
CPPPATH = CPPPATH,
|
||||
CCFLAGS = CCFLAGS,
|
||||
ASFLAGS = ASFLAGS,
|
||||
LOCAL_CPPPATH = LOCAL_CPPPATH,
|
||||
LOCAL_CCFLAGS = LOCAL_CCFLAGS,
|
||||
LOCAL_ASFLAGS = LOCAL_ASFLAGS,
|
||||
CPPDEFINES = CPPDEFINES,
|
||||
LOCAL_CPPDEFINES = LOCAL_CPPDEFINES,
|
||||
LIBS = LIBS,
|
||||
LIBPATH = LIBPATH,
|
||||
LINKFLAGS = LINKFLAGS)
|
||||
|
||||
Return("objs")
|
||||
#---------------------------------------------------------------------------------
|
||||
# End
|
||||
#---------------------------------------------------------------------------------
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef PROUGENGX_H__
|
||||
#define PROUGENGX_H__
|
||||
|
||||
#include "ab32vg1.h"
|
||||
|
||||
#ifndef UINT_MAX
|
||||
#define UINT_MAX 0xffffffff
|
||||
#endif // UINT_MAX
|
||||
|
||||
#define BIT(n) (1ul << (n))
|
||||
|
||||
#define AT(x) __attribute__((section(#x)))
|
||||
#define ALIGNED(n) __attribute__((aligned(n)))
|
||||
#define DMA_ADR(x) ((uint32_t)x)
|
||||
#define ALWAYS_INLINE __attribute__((always_inline)) inline
|
||||
#define NO_INLINE __attribute__((noinline))
|
||||
#define WEAK __attribute__((weak))
|
||||
#define PACKED __attribute__((packed))
|
||||
|
||||
// #define WDT_CLR() WDTCON = 0xa
|
||||
// #define WDT_EN() WDTCON = 0x110
|
||||
// #define WDT_DIS() WDTCON = 0xaa0
|
||||
// #define WDT_RST() WDTCON = 0xa000110; while (1)
|
||||
// #define WDT_RST_DELAY() WDTCON = 0xa100110; while (1)
|
||||
|
||||
#define BYTE0(n) ((unsigned char)(n))
|
||||
#define BYTE1(n) ((unsigned char)((n)>>8))
|
||||
#define BYTE2(n) ((unsigned char)((n)>>16))
|
||||
#define BYTE3(n) ((unsigned char)((n)>>24))
|
||||
|
||||
#define GET_LE16(ptr) (uint16_t)(*(uint16_t*)(uint8_t*)(ptr))
|
||||
#define GET_LE32(ptr) (uint32_t)(*(uint32_t*)(uint8_t*)(ptr))
|
||||
#define PUT_LE16(ptr, val) *(uint16_t*)(uint8_t*)(ptr) = (uint16_t)(val)
|
||||
#define PUT_LE32(ptr, val) *(uint32_t*)(uint8_t*)(ptr) = (uint32_t)(val)
|
||||
|
||||
#define GET_BE16(ptr) get_be16(ptr)
|
||||
#define GET_BE32(ptr) get_be32(ptr)
|
||||
#define PUT_BE16(ptr, val) put_be16(ptr, val)
|
||||
#define PUT_BE32(ptr, val) put_be32(ptr, val)
|
||||
|
||||
#include "ab32vg1_hal.h"
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef BMSIS_GCC_H__
|
||||
#define BMSIS_GCC_H__
|
||||
|
||||
/* ignore some GCC warnings */
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_PROUGENGX_H__
|
||||
#define SYSTEM_PROUGENGX_H__
|
||||
|
||||
//sys_clk configure list
|
||||
enum {
|
||||
//select pll0out, PLL0 240M
|
||||
PLL0DIV_12M,
|
||||
PLL0DIV_24M,
|
||||
PLL0DIV_30M,
|
||||
PLL0DIV_48M,
|
||||
PLL0DIV_60M,
|
||||
PLL0DIV_80M,
|
||||
PLL0DIV_120M,
|
||||
|
||||
//select osc26m
|
||||
OSCDIV_2M,
|
||||
OSCDIV_13M,
|
||||
OSCDIV_26M,
|
||||
|
||||
//select adpll
|
||||
};
|
||||
|
||||
//需要与sysclk_sel_tbl对应, 按时钟频率升序
|
||||
enum {
|
||||
SYSCLK_2M,
|
||||
SYSCLK_12M,
|
||||
SYSCLK_13M,
|
||||
SYSCLK_24M,
|
||||
SYSCLK_26M,
|
||||
SYSCLK_30M,
|
||||
SYSCLK_48M,
|
||||
SYSCLK_60M,
|
||||
SYSCLK_80M,
|
||||
SYSCLK_120M,
|
||||
};
|
||||
|
||||
extern uint32_t get_sysclk_nhz(void);
|
||||
extern void system_init(void);
|
||||
extern void set_sysclk(uint32_t sys_clk);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2020, BLUETRUM Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ab32vg1.h"
|
||||
|
||||
.global _start
|
||||
.section .reset, "ax"
|
||||
_start:
|
||||
//load comm
|
||||
la a0, __comm_vma
|
||||
la a1, __comm_lma
|
||||
la a2, __comm_size
|
||||
|
||||
/* memcpy start */
|
||||
//先按32 BYTE一个循环来copy
|
||||
mv t0, a0 //备份dst
|
||||
srli t1, a2, 5 //长度除32的商
|
||||
|
||||
slli t1, t1, 5
|
||||
add t1, a0, t1 //t1存放对齐的结束地址
|
||||
|
||||
_memcpy_loop1: //8 WORDS every cycle
|
||||
lw a2, 0(a1)
|
||||
lw a3, 4(a1)
|
||||
lw a4, 8(a1)
|
||||
lw a5, 12(a1)
|
||||
sw a2, 0(a0)
|
||||
sw a3, 4(a0)
|
||||
sw a4, 8(a0)
|
||||
sw a5, 12(a0)
|
||||
|
||||
lw a2, 16(a1)
|
||||
lw a3, 20(a1)
|
||||
lw a4, 24(a1)
|
||||
lw a5, 28(a1)
|
||||
sw a2, 16(a0)
|
||||
sw a3, 20(a0)
|
||||
sw a4, 24(a0)
|
||||
sw a5, 28(a0)
|
||||
|
||||
addi a0, a0, 32
|
||||
addi a1, a1, 32
|
||||
blt a0, t1, _memcpy_loop1
|
||||
|
||||
mv a0, t0 //返回dst
|
||||
/* memcpy end */
|
||||
|
||||
la a0, __irq_stack_start //Stack清成0x23
|
||||
li a1, 0x23
|
||||
la a2, __irq_stack_size
|
||||
call memset
|
||||
la ra, __irq_stack
|
||||
lui a5, 0x1
|
||||
sw zero, -1920(a5)
|
||||
sw zero, -1916(a5)
|
||||
|
||||
//clear bss
|
||||
la a0, __bss_start
|
||||
li a1, 0
|
||||
la a2, __bss_size
|
||||
call memset
|
||||
|
||||
la a0, __comm_vma
|
||||
sw a0, PICADR(zero)
|
||||
|
||||
call entry
|
||||
// la ra, __exception
|
||||
// jr ra
|
||||
|
||||
.section .vector, "ax"
|
||||
// .org 0x10
|
||||
//__exception:
|
||||
// li sp, 0x10600 //出错后，不破坏错误点的堆栈数据
|
||||
// jal exception_isr
|
||||
// 1: j 1b
|
||||
// mret
|
||||
|
||||
.org 0x40
|
||||
jal x0, low_prio_irq
|
||||
mret
|
||||
|
||||
.global cpu_irq_comm
|
||||
.section .com_text.irq
|
||||
cpu_irq_comm:
|
||||
la a5, __irq_stack
|
||||
mv sp, a5
|
||||
j cpu_irq_comm_do
|
||||
|
||||
ret
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user