Merge remote-tracking branch 'remotes/gitee/master'

2026-02-07 01:22:37 +08:00 · 2021-07-12 10:14:20 +08:00
parent ddc5c793a4 5bae565f7f
commit 40e7d5a23d
1620 changed files with 379763 additions and 45497 deletions
--- a/.github/ISSUE_TEMPLATE.md
+++ b/.github/ISSUE_TEMPLATE.md
@@ -0,0 +1,3 @@
+<!--- 请清晰详细地描述你遇到的问题，描述问题时请给出芯片/BSP/工具链，RT-Thread版本，复现步骤及现象或者有条理地描述你的问题。在问题得到解决后，请及时关闭issue。欢迎到论坛提问：https://club.rt-thread.org/ -->
+
+<!--- Please describe your problem clearly and in detail. When describing the problem, please use numbers or bullet points to describe your problem coherently. After the problem is resolved, please close the issue in time. Welcome to the forum to ask questions: https://club.rt-thread.io/ -->
--- a/.github/workflows/action.yml
+++ b/.github/workflows/action.yml
@@ -82,6 +82,7 @@ jobs:
         - {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f407-robomaster-c", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f407-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f410-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "stm32/stm32f411-atk-nano", RTT_TOOL_CHAIN: "sourcery-arm"}
@@ -149,10 +150,10 @@ jobs:
        if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-arm' && success() }}
        shell: bash
        run: |
-          wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/arm-2017q2-v6/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2
-          sudo tar xjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 -C /opt
-          /opt/gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc --version
-          echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-6-2017-q2-update/bin" >> $GITHUB_ENV
+          wget -q https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
+          sudo tar xjf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt
+          /opt/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-gcc --version
+          echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-10-2020-q4-major/bin" >> $GITHUB_ENV

      - name: Install Mips ToolChains
        if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-mips' && success() }}
--- a/.github/workflows/action_utest.yml
+++ b/.github/workflows/action_utest.yml
@@ -0,0 +1,70 @@
+name: AutoTestCI
+
+# Controls when the action will run. Triggers the workflow on push or pull request
+on: [push, pull_request]
+
+jobs:
+  test:
+    runs-on: ubuntu-latest
+    name: ${{ matrix.legs.UTEST }}
+    strategy:
+      fail-fast: false
+      matrix:
+       legs:
+         - {UTEST: "kernel/mem",       RTT_BSP: "bsp/qemu-vexpress-a9",    QEMU_ARCH: "arm",      QEMU_MACHINE: "vexpress-a9", CONFIG_FILE: "kernel/mem.conf",     SD_FILE: "sd.bin"}
+         - {UTEST: "components/utest", RTT_BSP: "bsp/qemu-vexpress-a9",    QEMU_ARCH: "arm",      QEMU_MACHINE: "vexpress-a9", CONFIG_FILE: "utest_self/self.conf", SD_FILE: "sd.bin"}
+         - {UTEST: "kernel/mem/riscv64", RTT_BSP: "bsp/qemu-riscv-virt64", QEMU_ARCH: "riscv64",  QEMU_MACHINE: "virt",  CONFIG_FILE: "kernel/mem.conf",   SD_FILE: "None"}
+    env:
+      TEST_QEMU_ARCH: ${{ matrix.legs.QEMU_ARCH }}
+      TEST_QEMU_MACHINE: ${{ matrix.legs.QEMU_MACHINE }}
+      TEST_BSP_ROOT: ${{ matrix.legs.RTT_BSP }}
+      TEST_CONFIG_FILE: ${{ matrix.legs.CONFIG_FILE }}
+      TEST_SD_FILE: ${{ matrix.legs.SD_FILE }}
+    steps:
+    - uses: actions/checkout@v1
+
+    - name: Install Tools
+      shell: bash
+      run: |
+        sudo apt-get update
+        sudo apt-get -yqq install scons qemu-system git
+
+    - name: Install Arm ToolChains
+      if: ${{ matrix.legs.QEMU_ARCH == 'arm' && success() }}
+      shell: bash
+      run: |
+        wget -q https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
+        sudo tar xjf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt
+        /opt/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-gcc --version
+        echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-10-2020-q4-major/bin" >> $GITHUB_ENV
+
+    - name: Install RISC-V ToolChains
+      if: ${{ matrix.legs.QEMU_ARCH == 'riscv64' && success() }}
+      run: |
+        wget -q https://static.dev.sifive.com/dev-tools/freedom-tools/v2020.12/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
+        sudo tar zxvf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz -C /opt
+        /opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version
+        echo "RTT_EXEC_PATH=/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin" >> $GITHUB_ENV
+
+    - name: Build BSP
+      run: |
+        echo CONFIG_RT_USING_UTESTCASES=y >> $TEST_BSP_ROOT/.config
+        cat examples/utest/configs/$TEST_CONFIG_FILE >> $TEST_BSP_ROOT/.config
+        scons --pyconfig-silent -C $TEST_BSP_ROOT
+        scons -j$(nproc) -C $TEST_BSP_ROOT
+
+    - name: Start Test
+      if: ${{ success() }}
+      run: |
+        git clone https://github.com/armink/UtestRunner.git
+        pushd $TEST_BSP_ROOT
+        dd if=/dev/zero of=sd.bin bs=1024 count=65536
+        popd
+        pushd UtestRunner
+        if [ $TEST_SD_FILE != "None" ]; then
+          python3 qemu_runner.py --system $TEST_QEMU_ARCH --machine $TEST_QEMU_MACHINE --elf ../$TEST_BSP_ROOT/rtthread.elf --sd ../$TEST_BSP_ROOT/$TEST_SD_FILE
+        else
+          python3 qemu_runner.py --system $TEST_QEMU_ARCH --machine $TEST_QEMU_MACHINE --elf ../$TEST_BSP_ROOT/rtthread.elf
+        fi
+        cat rtt_console.log
+        popd
--- a/.ignore_format.yml
+++ b/.ignore_format.yml
@@ -9,4 +9,5 @@ dir_path:
 - tools
 - components/net/lwip-1.4.1
 - components/net/lwip-2.0.2
+- components/net/lwip-2.0.3
 - components/net/lwip-2.1.2
--- a/1
+++ b/1
@@ -1,3 +1,4 @@
 source "$RTT_DIR/src/Kconfig"
 source "$RTT_DIR/libcpu/Kconfig"
 source "$RTT_DIR/components/Kconfig"
+source "$RTT_DIR/examples/utest/testcases/Kconfig"
--- a/bsp/CME_M7/rtconfig.h
+++ b/bsp/CME_M7/rtconfig.h
@@ -91,6 +91,7 @@

 /* SECTION: lwip, a lighwight TCP/IP protocol stack */
 #define RT_USING_LWIP
+#define RT_USING_LWIP203
 /* Enable ICMP protocol*/
 #define RT_LWIP_ICMP
 /* Enable UDP protocol*/
--- a/bsp/Copyright_Notice.md
+++ b/bsp/Copyright_Notice.md
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.config
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.config
@@ -74,7 +74,7 @@ CONFIG_RT_USING_DEVICE_OPS=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
-CONFIG_RT_VER_NUM=0x40003
+CONFIG_RT_VER_NUM=0x40004
 # CONFIG_RT_USING_CPU_FFS is not set
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set

@@ -122,6 +122,8 @@ CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
 # CONFIG_RT_SERIAL_USING_DMA is not set
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
@@ -160,6 +162,7 @@ CONFIG_RT_USING_PIN=y
 CONFIG_RT_USING_LIBC=y
 # CONFIG_RT_USING_PTHREADS is not set
 # CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_FIXED_TIMEZONE=8

 #
 # Network
@@ -196,6 +199,12 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_RT_LINK is not set
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set

 #
 # RT-Thread online packages
@@ -309,9 +318,13 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
 # CONFIG_PKG_USING_HELIX is not set
 # CONFIG_PKG_USING_AZUREGUIX is not set
 # CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set

 #
 # tools packages
@@ -320,6 +333,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
@@ -349,10 +363,32 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_ANV_TESTSUIT is not set
 # CONFIG_PKG_USING_ANV_BENCH is not set
 # CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set

 #
 # system packages
 #
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
@@ -377,25 +413,12 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RAMDISK is not set
 # CONFIG_PKG_USING_MININI is not set
 # CONFIG_PKG_USING_QBOOT is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_PPOOL is not set
 # CONFIG_PKG_USING_OPENAMP is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
 # CONFIG_PKG_USING_LPM is not set
 # CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set

 #
 # peripheral libraries and drivers
@@ -420,7 +443,6 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -463,6 +485,10 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_LIBNFC is not set
 # CONFIG_PKG_USING_MFOC is not set
 # CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set

 #
 # AI packages
@@ -490,6 +516,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
--- a/bsp/bluetrum/ab32vg1-ab-prougen/README.md
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/README.md
@@ -48,7 +48,7 @@ ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核
 | FLASH        |   即将支持   | 对接 FAL                                  |
 | TIMER        |     支持     |                                           |
 | PWM          |     支持     | LPWM 的 G1 G2 G3 之间是互斥的，只能三选一 |
-| FM receive   |   即将支持   |                                           |
+| FM receive   |     支持     |                                           |
 | USB Device   |   暂不支持   |                                           |
 | USB Host     |   暂不支持   |                                           |

--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c
@@ -10,7 +10,7 @@

 #include <rtthread.h>

-#ifdef BSP_USING_SDIO
+#if defined (BSP_USING_SDCARD)

 #include <dfs_elm.h>
 #include <dfs_fs.h>
@@ -58,4 +58,23 @@ int ab32_sdcard_mount(void)
    return RT_EOK;
 }
 INIT_APP_EXPORT(ab32_sdcard_mount);
+#elif defined (RT_USING_DFS_ROMFS)
+
+#include <dfs_fs.h>
+#include "dfs_romfs.h"
+
+int ab32_romfs_mount(void)
+{
+    if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) == 0)
+    {
+        rt_kprintf("ROM file system initializated!\n");
+    }
+    else
+    {
+        rt_kprintf("ROM file system initializate failed!\n");
+    }
+
+    return 0;
+}
+INIT_ENV_EXPORT(ab32_romfs_mount);
 #endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
@@ -19,14 +19,13 @@ void rt_soft_isr(int vector, void *param);
 void cpu_irq_comm(void);
 void set_cpu_irq_comm(void (*irq_hook)(void));
 void load_cache();
+void os_cache_init(void);
 void sys_error_hook(uint8_t err_no);

-typedef void (*os_cache_setfunc_func)(void *load_cache_func, void *io_read);
 typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);

-#define os_cache_setfunc        ((os_cache_setfunc_func) 0x84024)
-
 static struct rt_mutex mutex_spiflash = {0};
+static struct rt_mutex mutex_cache = {0};
 extern volatile rt_uint8_t rt_interrupt_nest;
 extern uint32_t __heap_start, __heap_end;

@@ -148,8 +147,9 @@ void rt_hw_us_delay(rt_uint32_t us)
 RT_SECTION(".irq.cache")
 void cache_init(void)
 {
-    os_cache_setfunc(load_cache, NULL);
+    os_cache_init();
    rt_mutex_init(&mutex_spiflash, "flash_mutex", RT_IPC_FLAG_FIFO);
+    rt_mutex_init(&mutex_cache, "cache_mutex", RT_IPC_FLAG_FIFO);
 }

 RT_SECTION(".irq.cache")
@@ -170,6 +170,24 @@ void os_spiflash_unlock(void)
    }
 }

+RT_SECTION(".irq.cache")
+void os_cache_lock(void)
+{
+    // if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
+    if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
+        rt_mutex_take(&mutex_cache, RT_WAITING_FOREVER);
+    }
+}
+
+RT_SECTION(".irq.cache")
+void os_cache_unlock(void)
+{
+    // if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
+    if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
+        rt_mutex_release(&mutex_cache);
+    }
+}
+
 RT_SECTION(".irq.err.str")
 static const char stack_info[] = "thread sp=0x%x name=%s";

--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
@@ -13,8 +13,9 @@
 #define DBG_LVL              DBG_INFO
 #include <rtdbg.h>

-#define SAI_AUDIO_FREQUENCY_44K         ((uint32_t)44100u)
 #define SAI_AUDIO_FREQUENCY_48K         ((uint32_t)48000u)
+#define SAI_AUDIO_FREQUENCY_44K         ((uint32_t)44100u)
+#define SAI_AUDIO_FREQUENCY_38K         ((uint32_t)38000u)
 #define TX_FIFO_SIZE                    (1024)

 struct sound_device
@@ -22,10 +23,11 @@ struct sound_device
    struct rt_audio_device audio;
    struct rt_audio_configure replay_config;
    rt_sem_t    semaphore;
-    rt_thread_t thread; 
+    rt_thread_t thread;
    rt_uint8_t *tx_fifo;
    rt_uint8_t *rx_fifo;
    rt_uint8_t  volume;
+    rt_uint8_t  dma_to_aubuf;
 };

 static struct sound_device snd_dev = {0};
@@ -120,16 +122,15 @@ void audio_sem_pend(void)

 void saia_frequency_set(uint32_t frequency)
 {
+    DACDIGCON0 &= ~(0xf << 2);
    if (frequency == SAI_AUDIO_FREQUENCY_48K) {
-        DACDIGCON0 |= BIT(1);
-        DACDIGCON0 &= ~(0xf << 2);
-        DACDIGCON0 |= BIT(6);
+        DACDIGCON0 |= (0 << 2);
    } else if (frequency == SAI_AUDIO_FREQUENCY_44K) {
-        DACDIGCON0 &= ~BIT(1);
-        DACDIGCON0 &= ~(0xf << 2);
-        DACDIGCON0 |= BIT(1);
-        DACDIGCON0 |= BIT(6);
+        DACDIGCON0 |= (1 << 2);
+    } else if (frequency == SAI_AUDIO_FREQUENCY_38K) {
+        DACDIGCON0 |= (2 << 2);
    }
+    DACDIGCON0 |= BIT(6);
 }

 void saia_channels_set(uint8_t channels)
@@ -271,6 +272,10 @@ static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_c
            break;
        }

+        case AUDIO_MIXER_EXTEND:
+            snd_dev->dma_to_aubuf = caps->udata.value;
+        break;
+
        default:
            result = -RT_ERROR;
            break;
@@ -349,6 +354,7 @@ static rt_err_t sound_init(struct rt_audio_device *audio)
    /* set default params */
    saia_frequency_set(snd_dev->replay_config.samplerate);
    saia_channels_set(snd_dev->replay_config.channels);
+    saia_volume_set(snd_dev->volume);

    return RT_EOK;
 }
@@ -368,9 +374,7 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
        AUBUFSIZE       |= (TX_FIFO_SIZE / 8) << 16;
        AUBUFSTARTADDR  = DMA_ADR(snd_dev->rx_fifo);

-        DACDIGCON0  = BIT(0) | BIT(10); // (0x01<<2)
-        DACVOLCON   = 0x7fff; // -60DB
-        DACVOLCON  |= BIT(20);
+        DACDIGCON0  |= BIT(0) | BIT(10); // (0x01<<2)

        AUBUFCON |= BIT(1);
    }
@@ -380,14 +384,10 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)

 static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
 {
-    struct sound_device *snd_dev = RT_NULL;
-
    RT_ASSERT(audio != RT_NULL);
-    snd_dev = (struct sound_device *)audio->parent.user_data;

    if (stream == AUDIO_STREAM_REPLAY)
    {
-        AUBUFCON &= ~BIT(4);
        LOG_D("close sound device");
    }

@@ -463,7 +463,7 @@ static void audio_thread_entry(void *parameter)
 {
    while (1)
    {
-        if (snd_dev.audio.replay->activated == RT_TRUE) {
+        if ((snd_dev.dma_to_aubuf == RT_FALSE) && (snd_dev.audio.replay->activated == RT_TRUE)) {
            rt_audio_tx_complete(&snd_dev.audio);
        } else {
            rt_thread_mdelay(50);
@@ -506,7 +506,7 @@ static int rt_hw_sound_init(void)
        RT_NULL,
        1024,
        20, // must equal or lower than tshell priority
-        5
+        1
    );

    if (snd_dev.thread != RT_NULL)
@@ -516,7 +516,7 @@ static int rt_hw_sound_init(void)

    /* init default configuration */
    {
-        snd_dev.replay_config.samplerate = 48000;
+        snd_dev.replay_config.samplerate = SAI_AUDIO_FREQUENCY_48K;
        snd_dev.replay_config.channels   = 2;
        snd_dev.replay_config.samplebits = 16;
        snd_dev.volume                   = 55;
--- a/bsp/bluetrum/ab32vg1-ab-prougen/link.lds
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/link.lds
@@ -34,8 +34,8 @@ SECTIONS
    } > init

    .ram1 __ram1_vma : {
-        . = ALIGN(4);
        /* section information for initial */
+        . = ALIGN(4);
        __rt_init_start = .;
        KEEP(*(SORT(.rti_fn*)))
        __rt_init_end = .;
@@ -43,7 +43,7 @@ SECTIONS
        . = ALIGN(4);
        PROVIDE(__ctors_start__ = .);
        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
+        KEEP (*(.init_array*))
        PROVIDE(__ctors_end__ = .);

        . = ALIGN(4);
@@ -73,21 +73,16 @@ SECTIONS
    .comm __comm_vma : {
        . = ALIGN(4);
        KEEP(*(.vector))
+        *(.irq.cache)
        *(.irq*)
-        /*applications**.o (.text .rodata)*/
-        *hal_libraries*ab32vg1_hal**.o (.text .rodata)
-        *(.text.unlikely)
-        *(.text.startup)
-        *hal_drivers**.o (.rodata)
-        *audio*drv_sound.o (.rodata)
-        *system_ab32vgx.o (.rodata)
-        EXCLUDE_FILE(*lib_a**.o *cp-demangle.o *cp-demangle.o 
-        *src*mem.o *src*memheap.o *dfs**.o *components.o *drivers*sdio**.o *cmd.o *msh_file.o
-        *drv_sdio.o *drv_wdt.o) *(.rodata.str1.4)
-        EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata)
+        *ab32vg1_hal**.o (.text* .rodata*)
+        *drv_gpio.o (.text* .rodata*)
+        *drv_usart.o (.rodata*)
+        EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata*)
        *(.rela*)
        *(.data*)
        *(.sdata*)
+        *(.com_text*)
    } > comm AT > flash

    .bss (NOLOAD):
--- a/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
@@ -46,7 +46,7 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart0"
-#define RT_VER_NUM 0x40003
+#define RT_VER_NUM 0x40004

 /* RT-Thread Components */

@@ -81,6 +81,7 @@
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
+#define RT_USING_SERIAL_V1
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN

@@ -90,6 +91,7 @@
 /* POSIX layer and C standard library */

 #define RT_USING_LIBC
+#define RT_LIBC_FIXED_TIMEZONE 8

 /* Network */

@@ -111,6 +113,9 @@
 /* Utilities */


+/* RT-Thread Utestcases */
+
+
 /* RT-Thread online packages */

 /* IoT - internet of things */
@@ -141,6 +146,8 @@

 /* system packages */

+/* acceleration: Assembly language or algorithmic acceleration packages */
+

 /* Micrium: Micrium software products porting for RT-Thread */

--- a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
@@ -189,27 +189,27 @@ static rt_err_t ab32_rtc_control(rt_device_t dev, int cmd, void *args)
    switch (cmd)
    {
    case RT_DEVICE_CTRL_RTC_GET_TIME:
-        *(rt_uint32_t *)args = get_rtc_time_stamp();
-        LOG_D("RTC: get rtc_time %x", *(rt_uint32_t *)args);
+        *(time_t *)args = get_rtc_time_stamp();
+        LOG_D("RTC: get rtc_time %x", *(time_t *)args);
        break;

    case RT_DEVICE_CTRL_RTC_SET_TIME:
-        if (set_rtc_time_stamp(*(rt_uint32_t *)args))
+        if (set_rtc_time_stamp(*(time_t *)args))
        {
            result = -RT_ERROR;
        }
-        LOG_D("RTC: set rtc_time %x", *(rt_uint32_t *)args);
+        LOG_D("RTC: set rtc_time %x", *(time_t *)args);
        break;
    case RT_DEVICE_CTRL_RTC_SET_ALARM:
-        if (set_rtc_alarm_stamp(*(rt_uint32_t *)args))
+        if (set_rtc_alarm_stamp(*(time_t *)args))
        {
            result = -RT_ERROR;
        }
-        LOG_D("RTC: set alarm_stamp %x", *(rt_uint32_t *)args);
+        LOG_D("RTC: set alarm_stamp %x", *(time_t *)args);
        break;
    case RT_DEVICE_CTRL_RTC_GET_ALARM:
-        *(rt_uint32_t *)args = get_rtc_alarm_stamp();
-        LOG_D("RTC: get alarm_stamp %x", *(rt_uint32_t *)args);
+        *(time_t *)args = get_rtc_alarm_stamp();
+        LOG_D("RTC: get alarm_stamp %x", *(time_t *)args);
        break;
    }

--- a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/api_fmrx.h
+++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/api_fmrx.h
@@ -0,0 +1,43 @@
+#ifndef FMRX_H__
+#define FMRX_H__
+
+/**
+ * @brief Synchronize between FMRX and DAC
+ *
+ * @param buf_size Size of audio buffer.
+ */
+void fmrx_dac_sync(uint32_t buf_size);
+
+/**
+ * @brief FMRX power on.
+ *
+ * @param val Make it zero now.
+ */
+void fmrx_power_on(uint32_t val);
+
+/**
+ * @brief FMRX power off.
+ *
+ */
+void fmrx_power_off(void);
+
+/**
+ * @brief FMRX digital start.
+ *
+ */
+void fmrx_digital_start(void);
+
+/**
+ * @brief FMRX digital stop.
+ *
+ */
+void fmrx_digital_stop(void);
+
+/**
+ * @brief FMRX dma to aubuf enable.
+ *
+ * @param enable RT_TRUE or RT_FALSE.
+ */
+void fmrx_dma_to_aubuf(uint8_t enable);
+
+#endif
--- a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/libhal.a
+++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/libhal.a
--- a/bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S
+++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S
@@ -6,26 +6,29 @@

 #include "ab32vg1.h"

+.set _memcpy,    0x84044
 .global _start
 .section .reset, "ax"
 _start:
+    la      tp, _tp
+    la      gp, _gp

    //load comm
    la      a0, __comm_vma
    la      a1, __comm_lma
    la      a2, __comm_size
-    call    0x84044
+    call    _memcpy

    //load ram1
    la      a0, __ram1_vma
    la      a1, __ram1_lma
    la      a2, __ram1_size
-    call    0x84044
+    call    _memcpy

    la      a0, __irq_stack_start           //Stack清成0x23
    li      a1, 0x23
    la      a2, __irq_stack_size
-    call    memset
+    call    rt_memset
    la      ra, __irq_stack
    lui	    a5, 0x1
    sw	    zero, -1920(a5)
@@ -35,7 +38,7 @@ _start:
    la      a0, __bss_start
    li      a1, 0
    la      a2, __bss_size
-    call    memset
+    call    rt_memset

    call    cache_init

@@ -56,32 +59,33 @@ __exception:

    .org    0x40
    jal x0, low_prio_irq
-    mret

    .org    0x80
 #define METHOD 1
 #if METHOD == 1
    addi    sp, sp, -6*4
-    lw      a0, PICEN(zero)
+    # lw      a0, PICEN(zero)
    lw      a1, EPC(zero)
    lw      a2, EPICCON(zero)
-    sw      a0, 3*4(sp)
+    # sw      a0, 3*4(sp)
    sw      a1, 4*4(sp)
    sw      a2, 5*4(sp)
-    andi    a0, a0, 1
-    sw      a0, PICEN(zero)
+    # andi    a0, a0, 1
+    # sw      a0, PICEN(zero)
+    li      a2, 0
+    sw      a2, EPICCON(zero)
    la      a0, 0f
    sw      a0, EPC(zero)
-    j       0x84020
+    j       isr_cache
 0:
    sw      a0, 0(sp)
    sw      a1, 4(sp)
    sw      a2, 8(sp)

-    lw      a0, 3*4(sp)
+    # lw      a0, 3*4(sp)
    lw      a1, 4*4(sp)
    lw      a2, 5*4(sp)
-    sw      a0, PICEN(zero)
+    # sw      a0, PICEN(zero)
    sw      a1, EPC(zero)
    sw      a2, EPICCON(zero)

@@ -90,9 +94,6 @@ __exception:
    lw      a2, 8(sp)
    addi    sp, sp, 6*4
    mret
-    .align  4
-1:  .word   0, 0
-    j       0x84020
 #endif

    .global cpu_irq_comm
@@ -102,3 +103,6 @@ cpu_irq_comm:
    j       cpu_irq_comm_do

    ret
+
+    .global _tp
+    .set    _tp,        0x84800
--- a/bsp/frdm-k64f/rtconfig.h
+++ b/bsp/frdm-k64f/rtconfig.h
@@ -103,6 +103,7 @@

 /* SECTION: lwip, a lighwight TCP/IP protocol stack */
 #define RT_USING_LWIP
+#define RT_USING_LWIP203
 /* Enable LwIP debug output */
 //#define RT_LWIP_DEBUG
 /* Enable ICMP protocol*/
--- a/bsp/ft2004/.config
+++ b/bsp/ft2004/.config
--- a/bsp/ft2004/Kconfig
+++ b/bsp/ft2004/Kconfig
@@ -0,0 +1,31 @@
+mainmenu "RT-Thread Project Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+
+
+config FT2004
+    bool
+    select ARCH_ARM_CORTEX_A
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    select RT_USING_GIC_V3
+    default y
+
+
+source "./libraries/Kconfig"
--- a/bsp/ft2004/README.md
+++ b/bsp/ft2004/README.md
@@ -0,0 +1,236 @@
+# ft2004 四核开发板 BSP 说明
+
+## 简介
+
+本文档为 飞腾技术公司 ft2000/4 开发板的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 外设支持
+- 使用方法
+- 相关实验
+
+### 1. 开发板资源介绍
+
+FT-2000/4 是一款面向桌面应用的高性能通用 4 核处理器。每 2 个核构成 1
+个处理器核簇（Cluster），并共享 L2 Cache。主要技术特征如下：
+
+- 兼容 ARM v8 64 位指令系统，兼容 32 位指令
+- 支持单精度、双精度浮点运算指令
+- 支持 ASIMD 处理指令
+- 集成 2 个 DDR4 通道，可对 DDR 存储数据进行实时加密
+- 集成 34 Lane PCIE3.0 接口：2 个 X16（每个可拆分成 2 个 X8），2 个 X1
+- 集成 2 个 GMAC，RGMII 接口，支持 10/100/1000 自适应
+- 集成 1 个 SD 卡控制器，兼容 SD 2.0 规范
+- 集成 1 个 HDAudio，支持音频输出，可同时支持最多 4 个 Codec
+- 集成 SM2、SM3、SM4 模块
+- 集成 4 个 UART，1 个 LPC，32 个 GPIO，4 个 I2C，1 个 QSPI，2 个通
+  用 SPI，2 个 WDT，16 个外部中断（和 GPIO 共用 IO）
+- 集成温度传感器
+
+### 2. BSP 外设支持
+
+| 外设名   | 支持情况 | 备注                   |
+| -------- | -------- | ---------------------- |
+| ft_gicv3 | 支持     | gicv3 中断控制器       |
+| ft_gmac  | 支持     | ft gmac 千兆网卡控制器 |
+| ft_i2c   | 支持     | FT I2C                 |
+| ft_qspi  | 支持     | FT qspi 控制器         |
+| ft_sd    | 支持     | FT mmcsd 控制器        |
+| ft_uart  | 支持     | PrimeCell PL011        |
+| ft_spi   | 支持     | FT spi 控制器          |
+| ft_gpio  | 支持     | FT gpio 控制器         |
+| ft_can   | 支持     | FT can 控制器          |
+
+### 3. 使用方法
+
+#### ubuntu 上环境搭建
+
+1. 在 ubuntu 环境下通过指令，下载并安装交叉编译链
+
+```
+sudo apt-get install gcc-arm-none-eabi
+```
+
+2. 安装之后，通过指令，确定交叉编译链安装完毕
+
+```
+arm-none-eabi-gcc -v
+```
+
+3. 搭建 tftp 环境
+
+   - 在主机安装 tftp 服务
+     > 使用 ubuntu 完成下列操作
+
+   ```
+   sudo apt-get install tftp-hpa tftpd-hpa
+   sudo apt-get install xinetd
+   ```
+
+   - 新建 tftboot 目录，如:
+     `/mnt/d/tftboot`
+
+   > 需要给 tftboot 目录执行权限`chmod 777 /**/tftboot`
+
+   - 配置主机 tftpboot 服务
+
+   新建并配置文件/etc/xinetd.d/tftp
+
+   ```
+   # /etc/xinetd.d/tftp
+
+   server tftp
+   {
+   socket_type = dgram
+   protocol = udp
+   wait = yes
+   user = root
+   server = /usr/sbin/in.tftpd
+   server_args = -s /mnt/d/tftboot
+   disable = no
+   per_source = 11
+   cps = 100 2
+   flags = IPv4
+   }
+   ```
+
+   - 启动主机 tftp 服务
+
+   ```
+   sudo service tftpd-hpa start
+   ```
+
+   - 修改主机 tftp 配置
+     修改/etc/default/tftpd-hpa
+
+   ```
+   sudo nano /etc/default/tftpd-hpa
+   # /etc/default/tftpd-hpa
+
+   TFTP_USERNAME="tftp"
+   TFTP_DIRECTORY="/mnt/d/tftboot"
+   TFTP_ADDRESS=":69"
+   TFTP_OPTIONS="-l -c -s"
+   ```
+
+   - 重启主机 tftp 服务
+     > 每次开机要重启一次
+
+   ```
+   sudo service tftpd-hpa restart
+   ```
+
+   - 测试主机 tftp 服务的可用性
+     > 登录 tftp 服务，获取一个文件
+
+   ```
+   $ tftp 192.168.4.50
+   tftp> get test1234
+   tftp> q
+   ```
+
+#### 执行
+
+1. 将本 bsp 包拷贝至 RT-THREAD bsp/目录下
+
+1. 在 Ubuntu 终端下，切换至 bsp 目录
+
+```
+cd rt-thread/bsp/ft2004
+```
+
+3. 使用 scons -c 清空工程缓存
+
+4. 使用 scons --menuconfig 配置需要的外设
+
+![](./figures/onchipPeripheral.png)
+
+5. 使用 scons 编译代码,得到 rtthread.bin，并将 rtthread.bin 放入之前配置的 tftp 路径下。
+
+6. 连接开发板对应串口到 PC, 在终端工具里打开相应的串口（115200-8-1-N）。
+
+7. 将开发板网线接入局域网中
+
+8. 本开发板自带 uboot，使用 uboot 自带 指令进行将 bin 文件下载至 ram 中
+
+```
+setenv ipaddr 192.168.x.x      # 设置开发板ip
+setenv serverip 192.168.x.x    # 设置tftp服务器ip
+setenv gatewayip 192.168.x.x   # 设置网关ip
+tftpboot 80100000 rtthread.bin # 在主机 /tftpboot目录中的rtthread.bin文件下载到开发板内存的80100000地址中。
+```
+
+7. 执行跳转指令，便可以正常执行
+
+```
+bootvx32 80100000
+或
+boot32 80100000
+```
+
+![](./figures/启动演示图.png)
+
+### 5. 相关实验
+
+#### 网卡
+
+- 主机 ping 本机 指令 sudo ping 192.168.3.20 (默认)
+
+- rtt ping 主机 指令 ping 192.168.x.x (根据实际情况)
+
+- 通过界面
+
+![](./figures/rttPing通过界面.png)
+
+#### sd 卡调试
+
+- 通过基本命令进行，mv ，echo ，ls ，cd ，rm ....
+
+![](./figures/rttsd调试.png)
+
+#### spi flash 卡调试
+
+- 找一块有 spi flash 插槽的 ft-2004 开发板，插入 sf25s 或 gd25q 系列 spi flash
+- 配置 rt-thread 的编译选项，打开 BSP_USE_SPI 和 BSP_USE_GPIO 配置，关闭 BSP_USE_QSPI 配置，打开 rt-thread 的 SFUD 调试开关
+- 编译 rt-thread，加载版本启动，启动后显示 spi flash probe 成功
+- 执行 sf 基本操作，read, write, erase
+
+#### 推荐指令
+
+1. sf probe S25FS256
+
+2. sf read 0x1FFF000 16
+
+3. sf write 0x1FFF000 16 25 68 78 95 15 75 20
+
+4. sf read 0x1FFF000 16
+
+5. sf erase 0x1FFF000 16
+
+#### can 测试
+
+1. 使用 scons menuconfig 选中 Enable Can
+
+2. 然后选中 Enable can0 ，Enable can0 work in loop back
+
+3. 烧录程序并且烧录
+
+4. 打开 can 盒，将波特率设为 1000000
+
+5. 然后通过 can 盒发送对应的数据（标准帧，扩展帧），就可以看见回复同样的内容
+
+## 6. 参考资源
+
+- ARM Architecture Reference Manual
+
+- FT-2000／4 软件编程手册-V1.4
+
+## 7. 联系人信息
+
+请联系飞腾嵌入式软件部
+
+huanghe@phytium.com.cn
+
+zhugengyu@phytium.com.cn
--- a/bsp/ft2004/SConscript
+++ b/bsp/ft2004/SConscript
@@ -0,0 +1,14 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
--- a/bsp/ft2004/SConstruct
+++ b/bsp/ft2004/SConstruct
@@ -0,0 +1,32 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.join(os.getcwd(), '..', '..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'ft2004.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	CXX= rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/ft2004/applications/SConscript
+++ b/bsp/ft2004/applications/SConscript
@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src	= Glob('*.c')
+CPPPATH = [cwd]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/ft2004/applications/main.c
+++ b/bsp/ft2004/applications/main.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2012-12-05     Bernard      the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "ft_cpu.h"
+#include "ft_generic_timer.h"
+
+#include <board.h>
+
+#ifdef RT_USING_SMP
+
+struct rt_thread test_core[RT_CPUS_NR];
+static char *core_thread_name[RT_CPUS_NR] = {
+    "core0_test",
+    "core1_test",
+    "core2_test",
+    "core3_test"};
+static rt_uint8_t core_stack[RT_CPUS_NR][1024];
+
+static void demo_core_thread(void *parameter)
+{
+    rt_base_t level;
+    while (1)
+    {
+        /* code */
+        level = rt_cpus_lock();
+        rt_kprintf("Hi, core%d \r\n", FCpu_IdGet());
+        rt_cpus_unlock(level);
+        rt_thread_mdelay(20000);
+    }
+}
+
+void demo_core(void)
+{
+    rt_ubase_t i;
+    rt_uint8_t cpu_id = 0;
+    for (i = 0; i < RT_CPUS_NR; i++)
+    {
+        cpu_id = i;
+        rt_thread_init(&test_core[i],
+                       core_thread_name[i],
+                       demo_core_thread,
+                       RT_NULL,
+                       &core_stack[i],
+                       1024,
+                       20,
+                       32);
+
+        rt_thread_control(&test_core[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
+        rt_thread_startup(&test_core[i]);
+    }
+}
+#endif
+
+int main(void)
+{
+    int count = 1;
+
+#ifdef RT_USING_SMP
+    demo_core();
+#endif
+
+    while (count++)
+    {
+        rt_thread_mdelay(2000);
+    }
+
+    return RT_EOK;
+}
--- a/bsp/ft2004/drivers/SConscript
+++ b/bsp/ft2004/drivers/SConscript
@@ -0,0 +1,14 @@
+
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.S')
+src	+= Glob('*.c')
+
+
+
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/ft2004/drivers/board.c
+++ b/bsp/ft2004/drivers/board.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-04     Carl    the first version
+ *
+ */
+
+#include <rtthread.h>
+#include "ft_printf.h"
+#include "ft_assert.h"
+#include "ft_cpu.h"
+#include "ft_psci.h"
+#include "ft_parameters.h"
+#include "board.h"
+#include "gtimer.h"
+#include "ft_generic_timer.h"
+#include <gicv3.h>
+
+#include "interrupt.h"
+#include <mmu.h>
+#include "cp15.h"
+#include "ft2004.h"
+
+#define DDR_MEM (SHARED | AP_RW | DOMAIN0 | MEMWT | DESC_SEC)
+
+struct mem_desc platform_mem_desc[] = {
+    {0x80000000,
+     0x80000000 + 0x7f000000,
+     0x80000000,
+     DDR_MEM},
+    {0, //< QSPI
+     0x1FFFFFFF,
+     0,
+     DEVICE_MEM},
+    {0x20000000, //<! LPC
+     0x27FFFFFF,
+     0x20000000,
+     DEVICE_MEM},
+    {FT_DEV_BASE_ADDR, //<! Device register
+     FT_DEV_END_ADDR,
+     FT_DEV_BASE_ADDR,
+     DEVICE_MEM},
+    {0x30000000, //<! debug
+     0x39FFFFFF,
+     0x30000000,
+     DEVICE_MEM},
+    {0x3A000000, //<! Internal register space in the on-chip network
+     0x3AFFFFFF,
+     0x3A000000,
+     DEVICE_MEM},
+    {FT_PCI_CONFIG_BASEADDR,
+     FT_PCI_CONFIG_BASEADDR + FT_PCI_CONFIG_REG_LENGTH,
+     FT_PCI_CONFIG_BASEADDR,
+     DEVICE_MEM},
+    {FT_PCI_IO_CONFIG_BASEADDR,
+     FT_PCI_IO_CONFIG_BASEADDR + FT_PCI_IO_CONFIG_REG_LENGTH,
+     FT_PCI_IO_CONFIG_BASEADDR,
+     DEVICE_MEM},
+    {FT_PCI_MEM32_BASEADDR,
+     FT_PCI_MEM32_BASEADDR + FT_PCI_MEM32_REG_LENGTH,
+     FT_PCI_MEM32_BASEADDR,
+     DEVICE_MEM},
+};
+
+const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
+
+rt_uint32_t platform_get_gic_dist_base(void)
+{
+    return FT_GICV3_DISTRIBUTOR_BASEADDRESS;
+}
+
+static rt_uint32_t timerStep;
+
+void rt_hw_timer_isr(int vector, void *parameter)
+{
+    gtimer_set_load_value(timerStep);
+    rt_tick_increase();
+}
+
+int rt_hw_timer_init(void)
+{
+    rt_hw_interrupt_install(30, rt_hw_timer_isr, RT_NULL, "tick");
+    rt_hw_interrupt_umask(30);
+    timerStep = gtimer_get_counter_frequency();
+    timerStep /= RT_TICK_PER_SECOND;
+    gtimer_set_load_value(timerStep);
+    gtimer_set_control(1);
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_timer_init);
+
+static void AssertCallback(const char *File, s32 Line)
+{
+    Ft_printf("Assert Error is %s : %d \r\n", File, Line);
+}
+
+#ifdef RT_USING_SMP
+void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler);
+#endif
+
+/**
+ * This function will initialize hardware board
+ */
+void rt_hw_board_init(void)
+{
+    /* bsp debug */
+    FCpu_SpinLockInit();
+    Ft_GenericTimer_Init(0, RT_NULL);
+    Ft_vsprintfRegister((vsprintf_p)rt_vsprintf);
+    Ft_assertSetCallBack((Ft_assertCallback)AssertCallback);
+
+    /* interrupt init */
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + 0, 0);
+
+#if RT_CPUS_NR == 2
+    Ft_printf("arm_gic_redist_address_set is 2 \r\n");
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + (2U << 16), 1);
+#elif RT_CPUS_NR == 3
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + (2U << 16), 1);
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + 2 * (2U << 16), 2);
+#elif RT_CPUS_NR == 4
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + (2U << 16), 1);
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + 2 * (2U << 16), 2);
+    arm_gic_redist_address_set(0, FT_GICV3_RD_BASEADDRESS + 3 * (2U << 16), 3);
+#endif
+
+    rt_hw_interrupt_init();
+
+    rt_components_board_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+
+/* 初始化内存池 */
+#ifdef RT_USING_HEAP
+    rt_system_heap_init(HEAP_BEGIN, HEAP_END);
+#endif
+
+#ifdef RT_USING_SMP
+    /* install IPI handle */
+    rt_hw_interrupt_set_priority(RT_SCHEDULE_IPI, 16);
+    rt_hw_ipi_handler_install(RT_SCHEDULE_IPI, rt_scheduler_ipi_handler);
+    rt_hw_interrupt_umask(RT_SCHEDULE_IPI);
+#endif
+}
+
+static void ft_reset(void)
+{
+    FPsci_Reset();
+}
+MSH_CMD_EXPORT_ALIAS(ft_reset, ft_reset, ft_reset);
+
+/*@}*/
--- a/bsp/ft2004/drivers/board.h
+++ b/bsp/ft2004/drivers/board.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-06     Bernard    the first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "ft_parameters.h"
+#include "ft2004.h"
+
+#if defined(__CC_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif defined(__GNUC__)
+extern int __bss_end;
+#define HEAP_BEGIN ((void *)&__bss_end)
+#endif
+
+#define HEAP_END (void *)(0x80000000 + 1024 * 1024 * 1024)
+
+void rt_hw_board_init(void);
+
+#endif
--- a/bsp/ft2004/drivers/drv_can.c
+++ b/bsp/ft2004/drivers/drv_can.c
@@ -0,0 +1,270 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-05-11     Carl        the first version
+ */
+
+#include "drv_can.h"
+#include "interrupt.h"
+#include <string.h>
+
+#ifdef BSP_USE_CAN
+
+#define LOG_TAG "drv_can"
+#include <drv_log.h>
+
+#define _CAN0_NAME "can0"
+#define _CAN1_NAME "can1"
+
+#define RTHW_CAN_WAIT(_can) rt_sem_take(&_can->recv_semaphore, RT_WAITING_FOREVER);
+#define RTHW_CAN_SEND(_can) rt_sem_release(&_can->recv_semaphore);
+
+#ifdef BSP_USING_CAN0
+struct ft2004_can drv_can0 =
+    {
+        .name = _CAN0_NAME,
+        .can_handle.Config.InstanceId = 0};
+#endif
+
+#ifdef BSP_USING_CAN1
+struct ft2004_can drv_can1 =
+    {
+        .name = _CAN1_NAME,
+        .can_handle.Config.InstanceId = 1};
+#endif
+
+static void _can_recv_irq(void *args)
+{
+    struct ft2004_can *drv_can = (struct ft2004_can *)args;
+    RTHW_CAN_SEND(drv_can);
+}
+
+static void rt_hw_inner_can_isr(int irqno, void *param)
+{
+    FCan_IntrHandler(param);
+}
+
+static rt_err_t _can_config(struct rt_can_device *can, struct can_configure *cfg)
+{
+    struct FCan_Bittiming bit_timing = {0};
+    struct ft2004_can *drv_can;
+    RT_ASSERT(can);
+    RT_ASSERT(cfg);
+    drv_can = (struct ft2004_can *)can->parent.user_data;
+    RT_ASSERT(drv_can);
+
+    FCan_CfgInitialize(&drv_can->can_handle, FCan_LookupConfig(drv_can->can_handle.Config.InstanceId));
+
+    FCan_SetHandler(&drv_can->can_handle, FCAN_HANDLER_RECV, _can_recv_irq, drv_can);
+
+    bit_timing.bitrate = cfg->baud_rate;
+
+    if (FCan_CalcBittiming(&bit_timing) != FCAN_SUCCESS)
+    {
+        LOG_E("Setting baud rate %x is not valid \r\n", bit_timing.bitrate);
+        return -RT_ERROR;
+    }
+
+    FCan_SetTiming(&drv_can->can_handle, &bit_timing);
+
+    rt_hw_interrupt_set_priority(drv_can->can_handle.Config.IrqNum, 16);
+    rt_hw_interrupt_install(drv_can->can_handle.Config.IrqNum, rt_hw_inner_can_isr, &drv_can->can_handle, drv_can->name);
+    rt_hw_interrupt_umask(drv_can->can_handle.Config.IrqNum);
+
+    FCan_Enable(&drv_can->can_handle);
+
+    return RT_EOK;
+}
+
+static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
+{
+    return RT_EOK;
+}
+
+static int _can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t box_num)
+{
+    struct ft2004_can *drv_can;
+    struct rt_can_msg *pmsg = (struct rt_can_msg *)buf;
+    struct FCan_Frame can_frame = {0};
+    RT_ASSERT(can);
+    drv_can = (struct ft2004_can *)can->parent.user_data;
+    RT_ASSERT(drv_can);
+
+    /* Check the parameters */
+    RT_ASSERT(pmsg->len <= 8U);
+
+    if (RT_CAN_STDID == pmsg->ide)
+    {
+        can_frame.CanId = pmsg->id;
+    }
+    else
+    {
+        can_frame.CanId = pmsg->id;
+        can_frame.CanId |= CAN_EFF_FLAG;
+    }
+
+    if (RT_CAN_DTR == pmsg->rtr)
+    {
+    }
+    else
+    {
+        can_frame.CanId |= CAN_RTR_FLAG;
+    }
+
+    can_frame.CanDlc = pmsg->len & 0x0FU;
+    memcpy(can_frame.data, pmsg->data, 8);
+
+    return (FCan_SendByIrq(&drv_can->can_handle, &can_frame, 1, RT_NULL) == 1) ? RT_EOK : -RT_ERROR;
+}
+
+static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo)
+{
+    struct ft2004_can *drv_can;
+    struct rt_can_msg *pmsg = (struct rt_can_msg *)buf;
+    RT_ASSERT(can);
+    struct FCan_Frame recv_frame = {0};
+    drv_can = (struct ft2004_can *)can->parent.user_data;
+    RT_ASSERT(drv_can);
+
+    RTHW_CAN_WAIT(drv_can);
+
+    if (FCan_RecvByIrq(&drv_can->can_handle, &recv_frame, 1) == 0)
+    {
+        LOG_E("rx msg is error");
+        return -RT_ERROR;
+    }
+
+    if (CAN_EFF_FLAG & recv_frame.CanId)
+    {
+        pmsg->ide = RT_CAN_EXTID;
+        pmsg->id = (recv_frame.CanId & ~(RT_CAN_EXTID));
+    }
+    else
+    {
+        pmsg->ide = RT_CAN_STDID;
+        pmsg->id = recv_frame.CanId;
+    }
+
+    if (CAN_RTR_FLAG & recv_frame.CanId)
+    {
+        pmsg->id &= ~CAN_RTR_FLAG;
+        pmsg->rtr = RT_CAN_RTR;
+    }
+    else
+    {
+        pmsg->rtr = RT_CAN_DTR;
+    }
+
+    /* get len */
+    pmsg->len = recv_frame.CanDlc;
+    return RT_EOK;
+}
+
+static const struct rt_can_ops _can_ops =
+    {
+        _can_config,
+        _can_control,
+        _can_sendmsg,
+        _can_recvmsg,
+};
+
+int rt_hw_can_init(void)
+{
+#ifdef BSP_USING_CAN0
+    drv_can0.can_handle.Config.InstanceId = 0;
+    rt_sem_init(&drv_can0.recv_semaphore, "can0_recv", 0, RT_IPC_FLAG_FIFO);
+    drv_can0.device.config.ticks = 20000;
+    drv_can0.device.config.baud_rate = 1000000;
+    rt_hw_can_register(&drv_can0.device,
+                       drv_can0.name,
+                       &_can_ops,
+                       &drv_can0);
+
+#endif
+
+#ifdef BSP_USING_CAN1
+    drv_can1.can_handle.Config.InstanceId = 1;
+    drv_can0.device.config.baud_rate = 1000000;
+    rt_sem_init(&drv_can1.recv_semaphore, "can1_recv", 0, RT_IPC_FLAG_FIFO);
+    rt_hw_can_register(&drv_can1.device,
+                       drv_can1.name,
+                       &_can_ops,
+                       &drv_can1);
+
+#endif
+    return 0;
+}
+
+INIT_BOARD_EXPORT(rt_hw_can_init);
+
+#ifdef BSP_USING_CAN0_DEBUG
+
+struct can_test_struct
+{
+    const char *name;
+    struct rt_can_filter_config *filter;
+    rt_device_t candev;
+    struct rt_semaphore _sem;
+};
+
+static struct can_test_struct can0_test_obj = {
+    .name = _CAN0_NAME};
+
+void can_recv_irq(void *param)
+{
+    struct can_test_struct *_can_obj = (struct can_test_struct *)param;
+    rt_kprintf("can_recv_iqr \r\n");
+    rt_sem_release(&_can_obj->_sem);
+}
+
+static void rt_can_test_loopback_thread_entry(void *param)
+{
+    struct can_test_struct *_can_obj = (struct can_test_struct *)param;
+    struct FCan_Frame recv_frame;
+    struct ft2004_can *drv_can;
+    rt_uint32_t i;
+    _can_obj->candev = rt_device_find(_can_obj->name);
+    RT_ASSERT(_can_obj->candev);
+    drv_can = (struct ft2004_can *)_can_obj->candev->user_data;
+    rt_sem_init(&_can_obj->_sem, "canrx_wait", 0, RT_IPC_FLAG_FIFO);
+    rt_device_open(_can_obj->candev, RT_DEVICE_OFLAG_RDWR);
+
+    while (1)
+    {
+        rt_kprintf(" start to wait  loopback \r\n");
+        RTHW_CAN_WAIT(drv_can);
+        while (0 != FCan_RecvByIrq(&drv_can->can_handle, &recv_frame, 1))
+        {
+            rt_kprintf("CanId %x \r\n", recv_frame.CanId);
+            rt_kprintf("CanDlc %x \r\n", recv_frame.CanDlc);
+            for (i = 0; i < recv_frame.CanDlc; i++)
+            {
+                rt_kprintf("data [%d] %x \r\n", i, recv_frame.data[i]);
+            }
+            FCan_SendByIrq(&drv_can->can_handle, &recv_frame, 1, RT_NULL);
+        }
+    }
+}
+
+int rt_can0_test(void)
+{
+    rt_thread_t tid;
+
+    tid = rt_thread_create("can0_loopback",
+                           rt_can_test_loopback_thread_entry, &can0_test_obj,
+                           1024, 16, 20);
+    if (tid != RT_NULL)
+        rt_thread_startup(tid);
+
+    return 0;
+}
+
+INIT_APP_EXPORT(rt_can0_test);
+
+#endif
+
+#endif
--- a/bsp/ft2004/drivers/drv_can.h
+++ b/bsp/ft2004/drivers/drv_can.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-05-11     Carl        the first version
+ */
+
+#ifndef __DRV_CAN_H__
+#define __DRV_CAN_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <board.h>
+#include <rtdevice.h>
+#include <rtthread.h>
+#include "ft_can.h"
+
+    struct ft2004_can
+    {
+        const char *name;
+        FCan_t can_handle;
+        struct rt_semaphore recv_semaphore;
+        struct rt_can_device device; /* inherit from can device */
+    };
+
+    int rt_hw_can_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // !
--- a/bsp/ft2004/drivers/drv_eth.c
+++ b/bsp/ft2004/drivers/drv_eth.c
--- a/bsp/ft2004/drivers/drv_eth.h
+++ b/bsp/ft2004/drivers/drv_eth.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-09     Carl        the first version
+ */
+#ifndef __DRV_ETH_H__
+#define __DRV_ETH_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define FT_NETIF_LINKUP 0x1U
+#define FT_NETIF_DOWN 0x2U
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // !
--- a/bsp/ft2004/drivers/drv_log.h
+++ b/bsp/ft2004/drivers/drv_log.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-15     SummerGift   first version
+ */
+
+/*
+ * NOTE: DO NOT include this file on the header file.
+ */
+
+#ifndef LOG_TAG
+#define DBG_TAG               "drv"
+#else
+#define DBG_TAG               LOG_TAG
+#endif /* LOG_TAG */
+
+#ifdef DRV_DEBUG
+#define DBG_LVL               DBG_LOG
+#else
+#define DBG_LVL               DBG_INFO
+#endif /* DRV_DEBUG */
+
+#include <rtdbg.h>
--- a/bsp/ft2004/drivers/drv_qspi.c
+++ b/bsp/ft2004/drivers/drv_qspi.c
@@ -0,0 +1,424 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-11     Carl      the first version
+ */
+
+#include "drv_qspi.h"
+#include <rtthread.h>
+#include "rtdevice.h"
+#include "ft_qspi.h"
+#include "ft_parameters.h"
+
+#ifdef BSP_USE_QSPI
+
+#define DRV_DEBUG
+#define LOG_TAG "drv.qspi"
+#include <drv_log.h>
+
+struct ft2004_qspi_bus
+{
+    FQSpi_t fqspi;
+    char *name;
+    rt_uint32_t init; /* 1 is init already   */
+};
+
+static struct rt_spi_bus _qspi_bus;
+static struct ft2004_qspi_bus _ft2004_qspi_bus;
+
+static int ft2004_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configuration *qspi_cfg)
+{
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(qspi_cfg != RT_NULL);
+
+    // struct rt_spi_configuration *cfg = &qspi_cfg->parent;
+    struct ft2004_qspi_bus *qspi_bus_p = device->parent.bus->parent.user_data;
+
+    if (qspi_bus_p->init == 0)
+    {
+        qspi_bus_p->init = 1;
+        FQSpi_CfgInitialize(&qspi_bus_p->fqspi, FQSpi_LookupConfig(0));
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t ft2004_cmdOperation(struct ft2004_qspi_bus *qspi_bus_p, struct rt_spi_message *message)
+{
+    struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
+    const rt_uint8_t *sndb = message->send_buf;
+    rt_uint8_t *rcvb = message->recv_buf;
+    ft_error_t ret;
+    RT_ASSERT(qspi_bus_p != RT_NULL);
+    RT_ASSERT(message != RT_NULL);
+
+    struct FQSpi_CmdPack cmd_pack = {0};
+
+    if (qspi_message->instruction.qspi_lines == 0)
+    {
+        LOG_E("instruction is not valid");
+        return RT_ERROR;
+    }
+
+    cmd_pack.cmd = qspi_message->instruction.content;
+
+    if (qspi_message->address.qspi_lines != 0)
+    {
+        cmd_pack.flags |= FQSPI_CMD_NEED_ADDR_MASK;
+        cmd_pack.addr = qspi_message->address.content;
+    }
+
+    if (qspi_message->address.size == 24)
+    {
+        cmd_pack.flags |= FQSPI_CMD_ADDRESS_3BYTE_MASK;
+    }
+    else if (qspi_message->address.size == 32)
+    {
+        cmd_pack.flags |= FQSPI_CMD_ADDRESS_4BYTE_MASK;
+    }
+
+    if (qspi_message->qspi_data_lines != 0)
+    {
+        if (sndb && (message->length > 0))
+        {
+            cmd_pack.flags |= FQSPI_CMD_NEED_SET_MASK;
+            cmd_pack.txBuf = sndb;
+            cmd_pack.length = message->length;
+        }
+        else if (rcvb && (message->length > 0))
+        {
+            cmd_pack.flags |= FQSPI_CMD_NEED_GET_MASK;
+            cmd_pack.rxBuf = rcvb;
+            cmd_pack.length = message->length;
+        }
+        else
+        {
+            cmd_pack.flags &= ~(FQSPI_CMD_NEED_GET_MASK | FQSPI_CMD_NEED_SET_MASK);
+        }
+    }
+
+    if (qspi_message->dummy_cycles)
+    {
+        cmd_pack.flags |= FQSPI_CMD_NEED_DUMMY_MASK;
+        cmd_pack.dummyCycle = qspi_message->dummy_cycles;
+    }
+
+    if (cmd_pack.cmd == 0x20)
+    {
+        if (qspi_message->address.size == 32)
+        {
+            cmd_pack.cmd = 0xdc;
+        }
+    }
+
+#ifdef BSP_QSPI_DEBUG
+    LOG_I("flags %x", cmd_pack.flags);
+#endif
+
+    ret = FQSpi_CmdOperation(&qspi_bus_p->fqspi, &cmd_pack);
+
+#ifdef BSP_QSPI_DEBUG
+    if (ret == FQSPI_SUCCESS)
+        if (cmd_pack.cmd == 5)
+        {
+            LOG_I("cmd05 0x%x", cmd_pack.rxBuf[0]);
+        }
+#endif
+
+    return (ret == FQSPI_SUCCESS) ? RT_EOK : RT_ERROR;
+}
+
+static rt_uint32_t ft2004_qspi_xfer(struct ft2004_qspi_bus *qspi_bus_p, struct rt_spi_message *message)
+{
+    struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
+    rt_uint32_t ret_length = 0;
+    const rt_uint8_t *sndb = message->send_buf;
+    rt_uint8_t *rcvb = message->recv_buf;
+    rt_int32_t length = message->length;
+    rt_uint32_t cmd;
+    rt_uint32_t addr;
+    FQSpi_t *qspi_p;
+    FQSpi_Config_t *qspi_config_p;
+    struct FQSpi_DataPack data_pack = {0};
+    qspi_p = &qspi_bus_p->fqspi;
+    qspi_config_p = &qspi_bus_p->fqspi.config;
+
+    cmd = qspi_message->instruction.content;
+    addr = qspi_message->address.content;
+
+#ifdef BSP_QSPI_DEBUG
+    LOG_I("cmd is %x ", cmd);
+    LOG_I("length %d , rcvb %x sndb %x addr %x dummy_cycles %x ", length, rcvb, sndb, addr, qspi_message->dummy_cycles);
+#endif
+
+    if (qspi_config_p->channel >= FT_QSPI_MAX_CS_NUM)
+    {
+        LOG_E("invalid channel[%x] ", qspi_config_p->channel);
+        return RT_ERROR;
+    }
+    switch (cmd)
+    {
+    case FQSPI_FLASH_CMD_PP:
+    {
+        if (RT_NULL != sndb)
+        {
+            data_pack.cmd = cmd;
+            data_pack.addr = addr;
+            if (qspi_message->address.size == 24)
+            {
+                data_pack.flags |= FQSPI_DATA_ADDRESS_3BYTE_MASK;
+            }
+            else
+            {
+                data_pack.flags |= FQSPI_DATA_ADDRESS_4BYTE_MASK;
+            }
+
+            LOG_E("write flags %x ", data_pack.flags);
+            data_pack.txBuf = sndb;
+            data_pack.length = length;
+            ret_length = ((FQSpi_Write(qspi_p, &data_pack) == FQSPI_SUCCESS) ? length : 0);
+        }
+        else
+        {
+            LOG_E("pp cmd %x sndb is null", cmd);
+            ret_length = 0;
+        }
+    }
+    break;
+    case FQSPI_FLASH_CMD_WRDI: /* for sufd qspi fast read */
+        FQSpi_FlashRegSet(qspi_p, cmd, RT_NULL, 0);
+    case FQSPI_FLASH_CMD_READ:
+    {
+        if (RT_NULL != rcvb)
+        {
+            data_pack.cmd = FQSPI_FLASH_CMD_READ;
+            data_pack.addr = addr;
+            if (qspi_message->address.size == 24)
+            {
+                data_pack.flags |= FQSPI_DATA_ADDRESS_3BYTE_MASK;
+            }
+            else
+            {
+                data_pack.flags |= FQSPI_DATA_ADDRESS_4BYTE_MASK;
+            }
+
+            if (qspi_message->dummy_cycles)
+            {
+                data_pack.flags |= FQSPI_DATA_NEED_DUMMY_MASK;
+                data_pack.dummyCycle = qspi_message->dummy_cycles;
+            }
+            data_pack.rxBuf = rcvb;
+            data_pack.length = length;
+
+            ret_length = ((FQSpi_Read(qspi_p, &data_pack) == FQSPI_SUCCESS) ? length : 0);
+        }
+        else
+        {
+            // LOG_E("read cmd %x rcvb is null", cmd);
+            ret_length = 0;
+        }
+    }
+    break;
+
+    default:
+    {
+        if (ft2004_cmdOperation(qspi_bus_p, message) == RT_EOK)
+        {
+            ret_length = 1;
+        }
+        else
+        {
+            LOG_E("ft2004_cmdOperation error");
+            ret_length = 0;
+        }
+    }
+    }
+
+    return ret_length;
+}
+
+static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    struct ft2004_qspi_bus *qspi_bus_p = device->bus->parent.user_data;
+
+    return ft2004_qspi_xfer(qspi_bus_p, message);
+}
+
+static rt_err_t qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(configuration != RT_NULL);
+
+    struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
+    return ft2004_qspi_init(qspi_device, &qspi_device->config);
+}
+
+static const struct rt_spi_ops ft2004_qspi_ops =
+    {
+        .configure = qspi_configure,
+        .xfer = qspixfer,
+};
+
+static int ft2004_qspi_register_bus(struct ft2004_qspi_bus *qspi_bus, const char *name)
+{
+    RT_ASSERT(qspi_bus != RT_NULL);
+    RT_ASSERT(name != RT_NULL);
+
+    _qspi_bus.parent.user_data = qspi_bus;
+    return rt_qspi_bus_register(&_qspi_bus, name, &ft2004_qspi_ops);
+}
+
+rt_err_t ft2004_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
+{
+    struct rt_qspi_device *qspi_device = RT_NULL;
+    rt_err_t result = RT_EOK;
+
+    RT_ASSERT(bus_name != RT_NULL);
+    RT_ASSERT(device_name != RT_NULL);
+    RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
+
+    qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
+    if (qspi_device == RT_NULL)
+    {
+        LOG_E("no memory, qspi bus attach device failed!");
+        result = RT_ENOMEM;
+        goto __exit;
+    }
+
+    qspi_device->enter_qspi_mode = enter_qspi_mode;
+    qspi_device->exit_qspi_mode = exit_qspi_mode;
+    qspi_device->config.qspi_dl_width = data_line_width;
+
+    result = rt_spi_bus_attach_device(&qspi_device->parent, device_name, bus_name, RT_NULL);
+
+__exit:
+    if (result != RT_EOK)
+    {
+        if (qspi_device)
+        {
+            rt_free(qspi_device);
+        }
+    }
+
+    return result;
+}
+
+static int rt_hw_qspi_bus_init(void)
+{
+    return ft2004_qspi_register_bus(&_ft2004_qspi_bus, FT2004_QSPI_NAME);
+}
+INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
+#ifdef BSP_QSPI_DEBUG
+static void cmd05_check(void)
+{
+    struct FQSpi_CmdPack cmd_pack = {0};
+    u8 rx_buffer[1];
+
+    cmd_pack.cmd = 0x6;
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x5;
+    cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
+    cmd_pack.rxBuf = rx_buffer;
+    cmd_pack.length = sizeof(rx_buffer);
+
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    for (u32 i = 0; i < cmd_pack.length; i++)
+    {
+        LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
+    }
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x4;
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x5;
+    cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
+    cmd_pack.rxBuf = rx_buffer;
+    cmd_pack.length = sizeof(rx_buffer);
+
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    for (u32 i = 0; i < cmd_pack.length; i++)
+    {
+        LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
+    }
+}
+MSH_CMD_EXPORT_ALIAS(cmd05_check, cmd05_check, cmd05_check);
+#endif
+
+#ifdef BSP_QSPI_DEBUG
+static void cmd35_check(void)
+{
+    struct FQSpi_CmdPack cmd_pack = {0};
+    u8 rx_buffer[1];
+
+    cmd_pack.cmd = 0x6;
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x5;
+    cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
+    cmd_pack.rxBuf = rx_buffer;
+    cmd_pack.length = sizeof(rx_buffer);
+
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    for (u32 i = 0; i < cmd_pack.length; i++)
+    {
+        LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
+    }
+
+    cmd_pack.cmd = 0xB7;
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x35;
+    cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
+    cmd_pack.rxBuf = rx_buffer;
+    cmd_pack.length = sizeof(rx_buffer);
+
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    for (u32 i = 0; i < cmd_pack.length; i++)
+    {
+        LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
+    }
+}
+MSH_CMD_EXPORT_ALIAS(cmd35_check, cmd35_check, cmd35_check);
+#endif
+#ifdef BSP_QSPI_DEBUG
+static void cmd15_check(void)
+{
+    struct FQSpi_CmdPack cmd_pack = {0};
+    u8 rx_buffer[1];
+
+    // cmd_pack.cmd = 0xB7;
+    // FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
+    cmd_pack.cmd = 0x15;
+    cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
+    cmd_pack.rxBuf = rx_buffer;
+    cmd_pack.length = sizeof(rx_buffer);
+
+    FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
+
+    for (u32 i = 0; i < cmd_pack.length; i++)
+    {
+        LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
+    }
+}
+MSH_CMD_EXPORT_ALIAS(cmd15_check, cmd15_check, cmd15_check);
+#endif
+#endif
--- a/bsp/ft2004/drivers/drv_qspi.h
+++ b/bsp/ft2004/drivers/drv_qspi.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-11     Carl      the first version
+ */
+
+#ifndef __DRT_QSPI_H__
+#define __DRT_QSPI_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define FT2004_QSPI_NAME "qspi"
+
+    rt_err_t ft2004_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)());
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // !DRT_QSPI_H
--- a/bsp/ft2004/drivers/drv_qspi_flash.c
+++ b/bsp/ft2004/drivers/drv_qspi_flash.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-08     Carl        the first version
+ */
+
+#include <board.h>
+#include <drv_qspi.h>
+#include <rtdevice.h>
+#include <rthw.h>
+#include <finsh.h>
+
+#ifdef BSP_USE_QSPI
+
+#include "spi_flash.h"
+#include "spi_flash_sfud.h"
+#define _QSPI_DEVICE_NAME "qspiflash"
+
+static int
+rt_hw_qspi_flash_with_sfud_init(void)
+{
+    ft2004_qspi_bus_attach_device(FT2004_QSPI_NAME, _QSPI_DEVICE_NAME, 1, RT_NULL, RT_NULL);
+
+    /* init gd */
+    rt_kprintf("start rt_sfud_flash_probe \r\n");
+    if (RT_NULL == rt_sfud_flash_probe("GD25LQ256D", _QSPI_DEVICE_NAME))
+    {
+        return -RT_ERROR;
+    }
+
+    return RT_EOK;
+}
+INIT_COMPONENT_EXPORT(rt_hw_qspi_flash_with_sfud_init);
+
+#endif /* BSP_USING_QSPI_FLASH */
--- a/bsp/ft2004/drivers/drv_sdcard.c
+++ b/bsp/ft2004/drivers/drv_sdcard.c
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-18     Carl      the first version
+ */
+
+#include <rtthread.h>
+
+#ifdef BSP_USING_SDC
+
+#include <dfs_elm.h>
+#include <dfs_fs.h>
+#include <dfs_posix.h>
+#include "drv_sdctrl.h"
+
+#define DBG_TAG "app.card"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+
+static rt_err_t _sdcard_mount(void)
+{
+    rt_device_t device;
+
+    device = rt_device_find("sd0");
+    rt_kprintf("rt_device_find %x \r\n", device);
+    if (device == NULL)
+    {
+        mmcsd_wait_cd_changed(0);
+        ft2004_mmcsd_change();
+        if (mmcsd_wait_cd_changed(rt_tick_from_millisecond(5000)) == -RT_ETIMEOUT)
+        {
+            rt_kprintf("timeout \r\n");
+            return RT_ERROR;
+        }
+        device = rt_device_find("sd0");
+    }
+
+    rt_thread_mdelay(1000);
+    LOG_I("dfs_mount  \r\n");
+    if (device != RT_NULL)
+    {
+        if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
+        {
+            LOG_I("sd card mount to '/'");
+        }
+        else
+        {
+            LOG_W("sd card mount to '/' failed!");
+            return RT_ERROR;
+        }
+    }
+
+    return RT_EOK;
+}
+
+static void _sdcard_unmount(void)
+{
+    rt_thread_mdelay(200);
+    dfs_unmount("/");
+    LOG_I("Unmount \"/\"");
+
+    mmcsd_wait_cd_changed(0);
+    ft2004_mmcsd_change();
+    mmcsd_wait_cd_changed(rt_tick_from_millisecond(5000));
+    LOG_I("Unmount is over \r\n");
+}
+
+static void sd_mount(void *parameter)
+{
+    rt_uint8_t state = 0; /* 1. is valid card ,0 is removal */
+#ifdef BSP_SDC_IRQ_CARD_REMOVE
+    rt_uint32_t status;
+#endif
+    while (1)
+    {
+        switch (state)
+        {
+        case 0:
+            if (ft2004_card_status() == 1)
+            {
+#ifdef BSP_SDC_IRQ_CARD_REMOVE
+                ft2004_card_remove_check(0, RT_NULL); /* Clear removal flag bit */
+#endif
+                if (_sdcard_mount() == RT_EOK)
+                {
+                    state = 1;
+                }
+                else
+                {
+                    /* For the critical case of frequent plug */
+                    rt_kprintf("dfs_unmount \r\n");
+                    _sdcard_unmount();
+                    ft2004_sdctrl_reset();
+                }
+            }
+            else
+            {
+                rt_thread_mdelay(100);
+            }
+            break;
+        case 1:
+
+#ifdef BSP_SDC_IRQ_CARD_REMOVE
+            if (ft2004_card_remove_check(RT_WAITING_FOREVER, &status) == RT_EOK)
+            {
+                if (status & SDCTR_CARD_REMOVE_FLG)
+                {
+                    state = 0;
+                    _sdcard_unmount();
+                }
+            }
+#else
+            if (ft2004_card_status() == 0)
+            {
+                state = 0;
+                _sdcard_unmount();
+            }
+#endif
+            else
+            {
+                rt_thread_mdelay(100);
+            }
+            break;
+        default:
+            state = 0;
+            break;
+        }
+    }
+}
+
+int ft2004_sdcard_mount(void)
+{
+    rt_thread_t tid;
+
+    tid = rt_thread_create("sd_mount", sd_mount, RT_NULL,
+                           8192, 2, 20);
+
+    if (tid != RT_NULL)
+    {
+        rt_thread_startup(tid);
+    }
+    else
+    {
+        LOG_E("create sd_mount thread err!");
+    }
+    return RT_EOK;
+}
+INIT_APP_EXPORT(ft2004_sdcard_mount);
+
+#endif /* BSP_USING_SDCARD */
--- a/bsp/ft2004/drivers/drv_sdctrl.c
+++ b/bsp/ft2004/drivers/drv_sdctrl.c
--- a/bsp/ft2004/drivers/drv_sdctrl.h
+++ b/bsp/ft2004/drivers/drv_sdctrl.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-18     Carl      the first version
+ */
+
+#ifndef __DRV_SDCTRL_H__
+#define __DRV_SDCTRL_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define SDCTR_CMD_IS_COMPLETE_FLG 0x1UL /* Command is  complete */
+#define SDCTR_WRITE_IS_COMPLETE_FLG 0x2UL
+#define SDCTR_READ_IS_COMPLETE_FLG 0x4UL
+#define SDCTR_CMD_IS_ERROR_FLG 0x8UL
+#define SDCTR_CMD_CRC_IS_ERROR_FLG 0x10UL     /* Command CRC error */
+#define SDCTR_DMA_IS_ERROR_FLG 0x20UL         /*  */
+#define SDCTR_CARD_REMOVE_FLG 0x40UL          /* Card remove */
+#define SDCTR_CMD_TIMEOUT_FLG 0x70UL          /* command timeout */
+#define SDCTR_CMD_RECEIVE_IS_ERROR_FLG 0x80UL /*  CMD receive is error  */
+
+#ifndef SDCTR_BUFF_SIZE
+#define SDCTR_BUFF_SIZE (512 * 128)
+#endif
+
+#ifndef SDCTR_ALIGN_LEN
+#define SDCTR_ALIGN_LEN (32)
+#endif
+
+    void ft2004_mmcsd_change(void);
+    rt_bool_t ft2004_card_status(void);
+    rt_err_t ft2004_card_remove_check(rt_int32_t timeout, rt_uint32_t *status);
+    void ft2004_sdctrl_reset(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif // !
--- a/bsp/ft2004/drivers/drv_spi.c
+++ b/bsp/ft2004/drivers/drv_spi.c
@@ -0,0 +1,449 @@
+/*
+ * @ : Copyright (c) 2021 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0.
+ *
+ * @Date: 2021-04-25 14:01:29
+ * @LastEditTime: 2021-05-26 15:42:52
+ * @Description:  This files is for
+ *
+ * @Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ */
+
+#include "drv_spi.h"
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <string.h>
+#include "ft_spi.h"
+#include "ft_mux.h"
+#include "ft_trace.h"
+#include "ft_generic_timer.h"
+
+#ifdef BSP_USE_SPI
+
+#define DRV_DEBUG
+#define LOG_TAG "drv.spi"
+#include <drv_log.h>
+
+typedef void (*spi_cs_handler_t)(const rt_bool_t select);
+typedef struct
+{
+    FSpi_Ctrl_t spi_ctrl;
+    struct rt_spi_bus spi_bus;
+    uint16_t spi_cs_pin;
+    spi_cs_handler_t spi_cs_handler;
+} ft2004_spi_class;
+
+void ft2004_spi_cs(const rt_bool_t select);
+static ft2004_spi_class spi_obj = {
+    .spi_cs_handler = ft2004_spi_cs,
+    .spi_ctrl = {
+        .CtrlId = SPI_CTRL_ID_0,
+        .DevId = SPI_DEV_ID_0,
+        .IsReady = FALSE,
+        .CsPin = 5, /* use pin 5 in gpio group a as cs signal pin */
+    },
+};
+static const FSpi_Conf_t spi_conf[NUM_OF_SPI_CTRL] =
+    {
+        {
+            .DevAddr = {0x00, 0x00, 0x00, 0x00},
+            .DevAddrLen = SPI_4_BYTE_ADDR,
+            .WorkMode = SPI_CTRL_MASTER_MODE,
+            /* mode 2 CPOL = 1, CPHA = 0 */
+            .Cpol = SPI_CTRL_CPOL_HIGH,
+            .Cpha = SPI_CTRL_CPHA_1EDGE,
+            .BaudRDiv = SPI_SCKDV_4,
+        },
+        {
+            .DevAddr = {0x00, 0x00, 0x00, 0x00},
+            .DevAddrLen = SPI_4_BYTE_ADDR,
+            .WorkMode = SPI_CTRL_MASTER_MODE,
+            .Cpol = SPI_CTRL_CPOL_HIGH,
+            .Cpha = SPI_CTRL_CPHA_1EDGE,
+            .BaudRDiv = SPI_SCKDV_MAX,
+        }};
+
+inline static ft2004_spi_class *ft2004_spi_get_class()
+{
+    return &spi_obj;
+}
+
+inline static FSpi_Ctrl_t *ft2004_spi_get_ctrl()
+{
+    return &(ft2004_spi_get_class()->spi_ctrl);
+}
+
+static const FSpi_Conf_t *ft2004_lookup_conf(FT_IN FSpi_CtrlId_t CtrlId)
+{
+    return &spi_conf[CtrlId];
+}
+
+void ft2004_spi_cs(const rt_bool_t select)
+{
+    FSpi_Ctrl_t *ctrl_p = ft2004_spi_get_ctrl();
+    FSpi_SelectSlave(ctrl_p, ctrl_p->DevId, (bool_t)select);
+}
+
+/**spi flash operations***/
+u32 ft2004_spi_transcation(const u8 tx_data, u8 *rx_data_p)
+{
+    FSpi_Ctrl_t *ctrl_p = ft2004_spi_get_ctrl();
+    u32 ret = ERR_SPI_OK;
+
+    ret = FSpi_ReadWriteByte(ctrl_p, tx_data, rx_data_p);
+    return ret;
+}
+/**spi flash operations***/
+
+static rt_err_t ft2004_spi_init(struct rt_spi_configuration *cfg)
+{
+    FSpi_Ctrl_t *ctrl_p = ft2004_spi_get_ctrl();
+    FSpi_DevId_t dev_id;
+    u32 ret = ERR_SPI_OK;
+
+    //RT_ASSERT(cfg != RT_NULL);
+    RT_ASSERT(ctrl_p != RT_NULL);
+    dev_id = ctrl_p->DevId;
+
+    /* get spi flash default config */
+    ctrl_p->Config = *(ft2004_lookup_conf(dev_id));
+
+    /* change config according to inputs, cfg could be RT_NULL */
+
+    /* reset ctrl block */
+    ctrl_p->IsReady = FALSE;
+
+    /* set spi pin mux */
+    Ft_setSpiMux(ctrl_p->CtrlId);
+
+    /* init spi ctrl */
+    ret = FSpi_Init(ctrl_p);
+
+    if (ERR_SPI_OK == ret)
+    {
+        return RT_EOK;
+    }
+    else
+    {
+        return -RT_ERROR;
+    }
+}
+
+static rt_uint32_t spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    rt_size_t message_length, loop;
+    rt_uint8_t *recv_buf;
+    const rt_uint8_t *send_buf;
+    u32 tx_rx_result = ERR_SPI_OK;
+    spi_cs_handler_t cs_handler = ft2004_spi_get_class()->spi_cs_handler;
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    RT_ASSERT(device->bus->parent.user_data != RT_NULL);
+    RT_ASSERT(message != RT_NULL);
+
+    if (message->cs_take && cs_handler)
+    {
+        cs_handler(TRUE);
+    }
+
+    message_length = message->length;
+    recv_buf = message->recv_buf;
+    send_buf = message->send_buf;
+
+    /* handle msg */
+    for (loop = 0; loop < message_length; loop++)
+    {
+        /* start data exchange */
+        if ((message->recv_buf) && (message->send_buf))
+        {
+            /* need tx and rx */
+            tx_rx_result |= ft2004_spi_transcation(*send_buf, recv_buf);
+            send_buf++;
+            recv_buf++;
+        }
+        else if (message->send_buf)
+        {
+            /* tx only */
+            tx_rx_result |= ft2004_spi_transcation(*send_buf, RT_NULL);
+            send_buf++;
+        }
+        else
+        {
+            /* rx only */
+            tx_rx_result |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, recv_buf);
+            recv_buf++;
+        }
+    }
+
+    if (ERR_SPI_OK != tx_rx_result)
+    {
+        LOG_E("spi transfer error : 0x%x", tx_rx_result);
+        message->length = 0;
+    }
+    else
+    {
+    }
+
+    if (message->cs_release && cs_handler)
+    {
+        cs_handler(FALSE);
+    }
+
+    return message->length;
+}
+
+static rt_err_t spi_configure(struct rt_spi_device *device,
+                              struct rt_spi_configuration *configuration)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(configuration != RT_NULL);
+
+    return ft2004_spi_init(configuration);
+}
+
+static const struct rt_spi_ops ft2004_spi_ops =
+    {
+        .configure = spi_configure,
+        .xfer = spi_xfer,
+};
+
+/**
+  * Attach the spi device to SPI bus, this function must be used after initialization.
+  */
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint16_t cs_gpio_pin)
+{
+    rt_err_t result;
+    struct rt_spi_device *spi_device;
+    ft2004_spi_class *spi_class = ft2004_spi_get_class();
+
+    RT_ASSERT(spi_class != RT_NULL);
+
+    spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
+    RT_ASSERT(spi_device != RT_NULL);
+
+    result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, RT_NULL);
+
+    LOG_I("attach result 0x%x", result);
+
+    if (result != RT_EOK)
+    {
+        if (spi_device)
+        {
+            rt_free(spi_device);
+        }
+    }
+    return result;
+}
+
+static int rt_hw_spi_bus_init(void)
+{
+    rt_err_t result;
+    ft2004_spi_class *spi_class = ft2004_spi_get_class();
+
+    LOG_I("init spi ctrl");
+    spi_class->spi_bus.parent.user_data = &spi_class->spi_bus;
+    result = rt_spi_bus_register(&spi_class->spi_bus, SPI_BUS_NAME, &ft2004_spi_ops);
+    return result;
+}
+
+int rt_hw_spi_init(void)
+{
+    return rt_hw_spi_bus_init();
+}
+INIT_BOARD_EXPORT(rt_hw_spi_init);
+
+static void rthw_spi_delay(u32 delayCnt)
+{
+    Ft_GenericTimer_UsDelay(delayCnt);
+}
+
+/************spi flash operatiosn implemented for sample test****************/
+/* definition of s25fs maunfactor id */
+typedef struct
+{
+    u8 Mid;
+    u8 MemoryType;
+    u8 Density;
+    u8 RemainBytes;
+    u8 PhySectArch;
+    u8 FamilyID;
+} ft2004_manuid_t;
+
+/* definition of cmd for s25fs */
+#define S25FS_ENABLE_WR 0x06
+#define S25FS_DISABLE_WR 0x04
+#define S25FS_READ_ID 0x9F
+#define S25FS_READ_4BYTE_ADD 0x13
+#define S25FS_ERASE_4BYTE_ADD 0x21
+#define S25FS_READ_STATUS_1 0x05
+#define S25FS_READ_FLASH_PARAM 0x5A
+
+static void ft2004_dump_manuid(const ft2004_manuid_t *pId)
+{
+    rt_kprintf("0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\r\n",
+               pId->Mid, pId->MemoryType, pId->Density, pId->RemainBytes,
+               pId->PhySectArch, pId->FamilyID);
+}
+
+static u32 ft2004_read_in_4byte_addr(const u32 ReadAddr, const u32 BytesToRead, u8 *pBuf)
+{
+    u32 ret = ERR_SPI_OK;
+    u32 loop;
+
+    RT_ASSERT(RT_NULL != pBuf);
+
+    ft2004_spi_cs(TRUE);
+    ret |= ft2004_spi_transcation(S25FS_READ_4BYTE_ADD, RT_NULL);
+    /* only 4-bytes address, MSB first */
+    ret |= ft2004_spi_transcation((u8)(ReadAddr >> 24), RT_NULL);
+    ret |= ft2004_spi_transcation((u8)(ReadAddr >> 16), RT_NULL);
+    ret |= ft2004_spi_transcation((u8)(ReadAddr >> 8), RT_NULL);
+    ret |= ft2004_spi_transcation((u8)ReadAddr, RT_NULL);
+    /* read out data */
+    for (loop = 0; loop < BytesToRead; loop++)
+    {
+        ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, pBuf + loop);
+        if (ERR_SPI_OK != ret)
+        {
+            break;
+        }
+    }
+    ft2004_spi_cs(FALSE);
+    return ret;
+}
+
+u32 ft2004_spi_enable_wr(const bool_t enable)
+{
+    u32 ret = ERR_SPI_OK;
+    ft2004_spi_cs(TRUE);
+    if (enable)
+    {
+        ret |= ft2004_spi_transcation(S25FS_ENABLE_WR, RT_NULL);
+    }
+    else
+    {
+        ret |= ft2004_spi_transcation(S25FS_DISABLE_WR, RT_NULL);
+    }
+    ft2004_spi_cs(FALSE);
+    return ret;
+}
+
+u32 ft2004_erase_sector_in_4byte_addr(const u32 sector_addr)
+{
+    u32 Ret = ERR_SPI_OK;
+
+    ft2004_spi_enable_wr(TRUE);
+    LOG_I("erase sector 0x%x", Ret);
+    if (ERR_SPI_OK != Ret)
+    {
+        return Ret;
+    }
+
+    ft2004_spi_cs(TRUE);
+    Ret |= ft2004_spi_transcation(S25FS_ERASE_4BYTE_ADD, RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(sector_addr >> 24), RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(sector_addr >> 16), RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(sector_addr >> 8), RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(sector_addr), RT_NULL);
+    ft2004_spi_cs(FALSE);
+
+    return Ret;
+}
+
+u32 ft2004_spi_read_params(const u32 Addr)
+{
+    u32 Ret = ERR_SPI_OK;
+    u8 dat[8] = {0};
+    u32 loop;
+
+    ft2004_spi_cs(TRUE);
+    Ret |= ft2004_spi_transcation(S25FS_READ_FLASH_PARAM, RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(Addr >> 16), RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(Addr >> 8), RT_NULL);
+    Ret |= ft2004_spi_transcation((u8)(Addr), RT_NULL);
+    for (loop = 0; loop < 8; loop++)
+    {
+        Ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, dat + loop);
+        rt_kprintf("%d: 0x%x", loop, *(dat + loop));
+    }
+
+    ft2004_spi_cs(FALSE);
+    return Ret;
+}
+
+static u32 ft2004_spi_readid_for_test(ft2004_manuid_t *pId)
+{
+    FSpi_Ctrl_t *ctrl_p = ft2004_spi_get_ctrl();
+    u32 ret = ERR_SPI_OK;
+
+    if (!ctrl_p->IsReady)
+    {
+        return ERR_SPI_NOT_READY;
+    }
+
+    RT_ASSERT(RT_NULL != pId);
+
+    ft2004_spi_cs(TRUE);
+
+    /* shifting the command code “90H” followed by a 24-bit address */
+    ret |= ft2004_spi_transcation(S25FS_READ_ID, RT_NULL);
+
+    /* Manufacturer ID and the Device ID are shifted out */
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->Mid);
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->MemoryType);
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->Density);
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->RemainBytes);
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->PhySectArch);
+    ret |= ft2004_spi_transcation(SPI_DUMMY_TX_DATA, &pId->FamilyID);
+    ft2004_spi_cs(FALSE);
+
+    if (ERR_SPI_OK == ret)
+    {
+        ft2004_dump_manuid(pId);
+    }
+
+    return ret;
+}
+
+static void spi_9f_s25fs_sample(int argc, char *argv[])
+{
+    ft2004_manuid_t dev_id;
+    u32 ret = ERR_SPI_OK;
+    u32 delay = SPI_TIMEOUT * 10;
+
+    rt_kprintf("test s25fs spi flash\r\n");
+    ret |= ft2004_spi_init(RT_NULL);
+    ret |= ft2004_spi_readid_for_test(&dev_id);
+
+    rt_kprintf("result is: 0x%x \r\n", ret);
+    while (--delay)
+    {
+        rthw_spi_delay(10);
+    }
+}
+MSH_CMD_EXPORT(spi_9f_s25fs_sample, "spi s25fs cmd 9fH sample");
+
+static u8 read_buf[256];
+static void spi_5a_s25fs_sample(int argc, char *argv[])
+{
+    u32 ret = ERR_SPI_OK;
+    u32 delay = SPI_TIMEOUT * 10;
+    u32 read_addr = 0x0000;
+
+    rt_kprintf("test s25fs spi flash\r\n");
+    ret |= ft2004_spi_init(RT_NULL);
+    ret |= ft2004_spi_read_params(read_addr);
+    ret |= ft2004_read_in_4byte_addr(read_addr, 256, read_buf);
+    rt_kprintf("result is: 0x%x \r\n", ret);
+    while (--delay)
+    {
+        rthw_spi_delay(10);
+    }
+}
+MSH_CMD_EXPORT(spi_5a_s25fs_sample, "spi s25fs cmd 5aH sample");
+
+#endif
--- a/bsp/ft2004/drivers/drv_spi.h
+++ b/bsp/ft2004/drivers/drv_spi.h
@@ -0,0 +1,29 @@
+/*
+ * @ : Copyright (c) 2021 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0.
+ *
+ * @Date: 2021-04-25 14:01:39
+ * @LastEditTime: 2021-04-29 09:40:13
+ * @Description:  This files is for
+ *
+ * @Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ */
+#ifndef FT_DRIVERS_RTT_SPI_H
+#define FT_DRIVERS_RTT_SPI_H
+
+#include <rtthread.h>
+
+#define SPI_BUS_NAME "spi0"
+#define SPI_DEV_NAME "S25FS256"
+
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint16_t cs_gpio_pin);
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#endif
--- a/bsp/ft2004/drivers/drv_spi_flash.c
+++ b/bsp/ft2004/drivers/drv_spi_flash.c
@@ -0,0 +1,43 @@
+/*
+ * @ : Copyright (c) 2021 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0.
+ *
+ * @Date: 2021-04-25 14:01:16
+ * @LastEditTime: 2021-04-30 14:43:12
+ * @Description:  This files is for
+ *
+ * @Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ */
+
+#include <board.h>
+#include <drv_spi.h>
+#include <rtdevice.h>
+#include <rthw.h>
+#include <finsh.h>
+#include "ft_spi.h"
+
+#ifdef BSP_USE_SPI
+
+#include "spi_flash.h"
+#include "spi_flash_sfud.h"
+
+static int rt_hw_spi_flash_init(void)
+{
+    uint16_t cs_pin = 5;
+    rt_hw_spi_device_attach(SPI_BUS_NAME, SPI_DEV_NAME, cs_pin);
+
+    rt_kprintf("attach spi flash\r\n");
+    /* lookup flah */
+    if (RT_NULL == rt_sfud_flash_probe("S25FS256S", SPI_DEV_NAME))
+    {
+        rt_kprintf("attach spi flash failed\r\n");
+        return -RT_ERROR;
+    }
+
+    return RT_EOK;
+}
+INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
+#endif
--- a/bsp/ft2004/drivers/drv_usart.c
+++ b/bsp/ft2004/drivers/drv_usart.c
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-04     Carl      the first version
+ */
+
+#include "board.h"
+#include "drv_usart.h"
+#include "interrupt.h"
+#include "serial.h"
+#include "rtconfig.h"
+
+#ifdef RT_USING_SERIAL
+
+extern u32 FUart_GetInterruptMask(Ft_Uart *uart_ptr);
+
+static void Ft_Os_Uart_Callback(void *Args, u32 Event, u32 EventData);
+
+static void rt_hw_uart_isr(int irqno, void *param)
+{
+    Ft_Uart *uart_ptr = (Ft_Uart *)param;
+    FUart_InterruptHandler(uart_ptr);
+}
+
+static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct drv_usart *uart = RT_NULL;
+    Ft_Uart *uart_ptr = RT_NULL;
+    u32 RegTemp;
+    u32 ret;
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+    uart = rt_container_of(serial, struct drv_usart, serial);
+    uart_ptr = uart->handle;
+
+    RT_ASSERT(FUart_CfgInitialize(uart_ptr, FUart_LookupConfig(uart_ptr->Config.InstanceId)) == FST_SUCCESS);
+    FUart_SetHandler(uart_ptr, Ft_Os_Uart_Callback, serial);
+    rt_hw_interrupt_install(uart_ptr->Config.IsrNum, rt_hw_uart_isr, uart_ptr, "uart");
+    rt_hw_interrupt_umask(uart_ptr->Config.IsrNum);
+
+    //<! 设置波特率
+    ret = FUart_SetBaudRate(uart_ptr, cfg->baud_rate);
+    RT_ASSERT(ret == FST_SUCCESS);
+
+    //<! 打开接收中断
+    RegTemp = FUart_GetInterruptMask(uart_ptr);
+    RegTemp |= UARTMIS_RTMIS;
+    FUart_SetInterruptMask(uart_ptr, RegTemp);
+    FUart_SetOptions(uart_ptr, FUART_OPTION_UARTEN | FUART_OPTION_RXEN | FUART_OPTION_TXEN | FUART_OPTION_FIFOEN);
+    return RT_EOK;
+}
+
+static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct drv_usart *uart = RT_NULL;
+    Ft_Uart *uart_ptr = RT_NULL;
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = rt_container_of(serial, struct drv_usart, serial);
+    uart_ptr = uart->handle;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        rt_hw_interrupt_mask(uart_ptr->Config.IsrNum);
+        break;
+
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        rt_hw_interrupt_umask(uart_ptr->Config.IsrNum);
+        break;
+    }
+
+    return RT_EOK;
+}
+
+static void Ft_Os_Uart_Callback(void *Args, u32 Event, u32 EventData)
+{
+    struct rt_serial_device *serial = (struct rt_serial_device *)Args;
+
+    if (FUART_EVENT_RECV_DATA == Event || FUART_EVENT_RECV_TOUT == Event)
+    {
+        rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
+    }
+    else if (FUART_EVENT_RECV_ERROR == Event)
+    {
+    }
+    else if (FUART_EVENT_SENT_DATA == Event)
+    {
+    }
+    else if (FUART_EVENT_PARE_FRAME_BRKE == Event)
+    {
+    }
+    else if (FUART_EVENT_RECV_ORERR == Event)
+    {
+    }
+
+    if (FUART_EVENT_SENT_DATA == Event)
+    {
+    }
+    else
+    {
+    }
+}
+
+static int uart_putc(struct rt_serial_device *serial, char c)
+{
+    struct drv_usart *uart = RT_NULL;
+    Ft_Uart *uart_ptr = RT_NULL;
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = rt_container_of(serial, struct drv_usart, serial);
+    uart_ptr = uart->handle;
+
+    FUart_SendByte(uart_ptr->Config.BaseAddress, c);
+
+    return 1;
+}
+
+static int uart_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct drv_usart *uart = RT_NULL;
+    Ft_Uart *uart_ptr = RT_NULL;
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = rt_container_of(serial, struct drv_usart, serial);
+    uart_ptr = uart->handle;
+
+    ch = FUart_GetChar(uart_ptr->Config.BaseAddress);
+    if (ch == 0xff)
+        ch = -1;
+
+    return ch;
+}
+
+static const struct rt_uart_ops _uart_ops =
+    {
+        uart_configure,
+        uart_control,
+        uart_putc,
+        uart_getc,
+};
+
+#ifdef RT_USING_UART0
+static Ft_Uart Ft_Uart0;
+static struct drv_usart _RtUart0;
+#endif
+
+#ifdef RT_USING_UART1
+static Ft_Uart Ft_Uart1;
+static struct drv_usart _RtUart1;
+#endif
+
+int rt_hw_uart_init(void)
+{
+
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+#ifdef RT_USING_UART0
+    config.bufsz = RT_SERIAL_RB_BUFSZ;
+    _RtUart0.serial.ops = &_uart_ops;
+    _RtUart0.serial.config = config;
+    Ft_Uart0.Config.InstanceId = FT_UART0_ID;
+    _RtUart0.Handle = &Ft_Uart0;
+
+    rt_hw_serial_register(&_RtUart0.serial, "uart0",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          &_RtUart0);
+#endif
+
+#ifdef RT_USING_UART1
+    config.bufsz = RT_SERIAL_RB_BUFSZ;
+    _RtUart1.serial.ops = &_uart_ops;
+    _RtUart1.serial.config = config;
+    Ft_Uart1.Config.InstanceId = FT_UART1_ID;
+    _RtUart1.handle = &Ft_Uart1;
+    rt_hw_serial_register(&_RtUart1.serial, "uart1",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          &_RtUart1);
+#endif
+
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_uart_init);
+
+#endif /* RT_USING_SERIAL */
--- a/bsp/ft2004/drivers/drv_usart.h
+++ b/bsp/ft2004/drivers/drv_usart.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-04     Carl      the first version
+ */
+
+#ifndef __DRV_USART_H__
+#define __DRV_USART_H__
+
+#include <rtthread.h>
+#include "rtdevice.h"
+#include "ft_uart.h"
+
+struct drv_usart
+{
+    Ft_Uart *handle;
+
+    struct rt_serial_device serial;
+};
+
+#endif // !
--- a/bsp/ft2004/drivers/ft2004.c
+++ b/bsp/ft2004/drivers/ft2004.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-29     Carl    the first version
+ *
+ */
+
+#include <rtthread.h>
+#include "ft2004.h"
+#include "gicv3.h"
+
+rt_uint64_t get_main_cpu_affval(void)
+{
+    return 0;
+}
+
+rt_uint32_t arm_gic_cpumask_to_affval(rt_uint32_t *cpu_mask, rt_uint32_t *cluster_id, rt_uint32_t *target_list)
+{
+
+    if (*cpu_mask == 0)
+    {
+        return 0;
+    }
+
+    *target_list = 0;
+    *cluster_id = 0;
+
+    if (*cpu_mask & 0x3)
+    {
+        if ((*cpu_mask & 0x3) == 0x3)
+        {
+            *target_list = 3;
+        }
+        else if ((*cpu_mask & 0x1))
+        {
+            *target_list = 1;
+        }
+        else
+        {
+            *target_list = 2;
+        }
+        *cpu_mask &= ~0x3;
+    }
+    else if (*cpu_mask & 0xc)
+    {
+        *cluster_id = 0x100;
+        if ((*cpu_mask & 0xc) == 0xc)
+        {
+            *target_list = 3;
+        }
+        else if ((*cpu_mask & 0x4))
+        {
+            *target_list = 1;
+        }
+        else
+        {
+            *target_list = 2;
+        }
+        *cpu_mask &= ~0xc;
+    }
+    else
+    {
+        *cpu_mask = 0;
+        return 0;
+    }
+
+    return 1;
+}
+
+#ifdef RT_USING_SMP
+
+void send_core_isg(void)
+{
+    for (size_t i = 0; i <= 0xf; i++)
+    {
+        /* code */
+        rt_kprintf("i %x \r\n", i);
+        arm_gic_send_affinity_sgi(0, 0, i, 0);
+        rt_thread_mdelay(100);
+    }
+}
+MSH_CMD_EXPORT(send_core_isg, send_core_isg);
+
+#endif
--- a/bsp/ft2004/drivers/ft2004.h
+++ b/bsp/ft2004/drivers/ft2004.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-29     Carl    the first version
+ *
+ */
+
+#ifndef __FT2004_H__
+#define __FT2004_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#define ARM_GIC_NR_IRQS 160
+#define ARM_GIC_MAX_NR 1
+#define MAX_HANDLERS 160
+#define GIC_IRQ_START 0
+
+rt_uint64_t get_main_cpu_affval(void);
+
+#endif // !
--- a/bsp/ft2004/drivers/ft2004_cpu.S
+++ b/bsp/ft2004/drivers/ft2004_cpu.S
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-29     Carl    the first version
+ *
+ */
+
+#include "rtconfig.h"
+
+.globl rt_hw_cpu_id 
+rt_hw_cpu_id:
+    mrc p15, 0, r0, c0, c0, 5
+    ubfx r0, r0, #0, #12
+    cmp r0, #0
+    beq core0
+    cmp r0, #1
+    beq core1 
+    cmp r0, #256 
+    beq core2 
+    mov r1 ,#257
+    cmp r0, r1
+    beq core3
+    b default
+core0:
+    mov r0, #0
+    b return 
+core1: 
+    mov r0, #1
+    b return 
+core2: 
+    mov r0, #2
+    b return 
+core3: 
+    mov r0, #3
+    b return 
+default: 
+    and r0, r0, #15
+return: 
+    bx lr 
+
--- a/bsp/ft2004/drivers/secondary_cpu.c
+++ b/bsp/ft2004/drivers/secondary_cpu.c
@@ -0,0 +1,86 @@
+/*
+ * @ : Copyright (c) 2020 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0.
+ *
+ * @Date: 2021-05-26 10:09:45
+ * @LastEditTime: 2021-05-26 10:31:44
+ * @Description:  This files is for
+ *
+ * @Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ */
+
+#include <rtthread.h>
+#include "board.h"
+#include <gicv3.h>
+
+#ifdef RT_USING_SMP
+#include <interrupt.h>
+#include "ft_psci.h"
+#include "ft_generic_timer.h"
+
+extern int rt_hw_timer_init(void);
+extern void secondary_cpu_start(void);
+
+void rt_hw_secondary_cpu_up(void)
+{
+
+    rt_uint32_t i;
+    rt_uint32_t cpu_mask = 0;
+
+    rt_kprintf("rt_hw_secondary_cpu_up is processing \r\n");
+    for (i = 1; i < RT_CPUS_NR; i++)
+    {
+        if (i == 1)
+        {
+            /* code */
+            FPsci_CpuOn(1 << i, (rt_uint32_t)secondary_cpu_start);
+            cpu_mask = 2;
+        }
+        else if (i == 2)
+        {
+            FPsci_CpuOn(1 << i, (rt_uint32_t)secondary_cpu_start);
+            cpu_mask = 4;
+        }
+        else if (i == 3)
+        {
+            FPsci_CpuOn(1 << i, (rt_uint32_t)secondary_cpu_start);
+            cpu_mask = 8;
+        }
+        else
+        {
+            continue;
+        }
+
+        __asm__ volatile("dsb" ::
+                             : "memory");
+        rt_hw_ipi_send(RT_SCHEDULE_IPI, cpu_mask);
+        Ft_GenericTimer_UsDelay(1000000);
+    }
+}
+
+void secondary_cpu_c_start(void)
+{
+    rt_hw_vector_init();
+    rt_hw_spin_lock(&_cpus_lock);
+
+    arm_gic_cpu_init(0);
+    arm_gic_redist_init(0);
+
+    rt_hw_timer_init();
+
+    rt_hw_interrupt_set_priority(RT_SCHEDULE_IPI, 16);
+    rt_hw_interrupt_umask(RT_SCHEDULE_IPI);
+
+    rt_system_scheduler_start();
+}
+
+void rt_hw_secondary_cpu_idle_exec(void)
+{
+    asm volatile("wfe" ::
+                     : "memory", "cc");
+}
+
+#endif
--- a/bsp/ft2004/drivers/serial.h
+++ b/bsp/ft2004/drivers/serial.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-29     Carl    the first version
+ *
+ */
+
+#ifndef __UART_H__
+#define __UART_H__
+
+#include <board.h>
+
+int rt_hw_uart_init(void);
+
+#endif
+
--- a/Show More
+++ b/Show More