mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp/stm32] add weact mini stm32h7xx board bsp
This commit is contained in:
NU-LL
guo
529
bsp/stm32/stm32h750-weact-ministm32h7xx/.config
Normal file
529
bsp/stm32/stm32h750-weact-ministm32h7xx/.config
Normal file
File diff suppressed because it is too large
Load Diff
42
bsp/stm32/stm32h750-weact-ministm32h7xx/.gitignore
vendored
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42
bsp/stm32/stm32h750-weact-ministm32h7xx/.gitignore
vendored
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@@ -0,0 +1,42 @@
|
||||
*.pyc
|
||||
*.map
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||||
*.dblite
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*.elf
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||||
*.bin
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||||
*.hex
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||||
*.axf
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||||
*.exe
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||||
*.pdb
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*.idb
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*.ilk
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*.old
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build
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Debug
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||||
documentation/html
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||||
packages/
|
||||
*~
|
||||
*.o
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||||
*.obj
|
||||
*.out
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||||
*.bak
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||||
*.dep
|
||||
*.lib
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*.i
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*.d
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.DS_Stor*
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.config 3
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.config 4
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||||
.config 5
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||||
Midea-X1
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||||
*.uimg
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||||
GPATH
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GRTAGS
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||||
GTAGS
|
||||
.vscode
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||||
JLinkLog.txt
|
||||
JLinkSettings.ini
|
||||
DebugConfig/
|
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RTE/
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settings/
|
||||
*.uvguix*
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cconfig.h
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||||
@@ -0,0 +1,9 @@
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<?xml version="1.0" encoding="utf-8"?>
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||||
|
||||
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
|
||||
|
||||
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
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<events>
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</events>
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||||
|
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</component_viewer>
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21
bsp/stm32/stm32h750-weact-ministm32h7xx/Kconfig
Normal file
21
bsp/stm32/stm32h750-weact-ministm32h7xx/Kconfig
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@@ -0,0 +1,21 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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||||
|
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config RTT_DIR
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string
|
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option env="RTT_ROOT"
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default "rt-thread"
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|
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config PKGS_DIR
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||||
string
|
||||
option env="PKGS_ROOT"
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default "packages"
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|
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "libraries/Kconfig"
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source "board/Kconfig"
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123
bsp/stm32/stm32h750-weact-ministm32h7xx/README.md
Normal file
123
bsp/stm32/stm32h750-weact-ministm32h7xx/README.md
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@@ -0,0 +1,123 @@
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# WeAct Studio STM32H7xx Core Board开发板 BSP 说明
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## 简介
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本文档为 WeAct Studio STM32H7xx Core Board 开发板的 BSP (板级支持包) 说明。
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|
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主要内容如下：
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||||
|
||||
- 开发板资源介绍
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- BSP 快速上手
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- 进阶使用方法
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||||
|
||||
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
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## 开发板介绍
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STM32H7xx Core Board 是 WeAct Studio 推出的一款基于 ARM Cortex-M7 内核的核心板，最高频率为480Mhz，具有128KB ROM（实际上为2MB）、1MB RAM，外接8MB SPI Flash和8MB QSPI Flash，所具有的按键和接口如下：
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|
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* 2*22 Pin 2.54mm I/O x 2
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* 4 Pin 2.54mm SW x 1
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* USB C (type C) x 1
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* MicroSD TF x 1
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||||
* 8Bit DCMI x 1
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* User Key K1 (PC13) x 1
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||||
* NRST Key x 1
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||||
* BOOT0 Key x 1
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|
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开发板外观如下图所示：
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|
||||
|
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|
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开发板更多详细信息请参考[STM32H7xx Core Board](https://github.com/WeActTC/MiniSTM32H7xx)。
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## 外设支持
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :--------------- | :----------: | :----------------------: |
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| 0.96' ST7735 TFT | 支持 | SPI1 |
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| TF Card | 待支持 | |
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| SPI Flash | 支持 | W25Q64JV、Littlefs、SPI1 |
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||||
| QSPI Flash | 待支持 | W25Q64JV、Littlefs |
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||||
| OV7670 Camera | 待支持 | |
|
||||
| OV2640 Camera | 待支持 | |
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||||
| OV7725 Camera | 待支持 | |
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| OV5640-AF Camera | 待支持 | |
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| **片上外设** | **支持情况** | **备注** |
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| GPIO | 支持 | |
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||||
| UART | 支持 | USART1 |
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| | 支持 | SPI1、SPI4 |
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| USB Device | 待支持 | USB HS |
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## 使用说明
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使用说明分为如下两个章节：
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- 快速上手
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本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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- 进阶使用
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本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
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||||
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### 快速上手
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本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
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||||
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#### 硬件连接
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||||
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||||
使用数据线连接开发板到 PC。使用 usb 转串口工具连接 PB14(USART1_TX) 和 PB15(USART1_RX)。
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|
||||
#### 编译下载
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 具体下载方法可以参考 WeAct Studio 提供的[STM32 下载烧录教程以及问题汇总](http://www.weact-tc.cn/2019/11/30/STM32Download/#more)
|
||||
>
|
||||
> 注意：需要按照[该文档](https://github.com/WeActTC/MiniSTM32H7xx/blob/master/SDK/QSPI_Flasher/README.md)添加flash支持
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#### 运行结果
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||||
下载程序成功之后，系统会自动运行，LED闪烁。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.0.3 build Aug 6 2020
|
||||
2006 - 2020 Copyright by rt-thread team
|
||||
msh >
|
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```
|
||||
### 进阶使用
|
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|
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此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
|
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1. 在 bsp 下打开 env 工具。
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|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
|
||||
4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
|
||||
|
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本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
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|
||||
## 注意事项
|
||||
|
||||
- 调试串口为串口1 映射说明
|
||||
|
||||
PB14 ------> USART1_TX
|
||||
|
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PB15 ------> USART1_RX
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [NU-LL](https://github.com/NU-LL )
|
||||
14
bsp/stm32/stm32h750-weact-ministm32h7xx/SConscript
Normal file
14
bsp/stm32/stm32h750-weact-ministm32h7xx/SConscript
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@@ -0,0 +1,14 @@
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||||
# for module compiling
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import os
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||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
64
bsp/stm32/stm32h750-weact-ministm32h7xx/SConstruct
Normal file
64
bsp/stm32/stm32h750-weact-ministm32h7xx/SConstruct
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@@ -0,0 +1,64 @@
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import os
|
||||
import sys
|
||||
import rtconfig
|
||||
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if os.getenv('RTT_ROOT'):
|
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RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
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# set RTT_ROOT
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||||
if not os.getenv("RTT_ROOT"):
|
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RTT_ROOT="rt-thread"
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
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from building import *
|
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except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
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exit(-1)
|
||||
|
||||
TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
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env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
stm32_library = 'STM32H7xx_HAL'
|
||||
rtconfig.BSP_LIBRARY_TYPE = stm32_library
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,12 @@
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
src = Split("""
|
||||
main.c
|
||||
""")
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''])
|
||||
|
||||
Return('group')
|
||||
32
bsp/stm32/stm32h750-weact-ministm32h7xx/applications/main.c
Normal file
32
bsp/stm32/stm32h750-weact-ministm32h7xx/applications/main.c
Normal file
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-10-25 zylx first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
/* defined the LED0 pin: PE3 */
|
||||
#define LED0_PIN GET_PIN(E, 3)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 1;
|
||||
/* set LED0 pin mode to output */
|
||||
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (count++)
|
||||
{
|
||||
rt_pin_write(LED0_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED0_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,251 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
Mcu.Family=STM32H7
|
||||
RCC.DIVQ2Freq_Value=322500000
|
||||
PD7.Mode=Full_Duplex_Master
|
||||
ProjectManager.MainLocation=Src
|
||||
RCC.SAI1Freq_Value=480000000
|
||||
RCC.CortexFreq_Value=480000000
|
||||
SPI4.VirtualType=VM_MASTER
|
||||
ProjectManager.KeepUserCode=true
|
||||
PE11.GPIOParameters=GPIO_Label
|
||||
Mcu.UserName=STM32H750VBTx
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
RCC.HPRE=RCC_HCLK_DIV2
|
||||
PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
|
||||
TIM1.IPParameters=Channel-PWM Generation2 CH2N
|
||||
PE11.GPIO_Label=LCD_CS
|
||||
PC15-OSC32_OUT\ (OSC32_OUT).Mode=LSE-External-Oscillator
|
||||
RCC.PLLFRACN=0
|
||||
SPI4.Direction=SPI_DIRECTION_1LINE
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI4_Init-SPI4-false-HAL-true,6-MX_TIM1_Init-TIM1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
|
||||
RCC.RTCFreq_Value=32768
|
||||
PD6.Locked=true
|
||||
RCC.PLL1_VCO_SEL-AdvancedSettings=RCC_PLL1VCOMEDIUM
|
||||
RCC.PLL2FRACN=0
|
||||
RCC.CpuClockFreq_Value=480000000
|
||||
RCC.VCO2OutputFreq_Value=645000000
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
PB15.Signal=USART1_RX
|
||||
PinOutPanel.RotationAngle=0
|
||||
RCC.MCO1PinFreq_Value=64000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
ProjectManager.StackSize=0x400
|
||||
RCC.AHB4Freq_Value=240000000
|
||||
RCC.VCOInput3Freq_Value=781250
|
||||
RCC.LPTIM1Freq_Value=120000000
|
||||
PD13.Signal=QUADSPI_BK1_IO3
|
||||
Mcu.IP4=RTC
|
||||
Mcu.IP5=SPI1
|
||||
PD13.Locked=true
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
Mcu.IP2=QUADSPI
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP0=CORTEX_M7
|
||||
Mcu.IP1=NVIC
|
||||
Mcu.UserConstants=
|
||||
SPI4.Mode=SPI_MODE_MASTER
|
||||
RCC.DIVP3Freq_Value=50390625
|
||||
RCC.SDMMCFreq_Value=480000000
|
||||
Mcu.ThirdPartyNb=0
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
RCC.HCLKFreq_Value=240000000
|
||||
RCC.I2C4Freq_Value=120000000
|
||||
PE2.Mode=Single Bank 1
|
||||
Mcu.IPNb=10
|
||||
ProjectManager.PreviousToolchain=
|
||||
PB6.Signal=QUADSPI_BK1_NCS
|
||||
RCC.SPDIFRXFreq_Value=480000000
|
||||
PB6.Mode=Single Bank 1
|
||||
RCC.DIVQ3Freq_Value=50390625
|
||||
SPI1.CalculateBaudRate=120.0 MBits/s
|
||||
Mcu.Pin6=PE10
|
||||
Mcu.Pin7=PE11
|
||||
Mcu.Pin8=PE12
|
||||
PE10.Locked=true
|
||||
Mcu.Pin9=PE13
|
||||
SPI4.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
Mcu.Pin0=PE2
|
||||
Mcu.Pin1=PC14-OSC32_IN (OSC32_IN)
|
||||
PE14.Locked=true
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
Mcu.Pin2=PC15-OSC32_OUT (OSC32_OUT)
|
||||
RCC.HRTIMFreq_Value=240000000
|
||||
Mcu.Pin3=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin4=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin5=PB2
|
||||
ProjectManager.ProjectBuild=false
|
||||
PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
|
||||
RCC.DIVR3Freq_Value=50390625
|
||||
RCC.HSE_VALUE=25000000
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
PB2.Signal=QUADSPI_CLK
|
||||
RCC.DIVM2=5
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
||||
RCC.DIVM1=5
|
||||
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.8.0
|
||||
MxDb.Version=DB.6.0.0
|
||||
RCC.DIVP1Freq_Value=480000000
|
||||
PE13.Signal=GPIO_Output
|
||||
RCC.PLL1_VCI_Range-AdvancedSettings=RCC_PLL1VCIRANGE_2
|
||||
ProjectManager.BackupPrevious=false
|
||||
RCC.FMCFreq_Value=240000000
|
||||
PB14.Mode=Asynchronous
|
||||
RCC.USART16Freq_Value=120000000
|
||||
File.Version=6
|
||||
PE2.Signal=QUADSPI_BK1_IO2
|
||||
PB6.Locked=true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
RCC.DIVR2Freq_Value=322500000
|
||||
PE10.Signal=TIM1_CH2N
|
||||
ProjectManager.HalAssertFull=false
|
||||
VP_TIM1_VS_ClockSourceINT.Mode=Internal
|
||||
RCC.DIVP2Freq_Value=322500000
|
||||
ProjectManager.ProjectName=CubeMX_Config
|
||||
RCC.APB3Freq_Value=120000000
|
||||
RCC.MCO2PinFreq_Value=480000000
|
||||
PB4\ (NJTRST).Locked=true
|
||||
Mcu.Package=LQFP100
|
||||
RCC.PLL3FRACN=0
|
||||
RCC.D1PPRE=RCC_APB3_DIV2
|
||||
PE10.GPIOParameters=GPIO_Label
|
||||
PD12.Signal=QUADSPI_BK1_IO1
|
||||
ProjectManager.ToolChainLocation=
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
RCC.DFSDMFreq_Value=120000000
|
||||
RCC.DIVR1Freq_Value=480000000
|
||||
PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator
|
||||
TIM1.Channel-PWM\ Generation2\ CH2N=TIM_CHANNEL_2
|
||||
RCC.TraceFreq_Value=64000000
|
||||
RCC.APB4Freq_Value=120000000
|
||||
RCC.CECFreq_Value=32000
|
||||
RCC.SAI23Freq_Value=480000000
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
RCC.LPUART1Freq_Value=120000000
|
||||
PD6.Signal=GPIO_Output
|
||||
PE10.GPIO_Label=LCD_LED
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
|
||||
PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
|
||||
PE12.Locked=true
|
||||
ProjectManager.CustomerFirmwarePackage=
|
||||
RCC.Tim2OutputFreq_Value=240000000
|
||||
RCC.DFSDMACLkFreq_Value=480000000
|
||||
RCC.VCO3OutputFreq_Value=100781250
|
||||
PE12.Mode=Simplex_Bidirectional_Master
|
||||
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
|
||||
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||
Mcu.PinsNb=24
|
||||
ProjectManager.NoMain=false
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate
|
||||
RCC.SWPMI1Freq_Value=120000000
|
||||
RCC.SAI4BFreq_Value=480000000
|
||||
PE10.Mode=PWM Generation2 CH2N
|
||||
PD7.Signal=SPI1_MOSI
|
||||
RCC.D2PPRE2=RCC_APB2_DIV2
|
||||
RCC.D2PPRE1=RCC_APB1_DIV2
|
||||
ProjectManager.DefaultFWLocation=true
|
||||
ProjectManager.DeletePrevious=true
|
||||
RCC.QSPIFreq_Value=240000000
|
||||
RCC.FamilyName=M
|
||||
PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
|
||||
RCC.SPI6Freq_Value=120000000
|
||||
RCC.D1CPREFreq_Value=480000000
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
RCC.USART234578Freq_Value=120000000
|
||||
RCC.SPI45Freq_Value=120000000
|
||||
RCC.Tim1OutputFreq_Value=240000000
|
||||
RCC.SPI123Freq_Value=480000000
|
||||
PB3\ (JTDO/TRACESWO).Locked=true
|
||||
PB3\ (JTDO/TRACESWO).Signal=SPI1_SCK
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||
PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
|
||||
RCC.VCO1OutputFreq_Value=960000000
|
||||
RCC.AXIClockFreq_Value=240000000
|
||||
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
|
||||
PD13.Mode=Single Bank 1
|
||||
RCC.DIVN1=192
|
||||
ProjectManager.RegisterCallBack=
|
||||
RCC.USBFreq_Value=480000000
|
||||
PE11.Signal=GPIO_Output
|
||||
PD7.Locked=true
|
||||
RCC.CKPERFreq_Value=64000000
|
||||
PB14.Signal=USART1_TX
|
||||
PE13.GPIOParameters=GPIO_Label
|
||||
board=custom
|
||||
ProjectManager.LastFirmware=true
|
||||
PB15.Mode=Asynchronous
|
||||
RCC.VCOInput1Freq_Value=5000000
|
||||
RCC.AHB12Freq_Value=240000000
|
||||
RCC.APB2Freq_Value=120000000
|
||||
PE14.Signal=SPI4_MOSI
|
||||
MxCube.Version=6.0.0
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
RCC.FDCANFreq_Value=480000000
|
||||
PE14.Mode=Simplex_Bidirectional_Master
|
||||
RCC.RNGFreq_Value=48000000
|
||||
RCC.ADCFreq_Value=322500000
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
SPI4.CalculateBaudRate=60.0 MBits/s
|
||||
PB4\ (NJTRST).Mode=Full_Duplex_Master
|
||||
ProjectManager.FreePins=false
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL1_VCI_Range-AdvancedSettings,PLL1_VCO_SEL-AdvancedSettings,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
PE11.Locked=true
|
||||
ProjectManager.AskForMigrate=true
|
||||
Mcu.Name=STM32H750VBTx
|
||||
RCC.LPTIM2Freq_Value=120000000
|
||||
PE12.Signal=SPI4_SCK
|
||||
ProjectManager.UnderRoot=false
|
||||
PE13.Locked=true
|
||||
PB2.Locked=true
|
||||
Mcu.IP8=TIM1
|
||||
Mcu.IP9=USART1
|
||||
Mcu.IP6=SPI4
|
||||
Mcu.IP7=SYS
|
||||
ProjectManager.CoupleFile=false
|
||||
RCC.SYSCLKFreq_VALUE=480000000
|
||||
Mcu.Pin22=VP_SYS_VS_Systick
|
||||
RCC.I2C123Freq_Value=120000000
|
||||
Mcu.Pin23=VP_TIM1_VS_ClockSourceINT
|
||||
Mcu.Pin20=PB6
|
||||
PE13.GPIO_Label=LCD_WR_RS
|
||||
PD12.Mode=Single Bank 1
|
||||
Mcu.Pin21=VP_RTC_VS_RTC_Activate
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
KeepUserPlacement=false
|
||||
PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN
|
||||
PD11.Signal=QUADSPI_BK1_IO0
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
PB2.Mode=Single Bank 1
|
||||
ProjectManager.CompilerOptimize=6
|
||||
ProjectManager.HeapSize=0x200
|
||||
Mcu.Pin15=PD13
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
Mcu.Pin16=PD6
|
||||
Mcu.Pin13=PD11
|
||||
PD11.Mode=Single Bank 1
|
||||
Mcu.Pin14=PD12
|
||||
Mcu.Pin19=PB4 (NJTRST)
|
||||
RCC.LPTIM345Freq_Value=120000000
|
||||
ProjectManager.ComputerToolchain=false
|
||||
Mcu.Pin17=PD7
|
||||
Mcu.Pin18=PB3 (JTDO/TRACESWO)
|
||||
RCC.LTDCFreq_Value=50390625
|
||||
RCC.SAI4AFreq_Value=480000000
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||
Mcu.Pin11=PB14
|
||||
Mcu.Pin12=PB15
|
||||
PB3\ (JTDO/TRACESWO).Mode=Full_Duplex_Master
|
||||
Mcu.Pin10=PE14
|
||||
RCC.DIVQ1Freq_Value=480000000
|
||||
PE2.Locked=true
|
||||
RCC.D3PPRE=RCC_APB4_DIV2
|
||||
RCC.HCLK3ClockFreq_Value=240000000
|
||||
RCC.VCOInput2Freq_Value=5000000
|
||||
RCC.APB1Freq_Value=120000000
|
||||
ProjectManager.DeviceId=STM32H750VBTx
|
||||
ProjectManager.LibraryCopy=2
|
||||
PB4\ (NJTRST).Signal=SPI1_MISO
|
||||
@@ -0,0 +1,79 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
#define LCD_LED_Pin GPIO_PIN_10
|
||||
#define LCD_LED_GPIO_Port GPIOE
|
||||
#define LCD_CS_Pin GPIO_PIN_11
|
||||
#define LCD_CS_GPIO_Port GPIOE
|
||||
#define LCD_WR_RS_Pin GPIO_PIN_13
|
||||
#define LCD_WR_RS_GPIO_Port GPIOE
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,69 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H7xx_IT_H
|
||||
#define __STM32H7xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,133 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
<Target>
|
||||
<TargetName>CubeMX_Config</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>240000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath />
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>1</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>13</nTsel>
|
||||
<sDll />
|
||||
<sDllPa />
|
||||
<sDlgDll />
|
||||
<sDlgPa />
|
||||
<sIfile />
|
||||
<tDll />
|
||||
<tDllPa />
|
||||
<tDlgDll />
|
||||
<tDlgPa />
|
||||
<tIfile />
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k.FLM -FS08000000 -FL020000 -FP0($$Device:STM32H750VB$Flash\STM32H7x_128k.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key />
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k.FLM -FS08000000 -FL020000 -FP0($$Device:STM32H750VB$Flash\STM32H7x_128k.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable />
|
||||
<LintConfigFile />
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,483 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : stm32h7xx_hal_msp.c
|
||||
* Description : This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_QSPI_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**QUADSPI GPIO Configuration
|
||||
PE2 ------> QUADSPI_BK1_IO2
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PD11 ------> QUADSPI_BK1_IO0
|
||||
PD12 ------> QUADSPI_BK1_IO1
|
||||
PD13 ------> QUADSPI_BK1_IO3
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_QSPI_CLK_DISABLE();
|
||||
|
||||
/**QUADSPI GPIO Configuration
|
||||
PE2 ------> QUADSPI_BK1_IO2
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PD11 ------> QUADSPI_BK1_IO0
|
||||
PD12 ------> QUADSPI_BK1_IO1
|
||||
PD13 ------> QUADSPI_BK1_IO3
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2|GPIO_PIN_6);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_RTC_ENABLE();
|
||||
/* USER CODE BEGIN RTC_MspInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_RTC_DISABLE();
|
||||
/* USER CODE BEGIN RTC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**SPI1 GPIO Configuration
|
||||
PD7 ------> SPI1_MOSI
|
||||
PB3 (JTDO/TRACESWO) ------> SPI1_SCK
|
||||
PB4 (NJTRST) ------> SPI1_MISO
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
else if(hspi->Instance==SPI4)
|
||||
{
|
||||
/* USER CODE BEGIN SPI4_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI4_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI4_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**SPI4 GPIO Configuration
|
||||
PE12 ------> SPI4_SCK
|
||||
PE14 ------> SPI4_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI4_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI4_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PD7 ------> SPI1_MOSI
|
||||
PB3 (JTDO/TRACESWO) ------> SPI1_SCK
|
||||
PB4 (NJTRST) ------> SPI1_MISO
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
}
|
||||
else if(hspi->Instance==SPI4)
|
||||
{
|
||||
/* USER CODE BEGIN SPI4_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI4_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI4_CLK_DISABLE();
|
||||
|
||||
/**SPI4 GPIO Configuration
|
||||
PE12 ------> SPI4_SCK
|
||||
PE14 ------> SPI4_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_12|GPIO_PIN_14);
|
||||
|
||||
/* USER CODE BEGIN SPI4_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI4_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PE10 ------> TIM1_CH2N
|
||||
*/
|
||||
GPIO_InitStruct.Pin = LCD_LED_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(LCD_LED_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_Base MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PB14 ------> USART1_TX
|
||||
PB15 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PB14 ------> USART1_TX
|
||||
PB15 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,203 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32h7xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32H7xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32h7xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,421 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h7xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32h7xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock, it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32h7xx.h"
|
||||
#include <math.h>
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */
|
||||
/* #define DATA_IN_D2_SRAM */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00000000UL /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 64000000;
|
||||
uint32_t SystemD2Clock = 64000000;
|
||||
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting and vector table location
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
#if defined (DATA_IN_D2_SRAM)
|
||||
__IO uint32_t tmpreg;
|
||||
#endif /* DATA_IN_D2_SRAM */
|
||||
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
|
||||
/* Increasing the CPU frequency */
|
||||
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||
{
|
||||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||
}
|
||||
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= RCC_CR_HSION;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
|
||||
RCC->CR &= 0xEAF6ED7FU;
|
||||
|
||||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||||
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||
{
|
||||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||
}
|
||||
|
||||
#if defined(D3_SRAM_BASE)
|
||||
/* Reset D1CFGR register */
|
||||
RCC->D1CFGR = 0x00000000;
|
||||
|
||||
/* Reset D2CFGR register */
|
||||
RCC->D2CFGR = 0x00000000;
|
||||
|
||||
/* Reset D3CFGR register */
|
||||
RCC->D3CFGR = 0x00000000;
|
||||
#else
|
||||
/* Reset CDCFGR1 register */
|
||||
RCC->CDCFGR1 = 0x00000000;
|
||||
|
||||
/* Reset CDCFGR2 register */
|
||||
RCC->CDCFGR2 = 0x00000000;
|
||||
|
||||
/* Reset SRDCFGR register */
|
||||
RCC->SRDCFGR = 0x00000000;
|
||||
#endif
|
||||
/* Reset PLLCKSELR register */
|
||||
RCC->PLLCKSELR = 0x02020200;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x01FF0000;
|
||||
/* Reset PLL1DIVR register */
|
||||
RCC->PLL1DIVR = 0x01010280;
|
||||
/* Reset PLL1FRACR register */
|
||||
RCC->PLL1FRACR = 0x00000000;
|
||||
|
||||
/* Reset PLL2DIVR register */
|
||||
RCC->PLL2DIVR = 0x01010280;
|
||||
|
||||
/* Reset PLL2FRACR register */
|
||||
|
||||
RCC->PLL2FRACR = 0x00000000;
|
||||
/* Reset PLL3DIVR register */
|
||||
RCC->PLL3DIVR = 0x01010280;
|
||||
|
||||
/* Reset PLL3FRACR register */
|
||||
RCC->PLL3FRACR = 0x00000000;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= 0xFFFBFFFFU;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
|
||||
#if (STM32H7_DEV_ID == 0x450UL)
|
||||
/* dual core CM7 or single core line */
|
||||
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
|
||||
{
|
||||
/* if stm32h7 revY*/
|
||||
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
|
||||
*((__IO uint32_t*)0x51008108) = 0x000000001U;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (DATA_IN_D2_SRAM)
|
||||
/* in case of initialized data in D2 SRAM (AHB SRAM) , enable the D2 SRAM clock (AHB SRAM clock) */
|
||||
#if defined(RCC_AHB2ENR_D2SRAM3EN)
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
|
||||
#elif defined(RCC_AHB2ENR_D2SRAM2EN)
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
|
||||
#else
|
||||
RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
|
||||
#endif /* RCC_AHB2ENR_D2SRAM3EN */
|
||||
|
||||
tmpreg = RCC->AHB2ENR;
|
||||
(void) tmpreg;
|
||||
#endif /* DATA_IN_D2_SRAM */
|
||||
|
||||
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||
/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = D2_AXISRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BANK2_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
* Disable the FMC bank1 (enabled after reset).
|
||||
* This, prevents CPU speculation access on this bank which blocks the use of FMC during
|
||||
* 24us. During this time the others FMC master (such as LTDC) cannot use it!
|
||||
*/
|
||||
FMC_Bank1_R->BTCR[0] = 0x000030D2;
|
||||
|
||||
/* Configure the Vector Table location add offset address for cortex-M7 ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = D1_AXISRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal AXI-RAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
|
||||
#endif /*DUAL_CORE && CORE_CM4*/
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock , it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
|
||||
* HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 4 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
* (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 64 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
|
||||
uint32_t common_system_clock;
|
||||
float_t fracn1, pllvco;
|
||||
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
|
||||
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
|
||||
common_system_clock = CSI_VALUE;
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
|
||||
common_system_clock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
|
||||
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
|
||||
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
|
||||
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
|
||||
|
||||
if (pllm != 0U)
|
||||
{
|
||||
switch (pllsource)
|
||||
{
|
||||
case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */
|
||||
|
||||
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||
pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
|
||||
break;
|
||||
|
||||
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */
|
||||
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
|
||||
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */
|
||||
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
|
||||
default:
|
||||
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||
break;
|
||||
}
|
||||
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
|
||||
common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp);
|
||||
}
|
||||
else
|
||||
{
|
||||
common_system_clock = 0U;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
common_system_clock = CSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute SystemClock frequency --------------------------------------------------*/
|
||||
#if defined (RCC_D1CFGR_D1CPRE)
|
||||
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos];
|
||||
|
||||
/* common_system_clock frequency : CM7 CPU frequency */
|
||||
common_system_clock >>= tmp;
|
||||
|
||||
/* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
|
||||
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
|
||||
|
||||
#else
|
||||
tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos];
|
||||
|
||||
/* common_system_clock frequency : CM7 CPU frequency */
|
||||
common_system_clock >>= tmp;
|
||||
|
||||
/* SystemD2Clock frequency : AXI and AHBs Clock frequency */
|
||||
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||
SystemCoreClock = SystemD2Clock;
|
||||
#else
|
||||
SystemCoreClock = common_system_clock;
|
||||
#endif /* DUAL_CORE && CORE_CM4 */
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
184
bsp/stm32/stm32h750-weact-ministm32h7xx/board/Kconfig
Normal file
184
bsp/stm32/stm32h750-weact-ministm32h7xx/board/Kconfig
Normal file
@@ -0,0 +1,184 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_STM32H750VBT6
|
||||
bool
|
||||
select SOC_SERIES_STM32H7
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_SPI_FLASH
|
||||
bool "Enable SPI FLASH (W25Q64 spi1)"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
select RT_USING_DFS
|
||||
select PKG_USING_LITTLEFS
|
||||
select RT_USING_MTD_NOR
|
||||
select PKG_USING_FAL
|
||||
select FAL_USING_SFUD_PORT
|
||||
select RT_USING_SFUD
|
||||
select RT_SFUD_USING_SFDP
|
||||
default n
|
||||
|
||||
config BSP_USING_QSPI_FLASH
|
||||
bool "Enable QSPI FLASH (W25Q64)"
|
||||
select BSP_USING_QSPI
|
||||
select RT_USING_SFUD
|
||||
select RT_SFUD_USING_QSPI
|
||||
default n
|
||||
|
||||
config BSP_USING_LCD_SPI
|
||||
bool "Enable 0.96' TFT-LCD(ST7735S)"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI4
|
||||
# select BSP_SPI4_TX_USING_DMA
|
||||
select BSP_USING_PWM
|
||||
select BSP_USING_PWM1
|
||||
select BSP_USING_PWM1_CH2
|
||||
default n
|
||||
if BSP_USING_LCD_SPI
|
||||
config LCD_BACKLIGHT_USING_PWM
|
||||
bool "Enable back light(tim1_ch2 pwm1)"
|
||||
default y
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default y
|
||||
|
||||
config BSP_UART1_RX_USING_DMA
|
||||
bool "Enable UART1 RX DMA"
|
||||
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_QSPI
|
||||
bool "Enable QSPI BUS"
|
||||
select RT_USING_QSPI
|
||||
select RT_USING_SPI
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI4
|
||||
bool "Enable SPI4 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_QSPI_USING_DMA
|
||||
bool "Enable QSPI DMA support"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C1
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 1 216
|
||||
default 135
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 1 216
|
||||
default 95
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable pwm"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
menuconfig BSP_USING_PWM1
|
||||
bool "Enable timer1 output pwm"
|
||||
default n
|
||||
if BSP_USING_PWM1
|
||||
config BSP_USING_PWM1_CH1
|
||||
bool "Enable PWM1 channel1"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH2
|
||||
bool "Enable PWM1 channel2"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH3
|
||||
bool "Enable PWM1 channel3"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH4
|
||||
bool "Enable PWM1 channel4"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
|
||||
config BSP_USING_ADC2
|
||||
bool "Enable ADC2"
|
||||
default n
|
||||
|
||||
config BSP_USING_ADC3
|
||||
bool "Enable ADC3"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_ON_CHIP_FLASH
|
||||
bool "Enable on-chip FLASH"
|
||||
default n
|
||||
|
||||
config BSP_USING_SDIO
|
||||
bool "Enable SDIO"
|
||||
select RT_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
default n
|
||||
|
||||
config BSP_USING_USBD
|
||||
bool "Enable OTGHS as USB device"
|
||||
select RT_USING_USB_DEVICE
|
||||
select BSP_USBD_TYPE_HS
|
||||
select BSP_USBD_SPEED_HS
|
||||
select BSP_USBD_PHY_ULPI
|
||||
default n
|
||||
|
||||
source "libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
42
bsp/stm32/stm32h750-weact-ministm32h7xx/board/SConscript
Normal file
42
bsp/stm32/stm32h750-weact-ministm32h7xx/board/SConscript
Normal file
@@ -0,0 +1,42 @@
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/CubeMX_Config/Inc']
|
||||
path += [cwd + '/ports']
|
||||
|
||||
# add the general drivers.
|
||||
src = Glob('board.c')
|
||||
src += Glob('CubeMX_Config/Src/stm32h7xx_hal_msp.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SPI_FLASH']):
|
||||
src += Glob('ports/drv_spi_flash.c')
|
||||
|
||||
if GetDepend(['BSP_USING_QSPI_FLASH']):
|
||||
src += Glob('ports/drv_qspi_flash.c')
|
||||
|
||||
if GetDepend('BSP_USING_LCD_SPI'):
|
||||
src = src + ['ports/drv_lcd_spi.c']
|
||||
src = src + ['ports/st7735/lcd.c']
|
||||
src = src + ['ports/st7735/st7735.c']
|
||||
src = src + ['ports/st7735/st7735_reg.c']
|
||||
src = src + ['ports/st7735/logo.c']
|
||||
path += [cwd + '/ports/st7735']
|
||||
|
||||
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += [cwd + '/../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += [cwd + '/../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [cwd + '/../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s']
|
||||
|
||||
# STM32H743xx || STM32H750xx || STM32F753xx
|
||||
# You can select chips from the list above
|
||||
CPPDEFINES = ['STM32H750xx']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
132
bsp/stm32/stm32h750-weact-ministm32h7xx/board/board.c
Normal file
132
bsp/stm32/stm32h750-weact-ministm32h7xx/board/board.c
Normal file
@@ -0,0 +1,132 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-8-6 NU-LL first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#define AXI_SRAM_ADDR (0X24000000)
|
||||
#define AXI_SRAM_SIZE (512*1024)
|
||||
#define SRAM1_ADDR (0X30000000)
|
||||
#define SRAM1_SIZE (128*1024)
|
||||
#define SRAM2_ADDR (0X30020000)
|
||||
#define SRAM2_SIZE (128*1024)
|
||||
#define SRAM3_ADDR (0X30040000)
|
||||
#define SRAM3_SIZE (32*1024)
|
||||
#define SRAM4_ADDR (0X38000000)
|
||||
#define SRAM4_SIZE (64*1024)
|
||||
#define BACKUP_ADDR (0X38800000)
|
||||
#define BACKUP_SIZE (4*1024)
|
||||
|
||||
static struct rt_memheap _heap_axi_sram;
|
||||
static struct rt_memheap _heap_sram1;
|
||||
static struct rt_memheap _heap_sram2;
|
||||
static struct rt_memheap _heap_sram3;
|
||||
static struct rt_memheap _heap_sram4;
|
||||
static struct rt_memheap _heap_backup_sram;
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
/** Configure LSE Drive Capability
|
||||
*/
|
||||
HAL_PWR_EnableBkUpAccess();
|
||||
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5;
|
||||
RCC_OscInitStruct.PLL.PLLN = 192;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_UART4
|
||||
|RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
|
||||
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
static int init_sram(void)
|
||||
{
|
||||
__HAL_RCC_D2SRAM1_CLK_ENABLE();
|
||||
__HAL_RCC_D2SRAM2_CLK_ENABLE();
|
||||
__HAL_RCC_D2SRAM3_CLK_ENABLE();
|
||||
rt_memheap_init(&_heap_axi_sram, "axi_sram", (void *)AXI_SRAM_ADDR, AXI_SRAM_SIZE);
|
||||
rt_memheap_init(&_heap_sram1, "sram1", (void *)SRAM1_ADDR, SRAM1_SIZE);
|
||||
rt_memheap_init(&_heap_sram2, "sram2", (void *)SRAM2_ADDR, SRAM2_SIZE);
|
||||
rt_memheap_init(&_heap_sram3, "sram3", (void *)SRAM3_ADDR, SRAM3_SIZE);
|
||||
rt_memheap_init(&_heap_sram4, "sram4", (void *)SRAM4_ADDR, SRAM4_SIZE);
|
||||
rt_memheap_init(&_heap_backup_sram, "bak_sram", (void *)BACKUP_ADDR, BACKUP_SIZE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(init_sram);
|
||||
|
||||
/**
|
||||
* Function ota_app_vtor_reconfig
|
||||
* Description Set Vector Table base location to the start addr of app(RT_APP_PART_ADDR).
|
||||
*/
|
||||
static int ota_app_vtor_reconfig(void)
|
||||
{
|
||||
#define RT_APP_PART_ADDR 0x08020000
|
||||
#define NVIC_VTOR_MASK 0x3FFFFF80
|
||||
/* Set the Vector Table base location by user application firmware definition */
|
||||
SCB->VTOR = RT_APP_PART_ADDR & NVIC_VTOR_MASK;
|
||||
|
||||
return 0;
|
||||
}
|
||||
// INIT_BOARD_EXPORT(ota_app_vtor_reconfig);
|
||||
50
bsp/stm32/stm32h750-weact-ministm32h7xx/board/board.h
Normal file
50
bsp/stm32/stm32h750-weact-ministm32h7xx/board/board.h
Normal file
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-5 SummerGift first version
|
||||
* 2020-8-6 NU-LL Add stm32h750vbt6 support
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <stm32h7xx.h>
|
||||
#include "drv_common.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define STM32_FLASH_SIZE (128 * 1024)
|
||||
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||
|
||||
#define STM32_SRAM_SIZE (128)//DTCM
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN (&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END STM32_SRAM_END
|
||||
|
||||
void SystemClock_Config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08020000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08020000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08200000;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20020000;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x800;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x400;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
@@ -0,0 +1,157 @@
|
||||
/*
|
||||
* linker script for STM32F4xx with GNU ld
|
||||
* bernard.xiong 2009-10-14
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08020000, LENGTH = 1920k /* 1920KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K DTCM */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x001E0000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x001E0000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00020000 { ; DTCM 128K
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,302 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-07 NU-LL first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#ifdef BSP_USING_LCD_SPI
|
||||
#include <lcd_port.h>
|
||||
#include <string.h>
|
||||
|
||||
// #define DRV_DEBUG
|
||||
#define LOG_TAG "drv.lcd"
|
||||
#include <drv_log.h>
|
||||
|
||||
#define LCD_DEVICE(dev) (struct drv_lcd_device*)(dev)
|
||||
|
||||
struct drv_lcd_device
|
||||
{
|
||||
struct rt_device parent;
|
||||
|
||||
struct rt_device_graphic_info lcd_info;
|
||||
|
||||
struct rt_semaphore lcd_lock;
|
||||
|
||||
/* 0:front_buf is being used 1: back_buf is being used*/
|
||||
rt_uint8_t cur_buf;
|
||||
rt_uint8_t *front_buf;
|
||||
rt_uint8_t *back_buf;
|
||||
};
|
||||
|
||||
struct drv_lcd_device _lcd;
|
||||
|
||||
static rt_err_t drv_lcd_init(struct rt_device *device)
|
||||
{
|
||||
struct drv_lcd_device *lcd = LCD_DEVICE(device);
|
||||
/* nothing, right now */
|
||||
lcd = lcd;
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args)
|
||||
{
|
||||
struct drv_lcd_device *lcd = LCD_DEVICE(device);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
{
|
||||
LCD_FillRGBRect(0, 0, _lcd.lcd_info.framebuffer, _lcd.lcd_info.width, _lcd.lcd_info.height);
|
||||
/* update */
|
||||
// if (_lcd.cur_buf)
|
||||
// {
|
||||
// /* back_buf is being used */
|
||||
// memcpy(_lcd.front_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
|
||||
// /* Configure the color frame buffer start address */
|
||||
// LCD_FillRGBRect(0, 0, _lcd.front_buf, _lcd.lcd_info.width, _lcd.lcd_info.height);
|
||||
// _lcd.cur_buf = 0;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// /* front_buf is being used */
|
||||
// memcpy(_lcd.back_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
|
||||
// /* Configure the color frame buffer start address */
|
||||
// LCD_FillRGBRect(0, 0, _lcd.back_buf, _lcd.lcd_info.width, _lcd.lcd_info.height);
|
||||
// _lcd.cur_buf = 1;
|
||||
// }
|
||||
// rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20);
|
||||
|
||||
// /* update */
|
||||
// if (_lcd.cur_buf)
|
||||
// {
|
||||
// /* back_buf is being used */
|
||||
// memcpy(_lcd.front_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
|
||||
// /* Configure the color frame buffer start address */
|
||||
// LTDC_LAYER(&LtdcHandle, 0)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
|
||||
// LTDC_LAYER(&LtdcHandle, 0)->CFBAR = (uint32_t)(_lcd.front_buf);
|
||||
// _lcd.cur_buf = 0;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// /* front_buf is being used */
|
||||
// memcpy(_lcd.back_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
|
||||
// /* Configure the color frame buffer start address */
|
||||
// LTDC_LAYER(&LtdcHandle, 0)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
|
||||
// LTDC_LAYER(&LtdcHandle, 0)->CFBAR = (uint32_t)(_lcd.back_buf);
|
||||
// _lcd.cur_buf = 1;
|
||||
// }
|
||||
// rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20);
|
||||
// HAL_LTDC_Relaod(&LtdcHandle, LTDC_SRCR_VBR);
|
||||
}
|
||||
break;
|
||||
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
{
|
||||
struct rt_device_graphic_info *info = (struct rt_device_graphic_info *)args;
|
||||
|
||||
RT_ASSERT(info != RT_NULL);
|
||||
info->pixel_format = lcd->lcd_info.pixel_format;
|
||||
info->bits_per_pixel = 16;
|
||||
info->width = lcd->lcd_info.width;
|
||||
info->height = lcd->lcd_info.height;
|
||||
info->framebuffer = lcd->lcd_info.framebuffer;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
rt_err_t stm32_lcd_init(struct drv_lcd_device *lcd)
|
||||
{
|
||||
rt_err_t result;
|
||||
struct rt_spi_device *spi_device;
|
||||
struct rt_spi_configuration cfg;
|
||||
|
||||
|
||||
/* attach the device to spi bus*/
|
||||
spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
|
||||
RT_ASSERT(spi_device != RT_NULL);
|
||||
result = rt_spi_bus_attach_device(spi_device, LCD_SPI_DEV_NAME, LCD_SPI_BUS_NAME, (void *)RT_NULL);
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
LOG_E("%s attach to %s faild, %d\n", LCD_SPI_DEV_NAME, LCD_SPI_BUS_NAME, result);
|
||||
}
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
|
||||
cfg.data_width = 8;
|
||||
cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB | RT_SPI_NO_CS | RT_SPI_3WIRE;
|
||||
cfg.max_hz = 20 * 1000 *1000; /* 20M */
|
||||
rt_spi_configure(spi_device, &cfg);
|
||||
|
||||
return result;
|
||||
}
|
||||
#if defined(LCD_BACKLIGHT_USING_PWM)
|
||||
void turn_on_lcd_backlight(void)
|
||||
{
|
||||
struct rt_device_pwm *pwm_dev;
|
||||
|
||||
/* turn on the LCD backlight */
|
||||
pwm_dev = (struct rt_device_pwm *)rt_device_find(LCD_PWM_DEV_NAME);
|
||||
/* pwm frequency:100K = 10000ns */
|
||||
rt_pwm_set(pwm_dev, LCD_PWM_DEV_CHANNEL, 10000, 5000);
|
||||
rt_pwm_enable(pwm_dev, LCD_PWM_DEV_CHANNEL);
|
||||
}
|
||||
#elif defined(LCD_BACKLIGHT_USING_GPIO)
|
||||
void turn_on_lcd_backlight(void)
|
||||
{
|
||||
rt_pin_mode(LCD_BL_GPIO_NUM, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(LCD_DISP_GPIO_NUM, PIN_MODE_OUTPUT);
|
||||
|
||||
rt_pin_write(LCD_DISP_GPIO_NUM, PIN_HIGH);
|
||||
rt_pin_write(LCD_BL_GPIO_NUM, PIN_HIGH);
|
||||
}
|
||||
#else
|
||||
void turn_on_lcd_backlight(void)
|
||||
{
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops lcd_ops =
|
||||
{
|
||||
drv_lcd_init,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
drv_lcd_control
|
||||
};
|
||||
#endif
|
||||
|
||||
int drv_lcd_hw_init(void)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct rt_device *device = &_lcd.parent;
|
||||
|
||||
/* memset _lcd to zero */
|
||||
memset(&_lcd, 0x00, sizeof(_lcd));
|
||||
|
||||
/* init lcd_lock semaphore */
|
||||
result = rt_sem_init(&_lcd.lcd_lock, "lcd_lock", 0, RT_IPC_FLAG_FIFO);
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
LOG_E("init semaphore failed!\n");
|
||||
result = -RT_ENOMEM;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
/* config LCD dev info */
|
||||
_lcd.lcd_info.height = LCD_HEIGHT;
|
||||
_lcd.lcd_info.width = LCD_WIDTH;
|
||||
_lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
|
||||
_lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
|
||||
|
||||
/* malloc memory for Triple Buffering */
|
||||
_lcd.lcd_info.framebuffer = rt_malloc(LCD_BUF_SIZE);
|
||||
_lcd.back_buf = rt_malloc(LCD_BUF_SIZE);
|
||||
_lcd.front_buf = rt_malloc(LCD_BUF_SIZE);
|
||||
if (_lcd.lcd_info.framebuffer == RT_NULL || _lcd.back_buf == RT_NULL || _lcd.front_buf == RT_NULL)
|
||||
{
|
||||
LOG_E("init frame buffer failed!\n");
|
||||
result = -RT_ENOMEM;
|
||||
goto __exit;
|
||||
}
|
||||
|
||||
/* memset buff to 0xFF */
|
||||
memset(_lcd.lcd_info.framebuffer, 0xFF, LCD_BUF_SIZE);
|
||||
memset(_lcd.back_buf, 0xFF, LCD_BUF_SIZE);
|
||||
memset(_lcd.front_buf, 0xFF, LCD_BUF_SIZE);
|
||||
|
||||
device->type = RT_Device_Class_Graphic;
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
device->ops = &lcd_ops;
|
||||
#else
|
||||
device->init = drv_lcd_init;
|
||||
device->control = drv_lcd_control;
|
||||
#endif
|
||||
|
||||
/* register lcd device */
|
||||
rt_device_register(device, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
/* init stm32 LTDC */
|
||||
if (stm32_lcd_init(&_lcd) != RT_EOK)
|
||||
{
|
||||
result = -RT_ERROR;
|
||||
goto __exit;
|
||||
}
|
||||
else
|
||||
{
|
||||
turn_on_lcd_backlight();
|
||||
}
|
||||
|
||||
__exit:
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
rt_sem_delete(&_lcd.lcd_lock);
|
||||
|
||||
if (_lcd.lcd_info.framebuffer)
|
||||
{
|
||||
rt_free(_lcd.lcd_info.framebuffer);
|
||||
}
|
||||
|
||||
if (_lcd.back_buf)
|
||||
{
|
||||
rt_free(_lcd.back_buf);
|
||||
}
|
||||
|
||||
if (_lcd.front_buf)
|
||||
{
|
||||
rt_free(_lcd.front_buf);
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(drv_lcd_hw_init);
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#ifdef FINSH_USING_MSH
|
||||
int lcd_test()
|
||||
{
|
||||
struct drv_lcd_device *lcd;
|
||||
lcd = (struct drv_lcd_device *)rt_device_find("lcd");
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* red */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
|
||||
{
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0x00;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0xF8;
|
||||
}
|
||||
lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
/* green */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
|
||||
{
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0xE0;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0x07;
|
||||
}
|
||||
lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
/* blue */
|
||||
for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
|
||||
{
|
||||
lcd->lcd_info.framebuffer[2 * i] = 0x1F;
|
||||
lcd->lcd_info.framebuffer[2 * i + 1] = 0x00;
|
||||
}
|
||||
lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||||
rt_thread_mdelay(1000);
|
||||
}
|
||||
}
|
||||
MSH_CMD_EXPORT(lcd_test, lcd_test);
|
||||
#endif /* FINSH_USING_MSH */
|
||||
#endif /* DRV_DEBUG */
|
||||
#endif /* BSP_USING_LCD */
|
||||
@@ -0,0 +1,244 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-07 NU-LL first version
|
||||
*/
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
#include <drv_qspi.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
#include <finsh.h>
|
||||
|
||||
#ifdef BSP_USING_QSPI_FLASH
|
||||
|
||||
#include <fal.h>
|
||||
#include <sfud.h>
|
||||
#include "dfs_fs.h"
|
||||
#include "drv_spi.h"
|
||||
#include "spi_flash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
|
||||
//#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.qspiflash"
|
||||
#include <drv_log.h>
|
||||
|
||||
|
||||
#define QSPI_CS_PIN GET_PIN(B, 6)
|
||||
|
||||
#define FS_PARTITION_NAME "fs_qspi"
|
||||
#define FAL_USING_NOR_FLASH_2_DEV_NAME "W25Q64_q"
|
||||
|
||||
|
||||
static int init(void);
|
||||
static int read(long offset, uint8_t *buf, size_t size);
|
||||
static int write(long offset, const uint8_t *buf, size_t size);
|
||||
static int erase(long offset, size_t size);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
static char w25qxx_read_status_register2(struct rt_qspi_device *device)
|
||||
{
|
||||
/* 0x35 read status register2 */
|
||||
char instruction = 0x35, status;
|
||||
|
||||
rt_qspi_send_then_recv(device, &instruction, 1, &status, 1);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static void w25qxx_write_enable(struct rt_qspi_device *device)
|
||||
{
|
||||
/* 0x06 write enable */
|
||||
char instruction = 0x06;
|
||||
|
||||
rt_qspi_send(device, &instruction, 1);
|
||||
}
|
||||
|
||||
static void w25qxx_enter_qspi_mode(struct rt_qspi_device *device)
|
||||
{
|
||||
char status = 0;
|
||||
/* 0x38 enter qspi mode */
|
||||
char instruction = 0x38;
|
||||
char write_status2_buf[2] = {0};
|
||||
|
||||
/* 0x31 write status register2 */
|
||||
write_status2_buf[0] = 0x31;
|
||||
|
||||
status = w25qxx_read_status_register2(device);
|
||||
if (!(status & 0x02))
|
||||
{
|
||||
status |= 1 << 1;
|
||||
w25qxx_write_enable(device);
|
||||
write_status2_buf[1] = status;
|
||||
// rt_qspi_send(device, &write_status2_buf, 2);
|
||||
rt_qspi_send(device, write_status2_buf, 2);
|
||||
rt_qspi_send(device, &instruction, 1);
|
||||
rt_kprintf("flash already enter qspi mode\n");
|
||||
rt_thread_mdelay(10);
|
||||
}
|
||||
}
|
||||
|
||||
/* read the JEDEC SFDP command must run at 50 MHz or less */
|
||||
#define RT_SFUD_DEFAULT_SPI_CFG \
|
||||
{ \
|
||||
.mode = RT_SPI_MODE_2 | RT_SPI_MSB, \
|
||||
.data_width = 8, \
|
||||
.max_hz = 20000000, \
|
||||
}
|
||||
|
||||
#ifdef SFUD_USING_QSPI
|
||||
#define RT_SFUD_DEFAULT_QSPI_CFG \
|
||||
{ \
|
||||
RT_SFUD_DEFAULT_SPI_CFG, \
|
||||
.medium_size = 0x800000, \
|
||||
.ddr_mode = 0, \
|
||||
.qspi_dl_width = 4, \
|
||||
}
|
||||
#endif /* SFUD_USING_QSPI */
|
||||
|
||||
static int rt_hw_qspi_flash_with_sfud_init(void)
|
||||
{
|
||||
stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, RT_NULL, RT_NULL);
|
||||
// stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL);
|
||||
// stm32_qspi_bus_attach_device("qspi1", "qspi10", QSPI_CS_PIN, 4, w25qxx_enter_qspi_mode, RT_NULL);
|
||||
|
||||
/* init W25Q16 , And register as a block device */
|
||||
|
||||
struct rt_spi_configuration cfg = RT_SFUD_DEFAULT_SPI_CFG;
|
||||
struct rt_qspi_configuration qspi_cfg = RT_SFUD_DEFAULT_QSPI_CFG;
|
||||
// // return rt_sfud_flash_probe_ex(FAL_USING_NOR_FLASH_2_DEV_NAME, "qspi10", &cfg, &qspi_cfg);
|
||||
if(RT_NULL == rt_sfud_flash_probe_ex(FAL_USING_NOR_FLASH_2_DEV_NAME, "qspi10", &cfg, &qspi_cfg))
|
||||
|
||||
|
||||
// if (RT_NULL == rt_sfud_flash_probe(FAL_USING_NOR_FLASH_2_DEV_NAME, "qspi10"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_qspi_flash_with_sfud_init);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
static sfud_flash_t sfud_dev = NULL;
|
||||
struct fal_flash_dev nor_flash1 =
|
||||
{
|
||||
.name = FAL_USING_NOR_FLASH_2_DEV_NAME,
|
||||
.addr = 0,
|
||||
.len = 8 * 1024 * 1024,
|
||||
.blk_size = 4096,
|
||||
.ops = {init, read, write, erase},
|
||||
.write_gran = 1
|
||||
};
|
||||
|
||||
static int init(void)
|
||||
{
|
||||
|
||||
#ifdef RT_USING_SFUD
|
||||
/* RT-Thread RTOS platform */
|
||||
sfud_dev = rt_sfud_flash_find_by_dev_name(FAL_USING_NOR_FLASH_2_DEV_NAME);
|
||||
#else
|
||||
/* bare metal platform */
|
||||
extern sfud_flash nor_flash1;
|
||||
sfud_dev = &nor_flash1;
|
||||
#endif
|
||||
|
||||
if (NULL == sfud_dev)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* update the flash chip information */
|
||||
nor_flash1.blk_size = sfud_dev->chip.erase_gran;
|
||||
nor_flash1.len = sfud_dev->chip.capacity;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int read(long offset, uint8_t *buf, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
sfud_read(sfud_dev, nor_flash1.addr + offset, size, buf);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int write(long offset, const uint8_t *buf, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
if (sfud_write(sfud_dev, nor_flash1.addr + offset, size, buf) != SFUD_SUCCESS)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int erase(long offset, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
if (sfud_erase(sfud_dev, nor_flash1.addr + offset, size) != SFUD_SUCCESS)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
static int mnt_qspi(void)
|
||||
{
|
||||
struct rt_device *mtd_dev = RT_NULL;
|
||||
|
||||
mtd_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME);
|
||||
if (!mtd_dev)
|
||||
{
|
||||
LOG_E("Can't create a mtd device on '%s' partition.", FS_PARTITION_NAME);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* mount littlefs */
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/qspi", "lfs", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
dfs_mkfs("lfs", FS_PARTITION_NAME);
|
||||
/* mount littlefs */
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/qspi", "lfs", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("Failed to initialize filesystem!");
|
||||
}
|
||||
}
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_APP_EXPORT(mnt_qspi);
|
||||
|
||||
|
||||
|
||||
#endif/* BSP_USING_QSPI_FLASH */
|
||||
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-07 NU-LL first version
|
||||
*/
|
||||
#include <fal.h>
|
||||
#include <dfs_fs.h>
|
||||
|
||||
// #define DRV_DEBUG
|
||||
#define LOG_TAG "drv.spiflash"
|
||||
#include <drv_log.h>
|
||||
|
||||
#define FS_PARTITION_NAME "filesystem"
|
||||
|
||||
#define SPI_CS_GPIO GPIOD
|
||||
#define SPI_CS_PIN GPIO_PIN_6
|
||||
|
||||
static int rt_hw_spi_flash_with_sfud_init(void)
|
||||
{
|
||||
rt_err_t err = RT_EOK;
|
||||
rt_hw_spi_device_attach("spi1", "spi10", SPI_CS_GPIO, SPI_CS_PIN);
|
||||
|
||||
/* init W25Q16 , And register as a block device */
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi10"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
return err;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_spi_flash_with_sfud_init);
|
||||
|
||||
|
||||
|
||||
static int mnt(void)
|
||||
{
|
||||
struct rt_device *mtd_dev = RT_NULL;
|
||||
|
||||
fal_init();
|
||||
mtd_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME);
|
||||
if (!mtd_dev)
|
||||
{
|
||||
LOG_E("Can't create a mtd device on '%s' partition.", FS_PARTITION_NAME);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* mount littlefs */
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
dfs_mkfs("lfs", FS_PARTITION_NAME);
|
||||
/* mount littlefs */
|
||||
if (dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0) == 0)
|
||||
{
|
||||
mkdir("/qspi",0x777);
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("Failed to initialize filesystem!");
|
||||
}
|
||||
}
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_ENV_EXPORT(mnt);
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* File : fal_cfg.h
|
||||
* This file is part of FAL (Flash Abstraction Layer) package
|
||||
* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-05-17 armink the first version
|
||||
*/
|
||||
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#include <rtconfig.h>
|
||||
#include <board.h>
|
||||
|
||||
#define NOR_FLASH_DEV_NAME "W25Q64"
|
||||
|
||||
/* ===================== Flash device Configuration ========================= */
|
||||
extern const struct fal_flash_dev stm32_onchip_flash_128k;
|
||||
extern struct fal_flash_dev nor_flash0;
|
||||
extern struct fal_flash_dev nor_flash1;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&stm32_onchip_flash_128k, \
|
||||
&nor_flash0, \
|
||||
&nor_flash1, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
/* partition table */
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WORD, "bootloader", "onchip_flash_128k", 0, 128*1024, 0}, \
|
||||
{FAL_PART_MAGIC_WORD, "filesystem", NOR_FLASH_DEV_NAME, 0, 8*1024*1024, 0}, \
|
||||
{FAL_PART_MAGIC_WORD, "fs_qspi", "W25Q64_q", 0, 8*1024*1024, 0}, \
|
||||
}
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-07 NU-LL first version
|
||||
*/
|
||||
|
||||
#ifndef __LCD_PORT_H__
|
||||
#define __LCD_PORT_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "lcd.h"
|
||||
#include "st7735.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//LCD
|
||||
#define LCD_HEIGHT (80U)
|
||||
#define LCD_WIDTH (160U)
|
||||
#define LCD_BITS_PER_PIXEL (16)
|
||||
#define LCD_PIXEL_FORMAT (RTGRAPHIC_PIXEL_FORMAT_RGB565)
|
||||
#define LCD_BUF_SIZE (LCD_WIDTH*LCD_HEIGHT*LCD_BITS_PER_PIXEL/8)
|
||||
//PWM
|
||||
#define LCD_PWM_DEV_NAME "pwm1"
|
||||
#define LCD_PWM_DEV_CHANNEL (2)
|
||||
//SPI
|
||||
#define LCD_SPI_BUS_NAME "spi4"
|
||||
#define LCD_SPI_DEV_NAME "spi40"
|
||||
#define LCD_SPI_DEV_CS_GPIO (RT_NULL)
|
||||
#define LCD_SPI_DEV_CS_PIN (RT_NULL)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,417 @@
|
||||
#ifndef __FONT_H
|
||||
#define __FONT_H
|
||||
|
||||
|
||||
//32*32汉字字模
|
||||
const unsigned char hanzi32[]={
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x30,0xC0,0x01,0x00,0xE0,0xE0,0x01,0x00,0xC0,0xE1,0x00,0x00,0xC0,0x61,0x00,0x18,0x80,0xF1,0xFF,0x3F,0x00,0x70,0x00,0x18,0x00,0x3E,0x00,0x18,0x04,0xDA,0x01,0x18,0x1C,0xEE,0x01,0x18,0x38,0x6F,0x60,0x18,0x78,0xF7,0xFF,0x18,0x70,0x31,0x86,0x18,0xB0,0x19,0x06,0x18,0x80,0x09,0x06,0x18,0x80,0x05,0x86,0x19,0xC0,0xFE,0xFF,0x1B,0xC0,0x00,0x06,0x1A,0xC0,0x30,0x66,0x18,0xE0,0x70,0xE6,0x19,0x7C,0x30,0xE6,0x18,0x70,0x30,0xE6,0x18,0x60,0x30,0xE6,0x18,0x70,0xF8,0xFF,0x1C,0x70,0x30,0xE0,0x1C,0x70,0x00,0x00,0x1C,0x70,0x00,0xF0,0x1F,0x70,0x00,0x80,0x0F,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,//淘
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x0E,0xC0,0x01,0x00,0xFE,0xFF,0x03,0x00,0x0E,0xC0,0x01,0x00,0x0E,0xC0,0x01,0x00,0x0E,0xC0,0x01,0x00,0xFE,0xFF,0x01,0x00,0x0E,0xC0,0x01,0x00,0x0E,0xC0,0x01,0x00,0x0E,0xC0,0x01,0x00,0xFE,0xFF,0x01,0x00,0x0E,0xC0,0x01,0x00,0x06,0x40,0x00,0x00,0x00,0x00,0x00,0x30,0x70,0x0C,0x18,0xF0,0xFF,0xFC,0x3F,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0xF0,0x7F,0xFC,0x1F,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0x70,0x70,0x0C,0x18,0xF0,0x7F,0xFC,0x1F,0x70,0x70,0x0C,0x18,0x10,0x00,0x04,0x00,0x00,0x00,0x00,0x00,//晶
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x70,0x00,0x00,0x1C,0x70,0x00,0xFC,0x1F,0x70,0x00,0x00,0x8C,0x71,0x00,0x20,0x8C,0x77,0x00,0xE0,0x8C,0x73,0x04,0xF0,0x8E,0x73,0x1E,0x70,0x8E,0xF3,0x1F,0x70,0x8E,0xFB,0x0C,0x70,0x8E,0x7F,0x0C,0x70,0xFE,0x73,0x0C,0x30,0x86,0x73,0x0C,0x30,0x86,0x73,0x0C,0x30,0x96,0x73,0x0C,0xF8,0xBF,0x73,0x0C,0x38,0xF8,0x73,0x0C,0x00,0xB8,0x73,0x0C,0x00,0xB8,0xF3,0x0F,0x00,0xBE,0x73,0x06,0xE0,0x9B,0x73,0x30,0x7E,0x98,0x73,0x30,0x1C,0x98,0x13,0x30,0x08,0x9C,0x03,0x30,0x00,0x9C,0x03,0x30,0x00,0x8C,0x03,0x78,0xE0,0x0F,0xFF,0x7F,0x80,0x07,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,//驰
|
||||
};
|
||||
//16*16汉字字模
|
||||
const unsigned char hanzi16[]={
|
||||
0x80,0x00,0x80,0x00,0x80,0x00,0xFC,0x1F,0x40,0x00,0x40,0x00,0xFF,0x7F,0x20,0x00,0x10,0x00,0xF0,0x0F,0x00,0x08,0x00,0x04,0x60,0x02,0x80,0x01,0x00,0x02,0x00,0x04,//专
|
||||
0x00,0x01,0x04,0x02,0x08,0x00,0xE8,0x3F,0x01,0x02,0x02,0x02,0x02,0x02,0x08,0x02,0xC8,0x3F,0x04,0x02,0x07,0x02,0x04,0x02,0x04,0x02,0x04,0x02,0xF4,0x7F,0x00,0x00,//注
|
||||
0x00,0x00,0xF8,0x0F,0x08,0x08,0x08,0x08,0xF8,0x0F,0x08,0x08,0x08,0x08,0xF8,0x0F,0x20,0x02,0x22,0x22,0x24,0x22,0x28,0x12,0x28,0x0A,0x20,0x02,0xFF,0x7F,0x00,0x00,//显
|
||||
0x00,0x00,0xFC,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x7F,0x80,0x00,0x80,0x00,0x88,0x08,0x88,0x10,0x84,0x20,0x82,0x40,0x81,0x40,0xA0,0x00,0x40,0x00,//示
|
||||
0x40,0x00,0x80,0x00,0x80,0x00,0xFF,0x7F,0x20,0x00,0x20,0x00,0x20,0x00,0xE0,0x0F,0x20,0x08,0x20,0x08,0x20,0x08,0x10,0x08,0x10,0x08,0x08,0x08,0x04,0x05,0x02,0x02,//方
|
||||
0x80,0x00,0xFE,0x3F,0x02,0x20,0x20,0x00,0xFF,0x7F,0x10,0x04,0x78,0x02,0xC0,0x03,0x3C,0x1C,0x80,0x00,0xFF,0x7F,0xA0,0x02,0x90,0x04,0x8C,0x18,0x83,0x60,0x80,0x00,//案
|
||||
};
|
||||
//QQ图像
|
||||
const unsigned char qqimage[3200]={ /* 0X00,0X10,0X28,0X00,0X28,0X00,0X01,0X1B,*/
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,0X7D,0XEF,
|
||||
0XBA,0XD6,0XB6,0XB5,0XF3,0X9C,0XB2,0X94,0XB3,0X9C,0XB2,0X94,0X34,0XA5,0XF7,0XBD,
|
||||
0XFB,0XDE,0X7D,0XEF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,0XFB,0XDE,0XF3,0X9C,0XCB,0X5A,
|
||||
0XC7,0X39,0X04,0X21,0X82,0X10,0X42,0X10,0X42,0X10,0X41,0X08,0X83,0X18,0X45,0X29,
|
||||
0XC7,0X39,0X0C,0X63,0X75,0XAD,0X3C,0XE7,0XBE,0XF7,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X3C,0XE7,0XB2,0X94,0X08,0X42,0XC3,0X18,0X82,0X10,
|
||||
0X04,0X21,0X45,0X29,0X86,0X31,0X86,0X31,0X86,0X31,0X86,0X31,0X45,0X29,0X04,0X21,
|
||||
0X82,0X10,0X41,0X08,0XC3,0X18,0X08,0X42,0XF3,0X9C,0X3C,0XE7,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFB,0XDE,0X0C,0X63,0XC3,0X18,0XC3,0X18,0X45,0X29,0XC7,0X39,
|
||||
0X08,0X42,0X08,0X42,0X08,0X42,0X08,0X42,0X08,0X42,0X08,0X42,0XC7,0X39,0XC7,0X39,
|
||||
0X86,0X31,0X86,0X31,0X04,0X21,0X41,0X08,0X82,0X10,0XCB,0X5A,0XBA,0XD6,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFB,0XDE,0XCB,0X5A,0X82,0X10,0X45,0X29,0XC7,0X39,0X08,0X42,0X08,0X42,
|
||||
0X09,0X4A,0X49,0X4A,0X49,0X4A,0X49,0X4A,0X49,0X4A,0X49,0X4A,0X08,0X42,0XC7,0X39,
|
||||
0XC7,0X39,0XC7,0X39,0X86,0X31,0X45,0X29,0X83,0X18,0X00,0X00,0XC8,0X41,0X38,0XC6,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0X7D,0XEF,0X8E,0X73,0X82,0X10,0X45,0X29,0XC7,0X39,0X08,0X42,0X09,0X4A,0X8A,0X52,
|
||||
0X30,0X84,0XCF,0X7B,0X8A,0X52,0X49,0X4A,0X4A,0X52,0X49,0X4A,0XCB,0X5A,0XCF,0X7B,
|
||||
0X0C,0X63,0X08,0X42,0XC7,0X39,0X86,0X31,0X45,0X29,0XC3,0X18,0X00,0X00,0X49,0X4A,
|
||||
0XBA,0XD6,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XF3,0X9C,0XC3,0X18,0X04,0X21,0XC7,0X39,0X08,0X42,0X49,0X4A,0X49,0X4A,0X72,0X94,
|
||||
0X7D,0XEF,0X7D,0XEF,0XB2,0X94,0X4A,0X52,0X49,0X4A,0X8A,0X52,0X75,0XAD,0XBE,0XF7,
|
||||
0XBA,0XD6,0X4D,0X6B,0XC7,0X39,0XC7,0X39,0X86,0X31,0X45,0X29,0XC3,0X18,0X41,0X08,
|
||||
0XCF,0X7B,0X7C,0XE7,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBA,0XD6,
|
||||
0X08,0X42,0X82,0X10,0XC7,0X39,0X08,0X42,0X49,0X4A,0X49,0X4A,0X8E,0X73,0XFB,0XDE,
|
||||
0XFF,0XFF,0XBE,0XF7,0XBA,0XD6,0X8E,0X73,0X08,0X42,0X30,0X84,0X3C,0XE7,0X7D,0XEF,
|
||||
0XFF,0XFF,0XB6,0XB5,0X49,0X4A,0XC7,0X39,0X86,0X31,0X45,0X29,0X04,0X21,0X41,0X08,
|
||||
0X45,0X29,0XB6,0XB5,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,0X71,0X8C,
|
||||
0X41,0X08,0X45,0X29,0X08,0X42,0X49,0X4A,0X49,0X4A,0X4A,0X52,0XB2,0X94,0XBE,0XF7,
|
||||
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||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XBE,0XF7,0X7D,0XEF,0X3C,0XE7,0XFB,0XDE,0XBA,0XD6,0X79,0XCE,0X79,0XCE,0X3C,0XE7,
|
||||
0X71,0X8C,0X81,0X08,0X0C,0X63,0XCF,0X7B,0X82,0X10,0X00,0X00,0X8A,0X52,0X38,0XC6,
|
||||
0X75,0XAD,0X71,0X8C,0XB6,0XB5,0X3C,0XE7,0XFB,0XDE,0XC7,0X39,0X00,0X00,0XCF,0X73,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,
|
||||
0X7D,0XEF,0X7D,0XEF,0X3B,0XDF,0XFA,0XD6,0X79,0XCE,0X79,0XCE,0XFB,0XDE,0XB9,0XCE,
|
||||
0XC7,0X39,0XC4,0X20,0X71,0X8C,0XBA,0XD6,0X71,0X8C,0XCB,0X5A,0XB2,0X94,0XBA,0XD6,
|
||||
0XFF,0XFF,0X7D,0XEF,0X7D,0XEF,0XFF,0XFF,0XFF,0XFF,0XB6,0XB5,0X46,0X29,0X05,0X19,
|
||||
0X75,0XA5,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,
|
||||
0X7D,0XEF,0X3C,0XE7,0XFB,0XDE,0XBA,0XD6,0X79,0XCE,0XBA,0XD6,0XFC,0XDE,0X4E,0X63,
|
||||
0X42,0X08,0X0C,0X63,0XF7,0XBD,0XBE,0XF7,0XFF,0XFF,0XFB,0XDE,0XFB,0XDE,0XBE,0XF7,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XF4,0X9C,0X04,0X21,
|
||||
0X05,0X21,0XB6,0XA5,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,0XBE,0XF7,0X7D,0XEF,
|
||||
0X3C,0XE7,0XFB,0XDE,0XBA,0XD6,0X79,0XCE,0XFB,0XDE,0XBB,0XD6,0XD1,0X73,0X83,0X18,
|
||||
0X86,0X39,0X34,0X9D,0XBD,0XEF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XFF,0X35,0XD6,0XEB,0XCC,0X43,0XB3,
|
||||
0X40,0X51,0X05,0X19,0XF5,0X8C,0XBE,0XEF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBE,0XF7,0XBE,0XF7,0X7D,0XEF,0X7D,0XEF,0X3C,0XE7,
|
||||
0XFB,0XDE,0XBA,0XDE,0XBA,0XD6,0X3C,0XDF,0X3A,0XBE,0X4F,0X63,0X82,0X49,0X40,0XA3,
|
||||
0X23,0XB4,0XCC,0X83,0X3A,0XBE,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XBF,0XF7,0XB5,0XBD,0X82,0X92,0X20,0XF4,0XA0,0XFC,
|
||||
0X60,0XE4,0X40,0X82,0X84,0X41,0X8F,0X6B,0X77,0XAD,0X3D,0XE7,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFE,0XFF,0XBE,0XF7,0XBE,0XF7,0XBE,0XF7,0X7D,0XEF,0X7D,0XEF,0X3C,0XE7,0XFB,0XDE,
|
||||
0XFB,0XDE,0X3D,0XE7,0XBB,0XCE,0X36,0X9D,0X0B,0X6B,0X41,0X6A,0X60,0XC4,0X20,0XFE,
|
||||
0X60,0XF5,0X00,0X8B,0XC7,0X6A,0X38,0XC6,0XBE,0XF7,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X7D,0XEF,0X4B,0X7B,0X80,0XB2,0XA0,0XFC,0XA0,0XFC,
|
||||
0XE0,0XFC,0XE0,0XFC,0XC0,0XCB,0XC1,0X8A,0X45,0X62,0X4D,0X6B,0XB3,0X94,0XF7,0XBD,
|
||||
0X3D,0XDF,0XFF,0XF7,0XFF,0XFF,0XBE,0XF7,0X7D,0XEF,0X7D,0XEF,0X7D,0XE7,0X3D,0XDF,
|
||||
0XBA,0XC6,0X75,0XA5,0X8D,0X7B,0X84,0X7A,0X40,0XB3,0XE0,0XEC,0XE0,0XFD,0XE0,0XFD,
|
||||
0X60,0XF5,0X20,0XE5,0XA0,0XD4,0X0A,0X6B,0XFB,0XDE,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X7D,0XEF,0XCC,0X93,0X40,0XEB,0X60,0XFC,0XA0,0XFC,
|
||||
0XE0,0XFC,0X20,0XFD,0X60,0XFD,0X20,0XF5,0XA0,0XD4,0XC0,0XBB,0X42,0X9B,0X45,0X8B,
|
||||
0X6B,0X9C,0XAE,0X9C,0X71,0X8C,0XB3,0X94,0X33,0X9D,0X34,0XA5,0XF2,0XA4,0XF0,0XB4,
|
||||
0XCA,0X9B,0X04,0X9B,0X40,0XBB,0X20,0XE4,0X20,0XFD,0XA0,0XFD,0XA0,0XFD,0XE0,0XFD,
|
||||
0XE0,0XFD,0XE0,0XFD,0X20,0XC4,0X88,0X5A,0X38,0XBE,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X78,0XD6,0X46,0XAB,0X40,0XDB,0X20,0XF4,
|
||||
0X60,0XFC,0XA0,0XFC,0XE0,0XFC,0X60,0XFD,0XA0,0XFD,0X60,0XFD,0X20,0XF5,0XA0,0XDC,
|
||||
0XC0,0XB3,0XC0,0X51,0X86,0X29,0X0D,0X63,0X8F,0X7B,0X0D,0X5B,0XC7,0X41,0X01,0X82,
|
||||
0X00,0XC3,0XC0,0XE3,0X60,0XFC,0XA0,0XFC,0XE0,0XFC,0XE0,0XFC,0X60,0XF5,0X60,0XF5,
|
||||
0X20,0XE5,0X80,0X9B,0X86,0X62,0X30,0X84,0X79,0XCE,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X38,0XC6,0X2D,0X9C,0X05,0X93,
|
||||
0X43,0XA3,0X82,0XB3,0XC2,0XBB,0XC2,0XBB,0X22,0XB4,0X82,0XA3,0X42,0X93,0XC3,0X7A,
|
||||
0X85,0X62,0X0B,0X63,0X71,0X84,0XB6,0XB5,0X79,0XCE,0X79,0XC6,0XB5,0XAD,0X70,0X94,
|
||||
0X4A,0X8B,0X06,0X83,0X04,0X93,0X04,0X9B,0X43,0X9B,0X43,0X9B,0X43,0X93,0X04,0X83,
|
||||
0X08,0X73,0X8D,0X73,0XB3,0X94,0X79,0XCE,0X7D,0XEF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X3C,0XDF,0X38,0XBE,
|
||||
0X75,0XB5,0X33,0XA5,0X33,0XA5,0XF3,0X9C,0XF3,0X9C,0XF3,0X9C,0XF3,0X94,0XF3,0X9C,
|
||||
0X35,0XA5,0XF8,0XBD,0XFB,0XDE,0XBE,0XF7,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0X7E,0XEF,
|
||||
0XBB,0XD6,0XF8,0XBD,0XB6,0XAD,0X75,0XAD,0X34,0XA5,0X33,0X9D,0X34,0X9D,0X35,0XA5,
|
||||
0XB7,0XAD,0X79,0XC6,0X3C,0XE7,0XBE,0XF7,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
|
||||
};
|
||||
const unsigned char asc2_1206[95][12]={
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/
|
||||
{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/
|
||||
{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/
|
||||
{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/
|
||||
{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/
|
||||
{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/
|
||||
{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/
|
||||
{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/
|
||||
{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/
|
||||
{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/
|
||||
{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/
|
||||
{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/
|
||||
{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/
|
||||
{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/
|
||||
{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/
|
||||
{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/
|
||||
{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/
|
||||
{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/
|
||||
{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/
|
||||
{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/
|
||||
{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/
|
||||
{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/
|
||||
{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/
|
||||
{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/
|
||||
{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/
|
||||
{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/
|
||||
{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/
|
||||
{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/
|
||||
{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/
|
||||
{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/
|
||||
{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/
|
||||
{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/
|
||||
{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/
|
||||
{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/
|
||||
{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/
|
||||
{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/
|
||||
{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/
|
||||
{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/
|
||||
{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/
|
||||
{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/
|
||||
{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/
|
||||
{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/
|
||||
{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/
|
||||
{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/
|
||||
{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/
|
||||
{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/
|
||||
{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/
|
||||
{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/
|
||||
{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/
|
||||
{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/
|
||||
{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/
|
||||
{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/
|
||||
{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/
|
||||
{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/
|
||||
{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/
|
||||
{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/
|
||||
{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/
|
||||
{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/
|
||||
{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/
|
||||
{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/
|
||||
{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/
|
||||
{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/
|
||||
{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/
|
||||
{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/
|
||||
{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/
|
||||
{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/
|
||||
{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/
|
||||
{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/
|
||||
{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/
|
||||
{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/
|
||||
{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/
|
||||
{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/
|
||||
{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/
|
||||
{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/
|
||||
{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/
|
||||
{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/
|
||||
{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/
|
||||
{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/
|
||||
{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/
|
||||
{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/
|
||||
{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/
|
||||
{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/
|
||||
{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/
|
||||
{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/
|
||||
{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/
|
||||
{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/
|
||||
{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/
|
||||
{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/
|
||||
};
|
||||
const unsigned char asc2_1608[95][16]={
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/
|
||||
{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/
|
||||
{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/
|
||||
{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/
|
||||
{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/
|
||||
{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/
|
||||
{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/
|
||||
{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/
|
||||
{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/
|
||||
{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/
|
||||
{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/
|
||||
{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/
|
||||
{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/
|
||||
{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/
|
||||
{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/
|
||||
{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/
|
||||
{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/
|
||||
{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/
|
||||
{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/
|
||||
{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/
|
||||
{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/
|
||||
{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/
|
||||
{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/
|
||||
{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/
|
||||
{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/
|
||||
{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/
|
||||
{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/
|
||||
{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/
|
||||
{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/
|
||||
{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/
|
||||
{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/
|
||||
{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/
|
||||
{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/
|
||||
{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/
|
||||
{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/
|
||||
{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/
|
||||
{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/
|
||||
{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/
|
||||
{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/
|
||||
{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/
|
||||
{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/
|
||||
{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/
|
||||
{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/
|
||||
{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/
|
||||
{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/
|
||||
{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/
|
||||
{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/
|
||||
{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/
|
||||
{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/
|
||||
{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/
|
||||
{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/
|
||||
{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/
|
||||
{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/
|
||||
{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/
|
||||
{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/
|
||||
{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/
|
||||
{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/
|
||||
{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/
|
||||
{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/
|
||||
{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/
|
||||
{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/
|
||||
{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/
|
||||
{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/
|
||||
{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/
|
||||
{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/
|
||||
{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/
|
||||
{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/
|
||||
{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/
|
||||
{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/
|
||||
{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/
|
||||
{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/
|
||||
{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/
|
||||
{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/
|
||||
{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/
|
||||
{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/
|
||||
{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/
|
||||
{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/
|
||||
{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/
|
||||
{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/
|
||||
{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/
|
||||
{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/
|
||||
{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/
|
||||
{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/
|
||||
{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/
|
||||
{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/
|
||||
{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/
|
||||
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/
|
||||
{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/
|
||||
{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/
|
||||
};
|
||||
#endif
|
||||
293
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/lcd.c
Normal file
293
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/lcd.c
Normal file
@@ -0,0 +1,293 @@
|
||||
#include "lcd.h"
|
||||
#include "rttlogo.h"
|
||||
#include "font.h"
|
||||
|
||||
// #define DRV_DEBUG
|
||||
#define LOG_TAG "spi.lcd"
|
||||
#include <drv_log.h>
|
||||
|
||||
|
||||
#define LCD_SPI_DEVICE_NAME "spi40"
|
||||
#define LCD_PWM_DEV_NAME "pwm1"
|
||||
#define LCD_PWM_DEV_CHANNEL (2)
|
||||
#define LCD_PWM_DEV_TIME (10000)//pwm frequency:100K = 10000ns
|
||||
|
||||
#define WR_RS_PIN GET_PIN(E, 13)
|
||||
#define CS_PIN GET_PIN(E, 11)
|
||||
//SPI显示屏接口
|
||||
//LCD_RS
|
||||
#define LCD_RS_SET rt_pin_write(WR_RS_PIN, PIN_HIGH)
|
||||
#define LCD_RS_RESET rt_pin_write(WR_RS_PIN, PIN_LOW)
|
||||
//LCD_CS
|
||||
#define LCD_CS_SET rt_pin_write(CS_PIN, PIN_HIGH)
|
||||
#define LCD_CS_RESET rt_pin_write(CS_PIN, PIN_LOW)
|
||||
|
||||
|
||||
static int32_t lcd_init(void);
|
||||
static int32_t lcd_writereg(uint8_t reg,uint8_t* pdata,uint32_t length);
|
||||
static int32_t lcd_readreg(uint8_t reg,uint8_t* pdata);
|
||||
static int32_t lcd_senddata(uint8_t* pdata,uint32_t length);
|
||||
static int32_t lcd_recvdata(uint8_t* pdata,uint32_t length);
|
||||
|
||||
ST7735_IO_t st7735_pIO = {
|
||||
lcd_init,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
lcd_writereg,
|
||||
lcd_readreg,
|
||||
lcd_senddata,
|
||||
lcd_recvdata,
|
||||
RT_NULL
|
||||
};
|
||||
ST7735_Object_t st7735_pObj;
|
||||
uint32_t st7735_id;
|
||||
static struct rt_spi_device *spi_dev_lcd;
|
||||
static struct rt_device_pwm *lcd_pwm_dev;
|
||||
static uint32_t NowBrightness;
|
||||
extern unsigned char WeActStudiologo[];
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#ifdef FINSH_USING_MSH
|
||||
static int show_logo(int argc, char **argv)
|
||||
{
|
||||
uint8_t text[20];
|
||||
// ST7735_LCD_Driver.ReadID(&st7735_pObj,&st7735_id);
|
||||
|
||||
// LCD_Light(LCD_PWM_DEV_TIME, 300);
|
||||
|
||||
ST7735_LCD_Driver.DrawBitmap(&st7735_pObj,0,0,WeActStudiologo);
|
||||
LCD_SetBrightness(LCD_PWM_DEV_TIME-1);
|
||||
rt_thread_mdelay(1000);
|
||||
// LCD_SetBrightness(0);
|
||||
|
||||
// ST7735_LCD_Driver.FillRect(&st7735_pObj,0,0,160,80,BLACK);
|
||||
|
||||
// sprintf((char *)&text,"WeAct Studio");
|
||||
// LCD_ShowString(4,4,160,16,16,text);
|
||||
// sprintf((char *)&text,"STM32H7xx 0x%X",HAL_GetDEVID());
|
||||
// LCD_ShowString(4,22,160,16,16,text);
|
||||
// sprintf((char *)&text,"LCD ID: 0x%X",st7735_id);
|
||||
// LCD_ShowString(4,40,160,16,16,text);
|
||||
return 0;
|
||||
}
|
||||
MSH_CMD_EXPORT(show_logo, show logo);
|
||||
#endif /* FINSH_USING_MSH */
|
||||
#endif /* DRV_DEBUG */
|
||||
|
||||
static int LCD_Init(void)
|
||||
{
|
||||
rt_pin_mode(WR_RS_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(CS_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
spi_dev_lcd = (struct rt_spi_device *)rt_device_find(LCD_SPI_DEVICE_NAME);
|
||||
if (!spi_dev_lcd)
|
||||
{
|
||||
LOG_E("tft-lcd init failed! can't find %s device!\n", LCD_SPI_DEVICE_NAME);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
ST7735_RegisterBusIO(&st7735_pObj,&st7735_pIO);
|
||||
if(ST7735_ERROR == ST7735_LCD_Driver.Init(&st7735_pObj,ST7735_FORMAT_RBG565,ST7735_ORIENTATION_LANDSCAPE_ROT180))
|
||||
{
|
||||
LOG_E("st7735 init failed!");
|
||||
// return ;
|
||||
}
|
||||
ST7735_LCD_Driver.FillRect(&st7735_pObj,0,0,160,80,BLACK);
|
||||
ST7735_LCD_Driver.ReadID(&st7735_pObj,&st7735_id);
|
||||
ST7735_LCD_Driver.DisplayOn(&st7735_pObj);
|
||||
LOG_D("lcd id:0X%08X", st7735_id);
|
||||
LOG_D("chip id:0X%08X", HAL_GetDEVID());
|
||||
|
||||
/* turn on the LCD backlight */
|
||||
lcd_pwm_dev = (struct rt_device_pwm *)rt_device_find(LCD_PWM_DEV_NAME);
|
||||
if (!lcd_pwm_dev)
|
||||
{
|
||||
LOG_E("lcd pwm pin init failed! can't find %s device!\n", LCD_SPI_DEVICE_NAME);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
/* pwm frequency:100K = 10000ns */
|
||||
rt_pwm_set(lcd_pwm_dev, LCD_PWM_DEV_CHANNEL, LCD_PWM_DEV_TIME, 5000);
|
||||
rt_pwm_enable(lcd_pwm_dev, LCD_PWM_DEV_CHANNEL);
|
||||
|
||||
ST7735_LCD_Driver.DrawBitmap(&st7735_pObj,0,0,WeActStudiologo);
|
||||
// ST7735_LCD_Driver.FillRGBRect(&st7735_pObj, 0, 0, (uint8_t *)image_rttlogo, 240, 69);
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(LCD_Init);
|
||||
|
||||
|
||||
void LCD_SetBrightness(uint32_t Brightness)
|
||||
{
|
||||
Brightness = ((Brightness >= LCD_PWM_DEV_TIME)?(LCD_PWM_DEV_TIME-1):Brightness);
|
||||
rt_pwm_set(lcd_pwm_dev, LCD_PWM_DEV_CHANNEL, LCD_PWM_DEV_TIME, Brightness);
|
||||
NowBrightness = Brightness;
|
||||
}
|
||||
|
||||
uint32_t LCD_GetBrightness(void)
|
||||
{
|
||||
return NowBrightness;
|
||||
}
|
||||
|
||||
uint16_t POINT_COLOR=0xFFFF; //画笔颜色
|
||||
uint16_t BACK_COLOR=BLACK; //背景色
|
||||
//在指定位置显示一个字符
|
||||
//x,y:起始坐标
|
||||
//num:要显示的字符:" "--->"~"
|
||||
//size:字体大小 12/16
|
||||
//mode:叠加方式(1)还是非叠加方式(0)
|
||||
|
||||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint8_t mode)
|
||||
{
|
||||
uint8_t temp,t1,t;
|
||||
uint16_t y0=y;
|
||||
uint16_t x0=x;
|
||||
uint16_t colortemp=POINT_COLOR;
|
||||
uint32_t h,w;
|
||||
|
||||
uint16_t write[size][size==12?6:8];
|
||||
uint16_t count;
|
||||
|
||||
ST7735_GetXSize(&st7735_pObj,&w);
|
||||
ST7735_GetYSize(&st7735_pObj,&h);
|
||||
|
||||
//设置窗口
|
||||
num=num-' ';//得到偏移后的值
|
||||
count = 0;
|
||||
|
||||
if(!mode) //非叠加方式
|
||||
{
|
||||
for(t=0;t<size;t++)
|
||||
{
|
||||
if(size==12)temp=asc2_1206[num][t]; //调用1206字体
|
||||
else temp=asc2_1608[num][t]; //调用1608字体
|
||||
|
||||
for(t1=0;t1<8;t1++)
|
||||
{
|
||||
if(temp&0x80)
|
||||
POINT_COLOR=(colortemp&0xFF)<<8|colortemp>>8;
|
||||
else
|
||||
POINT_COLOR=(BACK_COLOR&0xFF)<<8|BACK_COLOR>>8;
|
||||
|
||||
write[count][t/2]=POINT_COLOR;
|
||||
count ++;
|
||||
if(count >= size) count =0;
|
||||
|
||||
temp<<=1;
|
||||
y++;
|
||||
if(y>=h){POINT_COLOR=colortemp;return;}//超区域了
|
||||
if((y-y0)==size)
|
||||
{
|
||||
y=y0;
|
||||
x++;
|
||||
if(x>=w){POINT_COLOR=colortemp;return;}//超区域了
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else//叠加方式
|
||||
{
|
||||
for(t=0;t<size;t++)
|
||||
{
|
||||
if(size==12)temp=asc2_1206[num][t]; //调用1206字体
|
||||
else temp=asc2_1608[num][t]; //调用1608字体
|
||||
for(t1=0;t1<8;t1++)
|
||||
{
|
||||
if(temp&0x80)
|
||||
write[count][t/2]=(POINT_COLOR&0xFF)<<8|POINT_COLOR>>8;
|
||||
count ++;
|
||||
if(count >= size) count =0;
|
||||
|
||||
temp<<=1;
|
||||
y++;
|
||||
if(y>=h){POINT_COLOR=colortemp;return;}//超区域了
|
||||
if((y-y0)==size)
|
||||
{
|
||||
y=y0;
|
||||
x++;
|
||||
if(x>=w){POINT_COLOR=colortemp;return;}//超区域了
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
ST7735_FillRGBRect(&st7735_pObj,x0,y0,(uint8_t *)&write,size==12?6:8,size);
|
||||
POINT_COLOR=colortemp;
|
||||
}
|
||||
|
||||
//显示字符串
|
||||
//x,y:起点坐标
|
||||
//width,height:区域大小
|
||||
//size:字体大小
|
||||
//*p:字符串起始地址
|
||||
void LCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p)
|
||||
{
|
||||
uint8_t x0=x;
|
||||
width+=x;
|
||||
height+=y;
|
||||
while((*p<='~')&&(*p>=' '))//判断是不是非法字符!
|
||||
{
|
||||
if(x>=width){x=x0;y+=size;}
|
||||
if(y>=height)break;//退出
|
||||
LCD_ShowChar(x,y,*p,size,0);
|
||||
x+=size/2;
|
||||
p++;
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_FillRGBRect(uint32_t Xpos, uint32_t Ypos, uint8_t *pData, uint32_t Width, uint32_t Height)
|
||||
{
|
||||
ST7735_LCD_Driver.FillRGBRect(&st7735_pObj, Xpos, Ypos, pData, Width, Height);
|
||||
}
|
||||
|
||||
static int32_t lcd_init(void)
|
||||
{
|
||||
return ST7735_OK;
|
||||
}
|
||||
|
||||
static int32_t lcd_writereg(uint8_t reg,uint8_t* pdata,uint32_t length)
|
||||
{
|
||||
int32_t result;
|
||||
LCD_CS_RESET;
|
||||
LCD_RS_RESET;
|
||||
result = rt_spi_send(spi_dev_lcd, ®, 1);
|
||||
LCD_RS_SET;
|
||||
if(length > 0)
|
||||
result += rt_spi_send(spi_dev_lcd, pdata, length);
|
||||
LCD_CS_SET;
|
||||
return ((result == length+1)?0:-1);
|
||||
}
|
||||
|
||||
static int32_t lcd_readreg(uint8_t reg,uint8_t* pdata)
|
||||
{
|
||||
int32_t result;
|
||||
LCD_CS_RESET;
|
||||
LCD_RS_RESET;
|
||||
|
||||
result = rt_spi_send(spi_dev_lcd, ®, 1);
|
||||
LCD_RS_SET;
|
||||
result += rt_spi_recv(spi_dev_lcd, pdata, 1);
|
||||
LCD_CS_SET;
|
||||
return ((result == 2)?0:-1);
|
||||
}
|
||||
|
||||
static int32_t lcd_senddata(uint8_t* pdata,uint32_t length)
|
||||
{
|
||||
int32_t result;
|
||||
LCD_CS_RESET;
|
||||
//LCD_RS_SET;
|
||||
result =rt_spi_send(spi_dev_lcd, pdata, length);
|
||||
LCD_CS_SET;
|
||||
return ((result == length)?0:-1);
|
||||
}
|
||||
|
||||
static int32_t lcd_recvdata(uint8_t* pdata,uint32_t length)
|
||||
{
|
||||
int32_t result;
|
||||
LCD_CS_RESET;
|
||||
//LCD_RS_SET;
|
||||
result = rt_spi_recv(spi_dev_lcd, pdata, length);
|
||||
LCD_CS_SET;
|
||||
return ((result == length)?0:-1);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
#ifndef __LCD_H
|
||||
#define __LCD_H
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include "st7735.h"
|
||||
#include <stdio.h>
|
||||
|
||||
#define WHITE 0xFFFF
|
||||
#define BLACK 0x0000
|
||||
#define BLUE 0x001F
|
||||
#define BRED 0XF81F
|
||||
#define GRED 0XFFE0
|
||||
#define GBLUE 0X07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x7FFF
|
||||
#define YELLOW 0xFFE0
|
||||
#define BROWN 0XBC40 //×ØÉ«
|
||||
#define BRRED 0XFC07 //×غìÉ«
|
||||
#define GRAY 0X8430 //»ÒÉ«
|
||||
#define DARKBLUE 0X01CF //ÉîÀ¶É«
|
||||
#define LIGHTBLUE 0X7D7C //dzÀ¶É«
|
||||
#define GRAYBLUE 0X5458 //»ÒÀ¶É«
|
||||
|
||||
extern ST7735_Object_t st7735_pObj;
|
||||
extern uint32_t st7735_id;
|
||||
|
||||
extern uint16_t POINT_COLOR; //»±ÊÑÕÉ«
|
||||
extern uint16_t BACK_COLOR; //±³¾°É«
|
||||
|
||||
|
||||
void LCD_SetBrightness(uint32_t Brightness);
|
||||
uint32_t LCD_GetBrightness(void);
|
||||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint8_t mode);
|
||||
void LCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p);
|
||||
void LCD_FillRGBRect(uint32_t Xpos, uint32_t Ypos, uint8_t *pData, uint32_t Width, uint32_t Height);
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
2072
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/rttlogo.h
Normal file
2072
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/rttlogo.h
Normal file
File diff suppressed because it is too large
Load Diff
1088
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/st7735.c
Normal file
1088
bsp/stm32/stm32h750-weact-ministm32h7xx/board/ports/st7735/st7735.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,198 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file st7735.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for the st7735.c
|
||||
* driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef ST7735_H
|
||||
#define ST7735_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "st7735_reg.h"
|
||||
#include <stddef.h>
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup Components
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735 ST7735
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef int32_t (*ST7735_Init_Func) (void);
|
||||
typedef int32_t (*ST7735_DeInit_Func) (void);
|
||||
typedef int32_t (*ST7735_GetTick_Func) (void);
|
||||
typedef int32_t (*ST7735_Delay_Func) (uint32_t);
|
||||
typedef int32_t (*ST7735_WriteReg_Func) (uint8_t, uint8_t*, uint32_t);
|
||||
typedef int32_t (*ST7735_ReadReg_Func) (uint8_t, uint8_t*);
|
||||
typedef int32_t (*ST7735_SendData_Func) (uint8_t*, uint32_t);
|
||||
typedef int32_t (*ST7735_RecvData_Func) (uint8_t*, uint32_t);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
ST7735_Init_Func Init;
|
||||
ST7735_DeInit_Func DeInit;
|
||||
uint16_t Address;
|
||||
ST7735_WriteReg_Func WriteReg;
|
||||
ST7735_ReadReg_Func ReadReg;
|
||||
ST7735_SendData_Func SendData;
|
||||
ST7735_RecvData_Func RecvData;
|
||||
ST7735_GetTick_Func GetTick;
|
||||
} ST7735_IO_t;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
ST7735_IO_t IO;
|
||||
st7735_ctx_t Ctx;
|
||||
uint8_t IsInitialized;
|
||||
} ST7735_Object_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Control functions */
|
||||
int32_t (*Init )(ST7735_Object_t*, uint32_t, uint32_t);
|
||||
int32_t (*DeInit )(ST7735_Object_t*);
|
||||
int32_t (*ReadID )(ST7735_Object_t*, uint32_t*);
|
||||
int32_t (*DisplayOn )(ST7735_Object_t*);
|
||||
int32_t (*DisplayOff )(ST7735_Object_t*);
|
||||
int32_t (*SetBrightness )(ST7735_Object_t*, uint32_t);
|
||||
int32_t (*GetBrightness )(ST7735_Object_t*, uint32_t*);
|
||||
int32_t (*SetOrientation )(ST7735_Object_t*, uint32_t);
|
||||
int32_t (*GetOrientation )(ST7735_Object_t*, uint32_t*);
|
||||
|
||||
/* Drawing functions*/
|
||||
int32_t ( *SetCursor ) (ST7735_Object_t*, uint32_t, uint32_t);
|
||||
int32_t ( *DrawBitmap ) (ST7735_Object_t*, uint32_t, uint32_t, uint8_t *);
|
||||
int32_t ( *FillRGBRect ) (ST7735_Object_t*, uint32_t, uint32_t, uint8_t*, uint32_t, uint32_t);
|
||||
int32_t ( *DrawHLine ) (ST7735_Object_t*, uint32_t, uint32_t, uint32_t, uint32_t);
|
||||
int32_t ( *DrawVLine ) (ST7735_Object_t*, uint32_t, uint32_t, uint32_t, uint32_t);
|
||||
int32_t ( *FillRect ) (ST7735_Object_t*, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
|
||||
int32_t ( *GetPixel ) (ST7735_Object_t*, uint32_t, uint32_t, uint32_t*);
|
||||
int32_t ( *SetPixel ) (ST7735_Object_t*, uint32_t, uint32_t, uint32_t);
|
||||
int32_t ( *GetXSize ) (ST7735_Object_t*, uint32_t *);
|
||||
int32_t ( *GetYSize ) (ST7735_Object_t*, uint32_t *);
|
||||
|
||||
}ST7735_LCD_Drv_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ST7735 Size
|
||||
*/
|
||||
#define ST7735_OK (0)
|
||||
#define ST7735_ERROR (-1)
|
||||
|
||||
/**
|
||||
* @brief ST7735 ID
|
||||
*/
|
||||
#define ST7735_ID 0x5CU
|
||||
|
||||
/**
|
||||
* @brief ST7735 Size
|
||||
*/
|
||||
#define ST7735_WIDTH 80U
|
||||
#define ST7735_HEIGHT 160U
|
||||
|
||||
/**
|
||||
* @brief LCD_OrientationTypeDef
|
||||
* Possible values of Display Orientation
|
||||
*/
|
||||
#define ST7735_ORIENTATION_PORTRAIT 0x00U /* Portrait orientation choice of LCD screen */
|
||||
#define ST7735_ORIENTATION_PORTRAIT_ROT180 0x01U /* Portrait rotated 180° orientation choice of LCD screen */
|
||||
#define ST7735_ORIENTATION_LANDSCAPE 0x02U /* Landscape orientation choice of LCD screen */
|
||||
#define ST7735_ORIENTATION_LANDSCAPE_ROT180 0x03U /* Landscape rotated 180° orientation choice of LCD screen */
|
||||
|
||||
/**
|
||||
* @brief Possible values of pixel data format (ie color coding)
|
||||
*/
|
||||
#define ST7735_FORMAT_RBG444 0x03U /* Pixel format chosen is RGB444 : 12 bpp */
|
||||
#define ST7735_FORMAT_RBG565 0x05U /* Pixel format chosen is RGB565 : 16 bpp */
|
||||
#define ST7735_FORMAT_RBG666 0x06U /* Pixel format chosen is RGB666 : 18 bpp */
|
||||
#define ST7735_FORMAT_DEFAULT ST7735_FORMAT_RBG565
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t ST7735_RegisterBusIO (ST7735_Object_t *pObj, ST7735_IO_t *pIO);
|
||||
int32_t ST7735_Init(ST7735_Object_t *pObj, uint32_t ColorCoding, uint32_t Orientation);
|
||||
int32_t ST7735_DeInit(ST7735_Object_t *pObj);
|
||||
int32_t ST7735_ReadID(ST7735_Object_t *pObj, uint32_t *Id);
|
||||
int32_t ST7735_DisplayOn(ST7735_Object_t *pObj);
|
||||
int32_t ST7735_DisplayOff(ST7735_Object_t *pObj);
|
||||
int32_t ST7735_SetBrightness(ST7735_Object_t *pObj, uint32_t Brightness);
|
||||
int32_t ST7735_GetBrightness(ST7735_Object_t *pObj, uint32_t *Brightness);
|
||||
int32_t ST7735_SetOrientation(ST7735_Object_t *pObj, uint32_t Orientation);
|
||||
int32_t ST7735_GetOrientation(ST7735_Object_t *pObj, uint32_t *Orientation);
|
||||
|
||||
int32_t ST7735_SetCursor(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos);
|
||||
int32_t ST7735_DrawBitmap(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint8_t *pBmp);
|
||||
int32_t ST7735_FillRGBRect(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint8_t *pData, uint32_t Width, uint32_t Height);
|
||||
int32_t ST7735_DrawHLine(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
|
||||
int32_t ST7735_DrawVLine(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
|
||||
int32_t ST7735_FillRect(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint32_t Width, uint32_t Height, uint32_t Color);
|
||||
int32_t ST7735_SetPixel(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint32_t Color);
|
||||
int32_t ST7735_GetPixel(ST7735_Object_t *pObj, uint32_t Xpos, uint32_t Ypos, uint32_t *Color);
|
||||
int32_t ST7735_GetXSize(ST7735_Object_t *pObj, uint32_t *XSize);
|
||||
int32_t ST7735_GetYSize(ST7735_Object_t *pObj, uint32_t *YSize);
|
||||
|
||||
extern ST7735_LCD_Drv_t ST7735_LCD_Driver;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ST7735_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,104 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file st7735_reg.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes the LCD driver for st7735 LCD.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "st7735_reg.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup Components
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ST7735_REG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ST7735_REG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Read ST7735 register
|
||||
* @param ctx Component context
|
||||
* @param reg Register to read
|
||||
* @param pdata data to read from the register
|
||||
* @retval Component status
|
||||
*/
|
||||
int32_t st7735_read_reg(st7735_ctx_t *ctx, uint8_t reg, uint8_t *pdata)
|
||||
{
|
||||
return ctx->ReadReg(ctx->handle, reg, pdata);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write ST7735 register
|
||||
* @param ctx Component context
|
||||
* @param reg Register to write
|
||||
* @param pdata data to write to the register
|
||||
* @param length length of data to write to the register
|
||||
* @retval Component status
|
||||
*/
|
||||
int32_t st7735_write_reg(st7735_ctx_t *ctx, uint8_t reg, uint8_t *pdata, uint32_t length)
|
||||
{
|
||||
return ctx->WriteReg(ctx->handle, reg, pdata, length);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data
|
||||
* @param ctx Component context
|
||||
* @param pdata data to write
|
||||
* @param length length of data to write
|
||||
* @retval Component status
|
||||
*/
|
||||
int32_t st7735_send_data(st7735_ctx_t *ctx, uint8_t *pdata, uint32_t length)
|
||||
{
|
||||
return ctx->SendData(ctx->handle, pdata, length);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Recieve data
|
||||
* @param ctx Component context
|
||||
* @param pdata data to read
|
||||
* @param length length of data to read
|
||||
* @retval Component status
|
||||
*/
|
||||
int32_t st7735_recv_data(st7735_ctx_t *ctx, uint8_t *pdata, uint32_t length)
|
||||
{
|
||||
return ctx->RecvData(ctx->handle, pdata, length);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,162 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file st7735_reg.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for the st7735_regs.c
|
||||
* driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef ST7735_REG_H
|
||||
#define ST7735_REG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include <stdint.h>
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup Components
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_REG ST7735 Registers
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_REG_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ST7735 Registers
|
||||
*/
|
||||
#define ST7735_NOP 0x00U /* No Operation: NOP */
|
||||
#define ST7735_SW_RESET 0x01U /* Software reset: SWRESET */
|
||||
#define ST7735_READ_ID 0x04U /* Read Display ID: RDDID */
|
||||
#define ST7735_READ_STATUS 0x09U /* Read Display Statu: RDDST */
|
||||
#define ST7735_READ_POWER_MODE 0x0AU /* Read Display Power: RDDPM */
|
||||
#define ST7735_READ_MADCTL 0x0BU /* Read Display: RDDMADCTL */
|
||||
#define ST7735_READ_PIXEL_FORMAT 0x0CU /* Read Display Pixel: RDDCOLMOD */
|
||||
#define ST7735_READ_IMAGE_MODE 0x0DU /* Read Display Image: RDDIM */
|
||||
#define ST7735_READ_SIGNAL_MODE 0x0EU /* Read Display Signal: RDDSM */
|
||||
#define ST7735_SLEEP_IN 0x10U /* Sleep in & booster off: SLPIN */
|
||||
#define ST7735_SLEEP_OUT 0x11U /* Sleep out & booster on: SLPOUT */
|
||||
#define ST7735_PARTIAL_DISPLAY_ON 0x12U /* Partial mode on: PTLON */
|
||||
#define ST7735_NORMAL_DISPLAY_OFF 0x13U /* Partial off (Normal): NORON */
|
||||
#define ST7735_DISPLAY_INVERSION_OFF 0x20U /* Display inversion off: INVOFF */
|
||||
#define ST7735_DISPLAY_INVERSION_ON 0x21U /* Display inversion on: INVON */
|
||||
#define ST7735_GAMMA_SET 0x26U /* Gamma curve select: GAMSET */
|
||||
#define ST7735_DISPLAY_OFF 0x28U /* Display off: DISPOFF */
|
||||
#define ST7735_DISPLAY_ON 0x29U /* Display on: DISPON */
|
||||
#define ST7735_CASET 0x2AU /* Column address set: CASET */
|
||||
#define ST7735_RASET 0x2BU /* Row address set: RASET */
|
||||
#define ST7735_WRITE_RAM 0x2CU /* Memory write: RAMWR */
|
||||
#define ST7735_RGBSET 0x2DU /* LUT for 4k,65k,262k color: RGBSET */
|
||||
#define ST7735_READ_RAM 0x2EU /* Memory read: RAMRD */
|
||||
#define ST7735_PTLAR 0x30U /* Partial start/end address set: PTLAR */
|
||||
#define ST7735_TE_LINE_OFF 0x34U /* Tearing effect line off: TEOFF */
|
||||
#define ST7735_TE_LINE_ON 0x35U /* Tearing effect mode set & on: TEON */
|
||||
#define ST7735_MADCTL 0x36U /* Memory data access control: MADCTL */
|
||||
#define ST7735_IDLE_MODE_OFF 0x38U /* Idle mode off: IDMOFF */
|
||||
#define ST7735_IDLE_MODE_ON 0x39U /* Idle mode on: IDMON */
|
||||
#define ST7735_COLOR_MODE 0x3AU /* Interface pixel format: COLMOD */
|
||||
#define ST7735_FRAME_RATE_CTRL1 0xB1U /* In normal mode (Full colors): FRMCTR1 */
|
||||
#define ST7735_FRAME_RATE_CTRL2 0xB2U /* In Idle mode (8-colors): FRMCTR2 */
|
||||
#define ST7735_FRAME_RATE_CTRL3 0xB3U /* In partial mode + Full colors: FRMCTR3 */
|
||||
#define ST7735_FRAME_INVERSION_CTRL 0xB4U /* Display inversion control: INVCTR */
|
||||
#define ST7735_DISPLAY_SETTING 0xB6U /* Display function setting */
|
||||
#define ST7735_PWR_CTRL1 0xC0U /* Power control setting: PWCTR1 */
|
||||
#define ST7735_PWR_CTRL2 0xC1U /* Power control setting: PWCTR2 */
|
||||
#define ST7735_PWR_CTRL3 0xC2U /* In normal mode (Full colors): PWCTR3 */
|
||||
#define ST7735_PWR_CTRL4 0xC3U /* In Idle mode (8-colors): PWCTR4 */
|
||||
#define ST7735_PWR_CTRL5 0xC4U /* In partial mode + Full colors: PWCTR5 */
|
||||
#define ST7735_VCOMH_VCOML_CTRL1 0xC5U /* VCOM control 1: VMCTR1 */
|
||||
#define ST7735_VMOF_CTRL 0xC7U /* Set VCOM offset control: VMOFCTR */
|
||||
#define ST7735_WRID2 0xD1U /* Set LCM version code: WRID2 */
|
||||
#define ST7735_WRID3 0xD2U /* Customer Project code: WRID3 */
|
||||
#define ST7735_NV_CTRL1 0xD9U /* NVM control status: NVCTR1 */
|
||||
#define ST7735_READ_ID1 0xDAU /* Read ID1: RDID1 */
|
||||
#define ST7735_READ_ID2 0xDBU /* Read ID2: RDID2 */
|
||||
#define ST7735_READ_ID3 0xDCU /* Read ID3: RDID3 */
|
||||
#define ST7735_NV_CTRL2 0xDEU /* NVM Read Command: NVCTR2 */
|
||||
#define ST7735_NV_CTRL3 0xDFU /* NVM Write Command: NVCTR3 */
|
||||
#define ST7735_PV_GAMMA_CTRL 0xE0U /* Set Gamma adjustment (+ polarity): GAMCTRP1 */
|
||||
#define ST7735_NV_GAMMA_CTRL 0xE1U /* Set Gamma adjustment (- polarity): GAMCTRN1 */
|
||||
#define ST7735_EXT_CTRL 0xF0U /* Extension command control */
|
||||
#define ST7735_PWR_CTRL6 0xFCU /* In partial mode + Idle mode: PWCTR6 */
|
||||
#define ST7735_VCOM4_LEVEL 0xFFU /* VCOM 4 level control */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_REG_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef int32_t (*ST7735_Write_Func)(void *, uint8_t, uint8_t*, uint32_t);
|
||||
typedef int32_t (*ST7735_Read_Func) (void *, uint8_t, uint8_t*);
|
||||
typedef int32_t (*ST7735_Send_Func) (void *, uint8_t*, uint32_t);
|
||||
typedef int32_t (*ST7735_Recv_Func) (void *, uint8_t*, uint32_t);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
ST7735_Write_Func WriteReg;
|
||||
ST7735_Read_Func ReadReg;
|
||||
ST7735_Send_Func SendData;
|
||||
ST7735_Recv_Func RecvData;
|
||||
void *handle;
|
||||
} st7735_ctx_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ST7735_REG_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t st7735_write_reg(st7735_ctx_t *ctx, uint8_t reg, uint8_t *pdata, uint32_t length);
|
||||
int32_t st7735_read_reg(st7735_ctx_t *ctx, uint8_t reg, uint8_t *pdata);
|
||||
int32_t st7735_send_data(st7735_ctx_t *ctx, uint8_t *pdata, uint32_t length);
|
||||
int32_t st7735_recv_data(st7735_ctx_t *ctx, uint8_t *pdata, uint32_t length);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ST7735_REG_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
BIN
bsp/stm32/stm32h750-weact-ministm32h7xx/figures/board.jpg
Normal file
BIN
bsp/stm32/stm32h750-weact-ministm32h7xx/figures/board.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 496 KiB |
2329
bsp/stm32/stm32h750-weact-ministm32h7xx/project.ewp
Normal file
2329
bsp/stm32/stm32h750-weact-ministm32h7xx/project.ewp
Normal file
File diff suppressed because it is too large
Load Diff
10
bsp/stm32/stm32h750-weact-ministm32h7xx/project.eww
Normal file
10
bsp/stm32/stm32h750-weact-ministm32h7xx/project.eww
Normal file
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
184
bsp/stm32/stm32h750-weact-ministm32h7xx/project.uvoptx
Normal file
184
bsp/stm32/stm32h750-weact-ministm32h7xx/project.uvoptx
Normal file
@@ -0,0 +1,184 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>18</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U59700618 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD20000000 -FC8000 -FN1 -FF0STM32H750VB_W25Qxx_WeActStudio -FS090000000 -FL01000000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC8000 -FD20000000 -FF0STM32H7x_2048 -FL0200000 -FS08000000 -FP0($$Device:STM32H743IIKx$CMSIS\Flash\STM32H7x_2048.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>1</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
1229
bsp/stm32/stm32h750-weact-ministm32h7xx/project.uvprojx
Normal file
1229
bsp/stm32/stm32h750-weact-ministm32h7xx/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
215
bsp/stm32/stm32h750-weact-ministm32h7xx/rtconfig.h
Normal file
215
bsp/stm32/stm32h750-weact-ministm32h7xx/rtconfig.h
Normal file
@@ -0,0 +1,215 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_MEMHEAP_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40003
|
||||
#define ARCH_ARM
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M7
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 4
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 4
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_PWM
|
||||
#define RT_USING_MTD_NOR
|
||||
#define RT_USING_SPI
|
||||
#define RT_USING_QSPI
|
||||
#define RT_USING_SFUD
|
||||
#define RT_SFUD_USING_SFDP
|
||||
#define RT_SFUD_USING_FLASH_INFO_TABLE
|
||||
#define RT_SFUD_USING_QSPI
|
||||
#define RT_SFUD_SPI_MAX_HZ 50000000
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_POSIX
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
#define PKG_USING_FAL
|
||||
#define FAL_DEBUG_CONFIG
|
||||
#define FAL_DEBUG 1
|
||||
#define FAL_PART_HAS_TABLE_CFG
|
||||
#define FAL_USING_SFUD_PORT
|
||||
#define FAL_USING_NOR_FLASH_DEV_NAME "W25Q64"
|
||||
#define PKG_USING_FAL_V00500
|
||||
#define PKG_FAL_VER_NUM 0x00500
|
||||
#define PKG_USING_LITTLEFS
|
||||
#define PKG_USING_LITTLEFS_V205
|
||||
#define LFS_READ_SIZE 256
|
||||
#define LFS_PROG_SIZE 256
|
||||
#define LFS_BLOCK_SIZE 4096
|
||||
#define LFS_CACHE_SIZE 256
|
||||
#define LFS_BLOCK_CYCLES 100
|
||||
#define LFS_LOOKAHEAD_MAX 128
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
#define BSP_USING_SPI1
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
#define SOC_FAMILY_STM32
|
||||
#define SOC_SERIES_STM32H7
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_STM32H750VBT6
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_SPI_FLASH
|
||||
#define BSP_USING_QSPI_FLASH
|
||||
#define BSP_USING_LCD_SPI
|
||||
#define LCD_BACKLIGHT_USING_PWM
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
#define BSP_USING_QSPI
|
||||
#define BSP_USING_SPI
|
||||
#define BSP_USING_SPI4
|
||||
#define BSP_USING_PWM
|
||||
#define BSP_USING_PWM1
|
||||
#define BSP_USING_PWM1_CH2
|
||||
#define BSP_USING_ON_CHIP_FLASH
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
151
bsp/stm32/stm32h750-weact-ministm32h7xx/rtconfig.py
Normal file
151
bsp/stm32/stm32h750-weact-ministm32h7xx/rtconfig.py
Normal file
@@ -0,0 +1,151 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m7'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M7.fp.sp'
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M7'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv5_sp'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M7'
|
||||
AFLAGS += ' --fpu VFPv5_sp'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
2074
bsp/stm32/stm32h750-weact-ministm32h7xx/template.ewp
Normal file
2074
bsp/stm32/stm32h750-weact-ministm32h7xx/template.ewp
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user