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1. [bsp] tm4c129x update TivaWare to 2.1.4.178
This commit is contained in:
@@ -35,14 +35,14 @@ extern uint32_t SysClock;
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// </RDTConfigurator>
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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extern int Image$$RW_IRAM$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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extern int _ebss;
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#define HEAP_BEGIN ((void *)&_ebss)
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#endif
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#define HEAP_END (0x20000000 + 256*1024)
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@@ -2,7 +2,7 @@
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//
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// adc.c - Driver for the ADC.
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//
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// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
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// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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@@ -33,7 +33,7 @@
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
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// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
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//
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//*****************************************************************************
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@@ -78,7 +78,7 @@
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// sequencers.
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//
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//*****************************************************************************
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static uint8_t g_pui8OversampleFactor[3];
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static uint8_t g_pui8OversampleFactor[2][3];
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//*****************************************************************************
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//
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@@ -107,7 +107,7 @@ _ADCIntNumberGet(uint32_t ui32Base, uint32_t ui32SequenceNum)
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{
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ui8Int = ((ui32Base == ADC0_BASE) ?
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(INT_ADC0SS0_TM4C123 + ui32SequenceNum) :
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(INT_ADC0SS0_TM4C123 + ui32SequenceNum));
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(INT_ADC1SS0_TM4C123 + ui32SequenceNum));
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}
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else if(CLASS_IS_TM4C129)
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{
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@@ -502,6 +502,8 @@ void
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ADCSequenceConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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uint32_t ui32Trigger, uint32_t ui32Priority)
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{
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uint32_t ui32Gen;
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//
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// Check the arugments.
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//
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@@ -545,11 +547,18 @@ ADCSequenceConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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//
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// Set the source PWM module for this sequence's PWM triggers.
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//
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ui32SequenceNum *= 2;
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HWREG(ui32Base + ADC_O_TSSEL) = ((HWREG(ui32Base + ADC_O_TSSEL) &
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~(0x30 << ui32SequenceNum)) |
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((ui32Trigger & 0x30) <<
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ui32SequenceNum));
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ui32Gen = ui32Trigger & 0x0f;
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if(ui32Gen >= ADC_TRIGGER_PWM0 && ui32Gen <= ADC_TRIGGER_PWM3)
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{
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//
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// Set the shift for the module and generator
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//
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ui32Gen = (ui32Gen - ADC_TRIGGER_PWM0) * 8;
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HWREG(ui32Base + ADC_O_TSSEL) = ((HWREG(ui32Base + ADC_O_TSSEL) &
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~(0x30 << ui32Gen)) |
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((ui32Trigger & 0x30) << ui32Gen));
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}
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}
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//*****************************************************************************
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@@ -924,6 +933,7 @@ ADCSoftwareOversampleConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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uint32_t ui32Factor)
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{
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uint32_t ui32Value;
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uint32_t ui32ADCInst;
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//
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// Check the arguments.
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@@ -941,10 +951,22 @@ ADCSoftwareOversampleConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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{
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}
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//
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// Evaluate the ADC Instance.
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//
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if(ui32Base == ADC0_BASE)
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{
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ui32ADCInst = 0;
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}
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else
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{
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ui32ADCInst = 1;
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}
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//
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// Save the shift factor.
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//
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g_pui8OversampleFactor[ui32SequenceNum] = ui32Value;
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g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum] = ui32Value;
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}
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//*****************************************************************************
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@@ -968,14 +990,30 @@ void
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ADCSoftwareOversampleStepConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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uint32_t ui32Step, uint32_t ui32Config)
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{
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uint32_t ui32ADCInst;
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//
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// Evaluate the ADC Instance.
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//
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if(ui32Base == ADC0_BASE)
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{
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ui32ADCInst = 0;
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}
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else
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{
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ui32ADCInst = 1;
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}
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//
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// Check the arguments.
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//
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ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE));
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ASSERT(ui32SequenceNum < 3);
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ASSERT(((ui32SequenceNum == 0) &&
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(ui32Step < (8 >> g_pui8OversampleFactor[ui32SequenceNum]))) ||
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(ui32Step < (4 >> g_pui8OversampleFactor[ui32SequenceNum])));
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(ui32Step <
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(8 >> g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum]))) ||
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(ui32Step <
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(4 >> g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum])));
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//
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// Get the offset of the sequence to be configured.
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@@ -985,13 +1023,14 @@ ADCSoftwareOversampleStepConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
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//
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// Compute the shift for the bits that control this step.
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//
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ui32Step *= 4 << g_pui8OversampleFactor[ui32SequenceNum];
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ui32Step *= 4 << g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum];
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//
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// Loop through the hardware steps that make up this step of the software
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// oversampled sequence.
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//
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for(ui32SequenceNum = 1 << g_pui8OversampleFactor[ui32SequenceNum];
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for(ui32SequenceNum =
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(1 << g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum]);
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ui32SequenceNum; ui32SequenceNum--)
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{
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//
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@@ -1054,6 +1093,20 @@ ADCSoftwareOversampleDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum,
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uint32_t *pui32Buffer, uint32_t ui32Count)
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{
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uint32_t ui32Idx, ui32Accum;
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uint32_t ui32ADCInst;
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//
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// Evaluate the ADC Instance.
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//
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if(ui32Base == ADC0_BASE)
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{
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ui32ADCInst = 0;
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}
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else
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{
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ui32ADCInst = 1;
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}
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//
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// Check the arguments.
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@@ -1061,8 +1114,10 @@ ADCSoftwareOversampleDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum,
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ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE));
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ASSERT(ui32SequenceNum < 3);
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ASSERT(((ui32SequenceNum == 0) &&
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(ui32Count < (8 >> g_pui8OversampleFactor[ui32SequenceNum]))) ||
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(ui32Count < (4 >> g_pui8OversampleFactor[ui32SequenceNum])));
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(ui32Count <
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(8 >> g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum]))) ||
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(ui32Count <
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(4 >> g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum])));
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//
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// Get the offset of the sequence to be read.
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@@ -1078,8 +1133,8 @@ ADCSoftwareOversampleDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum,
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// Compute the sum of the samples.
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//
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ui32Accum = 0;
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for(ui32Idx = 1 << g_pui8OversampleFactor[ui32SequenceNum]; ui32Idx;
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ui32Idx--)
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for(ui32Idx = 1 << g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum];
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ui32Idx; ui32Idx--)
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{
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//
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// Read the FIFO and add it to the accumulator.
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@@ -1090,7 +1145,8 @@ ADCSoftwareOversampleDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum,
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//
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// Write the averaged sample to the output buffer.
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//
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*pui32Buffer++ = ui32Accum >> g_pui8OversampleFactor[ui32SequenceNum];
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*pui32Buffer++ =
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ui32Accum >> g_pui8OversampleFactor[ui32ADCInst][ui32SequenceNum];
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}
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}
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@@ -1605,7 +1661,12 @@ ADCIntStatusEx(uint32_t ui32Base, bool bMasked)
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void
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ADCIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
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{
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HWREG(ui32Base + ADC_O_ISC) |= ui32IntFlags;
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//
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// Note: The interrupt bits are "W1C" so we DO NOT use a logical OR
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// here to clear the requested bits. Doing so would clear all outstanding
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// interrupts rather than just those which the caller has specified.
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//
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HWREG(ui32Base + ADC_O_ISC) = ui32IntFlags;
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}
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//*****************************************************************************
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@@ -1616,12 +1677,10 @@ ADCIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
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//! \param ui32Ref is the reference to use.
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//!
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//! The ADC reference is set as specified by \e ui32Ref. It must be one of
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//! \b ADC_REF_INT, \b ADC_REF_EXT_3V, or \b ADC_REF_EXT_1V for internal or
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//! external reference. If \b ADC_REF_INT is chosen, then an internal 3V
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//! reference is used and no external reference is needed. If
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//! \b ADC_REF_EXT_3V is chosen, then a 3V reference must be supplied to the
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//! AVREF pin. If \b ADC_REF_EXT_1V is chosen, then a 1V external reference
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//! must be supplied to the AVREF pin.
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//! \b ADC_REF_INT, or \b ADC_REF_EXT_3V for internal or external reference
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//! If \b ADC_REF_INT is chosen, then an internal 3V reference is used and
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//! no external reference is needed. If \b ADC_REF_EXT_3V is chosen, then
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//! a 3V reference must be supplied to the AVREF pin.
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//!
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//! \note The ADC reference can only be selected on parts that have an external
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//! reference. Consult the data sheet for your part to determine if there is
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@@ -1637,8 +1696,7 @@ ADCReferenceSet(uint32_t ui32Base, uint32_t ui32Ref)
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// Check the arguments.
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//
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ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE));
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ASSERT((ui32Ref == ADC_REF_INT) || (ui32Ref == ADC_REF_EXT_3V) ||
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(ui32Ref == ADC_REF_EXT_1V));
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ASSERT((ui32Ref == ADC_REF_INT) || (ui32Ref == ADC_REF_EXT_3V));
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//
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// Set the reference.
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@@ -1654,7 +1712,7 @@ ADCReferenceSet(uint32_t ui32Base, uint32_t ui32Ref)
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//! \param ui32Base is the base address of the ADC module.
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//!
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//! Returns the value of the ADC reference setting. The returned value is one
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//! of \b ADC_REF_INT, \b ADC_REF_EXT_3V, or \b ADC_REF_EXT_1V.
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//! of \b ADC_REF_INT, or \b ADC_REF_EXT_3V.
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//!
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//! \note The value returned by this function is only meaningful if used on a
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//! part that is capable of using an external reference. Consult the data
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@@ -1919,18 +1977,14 @@ ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config,
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//
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// Check the argument.
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//
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ASSERT(ui32Base == ADC0_BASE);
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ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE));
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ASSERT((ui32ClockDiv - 1) <= (ADC_CC_CLKDIV_M >> ADC_CC_CLKDIV_S));
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//
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// A rate must be supplied.
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//
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ASSERT((ui32Config & ADC_CLOCK_RATE_FULL) != 0);
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//
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// Clock must be valid divider.
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//
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ASSERT(((ui32ClockDiv - 1) & ~ADC_CC_CLKDIV_M) == 0);
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//
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// Write the sample conversion rate.
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//
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@@ -1982,7 +2036,7 @@ ADCClockConfigGet(uint32_t ui32Base, uint32_t *pui32ClockDiv)
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//
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// Check the argument.
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//
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ASSERT(ui32Base == ADC0_BASE);
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ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE));
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//
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// Read the current configuration.
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@@ -2006,7 +2060,7 @@ ADCClockConfigGet(uint32_t ui32Base, uint32_t *pui32ClockDiv)
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//
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// Add in the sample interval to the configuration.
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//
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ui32Config = (HWREG(ui32Base + ADC_O_PC) & ADC_PC_SR_M) << 4;
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ui32Config |= (HWREG(ui32Base + ADC_O_PC) & ADC_PC_SR_M) << 4;
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return(ui32Config);
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}
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@@ -2,7 +2,7 @@
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//
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// adc.h - ADC headers for using the ADC driver functions.
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//
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// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
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// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
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//
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//*****************************************************************************
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@@ -206,7 +206,6 @@ extern "C"
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//*****************************************************************************
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#define ADC_REF_INT 0x00000000 // Internal reference
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#define ADC_REF_EXT_3V 0x00000001 // External 3V reference
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#define ADC_REF_EXT_1V 0x00000003 // External 1V reference
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//*****************************************************************************
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//
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@@ -2,7 +2,7 @@
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//
|
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// aes.c - Driver for the AES module.
|
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//
|
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// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
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@@ -2,7 +2,7 @@
|
||||
//
|
||||
// aes.h - Defines and Macros for the AES module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// can.c - Driver for the CAN module.
|
||||
//
|
||||
// Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// can.h - Defines and Macros for the CAN controller.
|
||||
//
|
||||
// Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// comp.c - Driver for the analog comparator.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// comp.h - Prototypes for the analog comparator driver.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
// cpu.c - Instruction wrappers for special CPU instructions needed by the
|
||||
// drivers.
|
||||
//
|
||||
// Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// cpu.h - Prototypes for the CPU instruction wrapper functions.
|
||||
//
|
||||
// Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// crc.c - Driver for the CRC module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// crc.h - Defines and Macros for CRC module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -65,7 +65,7 @@ extern "C"
|
||||
#define CRC_CFG_RESINV 0x00000200 // Result Inverse Enable
|
||||
#define CRC_CFG_OBR 0x00000100 // Output Reverse Enable
|
||||
#define CRC_CFG_IBR 0x00000080 // Bit reverse enable
|
||||
#define CRC_CFG_ENDIAN_SBHW 0x00000000 // Swap byte in half-word
|
||||
#define CRC_CFG_ENDIAN_SBHW 0x00000020 // Swap byte in half-word
|
||||
#define CRC_CFG_ENDIAN_SHW 0x00000010 // Swap half-word
|
||||
#define CRC_CFG_TYPE_P8005 0x00000000 // Polynomial 0x8005
|
||||
#define CRC_CFG_TYPE_P1021 0x00000001 // Polynomial 0x1021
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// debug.h - Macros for assisting debug of the driver library.
|
||||
//
|
||||
// Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// des.c - Driver for the DES data transformation.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// des.h - Defines and Macros for the DES module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// eeprom.c - Driver for programming the on-chip EEPROM.
|
||||
//
|
||||
// Copyright (c) 2010-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2010-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// eeprom.h - Prototypes for the EEPROM driver.
|
||||
//
|
||||
// Copyright (c) 2010-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2010-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
// emac.c - Driver for the Integrated Ethernet Controller on Snowflake-class
|
||||
// Tiva devices.
|
||||
//
|
||||
// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2013-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -161,7 +161,8 @@
|
||||
// masked (or enabled) via the DMAIM register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EMAC_NON_MASKED_INTS (EMAC_DMARIS_TT | \
|
||||
#define EMAC_NON_MASKED_INTS (EMAC_DMARIS_LPI | \
|
||||
EMAC_DMARIS_TT | \
|
||||
EMAC_DMARIS_PMT | \
|
||||
EMAC_DMARIS_MMC)
|
||||
|
||||
@@ -207,6 +208,14 @@ g_pi16MIIClockDiv[] =
|
||||
#define NUM_CLOCK_DIVISORS (sizeof(g_pi16MIIClockDiv) / \
|
||||
sizeof(g_pi16MIIClockDiv[0]))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The define for accessing PHY registers in the MMD address space.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DEV_ADDR(x) ((x & 0xF000) >> 12)
|
||||
#define REG_ADDR(x) ((x & 0x0FFF))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Initializes the Ethernet MAC and sets bus-related DMA parameters.
|
||||
@@ -2917,7 +2926,6 @@ EMACPHYRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint8_t ui8RegAddr)
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_MIIADDR) =
|
||||
((HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_CR_M) |
|
||||
EMAC_MIIADDR_CR_100_150 |
|
||||
(ui8RegAddr << EMAC_MIIADDR_MII_S) |
|
||||
(ui8PhyAddr << EMAC_MIIADDR_PLA_S) | EMAC_MIIADDR_MIIB);
|
||||
|
||||
@@ -4682,6 +4690,291 @@ EMACPowerManagementStatusGet(uint32_t ui32Base)
|
||||
EMAC_PMTCTLSTAT_PWRDWN));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the wake-on-LAN feature of the MAC controller.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//!
|
||||
//! This function is used to enable the wake-on-LAN feature of the MAC
|
||||
//! controller. It is done by first checking if the transmit path is idle and
|
||||
//! disabling the trasnmitter and the transmit DMA controller. Then it checks
|
||||
//! if any data from the network is being actively received and if not then it
|
||||
//! disables the receive DMA controller.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACWoLEnter(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
//
|
||||
// Check if the Transmit interrupt bit is clear.
|
||||
//
|
||||
while(HWREG(ui32Base + EMAC_O_DMARIS) == EMAC_DMARIS_TI)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Disable transmission in the MAC configuration register.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_CFG) &= ~EMAC_CFG_TE;
|
||||
|
||||
//
|
||||
// Disable the MAC transmit path in the opmode register.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_DMAOPMODE) &= ~EMAC_DMAOPMODE_ST;
|
||||
|
||||
//
|
||||
// Check if the Receive FIFO is empty.
|
||||
//
|
||||
while((HWREG(ui32Base + EMAC_O_STATUS) & EMAC_STATUS_RX_FIFO_LEVEL_MASK) ==
|
||||
EMAC_STATUS_RX_FIFO_EMPTY)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Disable the MAC receive path.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_DMAOPMODE) &= ~EMAC_DMAOPMODE_SR;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Configures the LPI timers and control register.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//! \param bLPIConfig is state of LPI trasnmit automate bit.
|
||||
//! \param ui16LPILSTimer is the value of LS timer in milli-seconds.
|
||||
//! \param ui16LPITWTimer is the value of TW timer in micro-seconds.
|
||||
//!
|
||||
//! This function is used to configure the LPI timer and control registers when
|
||||
//! the link is established as EEE mode or when the link is lost. When the link
|
||||
//! is established as EEE, then \e ui16LPILSTimer is programmed as the link
|
||||
//! status timer value and \e ui16LPITWTimer is programmed as the transmit wait
|
||||
//! timer value. The parameter \e bLPIConfig is used to decide if the transmit
|
||||
//! path must be automated or should be under user control.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACLPIConfig(uint32_t ui32Base, bool bLPIConfig, uint16_t ui16LPILSTimer,
|
||||
uint16_t ui16LPITWTimer)
|
||||
{
|
||||
uint32_t ui32TimerValue;
|
||||
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
ui32TimerValue = ((ui16LPILSTimer << EMAC_LPITIMERCTL_LST_S) &
|
||||
EMAC_LPITIMERCTL_LST_M);
|
||||
ui32TimerValue |= ui16LPITWTimer & EMAC_LPITIMERCTL_TWT_M;
|
||||
|
||||
//
|
||||
// Update the LPI Timer.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_LPITIMERCTL) = ui32TimerValue;
|
||||
|
||||
//
|
||||
// Configure the LPI Control registers.
|
||||
//
|
||||
if(bLPIConfig)
|
||||
{
|
||||
HWREG(ui32Base + EMAC_O_LPICTLSTAT) |= EMAC_LPICTLSTAT_LPITXA;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG(ui32Base + EMAC_O_LPICTLSTAT) = 0x0;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the transmit path for LPI mode entry.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//!
|
||||
//! This function is used to enable the transmit path in LPI mode when there
|
||||
//! is no more data to be transmitted by the MAC controller.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACLPIEnter(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
HWREG(ui32Base + EMAC_O_LPICTLSTAT) |= EMAC_LPICTLSTAT_LPIEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the status of the LPI link.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//!
|
||||
//! This function may be used to read the status of the transmit and receive
|
||||
//! path when the link is configured in LPI mode.
|
||||
//!
|
||||
//! \return Returns the lower 16 bits of the LPI Control and Status register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint16_t
|
||||
EMACLPIStatus(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
//
|
||||
// Configure the LPI Control registers.
|
||||
//
|
||||
return(HWREG(ui32Base + EMAC_O_LPICTLSTAT) & 0xFFFF);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the link status of the external PHY.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//!
|
||||
//! This function is used to set the link status of the external PHY when the
|
||||
//! link is established in EEE mode.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACLPILinkSet(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
//
|
||||
// Configure the LPI Control registers.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_LPICTLSTAT) |= EMAC_LPICTLSTAT_PLS;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Clears the link status of the external PHY.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//!
|
||||
//! This function is used to clear the link status of the external PHY when the
|
||||
//! link is lost due to a disconnect or EEE mode link is not established.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACLPILinkClear(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui32Base == EMAC0_BASE);
|
||||
|
||||
//
|
||||
// Configure the LPI Control registers.
|
||||
//
|
||||
HWREG(ui32Base + EMAC_O_LPICTLSTAT) &= ~(EMAC_LPICTLSTAT_PLS);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Writes a value to an extended PHY register in MMD address space.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//! \param ui8PhyAddr is the physical address of the PHY to access.
|
||||
//! \param ui16RegAddr is the address of the PHY extended register to be
|
||||
//! accessed.
|
||||
//! \param ui16Value is the value to write to the register.
|
||||
//!
|
||||
//! When uhen connected to an external PHY supporting extended registers in MMD
|
||||
//! address space, this function allows a value to be written to the MMD
|
||||
//! register specified by \e ui16RegAddr.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
EMACPHYMMDWrite(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr,
|
||||
uint16_t ui16Data)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui8PhyAddr < 32);
|
||||
|
||||
//
|
||||
// Set the address of the register we're about to write.
|
||||
//
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, DEV_ADDR(ui16RegAddr));
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_ADDAR, REG_ADDR(ui16RegAddr));
|
||||
|
||||
//
|
||||
// Write the extended register value.
|
||||
//
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
|
||||
(0x4000 | DEV_ADDR(ui16RegAddr)));
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, ui16Data);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Reads from an extended PHY register in MMD address space.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the controller.
|
||||
//! \param ui8PhyAddr is the physical address of the PHY to access.
|
||||
//! \param ui16RegAddr is the address of the PHY extended register to be
|
||||
//! accessed.
|
||||
//!
|
||||
//! When connected to an external PHY supporting extended registers, this
|
||||
//! this function returns the contents of the MMD register specified by
|
||||
//! \e ui16RegAddr.
|
||||
//!
|
||||
//! \return Returns the 16-bit value read from the PHY.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint16_t
|
||||
EMACPHYMMDRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr)
|
||||
{
|
||||
//
|
||||
// Parameter sanity check.
|
||||
//
|
||||
ASSERT(ui8PhyAddr < 32);
|
||||
|
||||
//
|
||||
// Set the address of the register we're about to read.
|
||||
//
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, DEV_ADDR(ui16RegAddr));
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_ADDAR, REG_ADDR(ui16RegAddr));
|
||||
|
||||
//
|
||||
// Read the extended register value.
|
||||
//
|
||||
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
|
||||
(0x4000 | DEV_ADDR(ui16RegAddr)));
|
||||
return(EMACPHYRead(ui32Base, ui8PhyAddr, EPHY_ADDAR));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
// emac.h - Defines and Macros for the Ethernet module on Snowflake-class
|
||||
// devices.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -708,6 +708,12 @@ struct tEMACDMADescriptor
|
||||
#define EMAC_INT_NORMAL_INT 0x00010000
|
||||
#define EMAC_INT_ABNORMAL_INT 0x00008000
|
||||
|
||||
//
|
||||
// This interrupt source is readable using EMACIntStatus but must
|
||||
// be cleared by calling the EMACEEEStatus().
|
||||
//
|
||||
#define EMAC_INT_LPI 0x40000000
|
||||
|
||||
//
|
||||
// This interrupt source is readable using EMACIntStatus but must
|
||||
// be cleared by calling the EMACTimestampIntStatus().
|
||||
@@ -1012,7 +1018,17 @@ extern void EMACPowerManagementControlSet(uint32_t ui32Base,
|
||||
uint32_t ui32Flags);
|
||||
extern uint32_t EMACPowerManagementControlGet(uint32_t ui32Base);
|
||||
extern uint32_t EMACPowerManagementStatusGet(uint32_t ui32Base);
|
||||
|
||||
extern void EMACWoLEnter(uint32_t ui32Base);
|
||||
extern void EMACLPIConfig(uint32_t ui32Base, bool bLPIConfig,
|
||||
uint16_t ui16LPILSTimer, uint16_t ui16LPITWTimer);
|
||||
extern void EMACLPIEnter(uint32_t ui32Base);
|
||||
extern uint16_t EMACLPIStatus(uint32_t ui32Base);
|
||||
extern void EMACLPILinkSet(uint32_t ui32Base);
|
||||
extern void EMACLPILinkClear(uint32_t ui32Base);
|
||||
extern void EMACPHYMMDWrite(uint32_t ui32Base, uint8_t ui8PhyAddr,
|
||||
uint16_t ui16RegAddr, uint16_t ui16Data);
|
||||
extern uint16_t EMACPHYMMDRead(uint32_t ui32Base, uint8_t ui8PhyAddr,
|
||||
uint16_t ui16RegAddr);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// epi.c - Driver for the EPI module.
|
||||
//
|
||||
// Copyright (c) 2008-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2008-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// epi.h - Prototypes and macros for the EPI module.
|
||||
//
|
||||
// Copyright (c) 2008-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2008-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// flash.c - Driver for programming the on-chip flash.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -581,7 +581,81 @@ FlashUserSet(uint32_t ui32User0, uint32_t ui32User1)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Saves the user registers.
|
||||
//! Gets all the user registers.
|
||||
//!
|
||||
//! \param pui32User0 is a pointer to the location to store USER Register 0.
|
||||
//! \param pui32User1 is a pointer to the location to store USER Register 1.
|
||||
//! \param pui32User2 is a pointer to the location to store USER Register 2.
|
||||
//! \param pui32User3 is a pointer to the location to store USER Register 3.
|
||||
//!
|
||||
//! This function reads the contents of user registers 0, 1, 2 and 3, and
|
||||
//! stores them in the specified locations.
|
||||
//!
|
||||
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||
//
|
||||
//*****************************************************************************
|
||||
int32_t
|
||||
FlashAllUserRegisterGet(uint32_t *pui32User0, uint32_t *pui32User1,
|
||||
uint32_t *pui32User2, uint32_t *pui32User3)
|
||||
{
|
||||
//
|
||||
// Verify that the pointers are valid.
|
||||
//
|
||||
ASSERT(pui32User0 != 0);
|
||||
ASSERT(pui32User1 != 0);
|
||||
ASSERT(pui32User2 != 0);
|
||||
ASSERT(pui32User3 != 0);
|
||||
|
||||
//
|
||||
// Get and store the current value of the user registers.
|
||||
//
|
||||
*pui32User0 = HWREG(FLASH_USERREG0);
|
||||
*pui32User1 = HWREG(FLASH_USERREG1);
|
||||
*pui32User2 = HWREG(FLASH_USERREG2);
|
||||
*pui32User3 = HWREG(FLASH_USERREG3);
|
||||
|
||||
//
|
||||
// Success.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the user registers 0 to 3
|
||||
//!
|
||||
//! \param ui32User0 is the value to store in USER Register 0.
|
||||
//! \param ui32User1 is the value to store in USER Register 1.
|
||||
//! \param ui32User2 is the value to store in USER Register 2.
|
||||
//! \param ui32User3 is the value to store in USER Register 3.
|
||||
//!
|
||||
//! This function sets the contents of the user registers 0, 1, 2 and 3 to
|
||||
//! the specified values.
|
||||
//!
|
||||
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||
//
|
||||
//*****************************************************************************
|
||||
int32_t
|
||||
FlashAllUserRegisterSet(uint32_t ui32User0, uint32_t ui32User1,
|
||||
uint32_t ui32User2, uint32_t ui32User3)
|
||||
{
|
||||
//
|
||||
// Save the new values into the user registers.
|
||||
//
|
||||
HWREG(FLASH_USERREG0) = ui32User0;
|
||||
HWREG(FLASH_USERREG1) = ui32User1;
|
||||
HWREG(FLASH_USERREG2) = ui32User2;
|
||||
HWREG(FLASH_USERREG3) = ui32User3;
|
||||
|
||||
//
|
||||
// Success.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Saves the user registers 0 and 1.
|
||||
//!
|
||||
//! This function makes the currently programmed user register 0 and 1 settings
|
||||
//! permanent. This operation is non-reversible; a chip reset or power cycle
|
||||
@@ -628,6 +702,58 @@ FlashUserSave(void)
|
||||
return(0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Saves the user registers.
|
||||
//!
|
||||
//! This function makes the currently programmed user register 0, 1, 2 and 3
|
||||
//! settings permanent. This operation is non-reversible; a chip reset or
|
||||
//! power cycle does not change the flash protection.
|
||||
//!
|
||||
//! This function does not return until the protection has been saved.
|
||||
//!
|
||||
//! \note To ensure data integrity of the user registers, the commits should
|
||||
//! not be interrupted with a power loss.
|
||||
//!
|
||||
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||
//
|
||||
//*****************************************************************************
|
||||
int32_t
|
||||
FlashAllUserRegisterSave(void)
|
||||
{
|
||||
uint32_t ui32Index;
|
||||
|
||||
//
|
||||
// Setting the MSB of FMA will trigger a permanent save of a USER Register.
|
||||
// The 2 least signigicant bits, specify the exact User Register to save.
|
||||
// The value of the least significant bits for
|
||||
// USER Register 0 is 00,
|
||||
// USER Register 1 is 01,
|
||||
// USER Register 2 is 10 and
|
||||
// USER Register 3 is 11.
|
||||
//
|
||||
for(ui32Index = 0; ui32Index < 4; ui32Index++)
|
||||
{
|
||||
//
|
||||
// Tell the flash controller to commit a USER Register.
|
||||
//
|
||||
HWREG(FLASH_FMA) = (0x80000000 + ui32Index);
|
||||
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_COMT;
|
||||
|
||||
//
|
||||
// Wait until the write has completed.
|
||||
//
|
||||
while(HWREG(FLASH_FMC) & FLASH_FMC_COMT)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Success.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the flash interrupt.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// flash.h - Prototypes for the flash driver.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -93,7 +93,16 @@ extern int32_t FlashProtectSet(uint32_t ui32Address,
|
||||
extern int32_t FlashProtectSave(void);
|
||||
extern int32_t FlashUserGet(uint32_t *pui32User0, uint32_t *pui32User1);
|
||||
extern int32_t FlashUserSet(uint32_t ui32User0, uint32_t ui32User1);
|
||||
extern int32_t FlashAllUserRegisterGet(uint32_t *pui32User0,
|
||||
uint32_t *pui32User1,
|
||||
uint32_t *pui32User2,
|
||||
uint32_t *pui32User3);
|
||||
extern int32_t FlashAllUserRegisterSet(uint32_t ui32User0,
|
||||
uint32_t ui32User1,
|
||||
uint32_t ui32User2,
|
||||
uint32_t ui32User3);
|
||||
extern int32_t FlashUserSave(void);
|
||||
extern int32_t FlashAllUserRegisterSave(void);
|
||||
extern void FlashIntRegister(void (*pfnHandler)(void));
|
||||
extern void FlashIntUnregister(void);
|
||||
extern void FlashIntEnable(uint32_t ui32IntFlags);
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
// fpu.c - Routines for manipulating the floating-point unit in the Cortex-M
|
||||
// processor.
|
||||
//
|
||||
// Copyright (c) 2011-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// fpu.h - Prototypes for the floatint point manipulation routines.
|
||||
//
|
||||
// Copyright (c) 2011-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// gpio.h - Defines and Macros for GPIO API.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -154,25 +154,33 @@ extern uint32_t GPIOIntStatus(uint32_t ui32Port, bool bMasked);
|
||||
extern void GPIOIntClear(uint32_t ui32Port, uint32_t ui32IntFlags);
|
||||
extern void GPIOIntRegister(uint32_t ui32Port, void (*pfnIntHandler)(void));
|
||||
extern void GPIOIntUnregister(uint32_t ui32Port);
|
||||
extern void GPIOIntRegisterPin(uint32_t ui32Port, uint32_t ui32Pin,
|
||||
void (*pfnIntHandler)(void));
|
||||
extern void GPIOIntUnregisterPin(uint32_t ui32Port, uint32_t ui32Pin);
|
||||
extern int32_t GPIOPinRead(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinWrite(uint32_t ui32Port, uint8_t ui8Pins, uint8_t ui8Val);
|
||||
extern void GPIOPinConfigure(uint32_t ui32PinConfig);
|
||||
extern void GPIOPinTypeADC(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeCAN(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeComparator(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeComparatorOutput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeDIVSCLK(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEPI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEthernetLED(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEthernetMII(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOInput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOOutput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOOutputOD(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeHibernateRTCCLK(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeI2C(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeI2CSCL(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeLCD(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeOneWire(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypePWM(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeQEI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeSSI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeTimer(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeTrace(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUART(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUSBAnalog(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUSBDigital(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// hibernate.c - Driver for the Hibernation module
|
||||
//
|
||||
// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2007-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -124,10 +124,12 @@ _HibernateWriteComplete(void)
|
||||
//! This function enables the Hibernation module for operation. This function
|
||||
//! should be called before any of the Hibernation module features are used.
|
||||
//!
|
||||
//! The peripheral clock is the same as the processor clock. This value is
|
||||
//! returned by SysCtlClockGet(), or it can be explicitly hard-coded if it is
|
||||
//! constant and known (to save the code/execution overhead of a call to
|
||||
//! SysCtlClockGet()).
|
||||
//! The peripheral clock is the same as the processor clock. The frequency of
|
||||
//! the system clock is the value returned by SysCtlClockGet() for TM4C123x
|
||||
//! devices or the value returned by SysCtlClockFreqSet() for TM4C129x devices,
|
||||
//! or it can be explicitly hard coded if it is constant and known (to save the
|
||||
//! code/execution overhead of a call to SysCtlClockGet() or fetch of the
|
||||
//! variable call holding the return value of SysCtlClockFreqSet()).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
@@ -2067,7 +2069,7 @@ HibernateTamperIOEnable(uint32_t ui32Input, uint32_t ui32Config)
|
||||
//
|
||||
// Set tamper I/O configuration for the requested input.
|
||||
//
|
||||
ui32Temp |= (ui32Mask | ((ui32Config | HIB_TPIO_EN0) << (ui32Input << 3)));
|
||||
ui32Temp = (ui32Mask | ((ui32Config | HIB_TPIO_EN0) << (ui32Input << 3)));
|
||||
|
||||
//
|
||||
// Unlock the tamper registers.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// hibernate.h - API definition for the Hibernation module.
|
||||
//
|
||||
// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2007-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// i2c.c - Driver for Inter-IC (I2C) bus block.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -190,10 +190,12 @@ _I2CIntNumberGet(uint32_t ui32Base)
|
||||
//! initial communication with the slave is done at either 100 Kbps or
|
||||
//! 400 Kbps.
|
||||
//!
|
||||
//! The peripheral clock is the same as the processor clock. This value is
|
||||
//! returned by SysCtlClockGet(), or it can be explicitly hard coded if it is
|
||||
//! constant and known (to save the code/execution overhead of a call to
|
||||
//! SysCtlClockGet()).
|
||||
//! The peripheral clock is the same as the processor clock. The frequency of
|
||||
//! the system clock is the value returned by SysCtlClockGet() for TM4C123x
|
||||
//! devices or the value returned by SysCtlClockFreqSet() for TM4C129x devices,
|
||||
//! or it can be explicitly hard coded if it is constant and known (to save the
|
||||
//! code/execution overhead of a call to SysCtlClockGet() or fetch of the
|
||||
//! variable call holding the return value of SysCtlClockFreqSet()).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
@@ -1983,7 +1985,7 @@ I2CMasterBurstLengthSet(uint32_t ui32Base, uint8_t ui8Length)
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(_I2CBaseValid(ui32Base) && (ui8Length < 255));
|
||||
ASSERT(_I2CBaseValid(ui32Base) && (ui8Length < 256));
|
||||
|
||||
//
|
||||
// Set the burst length.
|
||||
@@ -2061,9 +2063,28 @@ I2CMasterGlitchFilterConfigSet(uint32_t ui32Base, uint32_t ui32Config)
|
||||
ASSERT(_I2CBaseValid(ui32Base));
|
||||
|
||||
//
|
||||
// Configure the glitch filter field of MTPR.
|
||||
// Configure the glitch filter field of MTPR if it is TM4C129
|
||||
//
|
||||
HWREG(ui32Base + I2C_O_MTPR) |= ui32Config;
|
||||
if(CLASS_IS_TM4C129)
|
||||
{
|
||||
HWREG(ui32Base + I2C_O_MTPR) |= ui32Config;
|
||||
}
|
||||
|
||||
//
|
||||
// Configure the glitch filter if it is TM4C123
|
||||
//
|
||||
if(CLASS_IS_TM4C123)
|
||||
{
|
||||
//
|
||||
// Configure the glitch filter pulse width
|
||||
//
|
||||
HWREG(ui32Base + I2C_O_MCR2) |= (ui32Config >> 12);
|
||||
|
||||
//
|
||||
// Enable the glitch filter by setting the GFE bit
|
||||
//
|
||||
HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_GFE;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
@@ -2135,6 +2156,35 @@ I2CSlaveFIFODisable(uint32_t ui32Base)
|
||||
HWREG(ui32Base + I2C_O_SCSR) = I2C_SCSR_DA;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables internal loopback mode for an I2C port.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the I2C module.
|
||||
//!
|
||||
//! This function configures an I2C port in internal loopback mode to help with
|
||||
//! diagnostics and debug. In this mode, the SDA and SCL signals from master
|
||||
//! and slave modules are internally connected. This allows data to be
|
||||
//! transferred between the master and slave modules of the same I2C port,
|
||||
//! without having to go through I/O's. I2CMasterDataPut(), I2CSlaveDataPut(),
|
||||
//! I2CMasterDataGet(),I2CSlaveDataGet() can be used along with this function.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void I2CLoopbackEnable(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(_I2CBaseValid(ui32Base));
|
||||
|
||||
//
|
||||
// Write the loopback enable bit to the register.
|
||||
//
|
||||
HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_LPBK;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// i2c.h - Prototypes for the I2C Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -281,7 +281,7 @@ extern "C"
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
|
||||
extern void I2CIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
|
||||
extern void I2CIntUnregister(uint32_t ui32Base);
|
||||
extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void I2CTxFIFOFlush(uint32_t ui32Base);
|
||||
@@ -348,6 +348,7 @@ extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
|
||||
extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
|
||||
bool bMasked);
|
||||
extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
|
||||
extern void I2CLoopbackEnable(uint32_t ui32Base);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// interrupt.c - Driver for the NVIC Interrupt Controller.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// lcd.c - Defines and Macros for the LCD Controller module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// lcd.h - Defines and Macros for the LCD Controller module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// mpu.c - Driver for the Cortex-M3 memory protection unit (MPU).
|
||||
//
|
||||
// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2007-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// mpu.h - Defines and Macros for the memory protection unit.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// onewire.c - Driver for OneWire master module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -454,10 +454,6 @@ _OneWireIntNumberGet(uint32_t ui32Base)
|
||||
//
|
||||
// Find the valid interrupt number for the 1-Wire module.
|
||||
//
|
||||
if(CLASS_IS_TM4E111)
|
||||
{
|
||||
ui32Int = INT_ONEWIRE0_TM4E111;
|
||||
}
|
||||
if(CLASS_IS_TM4C129)
|
||||
{
|
||||
ui32Int = INT_ONEWIRE0_TM4C129;
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// onewire.h - Prototypes for the OneWire Driver.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// pin_map.h - Mapping of peripherals to pins for all parts.
|
||||
//
|
||||
// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2007-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -11207,6 +11207,466 @@
|
||||
|
||||
#endif // PART_TM4C123GH6ZRB
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// TM4C123GH6ZXR Port/Pin Mapping Definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef PART_TM4C123GH6ZXR
|
||||
|
||||
#define GPIO_PA0_U0RX 0x00000001
|
||||
#define GPIO_PA0_CAN1RX 0x00000008
|
||||
|
||||
#define GPIO_PA1_U0TX 0x00000401
|
||||
#define GPIO_PA1_CAN1TX 0x00000408
|
||||
|
||||
#define GPIO_PA2_SSI0CLK 0x00000802
|
||||
|
||||
#define GPIO_PA3_SSI0FSS 0x00000C02
|
||||
|
||||
#define GPIO_PA4_SSI0RX 0x00001002
|
||||
|
||||
#define GPIO_PA5_SSI0TX 0x00001402
|
||||
|
||||
#define GPIO_PA6_I2C1SCL 0x00001803
|
||||
#define GPIO_PA6_M1PWM2 0x00001805
|
||||
|
||||
#define GPIO_PA7_I2C1SDA 0x00001C03
|
||||
#define GPIO_PA7_M1PWM3 0x00001C05
|
||||
|
||||
#define GPIO_PB0_U1RX 0x00010001
|
||||
#define GPIO_PB0_T2CCP0 0x00010007
|
||||
|
||||
#define GPIO_PB1_U1TX 0x00010401
|
||||
#define GPIO_PB1_T2CCP1 0x00010407
|
||||
|
||||
#define GPIO_PB2_I2C0SCL 0x00010803
|
||||
#define GPIO_PB2_T3CCP0 0x00010807
|
||||
|
||||
#define GPIO_PB3_I2C0SDA 0x00010C03
|
||||
#define GPIO_PB3_T3CCP1 0x00010C07
|
||||
|
||||
#define GPIO_PB4_SSI2CLK 0x00011002
|
||||
#define GPIO_PB4_M0PWM2 0x00011004
|
||||
#define GPIO_PB4_T1CCP0 0x00011007
|
||||
#define GPIO_PB4_CAN0RX 0x00011008
|
||||
|
||||
#define GPIO_PB5_SSI2FSS 0x00011402
|
||||
#define GPIO_PB5_M0PWM3 0x00011404
|
||||
#define GPIO_PB5_T1CCP1 0x00011407
|
||||
#define GPIO_PB5_CAN0TX 0x00011408
|
||||
|
||||
#define GPIO_PB6_SSI2RX 0x00011802
|
||||
#define GPIO_PB6_I2C5SCL 0x00011803
|
||||
#define GPIO_PB6_M0PWM0 0x00011804
|
||||
#define GPIO_PB6_T0CCP0 0x00011807
|
||||
|
||||
#define GPIO_PB7_SSI2TX 0x00011C02
|
||||
#define GPIO_PB7_I2C5SDA 0x00011C03
|
||||
#define GPIO_PB7_M0PWM1 0x00011C04
|
||||
#define GPIO_PB7_T0CCP1 0x00011C07
|
||||
|
||||
#define GPIO_PC0_TCK 0x00020001
|
||||
#define GPIO_PC0_SWCLK 0x00020001
|
||||
#define GPIO_PC0_T4CCP0 0x00020007
|
||||
|
||||
#define GPIO_PC1_TMS 0x00020401
|
||||
#define GPIO_PC1_SWDIO 0x00020401
|
||||
#define GPIO_PC1_T4CCP1 0x00020407
|
||||
|
||||
#define GPIO_PC2_TDI 0x00020801
|
||||
#define GPIO_PC2_T5CCP0 0x00020807
|
||||
|
||||
#define GPIO_PC3_SWO 0x00020C01
|
||||
#define GPIO_PC3_TDO 0x00020C01
|
||||
#define GPIO_PC3_T5CCP1 0x00020C07
|
||||
|
||||
#define GPIO_PC4_U4RX 0x00021001
|
||||
#define GPIO_PC4_U1RX 0x00021002
|
||||
#define GPIO_PC4_M0PWM6 0x00021004
|
||||
#define GPIO_PC4_IDX1 0x00021006
|
||||
#define GPIO_PC4_WT0CCP0 0x00021007
|
||||
#define GPIO_PC4_U1RTS 0x00021008
|
||||
|
||||
#define GPIO_PC5_U4TX 0x00021401
|
||||
#define GPIO_PC5_U1TX 0x00021402
|
||||
#define GPIO_PC5_M0PWM7 0x00021404
|
||||
#define GPIO_PC5_PHA1 0x00021406
|
||||
#define GPIO_PC5_WT0CCP1 0x00021407
|
||||
#define GPIO_PC5_U1CTS 0x00021408
|
||||
|
||||
#define GPIO_PC6_U3RX 0x00021801
|
||||
#define GPIO_PC6_PHB1 0x00021806
|
||||
#define GPIO_PC6_WT1CCP0 0x00021807
|
||||
#define GPIO_PC6_USB0EPEN 0x00021808
|
||||
|
||||
#define GPIO_PC7_U3TX 0x00021C01
|
||||
#define GPIO_PC7_WT1CCP1 0x00021C07
|
||||
#define GPIO_PC7_USB0PFLT 0x00021C08
|
||||
|
||||
#define GPIO_PD0_SSI3CLK 0x00030001
|
||||
#define GPIO_PD0_SSI1CLK 0x00030002
|
||||
#define GPIO_PD0_I2C3SCL 0x00030003
|
||||
#define GPIO_PD0_M0PWM6 0x00030004
|
||||
#define GPIO_PD0_M1PWM0 0x00030005
|
||||
#define GPIO_PD0_WT2CCP0 0x00030007
|
||||
|
||||
#define GPIO_PD1_SSI3FSS 0x00030401
|
||||
#define GPIO_PD1_SSI1FSS 0x00030402
|
||||
#define GPIO_PD1_I2C3SDA 0x00030403
|
||||
#define GPIO_PD1_M0PWM7 0x00030404
|
||||
#define GPIO_PD1_M1PWM1 0x00030405
|
||||
#define GPIO_PD1_WT2CCP1 0x00030407
|
||||
|
||||
#define GPIO_PD2_SSI3RX 0x00030801
|
||||
#define GPIO_PD2_SSI1RX 0x00030802
|
||||
#define GPIO_PD2_M0FAULT0 0x00030804
|
||||
#define GPIO_PD2_WT3CCP0 0x00030807
|
||||
#define GPIO_PD2_USB0EPEN 0x00030808
|
||||
|
||||
#define GPIO_PD3_SSI3TX 0x00030C01
|
||||
#define GPIO_PD3_SSI1TX 0x00030C02
|
||||
#define GPIO_PD3_IDX0 0x00030C06
|
||||
#define GPIO_PD3_WT3CCP1 0x00030C07
|
||||
#define GPIO_PD3_USB0PFLT 0x00030C08
|
||||
|
||||
#define GPIO_PD4_U6RX 0x00031001
|
||||
#define GPIO_PD4_WT4CCP0 0x00031007
|
||||
|
||||
#define GPIO_PD5_U6TX 0x00031401
|
||||
#define GPIO_PD5_WT4CCP1 0x00031407
|
||||
|
||||
#define GPIO_PD6_U2RX 0x00031801
|
||||
#define GPIO_PD6_M0FAULT0 0x00031804
|
||||
#define GPIO_PD6_PHA0 0x00031806
|
||||
#define GPIO_PD6_WT5CCP0 0x00031807
|
||||
|
||||
#define GPIO_PD7_U2TX 0x00031C01
|
||||
#define GPIO_PD7_M0FAULT1 0x00031C04
|
||||
#define GPIO_PD7_PHB0 0x00031C06
|
||||
#define GPIO_PD7_WT5CCP1 0x00031C07
|
||||
#define GPIO_PD7_NMI 0x00031C08
|
||||
|
||||
#define GPIO_PE0_U7RX 0x00040001
|
||||
|
||||
#define GPIO_PE1_U7TX 0x00040401
|
||||
|
||||
#define GPIO_PE4_U5RX 0x00041001
|
||||
#define GPIO_PE4_I2C2SCL 0x00041003
|
||||
#define GPIO_PE4_M0PWM4 0x00041004
|
||||
#define GPIO_PE4_M1PWM2 0x00041005
|
||||
#define GPIO_PE4_CAN0RX 0x00041008
|
||||
|
||||
#define GPIO_PE5_U5TX 0x00041401
|
||||
#define GPIO_PE5_I2C2SDA 0x00041403
|
||||
#define GPIO_PE5_M0PWM5 0x00041404
|
||||
#define GPIO_PE5_M1PWM3 0x00041405
|
||||
#define GPIO_PE5_CAN0TX 0x00041408
|
||||
|
||||
#define GPIO_PE6_CAN1RX 0x00041808
|
||||
|
||||
#define GPIO_PE7_U1RI 0x00041C01
|
||||
#define GPIO_PE7_CAN1TX 0x00041C08
|
||||
|
||||
#define GPIO_PF0_U1RTS 0x00050001
|
||||
#define GPIO_PF0_SSI1RX 0x00050002
|
||||
#define GPIO_PF0_CAN0RX 0x00050003
|
||||
#define GPIO_PF0_M1PWM4 0x00050005
|
||||
#define GPIO_PF0_PHA0 0x00050006
|
||||
#define GPIO_PF0_T0CCP0 0x00050007
|
||||
#define GPIO_PF0_NMI 0x00050008
|
||||
#define GPIO_PF0_C0O 0x00050009
|
||||
#define GPIO_PF0_TRD2 0x0005000E
|
||||
|
||||
#define GPIO_PF1_U1CTS 0x00050401
|
||||
#define GPIO_PF1_SSI1TX 0x00050402
|
||||
#define GPIO_PF1_M1PWM5 0x00050405
|
||||
#define GPIO_PF1_PHB0 0x00050406
|
||||
#define GPIO_PF1_T0CCP1 0x00050407
|
||||
#define GPIO_PF1_C1O 0x00050409
|
||||
#define GPIO_PF1_TRD1 0x0005040E
|
||||
|
||||
#define GPIO_PF2_U1DCD 0x00050801
|
||||
#define GPIO_PF2_SSI1CLK 0x00050802
|
||||
#define GPIO_PF2_M0FAULT0 0x00050804
|
||||
#define GPIO_PF2_M1PWM6 0x00050805
|
||||
#define GPIO_PF2_T1CCP0 0x00050807
|
||||
#define GPIO_PF2_C2O 0x00050809
|
||||
#define GPIO_PF2_TRD0 0x0005080E
|
||||
|
||||
#define GPIO_PF3_U1DSR 0x00050C01
|
||||
#define GPIO_PF3_SSI1FSS 0x00050C02
|
||||
#define GPIO_PF3_CAN0TX 0x00050C03
|
||||
#define GPIO_PF3_M0FAULT1 0x00050C04
|
||||
#define GPIO_PF3_M1PWM7 0x00050C05
|
||||
#define GPIO_PF3_T1CCP1 0x00050C07
|
||||
#define GPIO_PF3_TRCLK 0x00050C0E
|
||||
|
||||
#define GPIO_PF4_U1DTR 0x00051001
|
||||
#define GPIO_PF4_M0FAULT2 0x00051004
|
||||
#define GPIO_PF4_M1FAULT0 0x00051005
|
||||
#define GPIO_PF4_IDX0 0x00051006
|
||||
#define GPIO_PF4_T2CCP0 0x00051007
|
||||
#define GPIO_PF4_USB0EPEN 0x00051008
|
||||
#define GPIO_PF4_TRD3 0x0005100E
|
||||
|
||||
#define GPIO_PF5_M0FAULT3 0x00051404
|
||||
#define GPIO_PF5_T2CCP1 0x00051407
|
||||
#define GPIO_PF5_USB0PFLT 0x00051408
|
||||
|
||||
#define GPIO_PF6_I2C2SCL 0x00051803
|
||||
#define GPIO_PF6_T3CCP0 0x00051807
|
||||
|
||||
#define GPIO_PF7_I2C2SDA 0x00051C03
|
||||
#define GPIO_PF7_M1FAULT0 0x00051C05
|
||||
#define GPIO_PF7_T3CCP1 0x00051C07
|
||||
|
||||
#define GPIO_PG0_I2C3SCL 0x00060003
|
||||
#define GPIO_PG0_M1FAULT1 0x00060005
|
||||
#define GPIO_PG0_PHA1 0x00060006
|
||||
#define GPIO_PG0_T4CCP0 0x00060007
|
||||
|
||||
#define GPIO_PG1_I2C3SDA 0x00060403
|
||||
#define GPIO_PG1_M1FAULT2 0x00060405
|
||||
#define GPIO_PG1_PHB1 0x00060406
|
||||
#define GPIO_PG1_T4CCP1 0x00060407
|
||||
|
||||
#define GPIO_PG2_I2C4SCL 0x00060803
|
||||
#define GPIO_PG2_M0FAULT1 0x00060804
|
||||
#define GPIO_PG2_M1PWM0 0x00060805
|
||||
#define GPIO_PG2_T5CCP0 0x00060807
|
||||
|
||||
#define GPIO_PG3_I2C4SDA 0x00060C03
|
||||
#define GPIO_PG3_M0FAULT2 0x00060C04
|
||||
#define GPIO_PG3_M1PWM1 0x00060C05
|
||||
#define GPIO_PG3_PHA1 0x00060C06
|
||||
#define GPIO_PG3_T5CCP1 0x00060C07
|
||||
|
||||
#define GPIO_PG4_U2RX 0x00061001
|
||||
#define GPIO_PG4_I2C1SCL 0x00061003
|
||||
#define GPIO_PG4_M0PWM4 0x00061004
|
||||
#define GPIO_PG4_M1PWM2 0x00061005
|
||||
#define GPIO_PG4_PHB1 0x00061006
|
||||
#define GPIO_PG4_WT0CCP0 0x00061007
|
||||
#define GPIO_PG4_USB0EPEN 0x00061008
|
||||
|
||||
#define GPIO_PG5_U2TX 0x00061401
|
||||
#define GPIO_PG5_I2C1SDA 0x00061403
|
||||
#define GPIO_PG5_M0PWM5 0x00061404
|
||||
#define GPIO_PG5_M1PWM3 0x00061405
|
||||
#define GPIO_PG5_IDX1 0x00061406
|
||||
#define GPIO_PG5_WT0CCP1 0x00061407
|
||||
#define GPIO_PG5_USB0PFLT 0x00061408
|
||||
|
||||
#define GPIO_PG6_I2C5SCL 0x00061803
|
||||
#define GPIO_PG6_M0PWM6 0x00061804
|
||||
#define GPIO_PG6_WT1CCP0 0x00061807
|
||||
|
||||
#define GPIO_PG7_I2C5SDA 0x00061C03
|
||||
#define GPIO_PG7_M0PWM7 0x00061C04
|
||||
#define GPIO_PG7_IDX1 0x00061C05
|
||||
#define GPIO_PG7_WT1CCP1 0x00061C07
|
||||
|
||||
#define GPIO_PH0_SSI3CLK 0x00070002
|
||||
#define GPIO_PH0_M0PWM0 0x00070004
|
||||
#define GPIO_PH0_M0FAULT0 0x00070006
|
||||
#define GPIO_PH0_WT2CCP0 0x00070007
|
||||
|
||||
#define GPIO_PH1_SSI3FSS 0x00070402
|
||||
#define GPIO_PH1_M0PWM1 0x00070404
|
||||
#define GPIO_PH1_IDX0 0x00070405
|
||||
#define GPIO_PH1_M0FAULT1 0x00070406
|
||||
#define GPIO_PH1_WT2CCP1 0x00070407
|
||||
|
||||
#define GPIO_PH2_SSI3RX 0x00070802
|
||||
#define GPIO_PH2_M0PWM2 0x00070804
|
||||
#define GPIO_PH2_M0FAULT2 0x00070806
|
||||
#define GPIO_PH2_WT5CCP0 0x00070807
|
||||
|
||||
#define GPIO_PH3_SSI3TX 0x00070C02
|
||||
#define GPIO_PH3_M0PWM3 0x00070C04
|
||||
#define GPIO_PH3_M0FAULT3 0x00070C06
|
||||
#define GPIO_PH3_WT5CCP1 0x00070C07
|
||||
|
||||
#define GPIO_PH4_SSI2CLK 0x00071002
|
||||
#define GPIO_PH4_M0PWM4 0x00071004
|
||||
#define GPIO_PH4_PHA0 0x00071005
|
||||
#define GPIO_PH4_WT3CCP0 0x00071007
|
||||
|
||||
#define GPIO_PH5_SSI2FSS 0x00071402
|
||||
#define GPIO_PH5_M0PWM5 0x00071404
|
||||
#define GPIO_PH5_PHB0 0x00071405
|
||||
#define GPIO_PH5_WT3CCP1 0x00071407
|
||||
|
||||
#define GPIO_PH6_SSI2RX 0x00071802
|
||||
#define GPIO_PH6_M0PWM6 0x00071804
|
||||
#define GPIO_PH6_WT4CCP0 0x00071807
|
||||
|
||||
#define GPIO_PH7_SSI2TX 0x00071C02
|
||||
#define GPIO_PH7_M0PWM7 0x00071C04
|
||||
#define GPIO_PH7_WT4CCP1 0x00071C07
|
||||
|
||||
#define GPIO_PJ0_U4RX 0x00080001
|
||||
#define GPIO_PJ0_T1CCP0 0x00080007
|
||||
|
||||
#define GPIO_PJ1_U4TX 0x00080401
|
||||
#define GPIO_PJ1_T1CCP1 0x00080407
|
||||
|
||||
#define GPIO_PJ2_U5RX 0x00080801
|
||||
#define GPIO_PJ2_IDX0 0x00080805
|
||||
#define GPIO_PJ2_T2CCP0 0x00080807
|
||||
|
||||
#define GPIO_PJ3_U5TX 0x00080C01
|
||||
#define GPIO_PJ3_T2CCP1 0x00080C07
|
||||
|
||||
#define GPIO_PJ4_U6RX 0x00081001
|
||||
#define GPIO_PJ4_T3CCP0 0x00081007
|
||||
|
||||
#define GPIO_PJ5_U6TX 0x00081401
|
||||
#define GPIO_PJ5_T3CCP1 0x00081407
|
||||
|
||||
#define GPIO_PK0_SSI3CLK 0x00090002
|
||||
#define GPIO_PK0_M1FAULT0 0x00090006
|
||||
|
||||
#define GPIO_PK1_SSI3FSS 0x00090402
|
||||
#define GPIO_PK1_M1FAULT1 0x00090406
|
||||
|
||||
#define GPIO_PK2_SSI3RX 0x00090802
|
||||
#define GPIO_PK2_M1FAULT2 0x00090806
|
||||
|
||||
#define GPIO_PK3_SSI3TX 0x00090C02
|
||||
#define GPIO_PK3_M1FAULT3 0x00090C06
|
||||
|
||||
#define GPIO_PK4_U7RX 0x00091001
|
||||
#define GPIO_PK4_M0FAULT0 0x00091006
|
||||
#define GPIO_PK4_RTCCLK 0x00091007
|
||||
#define GPIO_PK4_C0O 0x00091008
|
||||
|
||||
#define GPIO_PK5_U7TX 0x00091401
|
||||
#define GPIO_PK5_M0FAULT1 0x00091406
|
||||
#define GPIO_PK5_C1O 0x00091408
|
||||
|
||||
#define GPIO_PK6_M0FAULT2 0x00091806
|
||||
#define GPIO_PK6_WT1CCP0 0x00091807
|
||||
#define GPIO_PK6_C2O 0x00091808
|
||||
|
||||
#define GPIO_PK7_M0FAULT3 0x00091C06
|
||||
#define GPIO_PK7_WT1CCP1 0x00091C07
|
||||
|
||||
#define GPIO_PL0_T0CCP0 0x000A0007
|
||||
#define GPIO_PL0_WT0CCP0 0x000A0008
|
||||
|
||||
#define GPIO_PL1_T0CCP1 0x000A0407
|
||||
#define GPIO_PL1_WT0CCP1 0x000A0408
|
||||
|
||||
#define GPIO_PL2_T1CCP0 0x000A0807
|
||||
#define GPIO_PL2_WT1CCP0 0x000A0808
|
||||
|
||||
#define GPIO_PL3_T1CCP1 0x000A0C07
|
||||
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
||||
|
||||
#define GPIO_PL4_T2CCP0 0x000A1007
|
||||
#define GPIO_PL4_WT2CCP0 0x000A1008
|
||||
|
||||
#define GPIO_PL5_T2CCP1 0x000A1407
|
||||
#define GPIO_PL5_WT2CCP1 0x000A1408
|
||||
|
||||
#define GPIO_PL6_T3CCP0 0x000A1807
|
||||
#define GPIO_PL6_WT3CCP0 0x000A1808
|
||||
|
||||
#define GPIO_PL7_T3CCP1 0x000A1C07
|
||||
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
||||
|
||||
#define GPIO_PM0_T4CCP0 0x000B0007
|
||||
#define GPIO_PM0_WT4CCP0 0x000B0008
|
||||
|
||||
#define GPIO_PM1_T4CCP1 0x000B0407
|
||||
#define GPIO_PM1_WT4CCP1 0x000B0408
|
||||
|
||||
#define GPIO_PM2_T5CCP0 0x000B0807
|
||||
#define GPIO_PM2_WT5CCP0 0x000B0808
|
||||
|
||||
#define GPIO_PM3_T5CCP1 0x000B0C07
|
||||
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
||||
|
||||
#define GPIO_PM6_M0PWM4 0x000B1802
|
||||
#define GPIO_PM6_WT0CCP0 0x000B1807
|
||||
|
||||
#define GPIO_PM7_M0PWM5 0x000B1C02
|
||||
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
||||
|
||||
#define GPIO_PN0_CAN0RX 0x000C0001
|
||||
|
||||
#define GPIO_PN1_CAN0TX 0x000C0401
|
||||
|
||||
#define GPIO_PN2_M0PWM6 0x000C0802
|
||||
#define GPIO_PN2_WT2CCP0 0x000C0807
|
||||
|
||||
#define GPIO_PN3_M0PWM7 0x000C0C02
|
||||
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
||||
|
||||
#define GPIO_PN4_M1PWM4 0x000C1002
|
||||
#define GPIO_PN4_WT3CCP0 0x000C1007
|
||||
|
||||
#define GPIO_PN5_M1PWM5 0x000C1402
|
||||
#define GPIO_PN5_WT3CCP1 0x000C1407
|
||||
|
||||
#define GPIO_PN6_M1PWM6 0x000C1802
|
||||
#define GPIO_PN6_WT4CCP0 0x000C1807
|
||||
|
||||
#define GPIO_PN7_M1PWM7 0x000C1C02
|
||||
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
||||
|
||||
#define GPIO_PP0_M0PWM0 0x000D0001
|
||||
#define GPIO_PP0_T4CCP0 0x000D0007
|
||||
|
||||
#define GPIO_PP1_M0PWM1 0x000D0401
|
||||
#define GPIO_PP1_T4CCP1 0x000D0407
|
||||
|
||||
#define GPIO_PP2_M0PWM2 0x000D0801
|
||||
#define GPIO_PP2_T5CCP0 0x000D0807
|
||||
|
||||
#define GPIO_PP3_M0PWM3 0x000D0C01
|
||||
#define GPIO_PP3_T5CCP1 0x000D0C07
|
||||
|
||||
#define GPIO_PP4_M0PWM4 0x000D1001
|
||||
#define GPIO_PP4_WT0CCP0 0x000D1007
|
||||
|
||||
#define GPIO_PP5_M0PWM5 0x000D1401
|
||||
#define GPIO_PP5_WT0CCP1 0x000D1407
|
||||
|
||||
#define GPIO_PP6_M0PWM6 0x000D1801
|
||||
#define GPIO_PP6_WT1CCP0 0x000D1807
|
||||
|
||||
#define GPIO_PP7_M0PWM7 0x000D1C01
|
||||
#define GPIO_PP7_WT1CCP1 0x000D1C07
|
||||
|
||||
#define GPIO_PQ0_M1PWM0 0x000E0001
|
||||
#define GPIO_PQ0_WT2CCP0 0x000E0007
|
||||
|
||||
#define GPIO_PQ1_M1PWM1 0x000E0401
|
||||
#define GPIO_PQ1_WT2CCP1 0x000E0407
|
||||
|
||||
#define GPIO_PQ2_M1PWM2 0x000E0801
|
||||
#define GPIO_PQ2_WT3CCP0 0x000E0807
|
||||
|
||||
#define GPIO_PQ3_M1PWM3 0x000E0C01
|
||||
#define GPIO_PQ3_WT3CCP1 0x000E0C07
|
||||
|
||||
#define GPIO_PQ4_M1PWM4 0x000E1001
|
||||
#define GPIO_PQ4_WT4CCP0 0x000E1007
|
||||
|
||||
#define GPIO_PQ5_M1PWM5 0x000E1401
|
||||
#define GPIO_PQ5_WT4CCP1 0x000E1407
|
||||
|
||||
#define GPIO_PQ6_M1PWM6 0x000E1801
|
||||
#define GPIO_PQ6_WT5CCP0 0x000E1807
|
||||
|
||||
#define GPIO_PQ7_M1PWM7 0x000E1C01
|
||||
#define GPIO_PQ7_WT5CCP1 0x000E1C07
|
||||
|
||||
#endif // PART_TM4C123GH6ZXR
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// TM4C1290NCPDT Port/Pin Mapping Definitions
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// pwm.c - API for the PWM modules
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// pwm.h - API function protoypes for Pulse Width Modulation (PWM) ports
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// qei.c - Driver for the Quadrature Encoder with Index.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -274,6 +274,96 @@ QEIErrorGet(uint32_t ui32Base)
|
||||
return((HWREG(ui32Base + QEI_O_STAT) & QEI_STAT_ERROR) ? true : false);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the input filter.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the quadrature encoder module.
|
||||
//!
|
||||
//! This function enables operation of the input filter in the quadrature
|
||||
//! encoder module. The module must be configured before input filter is
|
||||
//! enabled.
|
||||
//!
|
||||
//! \sa QEIFilterConfigure() and QEIEnable()
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
QEIFilterEnable(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT((ui32Base == QEI0_BASE) || (ui32Base == QEI1_BASE));
|
||||
|
||||
//
|
||||
// Enable the input filter.
|
||||
//
|
||||
HWREG(ui32Base + QEI_O_CTL) |= QEI_CTL_FILTEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the input filter.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the quadrature encoder module.
|
||||
//!
|
||||
//! This function disables operation of the input filter in the quadrature
|
||||
//! encoder module.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
QEIFilterDisable(uint32_t ui32Base)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT((ui32Base == QEI0_BASE) || (ui32Base == QEI1_BASE));
|
||||
|
||||
//
|
||||
// Disable the input filter.
|
||||
//
|
||||
HWREG(ui32Base + QEI_O_CTL) &= ~(QEI_CTL_FILTEN);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Configures the input filter.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the quadrature encoder module.
|
||||
//! \param ui32FiltCnt specifies the filter count applied to the input quadrature
|
||||
//! signal before it is counted; can be one of \b QEI_FILTCNT_2,
|
||||
//! \b QEI_FILTCNT_3, \b QEI_FILTCNT_4, \b QEI_FILTCNT_5, \b QEI_FILTCNT_6,
|
||||
//! \b QEI_FILTCNT_7, \b QEI_FILTCNT_8, \b QEI_FILTCNT_9, \b QEI_FILTCNT_10,
|
||||
//! \b QEI_FILTCNT_11, \b QEI_FILTCNT_12, \b QEI_FILTCNT_13, \b QEI_FILTCNT_14,
|
||||
//! \b QEI_FILTCNT_15, \b QEI_FILTCNT_16 or \b QEI_FILTCNT_17
|
||||
//!
|
||||
//! This function configures the operation of the input filter prescale count.
|
||||
//! as specified by \e ui32FiltCnt before the input signals are sent to the
|
||||
//! quadrature encoder module.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
QEIFilterConfigure(uint32_t ui32Base, uint32_t ui32FiltCnt)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT((ui32Base == QEI0_BASE) || (ui32Base == QEI1_BASE));
|
||||
ASSERT(!(ui32FiltCnt & ~(QEI_CTL_FILTCNT_M)));
|
||||
|
||||
//
|
||||
// Set the input filter prescale count.
|
||||
//
|
||||
HWREG(ui32Base + QEI_O_CTL) = ((HWREG(ui32Base + QEI_O_CTL) &
|
||||
~(QEI_CTL_FILTCNT_M)) | ui32FiltCnt);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the velocity capture.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// qei.h - Prototypes for the Quadrature Encoder Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -65,6 +65,29 @@ extern "C"
|
||||
#define QEI_CONFIG_NO_SWAP 0x00000000 // Do not swap ChA and ChB
|
||||
#define QEI_CONFIG_SWAP 0x00000002 // Swap ChA and ChB
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to QEIFilterConfigure as the ui32PreDiv
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define QEI_FILTCNT_2 0x00000000 // Filter Count of 2 System Clocks
|
||||
#define QEI_FILTCNT_3 0x00010000 // Filter Count of 3 System Clocks
|
||||
#define QEI_FILTCNT_4 0x00020000 // Filter Count of 4 System Clocks
|
||||
#define QEI_FILTCNT_5 0x00030000 // Filter Count of 5 System Clocks
|
||||
#define QEI_FILTCNT_6 0x00040000 // Filter Count of 6 System Clocks
|
||||
#define QEI_FILTCNT_7 0x00050000 // Filter Count of 7 System Clocks
|
||||
#define QEI_FILTCNT_8 0x00060000 // Filter Count of 8 System Clocks
|
||||
#define QEI_FILTCNT_9 0x00070000 // Filter Count of 9 System Clocks
|
||||
#define QEI_FILTCNT_10 0x00080000 // Filter Count of 10 System Clocks
|
||||
#define QEI_FILTCNT_11 0x00090000 // Filter Count of 11 System Clocks
|
||||
#define QEI_FILTCNT_12 0x000A0000 // Filter Count of 12 System Clocks
|
||||
#define QEI_FILTCNT_13 0x000B0000 // Filter Count of 13 System Clocks
|
||||
#define QEI_FILTCNT_14 0x000C0000 // Filter Count of 14 System Clocks
|
||||
#define QEI_FILTCNT_15 0x000D0000 // Filter Count of 15 System Clocks
|
||||
#define QEI_FILTCNT_16 0x000E0000 // Filter Count of 16 System Clocks
|
||||
#define QEI_FILTCNT_17 0x000F0000 // Filter Count of 17 System Clocks
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to QEIVelocityConfigure as the ui32PreDiv
|
||||
@@ -104,6 +127,9 @@ extern uint32_t QEIPositionGet(uint32_t ui32Base);
|
||||
extern void QEIPositionSet(uint32_t ui32Base, uint32_t ui32Position);
|
||||
extern int32_t QEIDirectionGet(uint32_t ui32Base);
|
||||
extern bool QEIErrorGet(uint32_t ui32Base);
|
||||
extern void QEIFilterEnable(uint32_t ui32Base);
|
||||
extern void QEIFilterDisable(uint32_t ui32Base);
|
||||
extern void QEIFilterConfigure(uint32_t ui32Base, uint32_t ui32FiltCnt);
|
||||
extern void QEIVelocityEnable(uint32_t ui32Base);
|
||||
extern void QEIVelocityDisable(uint32_t ui32Base);
|
||||
extern void QEIVelocityConfigure(uint32_t ui32Base, uint32_t ui32PreDiv,
|
||||
|
||||
@@ -2,7 +2,7 @@ This project will build the TivaWare Peripheral Driver Library.
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2006-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
Software License Agreement
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,4 +33,4 @@ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -3,7 +3,7 @@
|
||||
// rom_map.h - Macros to facilitate calling functions in the ROM when they are
|
||||
// available and in flash otherwise.
|
||||
//
|
||||
// Copyright (c) 2008-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2008-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
@@ -5854,13 +5854,6 @@
|
||||
#define MAP_USBEndpointDataAvail \
|
||||
USBEndpointDataAvail
|
||||
#endif
|
||||
#ifdef ROM_USBOTGHostRequest
|
||||
#define MAP_USBOTGHostRequest \
|
||||
ROM_USBOTGHostRequest
|
||||
#else
|
||||
#define MAP_USBOTGHostRequest \
|
||||
USBOTGHostRequest
|
||||
#endif
|
||||
#ifdef ROM_USBModeGet
|
||||
#define MAP_USBModeGet \
|
||||
ROM_USBModeGet
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
// rtos_bindings.h - Macros intended to aid porting of TivaWare modules
|
||||
// for use with an RTOS.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -34,7 +34,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
//
|
||||
// shamd5.c - Driver for the SHA/MD5 module.
|
||||
//
|
||||
// Copyright (c) 2012-2014 Texas Instruments Incorporated. All rights reserved.
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,7 +33,7 @@
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user