1.修改代码规范和许可

2.删除没用的文件
2026-03-25 01:43:49 +08:00 · 2021-08-27 15:19:21 +08:00
parent 4a836e2a89
commit 38ec6d229d
61 changed files with 1053 additions and 11340 deletions
--- a/.github/workflows/action.yml
+++ b/.github/workflows/action.yml
@@ -38,6 +38,7 @@ jobs:
         - {RTT_BSP: "gd32e230k-start", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "gd32303e-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "gd32450z-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "fm33lc026", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "imx6sx/cortex-a9", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "imxrt/imxrt1052-atk-commander", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "imxrt/imxrt1052-fire-pro", RTT_TOOL_CHAIN: "sourcery-arm"}
--- a/.ignore_format.yml
+++ b/.ignore_format.yml
@@ -12,3 +12,4 @@ dir_path:
 - components/net/lwip-2.0.3
 - components/net/lwip-2.1.2
 - bsp/mm32f327x/Libraries
+- bsp/fm33lc026/libraries
--- a/bsp/Copyright_Notice.md
+++ b/bsp/Copyright_Notice.md
@@ -125,6 +125,17 @@ Path:
 - bsp/essemi/es32f0654/libraries/CMSIS/Include
 - bsp/essemi/es8p508x/libraries/CMSIS

+###fm33lc026
+
+License: Mulan PSL v1
+
+Copyright: Copyright (c) [2019] [Fudan Microelectronics]
+
+Path:
+
+- bsp/fm33lc026\libraries\FM33LC0xx_FL_Driver
+- bsp/fm33lc026\libraries\FM
+
 ### frdm-k64f

 License: bsd-new
--- a/bsp/fm33lc026/.config
+++ b/bsp/fm33lc026/.config
@@ -523,7 +523,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_STATE_MACHINE is not set
 # CONFIG_PKG_USING_MCURSES is not set
 # CONFIG_PKG_USING_COWSAY is not set
-CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_FAMILY_FM33=y
 CONFIG_SOC_SERIES_FM33LC0XX=y

 #
@@ -531,10 +531,6 @@ CONFIG_SOC_SERIES_FM33LC0XX=y
 #
 CONFIG_SOC_FM33LC0XX=y

-#
-# Onboard Peripheral Drivers
-#
-
 #
 # On-chip Peripheral Drivers
 #
@@ -543,8 +539,3 @@ CONFIG_BSP_USING_UART0=y
 CONFIG_BSP_USING_UART1=y
 CONFIG_BSP_USING_UART4=y
 # CONFIG_BSP_USING_UART5 is not set
-# CONFIG_BSP_USING_UDID is not set
-
-#
-# Board extended module Drivers
-#
--- a/bsp/fm33lc026/SConstruct
+++ b/bsp/fm33lc026/SConstruct
@@ -47,11 +47,11 @@ Export('SDK_LIB')
 # prepare building environment
 objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)

-stm32_library = 'FM33LC0xx_FL_Driver'
-rtconfig.BSP_LIBRARY_TYPE = stm32_library
+fm33_library = 'FM33LC0xx_FL_Driver'
+rtconfig.BSP_LIBRARY_TYPE = fm33_library

 # include libraries
-objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+objs.extend(SConscript(os.path.join(libraries_path_prefix, fm33_library, 'SConscript')))

 # include drivers
 objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
--- a/bsp/fm33lc026/applications/main.c
+++ b/bsp/fm33lc026/applications/main.c
@@ -5,41 +5,28 @@
 *
 * Change Logs:
 * Date           Author       Notes
- * 2018-11-06     zylx         first version
+ * 2021-08-27     Jiao         first version
 */

 #include <rtthread.h>
-#include <rtdevice.h>
-#include "fm33lc0xx_fl_gpio.h"
-#include "fm33lc0xx_fl_flash.h"
-#include "main.h"
-
-
-static void LED_init(void)
-{
-	FL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-   
-	FL_GPIO_SetOutputPin(GPIOD,FL_GPIO_PIN_4);	
-	GPIO_InitStruct.pin = FL_GPIO_PIN_4;
-	GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
-	GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-	GPIO_InitStruct.pull = FL_DISABLE;
-	FL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-}
-
+#include "board.h"

 int main(void)
 {
-	LED_init();
+    FL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+    FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
+    GPIO_InitStruct.pin = FL_GPIO_PIN_4;
+    GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
+    GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+    GPIO_InitStruct.pull = FL_DISABLE;
+    FL_GPIO_Init(GPIOD, &GPIO_InitStruct);
    while (1)
    {
-		FL_GPIO_SetOutputPin(GPIOD,FL_GPIO_PIN_4);	
+        FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
        rt_thread_mdelay(500);
-		FL_GPIO_ResetOutputPin(GPIOD,FL_GPIO_PIN_4);	
+        FL_GPIO_ResetOutputPin(GPIOD, FL_GPIO_PIN_4);
        rt_thread_mdelay(500);
    }

-//    return RT_EOK;
 }
-
-
--- a/bsp/fm33lc026/applications/main.h
+++ b/bsp/fm33lc026/applications/main.h
@@ -1,39 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
-  ******************************************************************************
-  * @file           : main.h
-  * @brief          : Header for main.c file.
-  *                   This file contains the common defines of the application.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
-  *
-  ******************************************************************************
-  */
-/* USER CODE END Header */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MAIN_H
-#define __MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MAIN_H */
-
-/************************ (C) COPYRIGHT FMSH *****END OF FILE****/
--- a/bsp/fm33lc026/board/Kconfig
+++ b/bsp/fm33lc026/board/Kconfig
@@ -7,10 +7,6 @@ config SOC_FM33LC0XX
    select RT_USING_USER_MAIN
    default y

-menu "Onboard Peripheral Drivers"
-
-endmenu
-
 menu "On-chip Peripheral Drivers"

    menuconfig BSP_USING_UART
@@ -38,8 +34,5 @@ menu "On-chip Peripheral Drivers"
    
 endmenu

-menu "Board extended module Drivers"
-
-endmenu

 endmenu
--- a/bsp/fm33lc026/board/board.c
+++ b/bsp/fm33lc026/board/board.c
@@ -5,70 +5,70 @@
 *
 * Change Logs:
 * Date           Author       Notes
- * 2018-12-21     zylx         first version
+ * 2021-08-27     Jiao         first version
 */
- 
+
 #include "board.h"

 FL_ErrorStatus FL_UART_GPIO_Init(UART_Type *UARTx)
 {
-	FL_ErrorStatus status = FL_FAIL;
-	FL_GPIO_InitTypeDef    GPIO_InitStruct;
-	if(UARTx ==  UART0)
-	{
-		GPIO_InitStruct.pin = FL_GPIO_PIN_13;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+    FL_ErrorStatus status = FL_FAIL;
+    FL_GPIO_InitTypeDef    GPIO_InitStruct;
+    if (UARTx ==  UART0)
+    {
+        GPIO_InitStruct.pin = FL_GPIO_PIN_13;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOA, &GPIO_InitStruct );
+        status = FL_GPIO_Init(GPIOA, &GPIO_InitStruct);

-		GPIO_InitStruct.pin = FL_GPIO_PIN_14;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+        GPIO_InitStruct.pin = FL_GPIO_PIN_14;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOA, &GPIO_InitStruct );
-	}
-	else if(UARTx ==  UART1)
-	{
-		GPIO_InitStruct.pin = FL_GPIO_PIN_13;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+        status = FL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+    }
+    else if (UARTx ==  UART1)
+    {
+        GPIO_InitStruct.pin = FL_GPIO_PIN_13;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOB, &GPIO_InitStruct );
+        status = FL_GPIO_Init(GPIOB, &GPIO_InitStruct);

-		GPIO_InitStruct.pin = FL_GPIO_PIN_14;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+        GPIO_InitStruct.pin = FL_GPIO_PIN_14;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOB, &GPIO_InitStruct );
-	}
-	else if(UARTx ==  UART4)
-	{
-		GPIO_InitStruct.pin = FL_GPIO_PIN_0;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+        status = FL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+    }
+    else if (UARTx ==  UART4)
+    {
+        GPIO_InitStruct.pin = FL_GPIO_PIN_0;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOA, &GPIO_InitStruct );
+        status = FL_GPIO_Init(GPIOA, &GPIO_InitStruct);

-		GPIO_InitStruct.pin = FL_GPIO_PIN_1;
-		GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
-		GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-		GPIO_InitStruct.pull = FL_DISABLE;
-		GPIO_InitStruct.remapPin = FL_DISABLE;
+        GPIO_InitStruct.pin = FL_GPIO_PIN_1;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;

-		status = FL_GPIO_Init( GPIOA, &GPIO_InitStruct );
-	}
-	return status;
+        status = FL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+    }
+    return status;
 }


@@ -81,23 +81,23 @@ static void RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLL_R, uint32_t P

 static void RCHFInit(uint32_t clock)
 {
-    switch(clock)
+    switch (clock)
    {
-        case FL_RCC_RCHF_FREQUENCY_8MHZ:
-            FL_RCC_RCHF_WriteTrimValue(RCHF8M_TRIM);
-            break;
+    case FL_RCC_RCHF_FREQUENCY_8MHZ:
+        FL_RCC_RCHF_WriteTrimValue(RCHF8M_TRIM);
+        break;

-        case FL_RCC_RCHF_FREQUENCY_16MHZ:
-            FL_RCC_RCHF_WriteTrimValue(RCHF16M_TRIM);
-            break;
+    case FL_RCC_RCHF_FREQUENCY_16MHZ:
+        FL_RCC_RCHF_WriteTrimValue(RCHF16M_TRIM);
+        break;

-        case FL_RCC_RCHF_FREQUENCY_24MHZ:
-            FL_RCC_RCHF_WriteTrimValue(RCHF24M_TRIM);
-            break;
+    case FL_RCC_RCHF_FREQUENCY_24MHZ:
+        FL_RCC_RCHF_WriteTrimValue(RCHF24M_TRIM);
+        break;

-        default:
-            FL_RCC_RCHF_WriteTrimValue(RCHF8M_TRIM);
-            break;
+    default:
+        FL_RCC_RCHF_WriteTrimValue(RCHF8M_TRIM);
+        break;
    }

    FL_RCC_RCHF_SetFrequency(clock);
@@ -107,31 +107,35 @@ void SelRCHFToPLL(uint32_t rchf, uint32_t clock)
 {
    uint32_t div = FL_RCC_PLL_PSC_DIV8;

-    if(clock > 64) { return; }
+    if (clock > 64)
+    {
+        return;
+    }

    RCHFInit(rchf);

-    switch(rchf)
+    switch (rchf)
    {
-        case FL_RCC_RCHF_FREQUENCY_16MHZ:
-            div = FL_RCC_PLL_PSC_DIV16;
-            break;
+    case FL_RCC_RCHF_FREQUENCY_16MHZ:
+        div = FL_RCC_PLL_PSC_DIV16;
+        break;

-        case FL_RCC_RCHF_FREQUENCY_24MHZ:
-            div = FL_RCC_PLL_PSC_DIV24;
-            break;
+    case FL_RCC_RCHF_FREQUENCY_24MHZ:
+        div = FL_RCC_PLL_PSC_DIV24;
+        break;

-        default:
-            break;
+    default:
+        break;
    }

-    if(clock <= 24)
+    if (clock <= 24)
    {
        FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE);
    }

    else
-        if((clock > 24) && (clock <= 48))
+    {
+        if ((clock > 24) && (clock <= 48))
        {
            FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE);
        }
@@ -140,15 +144,15 @@ void SelRCHFToPLL(uint32_t rchf, uint32_t clock)
        {
            FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE);
        }
+    }

    RCC_PLL_ConfigDomain_SYS(FL_RCC_PLL_CLK_SOURCE_RCHF, div, clock, FL_RCC_PLL_OUTPUT_X1);
    FL_RCC_PLL_Enable();

-    while(FL_RCC_IsActiveFlag_PLLReady() != FL_SET);
+    while (FL_RCC_IsActiveFlag_PLLReady() != FL_SET);

    FL_RCC_SetAHBPrescaler(FL_RCC_AHBCLK_PSC_DIV1);
    FL_RCC_SetAPB1Prescaler(FL_RCC_APB1CLK_PSC_DIV1);
    FL_RCC_SetAPB2Prescaler(FL_RCC_APB2CLK_PSC_DIV1);
    FL_RCC_SetSystemClockSource(FL_RCC_SYSTEM_CLK_SOURCE_PLL);
 }
-
--- a/bsp/fm33lc026/board/board.h
+++ b/bsp/fm33lc026/board/board.h
@@ -5,7 +5,7 @@
 *
 * Change Logs:
 * Date           Author       Notes
- * 2018-11-5      SummerGift   first version
+ * 2021-08-27     Jiao         first version
 */

 #ifndef __BOARD_H__
--- a/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript
+++ b/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript
@@ -24,15 +24,9 @@ if GetDepend(['RT_USING_I2C']):
 if GetDepend(['RT_USING_SPI']):
    src += ['Src/fm33lc0xx_fl_spi.c']

-#if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
-#    src += ['Src/fm33lc0xx_fl_pcd.c']
-#    src += ['Src/fm33lc0xx_fl_pcd_ex.c']
-
-if GetDepend(['RT_USING_CAN']):
-    src += ['Src/fm33lc0xx_fl_can.c']
-
 if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']):
-    src += ['Src/fm33lc0xx_fl_tim.c']
+    src += ['Src/fm33lc0xx_fl_atim.c']
+    src += ['Src/fm33lc0xx_fl_bstim32.c']

 if GetDepend(['RT_USING_ADC']):
    src += ['Src/fm33lc0xx_fl_adc.c']
--- a/bsp/fm33lc026/libraries/HAL_Drivers/Kconfig
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/Kconfig
@@ -1,62 +1,2 @@
-if BSP_USING_USBD
-    config BSP_USBD_TYPE_FS
-        bool
-        # "USB Full Speed (FS) Core"
-    config BSP_USBD_TYPE_HS
-        bool
-        # "USB High Speed (HS) Core"

-    config BSP_USBD_SPEED_HS
-        bool 
-        # "USB High Speed (HS) Mode"
-    config BSP_USBD_SPEED_HSINFS
-        bool 
-        # "USB High Speed (HS) Core in FS mode"
-
-    config BSP_USBD_PHY_EMBEDDED
-        bool 
-        # "Using Embedded phy interface"
-    config BSP_USBD_PHY_UTMI
-        bool 
-        # "UTMI: USB 2.0 Transceiver Macrocell Interace"
-    config BSP_USBD_PHY_ULPI
-        bool 
-        # "ULPI: UTMI+ Low Pin Interface"
-endif
-
-config BSP_USING_CRC
-    bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
-    select RT_USING_HWCRYPTO
-    select RT_HWCRYPTO_USING_CRC
-    # "Crypto device frame dose not support above 8-bits granularity"
-    # "Reserve progress, running well, about 32-bits granularity, such as stm32f1, stm32f4"
-    depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1)
-    default n 
-
-config BSP_USING_RNG
-    bool "Enable RNG (Random Number Generator)"
-    select RT_USING_HWCRYPTO
-    select RT_HWCRYPTO_USING_RNG
-    depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
-                SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1)
-    default n
-
-config BSP_USING_HASH
-    bool "Enable HASH (Hash House Harriers)"
-    select RT_USING_HWCRYPTO
-    select RT_HWCRYPTO_USING_HASH
-    depends on (SOC_SERIES_STM32MP1)
-    default n
-
-config BSP_USING_CRYP
-    bool "Enable CRYP (Encrypt And Decrypt Data)"
-    select RT_USING_HWCRYPTO
-    select RT_HWCRYPTO_USING_CRYP
-    depends on (SOC_SERIES_STM32MP1)
-    default n
-
-config BSP_USING_UDID
-    bool "Enable UDID (Unique Device Identifier)"
-    select RT_USING_HWCRYPTO
-    default n

--- a/bsp/fm33lc026/libraries/HAL_Drivers/SConscript
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/SConscript
@@ -20,16 +20,10 @@ if GetDepend(['RT_USING_PWM']):
 if GetDepend(['RT_USING_SPI']):
    src += ['drv_spi.c']

-if GetDepend(['RT_USING_QSPI']):
-    src += ['drv_qspi.c']
-
 if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
    if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
        src += ['drv_soft_i2c.c']

-if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
-    src += ['drv_eth.c']
-
 if GetDepend(['RT_USING_ADC']):
    src += Glob('drv_adc.c')

@@ -39,43 +33,19 @@ if GetDepend(['RT_USING_DAC']):
 if GetDepend(['RT_USING_CAN']):
    src += ['drv_can.c']

-if GetDepend(['RT_USING_PM', 'SOC_SERIES_STM32L4']):
+if GetDepend(['RT_USING_PM']):
    src += ['drv_pm.c']
    src += ['drv_lptim.c']

-if GetDepend('BSP_USING_SDRAM'):
-    src += ['drv_sdram.c']
-
-if GetDepend('BSP_USING_LCD'):
-    src += ['drv_lcd.c']
-
-if GetDepend('BSP_USING_LCD_MIPI'):
-    src += ['drv_lcd_mipi.c']
-
 if GetDepend('BSP_USING_ONCHIP_RTC'):
    src += ['drv_rtc.c']

 if GetDepend('BSP_USING_ON_CHIP_FLASH'):
    src += ['drv_flash.c']

-if GetDepend('RT_USING_HWCRYPTO'):
-    src += ['drv_crypto.c']
-
 if GetDepend(['BSP_USING_WDT']):
    src += ['drv_wdt.c']

-if GetDepend(['BSP_USING_SDIO']):
-    src += ['drv_sdio.c']
-
-if GetDepend(['BSP_USING_USBD']):
-    src += ['drv_usbd.c']
-
-if GetDepend(['BSP_USING_PULSE_ENCODER']):
-    src += ['drv_pulse_encoder.c']
-
-if GetDepend(['BSP_USING_USBH']):
-    src += ['drv_usbh.c']
-
 src += ['drv_common.c']

 path =  [cwd]
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/adc_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/adc_config.h
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-24     zylx         first version
- */
-
-#ifndef __ADC_CONFIG_H__
-#define __ADC_CONFIG_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef BSP_USING_ADC1
-#ifndef ADC1_CONFIG
-#define ADC1_CONFIG                                                 \
-    {                                                               \
-       .Instance                   = ADC1,                          \
-       .Init.ClockPrescaler        = ADC_CLOCK_ASYNC_DIV1,          \
-       .Init.Resolution            = ADC_RESOLUTION_12B,            \
-       .Init.DataAlign             = ADC_DATAALIGN_RIGHT,           \
-       .Init.ScanConvMode          = ADC_SCAN_DIRECTION_FORWARD,    \
-       .Init.EOCSelection          = ADC_EOC_SINGLE_CONV,           \
-       .Init.LowPowerAutoWait      = DISABLE,                       \
-       .Init.LowPowerAutoPowerOff  = DISABLE,                       \
-       .Init.ContinuousConvMode    = DISABLE,                       \
-       .Init.DiscontinuousConvMode = ENABLE,                        \
-       .Init.ExternalTrigConv      = ADC_SOFTWARE_START,            \
-       .Init.ExternalTrigConvEdge  = ADC_EXTERNALTRIGCONVEDGE_NONE, \
-       .Init.DMAContinuousRequests = ENABLE,                        \
-       .Init.Overrun               = ADC_OVR_DATA_OVERWRITTEN,      \
-    }
-#endif /* ADC1_CONFIG */
-#endif /* BSP_USING_ADC1 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ADC_CONFIG_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/dma_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/dma_config.h
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-01-05     zylx         first version
- * 2019-01-08     SummerGift   clean up the code
- */
-
-#ifndef __DMA_CONFIG_H__
-#define __DMA_CONFIG_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* DMA1 channel1  */
-
-/* DMA1 channel2-3 DMA2 channel1-2 */
-#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
-#define UART1_DMA_RX_IRQHandler          DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
-#define UART1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
-#define UART1_RX_DMA_INSTANCE            DMA1_Channel3
-#define UART1_RX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
-#elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
-#define SPI1_DMA_RX_TX_IRQHandler       DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler 
-#define SPI1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
-#define SPI1_RX_DMA_INSTANCE            DMA1_Channel2
-#define SPI1_RX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
-#endif
-
-#if  defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
-#define SPI1_DMA_RX_TX_IRQHandler       DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
-#define SPI1_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
-#define SPI1_TX_DMA_INSTANCE            DMA1_Channel3
-#define SPI1_TX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
-#endif
-/* DMA1 channel2-3 DMA2 channel1-2 */
-
-/* DMA1 channel4-7 DMA2 channel3-5 */
-#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
-#define UART2_DMA_RX_IRQHandler          DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
-#define UART2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
-#define UART2_RX_DMA_INSTANCE            DMA1_Channel5
-#define UART2_RX_DMA_IRQ                 DMA1_Ch4_7_DMA2_Ch3_5_IRQn
-#endif
-/* DMA1 channel4-7 DMA2 channel3-5 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DMA_CONFIG_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/pwm_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/pwm_config.h
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-24     zylx         first version
- */
-
-#ifndef __PWM_CONFIG_H__
-#define __PWM_CONFIG_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef BSP_USING_PWM2
-#ifndef PWM2_CONFIG
-#define PWM2_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM2,         \
-       .name                    = "pwm2",       \
-       .channel                 = 0             \
-    }
-#endif /* PWM2_CONFIG */
-#endif /* BSP_USING_PWM2 */
-
-#ifdef BSP_USING_PWM3
-#ifndef PWM3_CONFIG
-#define PWM3_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM3,         \
-       .name                    = "pwm3",       \
-       .channel                 = 0             \
-    }
-#endif /* PWM3_CONFIG */
-#endif /* BSP_USING_PWM3 */
-
-#ifdef BSP_USING_PWM4
-#ifndef PWM4_CONFIG
-#define PWM4_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM4,         \
-       .name                    = "pwm4",       \
-       .channel                 = 0             \
-    }
-#endif /* PWM4_CONFIG */
-#endif /* BSP_USING_PWM4 */
-
-#ifdef BSP_USING_PWM5
-#ifndef PWM5_CONFIG
-#define PWM5_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM5,         \
-       .name                    = "pwm5",       \
-       .channel                 = 0             \
-    }
-#endif /* PWM5_CONFIG */
-#endif /* BSP_USING_PWM5 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __PWM_CONFIG_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/spi_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/spi_config.h
@@ -1,92 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-06     SummerGift   first version
- * 2019-01-05     SummerGift   modify DMA support
- */
-
-#ifndef __SPI_CONFIG_H__
-#define __SPI_CONFIG_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef BSP_USING_SPI1
-#ifndef SPI1_BUS_CONFIG
-#define SPI1_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI1,                           \
-        .bus_name = "spi1",                         \
-    }
-#endif /* SPI1_BUS_CONFIG */
-#endif /* BSP_USING_SPI1 */
-    
-#ifdef BSP_SPI1_TX_USING_DMA
-#ifndef SPI1_TX_DMA_CONFIG
-#define SPI1_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_TX_DMA_RCC,                 \
-        .Instance = SPI1_TX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_TX_DMA_IRQ,                 \
-    }
-#endif /* SPI1_TX_DMA_CONFIG */
-#endif /* BSP_SPI1_TX_USING_DMA */
-
-#ifdef BSP_SPI1_RX_USING_DMA
-#ifndef SPI1_RX_DMA_CONFIG
-#define SPI1_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc = SPI1_RX_DMA_RCC,                 \
-        .Instance = SPI1_RX_DMA_INSTANCE,           \
-        .dma_irq = SPI1_RX_DMA_IRQ,                 \
-    }
-#endif /* SPI1_RX_DMA_CONFIG */
-#endif /* BSP_SPI1_RX_USING_DMA */
-
-#ifdef BSP_USING_SPI2
-#ifndef SPI2_BUS_CONFIG
-#define SPI2_BUS_CONFIG                             \
-    {                                               \
-        .Instance = SPI2,                           \
-        .bus_name = "spi2",                         \
-    }
-#endif /* SPI2_BUS_CONFIG */
-#endif /* BSP_USING_SPI2 */
-    
-#ifdef BSP_SPI2_TX_USING_DMA
-#ifndef SPI2_TX_DMA_CONFIG
-#define SPI2_TX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_TX_DMA_RCC,                \
-        .Instance = SPI2_TX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_TX_DMA_IRQ,                \
-    }
-#endif /* SPI2_TX_DMA_CONFIG */
-#endif /* BSP_SPI2_TX_USING_DMA */
-
-#ifdef BSP_SPI2_RX_USING_DMA
-#ifndef SPI2_RX_DMA_CONFIG
-#define SPI2_RX_DMA_CONFIG                          \
-    {                                               \
-        .dma_rcc  = SPI2_RX_DMA_RCC,                \
-        .Instance = SPI2_RX_DMA_INSTANCE,           \
-        .dma_irq  = SPI2_RX_DMA_IRQ,                \
-    }
-#endif /* SPI2_RX_DMA_CONFIG */
-#endif /* BSP_SPI2_RX_USING_DMA */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SPI_CONFIG_H__ */
-
-
-
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/tim_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/tim_config.h
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-24     zylx         first version
- */
-
-#ifndef __TIM_CONFIG_H__
-#define __TIM_CONFIG_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef TIM_DEV_INFO_CONFIG
-#define TIM_DEV_INFO_CONFIG                     \
-    {                                           \
-        .maxfreq = 1000000,                     \
-        .minfreq = 2000,                        \
-        .maxcnt  = 0xFFFF,                      \
-        .cntmode = HWTIMER_CNTMODE_UP,          \
-    }
-#endif /* TIM_DEV_INFO_CONFIG */
-
-#ifdef BSP_USING_TIM14
-#ifndef TIM14_CONFIG
-#define TIM14_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM14,         \
-       .tim_irqn                = TIM14_IRQn,    \
-       .name                    = "timer14",     \
-    }
-#endif /* TIM14_CONFIG */
-#endif /* BSP_USING_TIM14 */
-
-#ifdef BSP_USING_TIM16
-#ifndef TIM16_CONFIG
-#define TIM16_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM16,         \
-       .tim_irqn                = TIM16_IRQn,    \
-       .name                    = "timer16",     \
-    }
-#endif /* TIM16_CONFIG */
-#endif /* BSP_USING_TIM16 */
-
-#ifdef BSP_USING_TIM17
-#ifndef TIM17_CONFIG
-#define TIM17_CONFIG                             \
-    {                                           \
-       .tim_handle.Instance     = TIM17,         \
-       .tim_irqn                = TIM17_IRQn,    \
-       .name                    = "timer17",     \
-    }
-#endif /* TIM17_CONFIG */
-#endif /* BSP_USING_TIM17 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __TIM_CONFIG_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/config/uart_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/config/uart_config.h
@@ -5,7 +5,7 @@
 *
 * Change Logs:
 * Date           Author       Notes
- * 2018-10-30     zylx         first version
+ * 2021-08-27     Jiao         first version
 */

 #ifndef __UART_CONFIG_H__
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_adc.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_adc.c
@@ -1,320 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-05     zylx         first version
- * 2018-12-12     greedyhao    Porting for stm32f7xx
- * 2019-02-01     yuneizhilin  fix the stm32_adc_init function initialization issue
- * 2020-06-17     thread-liu   Porting for stm32mp1xx
- * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
- */
-
-#include <board.h>
-
-#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
-#include "drv_config.h"
-
-//#define DRV_DEBUG
-#define LOG_TAG             "drv.adc"
-#include <drv_log.h>
-
-static ADC_HandleTypeDef adc_config[] =
-{
-#ifdef BSP_USING_ADC1
-    ADC1_CONFIG,
-#endif
-
-#ifdef BSP_USING_ADC2
-    ADC2_CONFIG,
-#endif
-
-#ifdef BSP_USING_ADC3
-    ADC3_CONFIG,
-#endif
-};
-
-struct stm32_adc
-{
-    ADC_HandleTypeDef ADC_Handler;
-    struct rt_adc_device stm32_adc_device;
-};
-
-static struct stm32_adc stm32_adc_obj[sizeof(adc_config) / sizeof(adc_config[0])];
-
-static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
-{
-    ADC_HandleTypeDef *stm32_adc_handler;
-    RT_ASSERT(device != RT_NULL);
-    stm32_adc_handler = device->parent.user_data;
-
-    if (enabled)
-    {
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
-        ADC_Enable(stm32_adc_handler);
-#else
-        __HAL_ADC_ENABLE(stm32_adc_handler);
-#endif
-    }
-    else
-    {
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
-        ADC_Disable(stm32_adc_handler);
-#else
-        __HAL_ADC_DISABLE(stm32_adc_handler);
-#endif
-    }
-
-    return RT_EOK;
-}
-
-static rt_uint32_t stm32_adc_get_channel(rt_uint32_t channel)
-{
-    rt_uint32_t stm32_channel = 0;
-
-    switch (channel)
-    {
-    case  0:
-        stm32_channel = ADC_CHANNEL_0;
-        break;
-    case  1:
-        stm32_channel = ADC_CHANNEL_1;
-        break;
-    case  2:
-        stm32_channel = ADC_CHANNEL_2;
-        break;
-    case  3:
-        stm32_channel = ADC_CHANNEL_3;
-        break;
-    case  4:
-        stm32_channel = ADC_CHANNEL_4;
-        break;
-    case  5:
-        stm32_channel = ADC_CHANNEL_5;
-        break;
-    case  6:
-        stm32_channel = ADC_CHANNEL_6;
-        break;
-    case  7:
-        stm32_channel = ADC_CHANNEL_7;
-        break;
-    case  8:
-        stm32_channel = ADC_CHANNEL_8;
-        break;
-    case  9:
-        stm32_channel = ADC_CHANNEL_9;
-        break;
-    case 10:
-        stm32_channel = ADC_CHANNEL_10;
-        break;
-    case 11:
-        stm32_channel = ADC_CHANNEL_11;
-        break;
-    case 12:
-        stm32_channel = ADC_CHANNEL_12;
-        break;
-    case 13:
-        stm32_channel = ADC_CHANNEL_13;
-        break;
-    case 14:
-        stm32_channel = ADC_CHANNEL_14;
-        break;
-    case 15:
-        stm32_channel = ADC_CHANNEL_15;
-        break;
-#ifdef ADC_CHANNEL_16
-    case 16:
-        stm32_channel = ADC_CHANNEL_16;
-        break;
-#endif
-    case 17:
-        stm32_channel = ADC_CHANNEL_17;
-        break;
-#ifdef ADC_CHANNEL_18
-    case 18:
-        stm32_channel = ADC_CHANNEL_18;
-        break;
-#endif
-#ifdef ADC_CHANNEL_19
-    case 19:
-        stm32_channel = ADC_CHANNEL_19;
-        break;
-#endif
-    }
-
-    return stm32_channel;
-}
-
-static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
-{
-    ADC_ChannelConfTypeDef ADC_ChanConf;
-    ADC_HandleTypeDef *stm32_adc_handler;
-
-    RT_ASSERT(device != RT_NULL);
-    RT_ASSERT(value != RT_NULL);
-
-    stm32_adc_handler = device->parent.user_data;
-
-    rt_memset(&ADC_ChanConf, 0, sizeof(ADC_ChanConf));
-
-#ifndef ADC_CHANNEL_16
-    if (channel == 16)
-    {
-        LOG_E("ADC channel must not be 16.");
-        return -RT_ERROR;
-    }
-#endif
-
-/* ADC channel number is up to 17 */
-#if !defined(ADC_CHANNEL_18)
-    if (channel <= 17)
-/* ADC channel number is up to 19 */
-#elif defined(ADC_CHANNEL_19)
-    if (channel <= 19)
-/* ADC channel number is up to 18 */
-#else
-    if (channel <= 18)
-#endif
-    {
-        /* set stm32 ADC channel */
-        ADC_ChanConf.Channel =  stm32_adc_get_channel(channel);
-    }
-    else
-    {
-#if !defined(ADC_CHANNEL_18)
-        LOG_E("ADC channel must be between 0 and 17.");
-#elif defined(ADC_CHANNEL_19)
-        LOG_E("ADC channel must be between 0 and 19.");
-#else
-        LOG_E("ADC channel must be between 0 and 18.");
-#endif
-        return -RT_ERROR;
-    }
-    
-#if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
-    ADC_ChanConf.Rank = ADC_REGULAR_RANK_1;
-#else
-    ADC_ChanConf.Rank = 1;
-#endif
-    
-#if defined(SOC_SERIES_STM32F0)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_71CYCLES_5;
-#elif defined(SOC_SERIES_STM32F1)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
-#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES;
-#elif defined(SOC_SERIES_STM32L4)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
-#elif defined(SOC_SERIES_STM32MP1)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
-#elif defined(SOC_SERIES_STM32H7)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_64CYCLES_5;
-    #elif defined (SOC_SERIES_STM32WB)
-    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
-#endif
-
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
-    ADC_ChanConf.Offset = 0;
-#endif
-
-#if defined(SOC_SERIES_STM32L4)
-    ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
-    ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
-#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
-    ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;  /* ADC channel affected to offset number */
-    ADC_ChanConf.Offset       = 0; 
-    ADC_ChanConf.SingleDiff   = ADC_SINGLE_ENDED; /* ADC channel differential mode */
-#endif
-    HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf);
-
-    /* perform an automatic ADC calibration to improve the conversion accuracy */
-#if defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
-    if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_ChanConf.SingleDiff) != HAL_OK)
-    {
-        LOG_E("ADC calibration error!\n");
-        return -RT_ERROR;
-    }
-#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
-    /* Run the ADC linear calibration in single-ended mode */
-    if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_ChanConf.SingleDiff) != HAL_OK)
-    {
-        LOG_E("ADC open linear calibration error!\n");
-        /* Calibration Error */
-        return -RT_ERROR;
-    }
-#endif
-    /* start ADC */
-    HAL_ADC_Start(stm32_adc_handler);
-
-    /* Wait for the ADC to convert */
-    HAL_ADC_PollForConversion(stm32_adc_handler, 100);
-
-    /* get ADC value */
-    *value = (rt_uint32_t)HAL_ADC_GetValue(stm32_adc_handler);
-
-    return RT_EOK;
-}
-
-static const struct rt_adc_ops stm_adc_ops =
-{
-    .enabled = stm32_adc_enabled,
-    .convert = stm32_get_adc_value,
-};
-
-static int stm32_adc_init(void)
-{
-    int result = RT_EOK;
-    /* save adc name */
-    char name_buf[5] = {'a', 'd', 'c', '0', 0};
-    int i = 0;
-
-    for (i = 0; i < sizeof(adc_config) / sizeof(adc_config[0]); i++)
-    {
-        /* ADC init */
-        name_buf[3] = '0';
-        stm32_adc_obj[i].ADC_Handler = adc_config[i];
-#if defined(ADC1)
-        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC1)
-        {
-            name_buf[3] = '1';
-        }
-#endif
-#if defined(ADC2)
-        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC2)
-        {
-            name_buf[3] = '2';
-        }
-#endif
-#if defined(ADC3)
-        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC3)
-        {
-            name_buf[3] = '3';
-        }
-#endif
-        if (HAL_ADC_Init(&stm32_adc_obj[i].ADC_Handler) != HAL_OK)
-        {
-            LOG_E("%s init failed", name_buf);
-            result = -RT_ERROR;
-        }
-        else
-        {
-            /* register ADC device */
-            if (rt_hw_adc_register(&stm32_adc_obj[i].stm32_adc_device, name_buf, &stm_adc_ops, &stm32_adc_obj[i].ADC_Handler) == RT_EOK)
-            {
-                LOG_D("%s init success", name_buf);
-            }
-            else
-            {
-                LOG_E("%s register failed", name_buf);
-                result = -RT_ERROR;
-            }
-        }
-    }
-
-    return result;
-}
-INIT_BOARD_EXPORT(stm32_adc_init);
-
-#endif /* BSP_USING_ADC */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_can.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_can.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_can.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_can.h
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-08-05     Xeon Xu      the first version
- * 2019-01-22     YLZ          port from stm324xx-HAL to bsp stm3210x-HAL
- * 2019-01-26     YLZ          redefine `struct stm32_drv_can` add member `Rx1Message`
- * 2019-02-19     YLZ          port to BSP [stm32]
- * 2019-06-17     YLZ          modify struct stm32_drv_can.
- */
-
-#ifndef __DRV_CAN_H__
-#define __DRV_CAN_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <board.h>
-#include <rtdevice.h>
-#include <rtthread.h>
-
-#define BS1SHIFT        16
-#define BS2SHIFT        20
-#define RRESCLSHIFT     0
-#define SJWSHIFT        24
-#define BS1MASK         ((0x0F) << BS1SHIFT )
-#define BS2MASK         ((0x07) << BS2SHIFT )
-#define RRESCLMASK      (0x3FF << RRESCLSHIFT )
-#define SJWMASK         (0x3 << SJWSHIFT )
-
-struct stm32_baud_rate_tab
-{
-    rt_uint32_t baud_rate;
-    rt_uint32_t config_data;
-};
-#define BAUD_DATA(TYPE,NO)       ((can_baud_rate_tab[NO].config_data & TYPE##MASK))
-
-/* stm32 can device */
-struct stm32_can
-{
-    char *name;
-    CAN_HandleTypeDef CanHandle;
-    CAN_FilterTypeDef FilterConfig;
-    struct rt_can_device device;     /* inherit from can device */
-};
-
-int rt_hw_can_init(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__DRV_CAN_H__ */
-
-/************************** end of file ******************/
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_common.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_common.c
@@ -6,13 +6,14 @@
 * Change Logs:
 * Date           Author       Notes
 * 2018-11-7      SummerGift   first version
- */
+ * 2021-08-27     Jiao         change to fm33
+*/

 #include "drv_common.h"
 #include "system_fm33lc0xx.h"

 #ifdef RT_USING_SERIAL
-#include "drv_usart.h"
+    #include "drv_usart.h"
 #endif

 #ifdef RT_USING_FINSH
@@ -27,7 +28,7 @@ FINSH_FUNCTION_EXPORT_ALIAS(reboot, __cmd_reboot, Reboot System);
 /* SysTick configuration */
 void rt_hw_systick_init(void)
 {
-	SystemCoreClockUpdate();
+    SystemCoreClockUpdate();
    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
    NVIC_SetPriority(SysTick_IRQn, 0xFF);
 }
@@ -61,7 +62,7 @@ void _Error_Handler(char *s, int num)
 {
    /* USER CODE BEGIN Error_Handler */
    /* User can add his own implementation to report the HAL error return state */
-    while(1)
+    while (1)
    {
    }
    /* USER CODE END Error_Handler */
@@ -78,10 +79,12 @@ void rt_hw_us_delay(rt_uint32_t us)
    start = SysTick->VAL;
    reload = SysTick->LOAD;
    us_tick = SystemCoreClock / 1000000UL;
-    do {
+    do
+    {
        now = SysTick->VAL;
        delta = start > now ? start - now : reload + start - now;
-    } while(delta < us_tick * us);
+    }
+    while (delta < us_tick * us);
 }

 /**
@@ -89,17 +92,17 @@ void rt_hw_us_delay(rt_uint32_t us)
 */
 RT_WEAK void rt_hw_board_init()
 {
-	void SelRCHFToPLL(uint32_t rchf, uint32_t clock);
+    void SelRCHFToPLL(uint32_t rchf, uint32_t clock);

-	SelRCHFToPLL(RCHF8M_TRIM,63);
+    SelRCHFToPLL(RCHF8M_TRIM, 63);
    rt_hw_systick_init();
-	
-extern int Image$$RW_IRAM1$$ZI$$Limit;
+
+    extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)

    /* Heap initialization */
 #if defined(RT_USING_HEAP)
-    rt_system_heap_init((void *)HEAP_BEGIN, (void *)(0x20000000+0x6000));
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)(0x20000000 + 0x6000));
 #endif

    /* USART driver initialization is open by default */
@@ -117,4 +120,3 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
    rt_components_board_init();
 #endif
 }
-
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_config.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_config.h
@@ -7,7 +7,8 @@
 * Date           Author            Notes
 * 2018-10-30     SummerGift        first version
 * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
- */
+ * 2021-08-27     Jiao         first version
+*/
 
 #ifndef __DRV_CONFIG_H__
 #define __DRV_CONFIG_H__
@@ -19,12 +20,7 @@
 extern "C" {
 #endif

-#include "dma_config.h"
 #include "uart_config.h"
-#include "spi_config.h"
-#include "tim_config.h"
-#include "pwm_config.h"
-#include "adc_config.h"

 #ifdef __cplusplus
 }
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_crypto.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_crypto.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_crypto.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_crypto.h
@@ -1,16 +0,0 @@
-/*
- * Copyright (c) 2019 Winner Microelectronics Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-07-10     Ernest       1st version
- */
-
-#ifndef __DRV_CRYPTO_H__
-#define __DRV_CRYPTO_H__
-
-int l4_hw_crypto_device_init(void);
-
-#endif /* __DRV_CRYPTO_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_dac.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_dac.c
@@ -1,193 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author            Notes
- * 2020-06-18     thread-liu        the first version
- * 2020-10-09     thread-liu   Porting for stm32h7xx
- */
-
-#include <board.h>
-
-#if defined(BSP_USING_DAC1) || defined(BSP_USING_DAC2) 
-#include "drv_config.h"
-
-//#define DRV_DEBUG
-#define LOG_TAG             "drv.dac"
-#include <drv_log.h>
-
-static DAC_HandleTypeDef dac_config[] =
-{
-#ifdef BSP_USING_DAC1
-    DAC1_CONFIG,
-#endif
-    
-#ifdef BSP_USING_DAC2
-    DAC2_CONFIG,
-#endif
-};
-
-struct stm32_dac
-{
-    DAC_HandleTypeDef DAC_Handler;
-    struct rt_dac_device stm32_dac_device;
-};
-
-static struct stm32_dac stm32_dac_obj[sizeof(dac_config) / sizeof(dac_config[0])];
-
-static rt_err_t stm32_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
-{
-    DAC_HandleTypeDef *stm32_dac_handler;
-    RT_ASSERT(device != RT_NULL);
-    stm32_dac_handler = device->parent.user_data;
-
-#if defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
-        HAL_DAC_Start(stm32_dac_handler, channel);
-#endif
-    
-    return RT_EOK;
-}
-
-static rt_err_t stm32_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
-{
-    DAC_HandleTypeDef *stm32_dac_handler;
-    RT_ASSERT(device != RT_NULL);
-    stm32_dac_handler = device->parent.user_data;
-    
-#if defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
-    HAL_DAC_Stop(stm32_dac_handler, channel);
-#endif
-    
-    return RT_EOK;
-}
-
-static rt_uint32_t stm32_dac_get_channel(rt_uint32_t channel)
-{
-    rt_uint32_t stm32_channel = 0;
-
-    switch (channel)
-    {
-    case  1:
-        stm32_channel = DAC_CHANNEL_1;
-        break;
-    case  2:
-        stm32_channel = DAC_CHANNEL_2;
-        break;
-    default:
-        RT_ASSERT(0);
-        break;
-    }
-
-    return stm32_channel;
-}
-
-static rt_err_t stm32_set_dac_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
-{
-    uint32_t dac_channel;
-    DAC_ChannelConfTypeDef DAC_ChanConf;	
-    DAC_HandleTypeDef *stm32_dac_handler;
-   
-    RT_ASSERT(device != RT_NULL);
-    RT_ASSERT(value != RT_NULL);
-
-    stm32_dac_handler = device->parent.user_data;
-
-    rt_memset(&DAC_ChanConf, 0, sizeof(DAC_ChanConf));
-    
-#if defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
-    if ((channel <= 2) && (channel > 0))
-    {
-        /* set stm32 dac channel */
-        dac_channel =  stm32_dac_get_channel(channel);
-    }
-    else
-    {
-      LOG_E("dac channel must be 1 or 2.");  
-      return -RT_ERROR;
-    }
-#endif  
-    
-#if defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
-    DAC_ChanConf.DAC_Trigger      = DAC_TRIGGER_NONE;             
-    DAC_ChanConf.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;
-#endif    
-    /* config dac out channel*/
-    if (HAL_DAC_ConfigChannel(stm32_dac_handler, &DAC_ChanConf, dac_channel) != HAL_OK)
-    {
-        LOG_D("Config dac out channel Error!\n");
-        return -RT_ERROR;
-    }
-    /* set dac channel out value*/
-    if (HAL_DAC_SetValue(stm32_dac_handler, dac_channel, DAC_ALIGN_12B_R, *value) != HAL_OK)
-    {
-        LOG_D("Setting dac channel out value Error!\n");
-        return -RT_ERROR;
-    }
-    /* start dac */
-    if (HAL_DAC_Start(stm32_dac_handler, dac_channel) != HAL_OK)
-    {
-        LOG_D("Start dac Error!\n");
-        return -RT_ERROR;
-    }
-  
-    return RT_EOK;
-}
-
-static const struct rt_dac_ops stm_dac_ops =
-{
-    .disabled = stm32_dac_disabled,
-    .enabled  = stm32_dac_enabled,
-    .convert  = stm32_set_dac_value,
-};
-
-static int stm32_dac_init(void)
-{
-    int result = RT_EOK;
-    /* save dac name */
-    char name_buf[5] = {'d', 'a', 'c', '0', 0};
-    int i = 0;
-
-    for (i = 0; i < sizeof(dac_config) / sizeof(dac_config[0]); i++)
-    {
-        /* dac init */
-        name_buf[3] = '0';
-        stm32_dac_obj[i].DAC_Handler = dac_config[i];
-#if defined(DAC1)
-        if (stm32_dac_obj[i].DAC_Handler.Instance == DAC1)
-        {
-            name_buf[3] = '1';
-        }
-#endif
-#if defined(DAC2)
-        if (stm32_dac_obj[i].dac_Handler.Instance == DAC2)
-        {
-            name_buf[3] = '2';
-        }
-#endif
-        if (HAL_DAC_Init(&stm32_dac_obj[i].DAC_Handler) != HAL_OK)
-        {
-            LOG_E("%s init failed", name_buf);
-            result = -RT_ERROR;
-        }
-        else
-        {
-            /* register dac device */
-            if (rt_hw_dac_register(&stm32_dac_obj[i].stm32_dac_device, name_buf, &stm_dac_ops, &stm32_dac_obj[i].DAC_Handler) == RT_EOK)
-            {
-                LOG_D("%s init success", name_buf);
-            }
-            else
-            {
-                LOG_E("%s register failed", name_buf);
-                result = -RT_ERROR;
-            }
-        }
-    }
-
-    return result;
-}
-INIT_DEVICE_EXPORT(stm32_dac_init);
-
-#endif /* BSP_USING_DAC */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_dma.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_dma.h
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-10     SummerGift   first version
- * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
- */
-
-#ifndef __DRV_DMA_H_
-#define __DRV_DMA_H_
-
-#include <rtthread.h>
-#include <board.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) \
-	|| defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)
-#define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
-#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
-	|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
-#define DMA_INSTANCE_TYPE              DMA_Stream_TypeDef
-#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */
-
-struct dma_config {
-    DMA_INSTANCE_TYPE *Instance;
-    rt_uint32_t dma_rcc;
-    IRQn_Type dma_irq;
-
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
-    rt_uint32_t channel;
-#endif
-
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\
-    || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB)
-    rt_uint32_t request;
-#endif
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__DRV_DMA_H_ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_eth.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_eth.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_eth.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_eth.h
@@ -1,92 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-25     zylx         first version
- */
-
-#ifndef __DRV_ETH_H__
-#define __DRV_ETH_H__
-
-#include <rtthread.h>
-#include <rthw.h>
-#include <rtdevice.h>
-#include <board.h>
-
-/* The PHY basic control register */
-#define PHY_BASIC_CONTROL_REG       0x00U
-#define PHY_RESET_MASK              (1<<15)
-#define PHY_AUTO_NEGOTIATION_MASK   (1<<12)
-
-/* The PHY basic status register */
-#define PHY_BASIC_STATUS_REG        0x01U
-#define PHY_LINKED_STATUS_MASK      (1<<2)
-#define PHY_AUTONEGO_COMPLETE_MASK  (1<<5)
-
-/* The PHY ID one register */
-#define PHY_ID1_REG                 0x02U
-
-/* The PHY ID two register */
-#define PHY_ID2_REG                 0x03U
-
-/* The PHY auto-negotiate advertise register */
-#define PHY_AUTONEG_ADVERTISE_REG   0x04U
-
-#ifdef PHY_USING_LAN8720A
-/*  The PHY interrupt source flag register. */
-#define PHY_INTERRUPT_FLAG_REG      0x1DU
-/*  The PHY interrupt mask register. */
-#define PHY_INTERRUPT_MASK_REG      0x1EU
-#define PHY_LINK_DOWN_MASK          (1<<4)
-#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6)
-
-/*  The PHY status register. */
-#define PHY_Status_REG              0x1FU
-#define PHY_10M_MASK                (1<<2)
-#define PHY_100M_MASK               (1<<3)
-#define PHY_FULL_DUPLEX_MASK        (1<<4)
-#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
-#define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
-#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
-#endif /* PHY_USING_LAN8720A */
-
-#ifdef PHY_USING_DM9161CEP
-#define PHY_Status_REG              0x11U
-#define PHY_10M_MASK                ((1<<12) || (1<<13))
-#define PHY_100M_MASK               ((1<<14) || (1<<15))
-#define PHY_FULL_DUPLEX_MASK        ((1<<15) || (1<<13))
-#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
-#define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
-#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
-/*  The PHY interrupt source flag register. */
-#define PHY_INTERRUPT_FLAG_REG      0x15U
-/*  The PHY interrupt mask register. */
-#define PHY_INTERRUPT_MASK_REG      0x15U
-#define PHY_LINK_CHANGE_FLAG        (1<<2)
-#define PHY_LINK_CHANGE_MASK        (1<<9)
-#define PHY_INT_MASK                0
-
-#endif /* PHY_USING_DM9161CEP */
-
-#ifdef PHY_USING_DP83848C
-#define PHY_Status_REG              0x10U
-#define PHY_10M_MASK                (1<<1)
-#define PHY_FULL_DUPLEX_MASK        (1<<2)
-#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
-#define PHY_Status_SPEED_100M(sr)   (!PHY_Status_SPEED_10M(sr))
-#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
-/*  The PHY interrupt source flag register. */
-#define PHY_INTERRUPT_FLAG_REG      0x12U
-#define PHY_LINK_CHANGE_FLAG        (1<<13)
-/*  The PHY interrupt control register. */
-#define PHY_INTERRUPT_CTRL_REG      0x11U
-#define PHY_INTERRUPT_EN            ((1<<0)|(1<<1))
-/*  The PHY interrupt mask register. */
-#define PHY_INTERRUPT_MASK_REG      0x12U
-#define PHY_INT_MASK                (1<<5)
-#endif /* PHY_USING_DP83848C */
-
-#endif /* __DRV_ETH_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_flash.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_flash.c
@@ -1,197 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-22     zylx         first version
- */
-
-#include "board.h"
-
-#ifdef BSP_USING_ON_CHIP_FLASH
-#include "drv_config.h"
-#include "drv_flash.h"
-
-#if defined(PKG_USING_FAL)
-#include "fal.h"
-#endif
-
-//#define DRV_DEBUG
-#define LOG_TAG                "drv.flash"
-#include <drv_log.h>
-
-/**
-  * @brief  Gets the page of a given address
-  * @param  Addr: Address of the FLASH Memory
-  * @retval The page of a given address
-  */
-static uint32_t GetPage(uint32_t addr)
-{
-    uint32_t page = 0;
-    page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE);
-    return page;
-}
-
-/**
- * Read data from flash.
- * @note This operation's units is word.
- *
- * @param addr flash address
- * @param buf buffer to store read data
- * @param size read bytes size
- *
- * @return result
- */
-int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
-{
-    size_t i;
-
-    if ((addr + size) > STM32_FLASH_END_ADDRESS)
-    {
-        LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
-        return -RT_EINVAL;
-    }
-
-    for (i = 0; i < size; i++, buf++, addr++)
-    {
-        *buf = *(rt_uint8_t *) addr;
-    }
-
-    return size;
-}
-
-/**
- * Write data to flash.
- * @note This operation's units is word.
- * @note This operation must after erase. @see flash_erase.
- *
- * @param addr flash address
- * @param buf the write data buffer
- * @param size write bytes size
- *
- * @return result
- */
-int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
-{
-    rt_err_t result        = RT_EOK;
-    rt_uint32_t end_addr   = addr + size;
-
-    if (addr % 4 != 0)
-    {
-        LOG_E("write addr must be 4-byte alignment");
-        return -RT_EINVAL;
-    }
-
-    if ((end_addr) > STM32_FLASH_END_ADDRESS)
-    {
-        LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
-        return -RT_EINVAL;
-    }
-
-    HAL_FLASH_Unlock();
-
-    while (addr < end_addr)
-    {
-        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr, *((rt_uint32_t *)buf)) == HAL_OK)
-        {
-            if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf)
-            {
-                result = -RT_ERROR;
-                break;
-            }
-            addr += 4;
-            buf  += 4;
-        }
-        else
-        {
-            result = -RT_ERROR;
-            break;
-        }
-    }
-
-    HAL_FLASH_Lock();
-
-    if (result != RT_EOK)
-    {
-        return result;
-    }
-
-    return size;
-}
-
-/**
- * Erase data on flash.
- * @note This operation is irreversible.
- * @note This operation's units is different which on many chips.
- *
- * @param addr flash address
- * @param size erase bytes size
- *
- * @return result
- */
-int stm32_flash_erase(rt_uint32_t addr, size_t size)
-{
-    rt_err_t result = RT_EOK;
-    uint32_t PAGEError = 0;
-
-    /*Variable used for Erase procedure*/
-    FLASH_EraseInitTypeDef EraseInitStruct;
-
-    if ((addr + size) > STM32_FLASH_END_ADDRESS)
-    {
-        LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
-        return -RT_EINVAL;
-    }
-
-    HAL_FLASH_Unlock();
-
-    /* Fill EraseInit structure*/
-    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
-    EraseInitStruct.PageAddress = GetPage(addr);
-    EraseInitStruct.NbPages     = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
-
-    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
-    {
-        result = -RT_ERROR;
-        goto __exit;
-    }
-
-__exit:
-    HAL_FLASH_Lock();
-
-    if (result != RT_EOK)
-    {
-        return result;
-    }
-
-    LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
-    return size;
-}
-
-#if defined(PKG_USING_FAL)
-
-static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
-static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
-static int fal_flash_erase(long offset, size_t size);
-
-const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
-
-static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
-{
-    return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
-}
-
-static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
-{
-    return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
-}
-
-static int fal_flash_erase(long offset, size_t size)
-{
-    return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
-}
-
-#endif
-#endif /* BSP_USING_ON_CHIP_FLASH */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_flash.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_flash.h
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-5      SummerGift   first version
- */
-
-#ifndef __DRV_FLASH_H__
-#define __DRV_FLASH_H__
-
-#include <rtthread.h>
-#include "rtdevice.h"
-#include <rthw.h>
-#include <drv_common.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size);
-int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size);
-int stm32_flash_erase(rt_uint32_t addr, size_t size);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  /* __DRV_FLASH_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.h
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author            Notes
- * 2018-11-06     balanceTWK        first version
- * 2020-06-16     thread-liu        add stm32mp1
- * 2020-09-01     thread-liu        add GPIOZ 
- * 2020-09-18     geniusgogo        optimization design pin-index algorithm
- */
-
-#ifndef __DRV_GPIO_H__
-#define __DRV_GPIO_H__
-
-#include <drv_common.h>
-#include <board.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define __STM32_PORT(port)  GPIO##port##_BASE
-
-#if defined(SOC_SERIES_STM32MP1)
-#define GET_PIN(PORTx,PIN) (GPIO##PORTx == GPIOZ) ? (176 + PIN) : ((rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x1000UL) )) + PIN))
-#else
-#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
-#endif
-
-struct pin_irq_map
-{
-    rt_uint16_t pinbit;
-    IRQn_Type irqno;
-};
-
-int rt_hw_pin_init(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DRV_GPIO_H__ */
-
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_hwtimer.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_hwtimer.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_lcd.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_lcd.c
@@ -1,400 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-01-08     zylx         first version
- */
-
-#include <board.h>
-
-#ifdef BSP_USING_LCD
-#include <lcd_port.h>
-#include <string.h>
-
-//#define DRV_DEBUG
-#define LOG_TAG             "drv.lcd"
-#include <drv_log.h>
-
-#define LCD_DEVICE(dev)     (struct drv_lcd_device*)(dev)
-
-static LTDC_HandleTypeDef LtdcHandle = {0};
-
-struct drv_lcd_device
-{
-    struct rt_device parent;
-
-    struct rt_device_graphic_info lcd_info;
-
-    struct rt_semaphore lcd_lock;
-
-    /* 0:front_buf is being used 1: back_buf is being used*/
-    rt_uint8_t cur_buf;
-    rt_uint8_t *front_buf;
-    rt_uint8_t *back_buf;
-};
-
-struct drv_lcd_device _lcd;
-
-static rt_err_t drv_lcd_init(struct rt_device *device)
-{
-    struct drv_lcd_device *lcd = LCD_DEVICE(device);
-    /* nothing, right now */
-    lcd = lcd;
-    return RT_EOK;
-}
-
-static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args)
-{
-    struct drv_lcd_device *lcd = LCD_DEVICE(device);
-
-    switch (cmd)
-    {
-    case RTGRAPHIC_CTRL_RECT_UPDATE:
-    {
-        /* update */
-        if (_lcd.cur_buf)
-        {
-            /* back_buf is being used */
-            memcpy(_lcd.front_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
-            /* Configure the color frame buffer start address */
-            LTDC_LAYER(&LtdcHandle, 0)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
-            LTDC_LAYER(&LtdcHandle, 0)->CFBAR = (uint32_t)(_lcd.front_buf);
-            _lcd.cur_buf = 0;
-        }
-        else
-        {
-            /* front_buf is being used */
-            memcpy(_lcd.back_buf, _lcd.lcd_info.framebuffer, LCD_BUF_SIZE);
-            /* Configure the color frame buffer start address */
-            LTDC_LAYER(&LtdcHandle, 0)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
-            LTDC_LAYER(&LtdcHandle, 0)->CFBAR = (uint32_t)(_lcd.back_buf);
-            _lcd.cur_buf = 1;
-        }
-        rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20);
-        HAL_LTDC_Relaod(&LtdcHandle, LTDC_SRCR_VBR);
-    }
-    break;
-
-    case RTGRAPHIC_CTRL_GET_INFO:
-    {
-        struct rt_device_graphic_info *info = (struct rt_device_graphic_info *)args;
-
-        RT_ASSERT(info != RT_NULL);
-        info->pixel_format  = lcd->lcd_info.pixel_format;
-        info->bits_per_pixel = 16;
-        info->width         = lcd->lcd_info.width;
-        info->height        = lcd->lcd_info.height;
-        info->framebuffer   = lcd->lcd_info.framebuffer;
-    }
-    break;
-    }
-
-    return RT_EOK;
-}
-
-void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc)
-{
-    /* emable line interupt */
-    __HAL_LTDC_ENABLE_IT(&LtdcHandle, LTDC_IER_LIE);
-}
-
-void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc)
-{
-    rt_sem_release(&_lcd.lcd_lock);
-}
-
-void LTDC_IRQHandler(void)
-{
-    rt_enter_critical();
-
-    HAL_LTDC_IRQHandler(&LtdcHandle);
-
-    rt_exit_critical();
-}
-
-rt_err_t stm32_lcd_init(struct drv_lcd_device *lcd)
-{
-    LTDC_LayerCfgTypeDef pLayerCfg = {0};
-
-    /* LTDC Initialization -------------------------------------------------------*/
-
-    /* Polarity configuration */
-    /* Initialize the horizontal synchronization polarity as active low */
-    LtdcHandle.Init.HSPolarity = LTDC_HSPOLARITY_AL;
-    /* Initialize the vertical synchronization polarity as active low */
-    LtdcHandle.Init.VSPolarity = LTDC_VSPOLARITY_AL;
-    /* Initialize the data enable polarity as active low */
-    LtdcHandle.Init.DEPolarity = LTDC_DEPOLARITY_AL;
-    /* Initialize the pixel clock polarity as input pixel clock */
-    LtdcHandle.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
-
-    /* Timing configuration */
-    /* Horizontal synchronization width = Hsync - 1 */
-    LtdcHandle.Init.HorizontalSync = LCD_HSYNC_WIDTH - 1;
-    /* Vertical synchronization height = Vsync - 1 */
-    LtdcHandle.Init.VerticalSync = LCD_VSYNC_HEIGHT - 1;
-    /* Accumulated horizontal back porch = Hsync + HBP - 1 */
-    LtdcHandle.Init.AccumulatedHBP = LCD_HSYNC_WIDTH + LCD_HBP - 1;
-    /* Accumulated vertical back porch = Vsync + VBP - 1 */
-    LtdcHandle.Init.AccumulatedVBP = LCD_VSYNC_HEIGHT + LCD_VBP - 1;
-    /* Accumulated active width = Hsync + HBP + Active Width - 1 */
-    LtdcHandle.Init.AccumulatedActiveW = LCD_HSYNC_WIDTH + LCD_HBP + lcd->lcd_info.width - 1 ;
-    /* Accumulated active height = Vsync + VBP + Active Heigh - 1 */
-    LtdcHandle.Init.AccumulatedActiveH = LCD_VSYNC_HEIGHT + LCD_VBP + lcd->lcd_info.height - 1;
-    /* Total height = Vsync + VBP + Active Heigh + VFP - 1 */
-    LtdcHandle.Init.TotalHeigh = LtdcHandle.Init.AccumulatedActiveH + LCD_VFP;
-    /* Total width = Hsync + HBP + Active Width + HFP - 1 */
-    LtdcHandle.Init.TotalWidth = LtdcHandle.Init.AccumulatedActiveW + LCD_HFP;
-
-    /* Configure R,G,B component values for LCD background color */
-    LtdcHandle.Init.Backcolor.Blue = 0;
-    LtdcHandle.Init.Backcolor.Green = 0;
-    LtdcHandle.Init.Backcolor.Red = 0;
-
-    LtdcHandle.Instance = LTDC;
-
-    /* Layer1 Configuration ------------------------------------------------------*/
-
-    /* Windowing configuration */
-    pLayerCfg.WindowX0 = 0;
-    pLayerCfg.WindowX1 = lcd->lcd_info.width;
-    pLayerCfg.WindowY0 = 0;
-    pLayerCfg.WindowY1 = lcd->lcd_info.height;
-
-    /* Pixel Format configuration*/
-    if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_RGB565)
-    {
-        pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
-    }
-    else if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_ARGB888)
-    {
-        pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
-    }
-    else if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_RGB888)
-    {
-        pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB888;
-    }
-    else if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_RGB888)
-    {
-        pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB888;
-    }
-    else
-    {
-        LOG_E("unsupported pixel format");
-        return -RT_ERROR;
-    }
-
-    /* Start Address configuration : frame buffer is located at FLASH memory */
-    pLayerCfg.FBStartAdress = (uint32_t)lcd->front_buf;
-
-    /* Alpha constant (255 totally opaque) */
-    pLayerCfg.Alpha = 255;
-
-    /* Default Color configuration (configure A,R,G,B component values) */
-    pLayerCfg.Alpha0 = 255;
-    pLayerCfg.Backcolor.Blue = 0;
-    pLayerCfg.Backcolor.Green = 0;
-    pLayerCfg.Backcolor.Red = 0;
-
-    /* Configure blending factors */
-    /* Constant Alpha value:  pLayerCfg.Alpha / 255
-       C: Current Layer Color
-       Cs: Background color
-       BC = Constant Alpha x C + (1 - Constant Alpha ) x Cs */
-    /* BlendingFactor1: Pixel Alpha x Constant Alpha */
-    pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
-    /* BlendingFactor2: 1 - (Pixel Alpha x Constant Alpha) */
-    pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
-
-    /* Configure the number of lines and number of pixels per line */
-    pLayerCfg.ImageWidth = lcd->lcd_info.width;
-    pLayerCfg.ImageHeight = lcd->lcd_info.height;
-
-    /* Configure the LTDC */
-    if (HAL_LTDC_Init(&LtdcHandle) != HAL_OK)
-    {
-        LOG_E("LTDC init failed");
-        return -RT_ERROR;
-    }
-
-    /* Configure the Background Layer*/
-    if (HAL_LTDC_ConfigLayer(&LtdcHandle, &pLayerCfg, 0) != HAL_OK)
-    {
-        LOG_E("LTDC layer init failed");
-        return -RT_ERROR;
-    }
-    else
-    {
-        /* enable LTDC interrupt */
-        HAL_NVIC_SetPriority(LTDC_IRQn, 1, 0);
-        HAL_NVIC_EnableIRQ(LTDC_IRQn);
-        LOG_D("LTDC init success");
-        return RT_EOK;
-    }
-}
-#if defined(LCD_BACKLIGHT_USING_PWM)
-void turn_on_lcd_backlight(void)
-{
-    struct rt_device_pwm *pwm_dev;
-
-    /* turn on the LCD backlight */
-    pwm_dev = (struct rt_device_pwm *)rt_device_find(LCD_PWM_DEV_NAME);
-    /* pwm frequency:100K = 10000ns */
-    rt_pwm_set(pwm_dev, LCD_PWM_DEV_CHANNEL, 10000, 10000);
-    rt_pwm_enable(pwm_dev, LCD_PWM_DEV_CHANNEL);
-}
-#elif defined(LCD_BACKLIGHT_USING_GPIO)
-void turn_on_lcd_backlight(void)
-{
-    rt_pin_mode(LCD_BL_GPIO_NUM, PIN_MODE_OUTPUT);
-    rt_pin_mode(LCD_DISP_GPIO_NUM, PIN_MODE_OUTPUT);
-
-    rt_pin_write(LCD_DISP_GPIO_NUM, PIN_HIGH);
-    rt_pin_write(LCD_BL_GPIO_NUM, PIN_HIGH);
-}
-#else
-void turn_on_lcd_backlight(void)
-{
-    
-}
-#endif
-
-#ifdef RT_USING_DEVICE_OPS
-const static struct rt_device_ops lcd_ops =
-{
-    drv_lcd_init,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    drv_lcd_control
-};
-#endif
-
-int drv_lcd_hw_init(void)
-{
-    rt_err_t result = RT_EOK;
-    struct rt_device *device = &_lcd.parent;
-
-    /* memset _lcd to zero */
-    memset(&_lcd, 0x00, sizeof(_lcd));
-
-    /* init lcd_lock semaphore */
-    result = rt_sem_init(&_lcd.lcd_lock, "lcd_lock", 0, RT_IPC_FLAG_FIFO);
-    if (result != RT_EOK)
-    {
-        LOG_E("init semaphore failed!\n");
-        result = -RT_ENOMEM;
-        goto __exit;
-    }
-
-    /* config LCD dev info */
-    _lcd.lcd_info.height = LCD_HEIGHT;
-    _lcd.lcd_info.width = LCD_WIDTH;
-    _lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
-    _lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
-
-    /* malloc memory for Triple Buffering */
-    _lcd.lcd_info.framebuffer = rt_malloc(LCD_BUF_SIZE);
-    _lcd.back_buf = rt_malloc(LCD_BUF_SIZE);
-    _lcd.front_buf = rt_malloc(LCD_BUF_SIZE);
-    if (_lcd.lcd_info.framebuffer == RT_NULL || _lcd.back_buf == RT_NULL || _lcd.front_buf == RT_NULL)
-    {
-        LOG_E("init frame buffer failed!\n");
-        result = -RT_ENOMEM;
-        goto __exit;
-    }
-
-    /* memset buff to 0xFF */
-    memset(_lcd.lcd_info.framebuffer, 0xFF, LCD_BUF_SIZE);
-    memset(_lcd.back_buf, 0xFF, LCD_BUF_SIZE);
-    memset(_lcd.front_buf, 0xFF, LCD_BUF_SIZE);
-
-    device->type    = RT_Device_Class_Graphic;
-#ifdef RT_USING_DEVICE_OPS
-    device->ops     = &lcd_ops;
-#else
-    device->init    = drv_lcd_init;
-    device->control = drv_lcd_control;
-#endif
-
-    /* register lcd device */
-    rt_device_register(device, "lcd", RT_DEVICE_FLAG_RDWR);
-
-    /* init stm32 LTDC */
-    if (stm32_lcd_init(&_lcd) != RT_EOK)
-    {
-        result = -RT_ERROR;
-        goto __exit;
-    }
-    else
-    {
-        turn_on_lcd_backlight();
-    }
-
-__exit:
-    if (result != RT_EOK)
-    {
-        rt_sem_detach(&_lcd.lcd_lock);
-
-        if (_lcd.lcd_info.framebuffer)
-        {
-            rt_free(_lcd.lcd_info.framebuffer);
-        }
-
-        if (_lcd.back_buf)
-        {
-            rt_free(_lcd.back_buf);
-        }
-
-        if (_lcd.front_buf)
-        {
-            rt_free(_lcd.front_buf);
-        }
-    }
-    return result;
-}
-INIT_DEVICE_EXPORT(drv_lcd_hw_init);
-
-#ifdef DRV_DEBUG
-#ifdef FINSH_USING_MSH
-int lcd_test()
-{
-    struct drv_lcd_device *lcd;
-    lcd = (struct drv_lcd_device *)rt_device_find("lcd");
-
-    while (1)
-    {
-        /* red */
-        for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
-        {
-            lcd->lcd_info.framebuffer[2 * i] = 0x00;
-            lcd->lcd_info.framebuffer[2 * i + 1] = 0xF8;
-        }
-        lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
-        rt_thread_mdelay(1000);
-        /* green */
-        for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
-        {
-            lcd->lcd_info.framebuffer[2 * i] = 0xE0;
-            lcd->lcd_info.framebuffer[2 * i + 1] = 0x07;
-        }
-        lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
-        rt_thread_mdelay(1000);
-        /* blue */
-        for (int i = 0; i < LCD_BUF_SIZE / 2; i++)
-        {
-            lcd->lcd_info.framebuffer[2 * i] = 0x1F;
-            lcd->lcd_info.framebuffer[2 * i + 1] = 0x00;
-        }
-        lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
-        rt_thread_mdelay(1000);
-    }
-}
-MSH_CMD_EXPORT(lcd_test, lcd_test);
-#endif /* FINSH_USING_MSH */
-#endif /* DRV_DEBUG */
-#endif /* BSP_USING_LCD */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_lcd_mipi.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_lcd_mipi.c
@@ -1,254 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author         Notes
- * 2019-05-23     WillianChan    first version
- */
- 
-#include <board.h>
-
-#ifdef BSP_USING_LCD_MIPI
-#include <lcd_port.h>
-#include <string.h>
-
-DSI_HandleTypeDef   hdsi;
-DSI_VidCfgTypeDef   hdsi_video;
-LTDC_HandleTypeDef  hltdc;
-
-struct stm32_lcd
-{
-    struct rt_device parent;
-    struct rt_device_graphic_info info;
-};
-static struct stm32_lcd lcd; 
-
-extern void stm32_mipi_lcd_init(void);
-extern void stm32_mipi_lcd_config(rt_uint32_t pixel_format);
-extern void stm32_mipi_display_on(void);
-extern void stm32_mipi_display_off(void);
-
-rt_err_t ltdc_init(void)
-{
-    uint32_t lcd_clock      = 27429; 
-    uint32_t lanebyte_clock = 62500;
-    
-    uint32_t HSA = LCD_HSYNC, HFP = LCD_HFP, HBP = LCD_HBP, HACT = LCD_WIDTH;
-    uint32_t VSA = LCD_VSYNC, VFP = LCD_VFP, VBP = LCD_VBP, VACT = LCD_HEIGHT;
-
-    stm32_mipi_lcd_init();
- 
-    __HAL_RCC_LTDC_CLK_ENABLE();
-    __HAL_RCC_LTDC_FORCE_RESET();
-    __HAL_RCC_LTDC_RELEASE_RESET();
-
-    __HAL_RCC_DSI_CLK_ENABLE();
-    __HAL_RCC_DSI_FORCE_RESET();
-    __HAL_RCC_DSI_RELEASE_RESET();
-    
-    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
-    
-    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
-    PeriphClkInitStruct.PLLSAI.PLLSAIN       = 384;
-    PeriphClkInitStruct.PLLSAI.PLLSAIR       = 7;
-    PeriphClkInitStruct.PLLSAIDivR           = RCC_PLLSAIDIVR_2;
-    HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-    
-    HAL_NVIC_SetPriority(LTDC_IRQn,  3, 0);
-    HAL_NVIC_SetPriority(DSI_IRQn,   3, 0);
-
-    HAL_NVIC_EnableIRQ(LTDC_IRQn);
-    HAL_NVIC_EnableIRQ(DSI_IRQn);
-    
-    DSI_PLLInitTypeDef dsi_pll;
-    
-    hdsi.Instance = DSI; 
-    hdsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES;
-    hdsi.Init.TXEscapeCkdiv = lanebyte_clock / 15620;
-    
-    dsi_pll.PLLNDIV  = 125;
-    dsi_pll.PLLIDF   = DSI_PLL_IN_DIV2;
-    dsi_pll.PLLODF   = DSI_PLL_OUT_DIV1; 
-    
-    HAL_DSI_DeInit(&hdsi);
-    HAL_DSI_Init(&hdsi, &dsi_pll); 
-    
-    hdsi_video.VirtualChannelID             = 0;
-    hdsi_video.ColorCoding                  = DSI_RGB888;
-    hdsi_video.VSPolarity                   = DSI_VSYNC_ACTIVE_HIGH;
-    hdsi_video.HSPolarity                   = DSI_HSYNC_ACTIVE_HIGH;
-    hdsi_video.DEPolarity                   = DSI_DATA_ENABLE_ACTIVE_HIGH;
-    hdsi_video.Mode                         = DSI_VID_MODE_BURST; 
-    hdsi_video.NullPacketSize               = 0xFFF;
-    hdsi_video.NumberOfChunks               = 0;
-    hdsi_video.PacketSize                   = HACT; 
-    hdsi_video.HorizontalSyncActive         = (HSA * lanebyte_clock) / lcd_clock;
-    hdsi_video.HorizontalBackPorch          = (HBP * lanebyte_clock) / lcd_clock;
-    hdsi_video.HorizontalLine               = ((HACT + HSA + HBP + HFP) * lanebyte_clock) / lcd_clock; 
-    hdsi_video.VerticalSyncActive           = VSA;
-    hdsi_video.VerticalBackPorch            = VBP;
-    hdsi_video.VerticalFrontPorch           = VFP;
-    hdsi_video.VerticalActive               = VACT; 
-    hdsi_video.LPCommandEnable              = DSI_LP_COMMAND_ENABLE; 
-    hdsi_video.LPLargestPacketSize          = 16;
-    hdsi_video.LPVACTLargestPacketSize      = 0;
-    hdsi_video.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE; 
-    hdsi_video.LPHorizontalBackPorchEnable  = DSI_LP_HBP_ENABLE; 
-    hdsi_video.LPVerticalActiveEnable       = DSI_LP_VACT_ENABLE; 
-    hdsi_video.LPVerticalFrontPorchEnable   = DSI_LP_VFP_ENABLE; 
-    hdsi_video.LPVerticalBackPorchEnable    = DSI_LP_VBP_ENABLE; 
-    hdsi_video.LPVerticalSyncActiveEnable   = DSI_LP_VSYNC_ENABLE; 
-    HAL_DSI_ConfigVideoMode(&hdsi, &hdsi_video); 
-    
-    DSI_PHY_TimerTypeDef dsi_phy;
-    
-    dsi_phy.ClockLaneHS2LPTime  = 35;
-    dsi_phy.ClockLaneLP2HSTime  = 35;
-    dsi_phy.DataLaneHS2LPTime   = 35;
-    dsi_phy.DataLaneLP2HSTime   = 35;
-    dsi_phy.DataLaneMaxReadTime = 0;
-    dsi_phy.StopWaitTime        = 10;
-    HAL_DSI_ConfigPhyTimer(&hdsi, &dsi_phy); 
-    
-    hltdc.Instance = LTDC;
-    
-    hltdc.Init.PCPolarity         = LTDC_PCPOLARITY_IPC;
-    hltdc.Init.HorizontalSync     = (HSA - 1);
-    hltdc.Init.AccumulatedHBP     = (HSA + HBP - 1);
-    hltdc.Init.AccumulatedActiveW = (LCD_WIDTH + HSA + HBP - 1);
-    hltdc.Init.TotalWidth         = (LCD_WIDTH + HSA + HBP + HFP - 1);
-    
-    hltdc.LayerCfg->ImageWidth    = LCD_WIDTH;
-    hltdc.LayerCfg->ImageHeight   = LCD_HEIGHT; 
-    hltdc.Init.Backcolor.Blue     = 0x00;
-    hltdc.Init.Backcolor.Green    = 0x00;
-    hltdc.Init.Backcolor.Red      = 0x00;
-    HAL_LTDCEx_StructInitFromVideoConfig(&hltdc, &(hdsi_video)); 
-    HAL_LTDC_Init(&(hltdc));
-    
-    HAL_DSI_Start(&(hdsi)); 
-
-    stm32_mipi_lcd_config(RTGRAPHIC_PIXEL_FORMAT_ARGB888);
-    
-    return RT_EOK; 
-}
-
-void ltdc_layer_init(uint16_t index, uint32_t framebuffer)
-{
-    LTDC_LayerCfgTypeDef layer_cfg;
-
-    layer_cfg.WindowX0        = 0;
-    layer_cfg.WindowX1        = LCD_WIDTH; 
-    layer_cfg.WindowY0        = 0;
-    layer_cfg.WindowY1        = LCD_HEIGHT;
-    layer_cfg.PixelFormat     = LTDC_PIXEL_FORMAT_ARGB8888;
-    layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
-    layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
-    layer_cfg.Alpha           = 255;
-    layer_cfg.Alpha0          = 0;
-    layer_cfg.ImageWidth      = LCD_WIDTH;
-    layer_cfg.ImageHeight     = LCD_HEIGHT;
-    layer_cfg.Backcolor.Blue  = 0;
-    layer_cfg.Backcolor.Green = 0;
-    layer_cfg.Backcolor.Red   = 0;
-    layer_cfg.FBStartAdress   = framebuffer;
-
-    HAL_LTDC_ConfigLayer(&hltdc, &layer_cfg, index);
-}
-
-void LTDC_IRQHandler(void)
-{
-    rt_interrupt_enter();
-    HAL_LTDC_IRQHandler(&hltdc); 
-    rt_interrupt_leave();
-}
-
-static rt_err_t stm32_lcd_init(rt_device_t device)
-{
-    lcd.info.width          = LCD_WIDTH;
-    lcd.info.height         = LCD_HEIGHT;
-    lcd.info.pixel_format   = RTGRAPHIC_PIXEL_FORMAT_ARGB888;
-    lcd.info.bits_per_pixel = 32;
-    lcd.info.framebuffer    = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32); 
-    memset(lcd.info.framebuffer, 0, LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8));
-    ltdc_init();
-    ltdc_layer_init(0, (uint32_t)lcd.info.framebuffer); 
-    
-    return RT_EOK;
-}
-
-static rt_err_t stm32_lcd_control(rt_device_t device, int cmd, void *args)
-{
-    switch(cmd)
-    {
-    case RTGRAPHIC_CTRL_RECT_UPDATE:
-        break;
-
-    case RTGRAPHIC_CTRL_POWERON: 
-        stm32_mipi_display_on(); 
-        break;
-
-    case RTGRAPHIC_CTRL_POWEROFF: 
-        stm32_mipi_display_off(); 
-        break;
-
-    case RTGRAPHIC_CTRL_GET_INFO:
-        rt_memcpy(args, &lcd.info, sizeof(lcd.info));
-        break;
-
-    case RTGRAPHIC_CTRL_SET_MODE:
-        break;
-
-    case RTGRAPHIC_CTRL_GET_EXT:
-        break;
-    }
-
-    return RT_EOK;
-}
-
-int rt_hw_lcd_init(void)
-{
-    rt_err_t ret; 
-    
-    rt_memset(&lcd, 0x00, sizeof(lcd)); 
-
-    lcd.parent.type    = RT_Device_Class_Graphic;
-    lcd.parent.init    = stm32_lcd_init;
-    lcd.parent.open    = RT_NULL;
-    lcd.parent.close   = RT_NULL;
-    lcd.parent.read    = RT_NULL;
-    lcd.parent.write   = RT_NULL;
-    lcd.parent.control = stm32_lcd_control;
-
-    lcd.parent.user_data = (void *)&lcd.info;
-
-    ret = rt_device_register(&lcd.parent, "lcd", RT_DEVICE_FLAG_RDWR);
-
-    return ret;
-}
-INIT_DEVICE_EXPORT(rt_hw_lcd_init);
-
-
-RT_WEAK void stm32_mipi_lcd_init(void)
-{
-    rt_kprintf("please Implementation function %s\n", __func__);
-}
-
-RT_WEAK void stm32_mipi_lcd_config(rt_uint32_t pixel_format)
-{
-    rt_kprintf("please Implementation function %s\n", __func__);
-}
-
-RT_WEAK void stm32_mipi_display_on(void)
-{
-    rt_kprintf("please Implementation function %s\n", __func__);
-}
-
-RT_WEAK void stm32_mipi_display_off(void)
-{
-    rt_kprintf("please Implementation function %s\n", __func__);
-}
-
-#endif /* BSP_USING_LCD_MIPI */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_lptim.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_lptim.c
@@ -1,123 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author          Notes
- * 2019-05-06     Zero-Free       first version
- */
-
-#include <board.h>
-#include <drv_lptim.h>
-
-static LPTIM_HandleTypeDef LptimHandle;
-
-void LPTIM1_IRQHandler(void)
-{
-    HAL_LPTIM_IRQHandler(&LptimHandle);
-}
-
-void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-/**
- * This function get current count value of LPTIM
- *
- * @return the count vlaue
- */
-rt_uint32_t stm32l4_lptim_get_current_tick(void)
-{
-    return HAL_LPTIM_ReadCounter(&LptimHandle);
-}
-
-/**
- * This function get the max value that LPTIM can count
- *
- * @return the max count
- */
-rt_uint32_t stm32l4_lptim_get_tick_max(void)
-{
-    return (0xFFFF);
-}
-
-/**
- * This function start LPTIM with reload value
- *
- * @param reload The value that LPTIM count down from
- *
- * @return RT_EOK
- */
-rt_err_t stm32l4_lptim_start(rt_uint32_t reload)
-{
-    HAL_LPTIM_TimeOut_Start_IT(&LptimHandle, 0xFFFF, reload);
-
-    return (RT_EOK);
-}
-
-/**
- * This function stop LPTIM
- */
-void stm32l4_lptim_stop(void)
-{
-    rt_uint32_t _ier;
-
-    _ier = LptimHandle.Instance->IER;
-    LptimHandle.Instance->ICR = LptimHandle.Instance->ISR & _ier;
-}
-
-/**
- * This function get the count clock of LPTIM
- *
- * @return the count clock frequency in Hz
- */
-rt_uint32_t stm32l4_lptim_get_countfreq(void)
-{
-    return 32000 / 32;
-}
-
-/**
- * This function initialize the lptim
- */
-int stm32l4_hw_lptim_init(void)
-{
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-    RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
-
-    /* Enable LSI clock */
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
-    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    /* Select the LSI clock as LPTIM peripheral clock */
-    RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
-    RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
-    HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
-
-    LptimHandle.Instance = LPTIM1;
-    LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
-    LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32;
-    LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
-    LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
-    LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
-    LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
-    if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK)
-    {
-        return -1;
-    }
-
-    NVIC_ClearPendingIRQ(LPTIM1_IRQn);
-    NVIC_SetPriority(LPTIM1_IRQn, 0);
-    NVIC_EnableIRQ(LPTIM1_IRQn);
-
-    return 0;
-}
-
-INIT_DEVICE_EXPORT(stm32l4_hw_lptim_init);
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_lptim.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_lptim.h
@@ -1,23 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author          Notes
- * 2019-05-06     Zero-Free       first version
- */
-
-#ifndef  __DRV_PMTIMER_H__
-#define  __DRV_PMTIMER_H__
-
-#include <rtthread.h>
-
-rt_uint32_t stm32l4_lptim_get_countfreq(void);
-rt_uint32_t stm32l4_lptim_get_tick_max(void);
-rt_uint32_t stm32l4_lptim_get_current_tick(void);
-
-rt_err_t stm32l4_lptim_start(rt_uint32_t load);
-void stm32l4_lptim_stop(void);
-
-#endif /* __DRV_PMTIMER_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_pm.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_pm.c
@@ -1,250 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-05-06     Zero-Free    first version
- */
-
-#include <board.h>
-#include <drv_lptim.h>
-
-static void uart_console_reconfig(void)
-{
-    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
-
-    rt_device_control(rt_console_get_device(), RT_DEVICE_CTRL_CONFIG, &config);
-}
-
-/**
- * This function will put STM32L4xx into sleep mode.
- *
- * @param pm pointer to power manage structure
- */
-static void sleep(struct rt_pm *pm, uint8_t mode)
-{
-    switch (mode)
-    {
-    case PM_SLEEP_MODE_NONE:
-        break;
-
-    case PM_SLEEP_MODE_IDLE:
-        // __WFI();
-        break;
-
-    case PM_SLEEP_MODE_LIGHT:
-        if (pm->run_mode == PM_RUN_MODE_LOW_SPEED)
-        {
-            /* Enter LP SLEEP Mode, Enable low-power regulator */
-            HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
-        }
-        else
-        {
-            /* Enter SLEEP Mode, Main regulator is ON */
-            HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
-        }
-        break;
-
-    case PM_SLEEP_MODE_DEEP:
-        /* Enter STOP 2 mode  */
-        HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);
-        /* Re-configure the system clock */
-        SystemClock_ReConfig(pm->run_mode);
-        break;
-
-    case PM_SLEEP_MODE_STANDBY:
-        /* Enter STANDBY mode */
-        HAL_PWR_EnterSTANDBYMode();
-        break;
-
-    case PM_SLEEP_MODE_SHUTDOWN:
-        /* Enter SHUTDOWNN mode */
-        HAL_PWREx_EnterSHUTDOWNMode();
-        break;
-
-    default:
-        RT_ASSERT(0);
-        break;
-    }
-}
-
-static uint8_t run_speed[PM_RUN_MODE_MAX][2] =
-{
-    {80, 0},
-    {80, 1},
-    {24, 2},
-    {2,  3},
-};
-
-static void run(struct rt_pm *pm, uint8_t mode)
-{
-    static uint8_t last_mode;
-    static char *run_str[] = PM_RUN_MODE_NAMES;
-
-    if (mode == last_mode)
-        return;
-    last_mode = mode;
-
-    /* 1. 设置 MSI 作为 SYSCLK 时钟源,以修改 PLL */
-    SystemClock_MSI_ON();
-
-    /* 2. 根据RUN模式切换时钟频率(HSI) */
-    switch (mode)
-    {
-    case PM_RUN_MODE_HIGH_SPEED:
-    case PM_RUN_MODE_NORMAL_SPEED:
-        HAL_PWREx_DisableLowPowerRunMode();
-        SystemClock_80M();
-        /* Configure the main internal regulator output voltage (Range1 by default)*/
-        HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
-        break;
-    case PM_RUN_MODE_MEDIUM_SPEED:
-        HAL_PWREx_DisableLowPowerRunMode();
-        SystemClock_24M();
-        /* Configure the main internal regulator output voltage */
-        HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2);
-        break;
-    case PM_RUN_MODE_LOW_SPEED:
-        SystemClock_2M();
-        /* Enter LP RUN mode */
-        HAL_PWREx_EnableLowPowerRunMode();
-        break;
-    default:
-        break;
-    }
-
-    /* 3. 关闭 MSI 时钟 */
-    // SystemClock_MSI_OFF();
-
-    /* 4. 更新外设时钟 */
-    uart_console_reconfig();
-    /* Re-Configure the Systick time */
-    HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND);
-    /* Re-Configure the Systick */
-    HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
-
-    rt_kprintf("switch to %s mode, frequency = %d MHz\n", run_str[mode], run_speed[mode][0]);
-}
-
-/**
- * This function caculate the PM tick from OS tick
- *
- * @param tick OS tick
- *
- * @return the PM tick
- */
-static rt_tick_t stm32l4_pm_tick_from_os_tick(rt_tick_t tick)
-{
-    rt_uint32_t freq = stm32l4_lptim_get_countfreq();
-
-    return (freq * tick / RT_TICK_PER_SECOND);
-}
-
-/**
- * This function caculate the OS tick from PM tick
- *
- * @param tick PM tick
- *
- * @return the OS tick
- */
-static rt_tick_t stm32l4_os_tick_from_pm_tick(rt_uint32_t tick)
-{
-    static rt_uint32_t os_tick_remain = 0;
-    rt_uint32_t ret, freq;
-
-    freq = stm32l4_lptim_get_countfreq();
-    ret = (tick * RT_TICK_PER_SECOND + os_tick_remain) / freq;
-
-    os_tick_remain += (tick * RT_TICK_PER_SECOND);
-    os_tick_remain %= freq;
-
-    return ret;
-}
-
-/**
- * This function start the timer of pm
- *
- * @param pm Pointer to power manage structure
- * @param timeout How many OS Ticks that MCU can sleep
- */
-static void pm_timer_start(struct rt_pm *pm, rt_uint32_t timeout)
-{
-    RT_ASSERT(pm != RT_NULL);
-    RT_ASSERT(timeout > 0);
-
-    if (timeout != RT_TICK_MAX)
-    {
-        /* Convert OS Tick to pmtimer timeout value */
-        timeout = stm32l4_pm_tick_from_os_tick(timeout);
-        if (timeout > stm32l4_lptim_get_tick_max())
-        {
-            timeout = stm32l4_lptim_get_tick_max();
-        }
-
-        /* Enter PM_TIMER_MODE */
-        stm32l4_lptim_start(timeout);
-    }
-}
-
-/**
- * This function stop the timer of pm
- *
- * @param pm Pointer to power manage structure
- */
-static void pm_timer_stop(struct rt_pm *pm)
-{
-    RT_ASSERT(pm != RT_NULL);
-
-    /* Reset pmtimer status */
-    stm32l4_lptim_stop();
-}
-
-/**
- * This function calculate how many OS Ticks that MCU have suspended
- *
- * @param pm Pointer to power manage structure
- *
- * @return OS Ticks
- */
-static rt_tick_t pm_timer_get_tick(struct rt_pm *pm)
-{
-    rt_uint32_t timer_tick;
-
-    RT_ASSERT(pm != RT_NULL);
-
-    timer_tick = stm32l4_lptim_get_current_tick();
-
-    return stm32l4_os_tick_from_pm_tick(timer_tick);
-}
-
-/**
- * This function initialize the power manager
- */
-int drv_pm_hw_init(void)
-{
-    static const struct rt_pm_ops _ops =
-    {
-        sleep,
-        run,
-        pm_timer_start,
-        pm_timer_stop,
-        pm_timer_get_tick
-    };
-
-    rt_uint8_t timer_mask = 0;
-
-    /* Enable Power Clock */
-    __HAL_RCC_PWR_CLK_ENABLE();
-
-    /* initialize timer mask */
-    timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
-
-    /* initialize system pm module */
-    rt_system_pm_init(&_ops, timer_mask, RT_NULL);
-
-    return 0;
-}
-
-INIT_BOARD_EXPORT(drv_pm_hw_init);
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_pulse_encoder.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_pulse_encoder.c
@@ -1,304 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-08-23     balanceTWK   first version
- */
-
-#include "board.h"
-#include "drv_config.h"
-#ifdef RT_USING_PULSE_ENCODER
-
-//#define DRV_DEBUG
-#define LOG_TAG             "drv.pulse_encoder"
-#include <drv_log.h>
-
-#if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \
-    && !defined(BSP_USING_PULSE_ENCODER4) && !defined(BSP_USING_PULSE_ENCODER5) && !defined(BSP_USING_PULSE_ENCODER6)
-    #error "Please define at least one BSP_USING_PULSE_ENCODERx"
-    /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
-#endif
-
-#define AUTO_RELOAD_VALUE 0x7FFF
-
-enum
-{
-#ifdef BSP_USING_PULSE_ENCODER1
-    PULSE_ENCODER1_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-    PULSE_ENCODER2_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-    PULSE_ENCODER3_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-    PULSE_ENCODER4_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER5
-    PULSE_ENCODER5_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER6
-    PULSE_ENCODER6_INDEX,
-#endif
-};
-
-struct stm32_pulse_encoder_device
-{
-    struct rt_pulse_encoder_device pulse_encoder;
-    TIM_HandleTypeDef tim_handler;
-    IRQn_Type encoder_irqn;
-    rt_int32_t over_under_flowcount;
-    char *name;
-};
-
-static struct stm32_pulse_encoder_device stm32_pulse_encoder_obj[] =
-{
-#ifdef BSP_USING_PULSE_ENCODER1
-    PULSE_ENCODER1_CONFIG,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-    PULSE_ENCODER2_CONFIG,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-    PULSE_ENCODER3_CONFIG,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-    PULSE_ENCODER4_CONFIG,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER5
-    PULSE_ENCODER5_CONFIG,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER6
-    PULSE_ENCODER6_CONFIG,
-#endif
-};
-
-rt_err_t pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    TIM_Encoder_InitTypeDef sConfig;
-    TIM_MasterConfigTypeDef sMasterConfig;
-    struct stm32_pulse_encoder_device *stm32_device;
-    stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
-
-    stm32_device->tim_handler.Init.Prescaler = 0;
-    stm32_device->tim_handler.Init.CounterMode = TIM_COUNTERMODE_UP;
-    stm32_device->tim_handler.Init.Period = AUTO_RELOAD_VALUE;
-    stm32_device->tim_handler.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-    stm32_device->tim_handler.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
-
-    sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
-    sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
-    sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
-    sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
-    sConfig.IC1Filter = 3;
-    sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
-    sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
-    sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
-    sConfig.IC2Filter = 3;
-
-    if (HAL_TIM_Encoder_Init(&stm32_device->tim_handler, &sConfig) != HAL_OK)
-    {
-        LOG_E("pulse_encoder init failed");
-        return -RT_ERROR;
-    }
-
-    sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
-    sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-
-    if (HAL_TIMEx_MasterConfigSynchronization(&stm32_device->tim_handler, &sMasterConfig))
-    {
-        LOG_E("TIMx master config failed");
-        return -RT_ERROR;
-    }
-    else
-    {
-        HAL_NVIC_SetPriority(stm32_device->encoder_irqn, 3, 0);
-
-        /* enable the TIMx global Interrupt */
-        HAL_NVIC_EnableIRQ(stm32_device->encoder_irqn);
-
-        /* clear update flag */
-        __HAL_TIM_CLEAR_FLAG(&stm32_device->tim_handler, TIM_FLAG_UPDATE);
-        /* enable update request source */
-        __HAL_TIM_URS_ENABLE(&stm32_device->tim_handler);
-    }
-
-    return RT_EOK;
-}
-
-rt_err_t pulse_encoder_clear_count(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    struct stm32_pulse_encoder_device *stm32_device;
-    stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
-    stm32_device->over_under_flowcount = 0;
-    __HAL_TIM_SET_COUNTER(&stm32_device->tim_handler, 0);
-    return RT_EOK;
-}
-
-rt_int32_t pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    struct stm32_pulse_encoder_device *stm32_device;
-    stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
-    return (rt_int32_t)((rt_int16_t)__HAL_TIM_GET_COUNTER(&stm32_device->tim_handler) + stm32_device->over_under_flowcount * AUTO_RELOAD_VALUE);
-}
-
-rt_err_t pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args)
-{
-    rt_err_t result;
-    struct stm32_pulse_encoder_device *stm32_device;
-    stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
-
-    result = RT_EOK;
-
-    switch (cmd)
-    {
-    case PULSE_ENCODER_CMD_ENABLE:
-        HAL_TIM_Encoder_Start(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
-        HAL_TIM_Encoder_Start_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
-        break;
-    case PULSE_ENCODER_CMD_DISABLE:
-        HAL_TIM_Encoder_Stop(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
-        HAL_TIM_Encoder_Stop_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
-        break;
-    default:
-        result = -RT_ENOSYS;
-        break;
-    }
-
-    return result;
-}
-
-void pulse_encoder_update_isr(struct stm32_pulse_encoder_device *device)
-{
-    /* TIM Update event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_UPDATE) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_UPDATE);
-        if (__HAL_TIM_IS_TIM_COUNTING_DOWN(&device->tim_handler))
-        {
-            device->over_under_flowcount--;
-        }
-        else
-        {
-            device->over_under_flowcount++;
-        }
-    }
-    /* Capture compare 1 event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC1) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC1);
-    }
-    /* Capture compare 2 event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC2) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC2);
-    }
-    /* Capture compare 3 event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC3) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC3);
-    }
-    /* Capture compare 4 event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC4) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC4);
-    }
-    /* TIM Break input event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_BREAK) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_BREAK);
-    }
-    /* TIM Trigger detection event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_TRIGGER) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_TRIGGER);
-    }
-    /* TIM commutation event */
-    if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_COM) != RESET)
-    {
-        __HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_FLAG_COM);
-    }
-}
-
-#ifdef BSP_USING_PULSE_ENCODER1
-#if defined(SOC_SERIES_STM32F4)
-void TIM1_UP_TIM10_IRQHandler(void)
-#elif defined(SOC_SERIES_STM32F1)
-void TIM1_UP_IRQHandler(void)
-#else
-    #error "Please check TIM1's IRQHandler"
-#endif
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER1_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-void TIM2_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER2_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-void TIM3_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER3_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-void TIM4_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER4_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-static const struct rt_pulse_encoder_ops _ops =
-{
-    .init = pulse_encoder_init,
-    .get_count = pulse_encoder_get_count,
-    .clear_count = pulse_encoder_clear_count,
-    .control = pulse_encoder_control,
-};
-
-int hw_pulse_encoder_init(void)
-{
-    int i;
-    int result;
-
-    result = RT_EOK;
-    for (i = 0; i < sizeof(stm32_pulse_encoder_obj) / sizeof(stm32_pulse_encoder_obj[0]); i++)
-    {
-        stm32_pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER;
-        stm32_pulse_encoder_obj[i].pulse_encoder.ops = &_ops;
-
-        if (rt_device_pulse_encoder_register(&stm32_pulse_encoder_obj[i].pulse_encoder, stm32_pulse_encoder_obj[i].name, RT_NULL) != RT_EOK)
-        {
-            LOG_E("%s register failed", stm32_pulse_encoder_obj[i].name);
-            result = -RT_ERROR;
-        }
-    }
-
-    return result;
-}
-INIT_BOARD_EXPORT(hw_pulse_encoder_init);
-
-#endif
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_pwm.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_pwm.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_qspi.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_qspi.c
@@ -1,400 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-27     zylx         first version
- */
-
-#include "board.h"
-#include "drv_qspi.h"
-#include "drv_config.h"
-
-#ifdef RT_USING_QSPI
-
-#define DRV_DEBUG
-#define LOG_TAG              "drv.qspi"
-#include <drv_log.h>
-
-#if defined(BSP_USING_QSPI)
-
-struct stm32_hw_spi_cs
-{
-    uint16_t Pin;
-};
-
-struct stm32_qspi_bus
-{
-    QSPI_HandleTypeDef QSPI_Handler;
-    char *bus_name;
-#ifdef BSP_QSPI_USING_DMA
-    DMA_HandleTypeDef hdma_quadspi;
-#endif
-};
-
-struct rt_spi_bus _qspi_bus1;
-struct stm32_qspi_bus _stm32_qspi_bus;
-
-static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configuration *qspi_cfg)
-{
-    int result = RT_EOK;
-    unsigned int i = 1;
-
-    RT_ASSERT(device != RT_NULL);
-    RT_ASSERT(qspi_cfg != RT_NULL);
-
-    struct rt_spi_configuration *cfg = &qspi_cfg->parent;
-    struct stm32_qspi_bus *qspi_bus = device->parent.bus->parent.user_data;
-    rt_memset(&qspi_bus->QSPI_Handler, 0, sizeof(qspi_bus->QSPI_Handler));
-
-    QSPI_HandleTypeDef QSPI_Handler_config = QSPI_BUS_CONFIG;
-    qspi_bus->QSPI_Handler = QSPI_Handler_config;
-
-#if defined(SOC_SERIES_STM32MP1)
-    while (cfg->max_hz < HAL_RCC_GetACLKFreq() / (i + 1))
-#else
-    while (cfg->max_hz < HAL_RCC_GetHCLKFreq() / (i + 1))
-#endif
-   {
-        i++;
-        if (i == 255)
-        {
-            LOG_E("QSPI init failed, QSPI frequency(%d) is too low.", cfg->max_hz);
-            return -RT_ERROR;
-        }
-    }
-    /* 80/(1+i) */
-    qspi_bus->QSPI_Handler.Init.ClockPrescaler = i;
-
-    if (!(cfg->mode & RT_SPI_CPOL))
-    {
-        /* QSPI MODE0 */
-        qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_0;
-    }
-    else
-    {
-        /* QSPI MODE3 */
-        qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_3;
-    }
-
-    /* flash size */
-    qspi_bus->QSPI_Handler.Init.FlashSize = POSITION_VAL(qspi_cfg->medium_size) - 1;
-
-    result = HAL_QSPI_Init(&qspi_bus->QSPI_Handler);
-    if (result  == HAL_OK)
-    {
-        LOG_D("qspi init success!");
-    }
-    else
-    {
-        LOG_E("qspi init failed (%d)!", result);
-    }
-
-#ifdef BSP_QSPI_USING_DMA
-    /* QSPI interrupts must be enabled when using the HAL_QSPI_Receive_DMA */
-    HAL_NVIC_SetPriority(QSPI_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(QSPI_IRQn);
-    HAL_NVIC_SetPriority(QSPI_DMA_IRQ, 0, 0);
-    HAL_NVIC_EnableIRQ(QSPI_DMA_IRQ);
-
-    /* init QSPI DMA */
-    if(QSPI_DMA_RCC  == RCC_AHB1ENR_DMA1EN)
-    {
-        __HAL_RCC_DMA1_CLK_ENABLE();
-    }
-    else
-    {
-        __HAL_RCC_DMA2_CLK_ENABLE();
-    }
-    
-    HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma);
-    DMA_HandleTypeDef hdma_quadspi_config = QSPI_DMA_CONFIG;
-    qspi_bus->hdma_quadspi = hdma_quadspi_config;
-
-    if (HAL_DMA_Init(&qspi_bus->hdma_quadspi) != HAL_OK)
-    {
-        LOG_E("qspi dma init failed (%d)!", result);
-    }
-
-    __HAL_LINKDMA(&qspi_bus->QSPI_Handler, hdma, qspi_bus->hdma_quadspi);
-#endif /* BSP_QSPI_USING_DMA */
-
-    return result;
-}
-
-static void qspi_send_cmd(struct stm32_qspi_bus *qspi_bus, struct rt_qspi_message *message)
-{
-    RT_ASSERT(qspi_bus != RT_NULL);
-    RT_ASSERT(message != RT_NULL);
-
-    QSPI_CommandTypeDef Cmdhandler;
-
-    /* set QSPI cmd struct */
-    Cmdhandler.Instruction = message->instruction.content;
-    Cmdhandler.Address = message->address.content;
-    Cmdhandler.DummyCycles = message->dummy_cycles;
-    if (message->instruction.qspi_lines == 0)
-    {
-        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_NONE;
-    }
-    else if (message->instruction.qspi_lines == 1)
-    {
-        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_1_LINE;
-    }
-    else if (message->instruction.qspi_lines == 2)
-    {
-        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_2_LINES;
-    }
-    else if (message->instruction.qspi_lines == 4)
-    {
-        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_4_LINES;
-    }
-    if (message->address.qspi_lines == 0)
-    {
-        Cmdhandler.AddressMode = QSPI_ADDRESS_NONE;
-    }
-    else if (message->address.qspi_lines == 1)
-    {
-        Cmdhandler.AddressMode = QSPI_ADDRESS_1_LINE;
-    }
-    else if (message->address.qspi_lines == 2)
-    {
-        Cmdhandler.AddressMode = QSPI_ADDRESS_2_LINES;
-    }
-    else if (message->address.qspi_lines == 4)
-    {
-        Cmdhandler.AddressMode = QSPI_ADDRESS_4_LINES;
-    }
-    if (message->address.size == 24)
-    {
-        Cmdhandler.AddressSize = QSPI_ADDRESS_24_BITS;
-    }
-    else
-    {
-        Cmdhandler.AddressSize = QSPI_ADDRESS_32_BITS;
-    }
-    if (message->qspi_data_lines == 0)
-    {
-        Cmdhandler.DataMode = QSPI_DATA_NONE;
-    }
-    else if (message->qspi_data_lines == 1)
-    {
-        Cmdhandler.DataMode = QSPI_DATA_1_LINE;
-    }
-    else if (message->qspi_data_lines == 2)
-    {
-        Cmdhandler.DataMode = QSPI_DATA_2_LINES;
-    }
-    else if (message->qspi_data_lines == 4)
-    {
-        Cmdhandler.DataMode = QSPI_DATA_4_LINES;
-    }
-
-    Cmdhandler.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
-    Cmdhandler.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
-    Cmdhandler.DdrMode = QSPI_DDR_MODE_DISABLE;
-    Cmdhandler.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
-    Cmdhandler.NbData = message->parent.length;
-    HAL_QSPI_Command(&qspi_bus->QSPI_Handler, &Cmdhandler, 5000);
-}
-
-static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message *message)
-{
-    rt_size_t len = 0;
-
-    RT_ASSERT(device != RT_NULL);
-    RT_ASSERT(device->bus != RT_NULL);
-
-    struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
-    struct stm32_qspi_bus *qspi_bus = device->bus->parent.user_data;
-#ifdef BSP_QSPI_USING_SOFTCS
-    struct stm32_hw_spi_cs *cs = device->parent.user_data;
-#endif
-
-    const rt_uint8_t *sndb = message->send_buf;
-    rt_uint8_t *rcvb = message->recv_buf;
-    rt_int32_t length = message->length;
-
-#ifdef BSP_QSPI_USING_SOFTCS
-    if (message->cs_take)
-    {
-        rt_pin_write(cs->pin, 0);
-    }
-#endif
-
-    /* send data */
-    if (sndb)
-    {
-        qspi_send_cmd(qspi_bus, qspi_message);
-        if (qspi_message->parent.length != 0)
-        {
-            if (HAL_QSPI_Transmit(&qspi_bus->QSPI_Handler, (rt_uint8_t *)sndb, 5000) == HAL_OK)
-            {
-                len = length;
-            }
-            else
-            {
-                LOG_E("QSPI send data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
-                qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
-                goto __exit;
-            }
-        }
-        else
-        {
-            len = 1;
-        }
-    }
-    else if (rcvb)/* recv data */
-    {
-        qspi_send_cmd(qspi_bus, qspi_message);
-#ifdef BSP_QSPI_USING_DMA
-        if (HAL_QSPI_Receive_DMA(&qspi_bus->QSPI_Handler, rcvb) == HAL_OK)
-#else
-        if (HAL_QSPI_Receive(&qspi_bus->QSPI_Handler, rcvb, 5000) == HAL_OK)
-#endif
-        {
-            len = length;
-#ifdef BSP_QSPI_USING_DMA
-            while (qspi_bus->QSPI_Handler.RxXferCount != 0);
-#endif
-        }
-        else
-        {
-            LOG_E("QSPI recv data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
-            qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
-            goto __exit;
-        }
-    }
-
-__exit:
-#ifdef BSP_QSPI_USING_SOFTCS
-    if (message->cs_release)
-    {
-        rt_pin_write(cs->pin, 1);
-    }
-#endif
-    return len;
-}
-
-static rt_err_t qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
-{
-    RT_ASSERT(device != RT_NULL);
-    RT_ASSERT(configuration != RT_NULL);
-
-    struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
-    return stm32_qspi_init(qspi_device, &qspi_device->config);
-}
-
-static const struct rt_spi_ops stm32_qspi_ops =
-{
-    .configure = qspi_configure,
-    .xfer = qspixfer,
-};
-
-static int stm32_qspi_register_bus(struct stm32_qspi_bus *qspi_bus, const char *name)
-{
-    RT_ASSERT(qspi_bus != RT_NULL);
-    RT_ASSERT(name != RT_NULL);
-
-    _qspi_bus1.parent.user_data = qspi_bus;
-    return rt_qspi_bus_register(&_qspi_bus1, name, &stm32_qspi_ops);
-}
-
-/**
-  * @brief  This function attach device to QSPI bus.
-  * @param  device_name      QSPI device name
-  * @param  pin              QSPI cs pin number
-  * @param  data_line_width  QSPI data lines width, such as 1, 2, 4
-  * @param  enter_qspi_mode  Callback function that lets FLASH enter QSPI mode
-  * @param  exit_qspi_mode   Callback function that lets FLASH exit QSPI mode
-  * @retval 0 : success
-  *        -1 : failed
-  */
-rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
-{
-    struct rt_qspi_device *qspi_device = RT_NULL;
-    struct stm32_hw_spi_cs *cs_pin = RT_NULL;
-    rt_err_t result = RT_EOK;
-
-    RT_ASSERT(bus_name != RT_NULL);
-    RT_ASSERT(device_name != RT_NULL);
-    RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
-
-    qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
-    if (qspi_device == RT_NULL)
-    {
-        LOG_E("no memory, qspi bus attach device failed!");
-        result = RT_ENOMEM;
-        goto __exit;
-    }
-    cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
-    if (qspi_device == RT_NULL)
-    {
-        LOG_E("no memory, qspi bus attach device failed!");
-        result = RT_ENOMEM;
-        goto __exit;
-    }
-
-    qspi_device->enter_qspi_mode = enter_qspi_mode;
-    qspi_device->exit_qspi_mode = exit_qspi_mode;
-    qspi_device->config.qspi_dl_width = data_line_width;
-
-    cs_pin->Pin = pin;
-#ifdef BSP_QSPI_USING_SOFTCS
-    rt_pin_mode(pin, PIN_MODE_OUTPUT);
-    rt_pin_write(pin, 1);
-#endif
-
-    result = rt_spi_bus_attach_device(&qspi_device->parent, device_name, bus_name, (void *)cs_pin);
-
-__exit:
-    if (result != RT_EOK)
-    {
-        if (qspi_device)
-        {
-            rt_free(qspi_device);
-        }
-
-        if (cs_pin)
-        {
-            rt_free(cs_pin);
-        }
-    }
-
-    return  result;
-}
-
-#ifdef BSP_QSPI_USING_DMA
-void QSPI_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    HAL_QSPI_IRQHandler(&_stm32_qspi_bus.QSPI_Handler);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-void QSPI_DMA_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    HAL_DMA_IRQHandler(&_stm32_qspi_bus.hdma_quadspi);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif /* BSP_QSPI_USING_DMA */
-
-static int rt_hw_qspi_bus_init(void)
-{
-    return stm32_qspi_register_bus(&_stm32_qspi_bus, "qspi1");
-}
-INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
-
-#endif /* BSP_USING_QSPI */
-#endif /* RT_USING_QSPI */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_qspi.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_qspi.h
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-27     zylx         first version
- */
- 
-#ifndef __DRV_QSPI_H__
-#define __DRV_QSPI_H__
-
-#include <rtthread.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width,  void (*enter_qspi_mode)(),  void (*exit_qspi_mode)());
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DRV_QSPI_H__ */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_rtc.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_rtc.c
@@ -1,308 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date         Author        Notes
- * 2018-12-04   balanceTWK    first version
- * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
- */
-
-#include "board.h"
-
-#ifdef BSP_USING_ONCHIP_RTC
-
-#ifndef RTC_BKP_DR1
-#define RTC_BKP_DR1 RT_NULL
-#endif
-
-//#define DRV_DEBUG
-#define LOG_TAG             "drv.rtc"
-#include <drv_log.h>
-
-#define BKUP_REG_DATA 0xA5A5
-
-static struct rt_device rtc;
-
-static RTC_HandleTypeDef RTC_Handler;
-
-RT_WEAK uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
-{
-    return (~BKUP_REG_DATA);
-}
-
-RT_WEAK void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
-{
-    return;
-}
-
-static time_t get_rtc_timestamp(void)
-{
-    RTC_TimeTypeDef RTC_TimeStruct = {0};
-    RTC_DateTypeDef RTC_DateStruct = {0};
-    struct tm tm_new = {0};
-
-    HAL_RTC_GetTime(&RTC_Handler, &RTC_TimeStruct, RTC_FORMAT_BIN);
-    HAL_RTC_GetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN);
-
-    tm_new.tm_sec  = RTC_TimeStruct.Seconds;
-    tm_new.tm_min  = RTC_TimeStruct.Minutes;
-    tm_new.tm_hour = RTC_TimeStruct.Hours;
-    tm_new.tm_mday = RTC_DateStruct.Date;
-    tm_new.tm_mon  = RTC_DateStruct.Month - 1;
-    tm_new.tm_year = RTC_DateStruct.Year + 100;
-
-    LOG_D("get rtc time.");
-    return mktime(&tm_new);
-}
-
-static rt_err_t set_rtc_time_stamp(time_t time_stamp)
-{
-    RTC_TimeTypeDef RTC_TimeStruct = {0};
-    RTC_DateTypeDef RTC_DateStruct = {0};
-    struct tm *p_tm;
-
-    p_tm = localtime(&time_stamp);
-    if (p_tm->tm_year < 100)
-    {
-        return -RT_ERROR;
-    }
-
-    RTC_TimeStruct.Seconds = p_tm->tm_sec ;
-    RTC_TimeStruct.Minutes = p_tm->tm_min ;
-    RTC_TimeStruct.Hours   = p_tm->tm_hour;
-    RTC_DateStruct.Date    = p_tm->tm_mday;
-    RTC_DateStruct.Month   = p_tm->tm_mon + 1 ;
-    RTC_DateStruct.Year    = p_tm->tm_year - 100;
-    RTC_DateStruct.WeekDay = p_tm->tm_wday + 1;
-
-    if (HAL_RTC_SetTime(&RTC_Handler, &RTC_TimeStruct, RTC_FORMAT_BIN) != HAL_OK)
-    {
-        return -RT_ERROR;
-    }
-    if (HAL_RTC_SetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN) != HAL_OK)
-    {
-        return -RT_ERROR;
-    }
-
-    LOG_D("set rtc time.");
-    HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR1, BKUP_REG_DATA);
-
-#ifdef SOC_SERIES_STM32F1
-    /* F1 series does't save year/month/date datas. so keep those datas to bkp reg */
-    HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR2, RTC_DateStruct.Year);
-    HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR3, RTC_DateStruct.Month);
-    HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR4, RTC_DateStruct.Date);
-    HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR5, RTC_DateStruct.WeekDay);
-#endif
-
-    return RT_EOK;
-}
-
-static void rt_rtc_init(void)
-{
-#if !defined(SOC_SERIES_STM32H7) && !defined(SOC_SERIES_STM32WB)
-    __HAL_RCC_PWR_CLK_ENABLE();
-#endif
-
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-#ifdef BSP_RTC_USING_LSI
-#ifdef SOC_SERIES_STM32WB
-RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI1;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
-    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-#else
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
-    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-#endif
-#else
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
-    RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
-#endif
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-}
-
-#ifdef SOC_SERIES_STM32F1
-/* update RTC_BKP_DRx*/
-static void rt_rtc_f1_bkp_update(void)
-{
-    RTC_DateTypeDef RTC_DateStruct = {0};
-
-    HAL_PWR_EnableBkUpAccess();
-    __HAL_RCC_BKP_CLK_ENABLE();
-
-    RTC_DateStruct.Year    = HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR2);
-    RTC_DateStruct.Month   = HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR3);
-    RTC_DateStruct.Date    = HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR4);
-    RTC_DateStruct.WeekDay = HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR5);
-    if (HAL_RTC_SetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN) != HAL_OK)
-    {
-        Error_Handler();
-    }
-
-    HAL_RTC_GetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN);
-    if (HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR4) != RTC_DateStruct.Date)
-    {
-        HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR1, BKUP_REG_DATA);
-        HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR2, RTC_DateStruct.Year);
-        HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR3, RTC_DateStruct.Month);
-        HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR4, RTC_DateStruct.Date);
-        HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR5, RTC_DateStruct.WeekDay);
-    }
-}
-#endif
-
-static rt_err_t rt_rtc_config(struct rt_device *dev)
-{
-    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
-    HAL_PWR_EnableBkUpAccess();
-    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
-#ifdef BSP_RTC_USING_LSI
-    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
-#else
-    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
-#endif
-    HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-
-    /* Enable RTC Clock */
-    __HAL_RCC_RTC_ENABLE();
-
-    RTC_Handler.Instance = RTC;
-    if (HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR1) != BKUP_REG_DATA)
-    {
-        LOG_I("RTC hasn't been configured, please use <date> command to config.");
-
-#if defined(SOC_SERIES_STM32F1)
-        RTC_Handler.Init.OutPut = RTC_OUTPUTSOURCE_NONE;
-        RTC_Handler.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
-#elif defined(SOC_SERIES_STM32F0)
-
-        /* set the frequency division */
-#ifdef BSP_RTC_USING_LSI
-        RTC_Handler.Init.AsynchPrediv = 0XA0;
-        RTC_Handler.Init.SynchPrediv = 0xFA;
-#else
-        RTC_Handler.Init.AsynchPrediv = 0X7F;
-        RTC_Handler.Init.SynchPrediv = 0x0130;
-#endif /* BSP_RTC_USING_LSI */
-
-        RTC_Handler.Init.HourFormat = RTC_HOURFORMAT_24;
-        RTC_Handler.Init.OutPut = RTC_OUTPUT_DISABLE;
-        RTC_Handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
-        RTC_Handler.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
-#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
-
-        /* set the frequency division */
-#ifdef BSP_RTC_USING_LSI
-        RTC_Handler.Init.AsynchPrediv = 0X7D;
-#else
-        RTC_Handler.Init.AsynchPrediv = 0X7F;
-#endif /* BSP_RTC_USING_LSI */
-        RTC_Handler.Init.SynchPrediv = 0XFF;
-
-        RTC_Handler.Init.HourFormat = RTC_HOURFORMAT_24;
-        RTC_Handler.Init.OutPut = RTC_OUTPUT_DISABLE;
-        RTC_Handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
-        RTC_Handler.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
-#endif
-        if (HAL_RTC_Init(&RTC_Handler) != HAL_OK)
-        {
-            return -RT_ERROR;
-        }
-    }
-#ifdef SOC_SERIES_STM32F1
-    else
-    {
-        /* F1 series need update by bkp reg datas */
-        rt_rtc_f1_bkp_update();
-    }
-#endif
-
-    return RT_EOK;
-}
-
-static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
-{
-    rt_err_t result = RT_EOK;
-    RT_ASSERT(dev != RT_NULL);
-    switch (cmd)
-    {
-    case RT_DEVICE_CTRL_RTC_GET_TIME:
-        *(rt_uint32_t *)args = get_rtc_timestamp();
-        LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
-        break;
-
-    case RT_DEVICE_CTRL_RTC_SET_TIME:
-        if (set_rtc_time_stamp(*(rt_uint32_t *)args))
-        {
-            result = -RT_ERROR;
-        }
-        LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
-        break;
-    }
-
-    return result;
-}
-
-#ifdef RT_USING_DEVICE_OPS
-const static struct rt_device_ops rtc_ops =
-{
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    rt_rtc_control
-};
-#endif
-
-static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
-{
-    RT_ASSERT(device != RT_NULL);
-
-    rt_rtc_init();
-    if (rt_rtc_config(device) != RT_EOK)
-    {
-        return -RT_ERROR;
-    }
-#ifdef RT_USING_DEVICE_OPS
-    device->ops         = &rtc_ops;
-#else
-    device->init        = RT_NULL;
-    device->open        = RT_NULL;
-    device->close       = RT_NULL;
-    device->read        = RT_NULL;
-    device->write       = RT_NULL;
-    device->control     = rt_rtc_control;
-#endif
-    device->type        = RT_Device_Class_RTC;
-    device->rx_indicate = RT_NULL;
-    device->tx_complete = RT_NULL;
-    device->user_data   = RT_NULL;
-
-    /* register a character device */
-    return rt_device_register(device, name, flag);
-}
-
-int rt_hw_rtc_init(void)
-{
-    rt_err_t result;
-    result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
-    if (result != RT_EOK)
-    {
-        LOG_E("rtc register err code: %d", result);
-        return result;
-    }
-    LOG_D("rtc init success");
-    return RT_EOK;
-}
-INIT_DEVICE_EXPORT(rt_hw_rtc_init);
-
-#endif /* BSP_USING_ONCHIP_RTC */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdio.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdio.c
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdio.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdio.h
@@ -1,196 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-13     BalanceTWK   first version
- * 2019-06-11     WillianChan   Add SD card hot plug detection
- */
-
-#ifndef _DRV_SDIO_H
-#define _DRV_SDIO_H
-#include <rtthread.h>
-#include "rtdevice.h"
-#include <rthw.h>
-#include <drv_common.h>
-#include "drv_dma.h"
-#include <string.h>
-#include <drivers/mmcsd_core.h>
-#include <drivers/sdio.h>
-
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4)
-#define SDCARD_INSTANCE_TYPE              SDIO_TypeDef
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
-#define SDCARD_INSTANCE_TYPE              SDMMC_TypeDef
-#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) */
-
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4)
-#define SDCARD_INSTANCE                   SDIO
-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
-#define SDCARD_INSTANCE                   SDMMC1
-#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) */
-
-#define SDIO_BUFF_SIZE       4096
-#define SDIO_ALIGN_LEN       32
-
-#ifndef SDIO_MAX_FREQ
-#define SDIO_MAX_FREQ        (1000000)
-#endif
-
-#ifndef SDIO_BASE_ADDRESS
-#define SDIO_BASE_ADDRESS    (0x40012800U)
-#endif
-
-#ifndef SDIO_CLOCK_FREQ
-#define SDIO_CLOCK_FREQ      (48U * 1000 * 1000)
-#endif
-
-#ifndef SDIO_BUFF_SIZE
-#define SDIO_BUFF_SIZE       (4096)
-#endif
-
-#ifndef SDIO_ALIGN_LEN
-#define SDIO_ALIGN_LEN       (32)
-#endif
-
-#ifndef SDIO_MAX_FREQ
-#define SDIO_MAX_FREQ        (24 * 1000 * 1000)
-#endif
-
-#define HW_SDIO_IT_CCRCFAIL                    (0x01U << 0)
-#define HW_SDIO_IT_DCRCFAIL                    (0x01U << 1)
-#define HW_SDIO_IT_CTIMEOUT                    (0x01U << 2)
-#define HW_SDIO_IT_DTIMEOUT                    (0x01U << 3)
-#define HW_SDIO_IT_TXUNDERR                    (0x01U << 4)
-#define HW_SDIO_IT_RXOVERR                     (0x01U << 5)
-#define HW_SDIO_IT_CMDREND                     (0x01U << 6)
-#define HW_SDIO_IT_CMDSENT                     (0x01U << 7)
-#define HW_SDIO_IT_DATAEND                     (0x01U << 8)
-#define HW_SDIO_IT_STBITERR                    (0x01U << 9)
-#define HW_SDIO_IT_DBCKEND                     (0x01U << 10)
-#define HW_SDIO_IT_CMDACT                      (0x01U << 11)
-#define HW_SDIO_IT_TXACT                       (0x01U << 12)
-#define HW_SDIO_IT_RXACT                       (0x01U << 13)
-#define HW_SDIO_IT_TXFIFOHE                    (0x01U << 14)
-#define HW_SDIO_IT_RXFIFOHF                    (0x01U << 15)
-#define HW_SDIO_IT_TXFIFOF                     (0x01U << 16)
-#define HW_SDIO_IT_RXFIFOF                     (0x01U << 17)
-#define HW_SDIO_IT_TXFIFOE                     (0x01U << 18)
-#define HW_SDIO_IT_RXFIFOE                     (0x01U << 19)
-#define HW_SDIO_IT_TXDAVL                      (0x01U << 20)
-#define HW_SDIO_IT_RXDAVL                      (0x01U << 21)
-#define HW_SDIO_IT_SDIOIT                      (0x01U << 22)
-
-#define HW_SDIO_ERRORS \
-    (HW_SDIO_IT_CCRCFAIL | HW_SDIO_IT_CTIMEOUT | \
-     HW_SDIO_IT_DCRCFAIL | HW_SDIO_IT_DTIMEOUT | \
-     HW_SDIO_IT_RXOVERR  | HW_SDIO_IT_TXUNDERR)
-
-#define HW_SDIO_POWER_OFF                      (0x00U)
-#define HW_SDIO_POWER_UP                       (0x02U)
-#define HW_SDIO_POWER_ON                       (0x03U)
-
-#define HW_SDIO_FLOW_ENABLE                    (0x01U << 14)
-#define HW_SDIO_BUSWIDE_1B                     (0x00U << 11)
-#define HW_SDIO_BUSWIDE_4B                     (0x01U << 11)
-#define HW_SDIO_BUSWIDE_8B                     (0x02U << 11)
-#define HW_SDIO_BYPASS_ENABLE                  (0x01U << 10)
-#define HW_SDIO_IDLE_ENABLE                    (0x01U << 9)
-#define HW_SDIO_CLK_ENABLE                     (0x01U << 8)
-
-#define HW_SDIO_SUSPEND_CMD                    (0x01U << 11)
-#define HW_SDIO_CPSM_ENABLE                    (0x01U << 10)
-#define HW_SDIO_WAIT_END                       (0x01U << 9)
-#define HW_SDIO_WAIT_INT                       (0x01U << 8)
-#define HW_SDIO_RESPONSE_NO                    (0x00U << 6)
-#define HW_SDIO_RESPONSE_SHORT                 (0x01U << 6)
-#define HW_SDIO_RESPONSE_LONG                  (0x03U << 6)
-
-#define HW_SDIO_DATA_LEN_MASK                  (0x01FFFFFFU)
-
-#define HW_SDIO_IO_ENABLE                      (0x01U << 11)
-#define HW_SDIO_RWMOD_CK                       (0x01U << 10)
-#define HW_SDIO_RWSTOP_ENABLE                  (0x01U << 9)
-#define HW_SDIO_RWSTART_ENABLE                 (0x01U << 8)
-#define HW_SDIO_DBLOCKSIZE_1                   (0x00U << 4)
-#define HW_SDIO_DBLOCKSIZE_2                   (0x01U << 4)
-#define HW_SDIO_DBLOCKSIZE_4                   (0x02U << 4)
-#define HW_SDIO_DBLOCKSIZE_8                   (0x03U << 4)
-#define HW_SDIO_DBLOCKSIZE_16                  (0x04U << 4)
-#define HW_SDIO_DBLOCKSIZE_32                  (0x05U << 4)
-#define HW_SDIO_DBLOCKSIZE_64                  (0x06U << 4)
-#define HW_SDIO_DBLOCKSIZE_128                 (0x07U << 4)
-#define HW_SDIO_DBLOCKSIZE_256                 (0x08U << 4)
-#define HW_SDIO_DBLOCKSIZE_512                 (0x09U << 4)
-#define HW_SDIO_DBLOCKSIZE_1024                (0x0AU << 4)
-#define HW_SDIO_DBLOCKSIZE_2048                (0x0BU << 4)
-#define HW_SDIO_DBLOCKSIZE_4096                (0x0CU << 4)
-#define HW_SDIO_DBLOCKSIZE_8192                (0x0DU << 4)
-#define HW_SDIO_DBLOCKSIZE_16384               (0x0EU << 4)
-#define HW_SDIO_DMA_ENABLE                     (0x01U << 3)
-#define HW_SDIO_STREAM_ENABLE                  (0x01U << 2)
-#define HW_SDIO_TO_HOST                        (0x01U << 1)
-#define HW_SDIO_DPSM_ENABLE                    (0x01U << 0)
-
-#define HW_SDIO_DATATIMEOUT                    (0xF0000000U)
-
-struct stm32_sdio
-{
-    volatile rt_uint32_t power;
-    volatile rt_uint32_t clkcr;
-    volatile rt_uint32_t arg;
-    volatile rt_uint32_t cmd;
-    volatile rt_uint32_t respcmd;
-    volatile rt_uint32_t resp1;
-    volatile rt_uint32_t resp2;
-    volatile rt_uint32_t resp3;
-    volatile rt_uint32_t resp4;
-    volatile rt_uint32_t dtimer;
-    volatile rt_uint32_t dlen;
-    volatile rt_uint32_t dctrl;
-    volatile rt_uint32_t dcount;
-    volatile rt_uint32_t sta;
-    volatile rt_uint32_t icr;
-    volatile rt_uint32_t mask;
-    volatile rt_uint32_t reserved0[2];
-    volatile rt_uint32_t fifocnt;
-    volatile rt_uint32_t reserved1[13];
-    volatile rt_uint32_t fifo;
-};
-
-typedef rt_err_t (*dma_txconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
-typedef rt_err_t (*dma_rxconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
-typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
-
-struct stm32_sdio_des
-{
-    struct stm32_sdio *hw_sdio;
-    dma_txconfig txconfig;
-    dma_rxconfig rxconfig;
-    sdio_clk_get clk_get;
-};
-
-struct stm32_sdio_config
-{
-    SDCARD_INSTANCE_TYPE *Instance;
-    struct dma_config dma_rx, dma_tx;
-};
-
-/* stm32 sdio dirver class */
-struct stm32_sdio_class
-{
-    struct stm32_sdio_des *des;
-    const struct stm32_sdio_config *cfg;
-    struct rt_mmcsd_host host;
-    struct
-    {
-        DMA_HandleTypeDef handle_rx;
-        DMA_HandleTypeDef handle_tx;
-    } dma;
-};
-
-extern void stm32_mmcsd_change(void);
-
-#endif
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdram.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_sdram.c
@@ -1,264 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-12-04     zylx         first version
- */
-
-#include <board.h>
-
-#ifdef BSP_USING_SDRAM
-#include <sdram_port.h>
-
-#define DRV_DEBUG
-#define LOG_TAG             "drv.sdram"
-#include <drv_log.h>
-
-static SDRAM_HandleTypeDef hsdram1;
-static FMC_SDRAM_CommandTypeDef command;
-#ifdef RT_USING_MEMHEAP_AS_HEAP
-static struct rt_memheap system_heap;
-#endif
-
-/**
-  * @brief  Perform the SDRAM exernal memory inialization sequence
-  * @param  hsdram: SDRAM handle
-  * @param  Command: Pointer to SDRAM command structure
-  * @retval None
-  */
-static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)
-{
-    __IO uint32_t tmpmrd = 0;
-    uint32_t target_bank = 0;
-
-#if SDRAM_TARGET_BANK == 1
-    target_bank = FMC_SDRAM_CMD_TARGET_BANK1;
-#else
-    target_bank = FMC_SDRAM_CMD_TARGET_BANK2;
-#endif
-
-    /* Configure a clock configuration enable command */
-    Command->CommandMode           = FMC_SDRAM_CMD_CLK_ENABLE;
-    Command->CommandTarget         = target_bank;
-    Command->AutoRefreshNumber     = 1;
-    Command->ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
-
-    /* Insert 100 ms delay */
-    /* interrupt is not enable, just to delay some time. */
-    for (tmpmrd = 0; tmpmrd < 0xffffff; tmpmrd ++)
-        ;
-
-    /* Configure a PALL (precharge all) command */
-    Command->CommandMode            = FMC_SDRAM_CMD_PALL;
-    Command->CommandTarget          = target_bank;
-    Command->AutoRefreshNumber      = 1;
-    Command->ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
-
-    /* Configure a Auto-Refresh command */
-    Command->CommandMode            = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
-    Command->CommandTarget          = target_bank;
-    Command->AutoRefreshNumber      = 8;
-    Command->ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
-
-    /* Program the external memory mode register */
-#if SDRAM_DATA_WIDTH == 8
-    tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1     |
-#elif SDRAM_DATA_WIDTH == 16
-    tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_2     |
-#else
-    tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_4     |
-#endif
-             SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL        |
-#if SDRAM_CAS_LATENCY == 3
-             SDRAM_MODEREG_CAS_LATENCY_3                |
-#else
-             SDRAM_MODEREG_CAS_LATENCY_2                |
-#endif
-             SDRAM_MODEREG_OPERATING_MODE_STANDARD      |
-             SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
-
-    Command->CommandMode            = FMC_SDRAM_CMD_LOAD_MODE;
-    Command->CommandTarget          = target_bank;
-    Command->AutoRefreshNumber      = 1;
-    Command->ModeRegisterDefinition = tmpmrd;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
-
-    /* Set the device refresh counter */
-    HAL_SDRAM_ProgramRefreshRate(hsdram, SDRAM_REFRESH_COUNT);
-}
-
-static int SDRAM_Init(void)
-{
-    int result = RT_EOK;
-    FMC_SDRAM_TimingTypeDef SDRAM_Timing;
-
-    /* SDRAM device configuration */
-    hsdram1.Instance = FMC_SDRAM_DEVICE;
-    SDRAM_Timing.LoadToActiveDelay    = LOADTOACTIVEDELAY;
-    SDRAM_Timing.ExitSelfRefreshDelay = EXITSELFREFRESHDELAY;
-    SDRAM_Timing.SelfRefreshTime      = SELFREFRESHTIME;
-    SDRAM_Timing.RowCycleDelay        = ROWCYCLEDELAY;
-    SDRAM_Timing.WriteRecoveryTime    = WRITERECOVERYTIME;
-    SDRAM_Timing.RPDelay              = RPDELAY;
-    SDRAM_Timing.RCDDelay             = RCDDELAY;
-
-#if SDRAM_TARGET_BANK == 1
-    hsdram1.Init.SDBank             = FMC_SDRAM_BANK1;
-#else
-    hsdram1.Init.SDBank             = FMC_SDRAM_BANK2;
-#endif
-#if SDRAM_COLUMN_BITS == 8
-    hsdram1.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_8;
-#elif SDRAM_COLUMN_BITS == 9
-    hsdram1.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_9;
-#elif SDRAM_COLUMN_BITS == 10
-    hsdram1.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_10;
-#else
-    hsdram1.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_11;
-#endif
-#if SDRAM_ROW_BITS == 11
-    hsdram1.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_11;
-#elif SDRAM_ROW_BITS == 12
-    hsdram1.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_12;
-#else
-    hsdram1.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_13;
-#endif
-
-#if SDRAM_DATA_WIDTH == 8
-    hsdram1.Init.MemoryDataWidth    = FMC_SDRAM_MEM_BUS_WIDTH_8;
-#elif SDRAM_DATA_WIDTH == 16
-    hsdram1.Init.MemoryDataWidth    = FMC_SDRAM_MEM_BUS_WIDTH_16;
-#else
-    hsdram1.Init.MemoryDataWidth    = FMC_SDRAM_MEM_BUS_WIDTH_32;
-#endif
-    hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
-#if SDRAM_CAS_LATENCY == 1
-    hsdram1.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_1;
-#elif SDRAM_CAS_LATENCY == 2
-    hsdram1.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_2;
-#else
-    hsdram1.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_3;
-#endif
-    hsdram1.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
-#if SDCLOCK_PERIOD == 2
-    hsdram1.Init.SDClockPeriod      = FMC_SDRAM_CLOCK_PERIOD_2;
-#else
-    hsdram1.Init.SDClockPeriod      = FMC_SDRAM_CLOCK_PERIOD_3;
-#endif
-    hsdram1.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
-#if SDRAM_RPIPE_DELAY == 0
-    hsdram1.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;
-#elif SDRAM_RPIPE_DELAY == 1
-    hsdram1.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_1;
-#else
-    hsdram1.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_2;
-#endif
-
-    /* Initialize the SDRAM controller */
-    if (HAL_SDRAM_Init(&hsdram1, &SDRAM_Timing) != HAL_OK)
-    {
-        LOG_E("SDRAM init failed!");
-        result = -RT_ERROR;
-    }
-    else
-    {
-        /* Program the SDRAM external device */
-        SDRAM_Initialization_Sequence(&hsdram1, &command);
-        LOG_D("sdram init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, SDRAM_SIZE, SDRAM_DATA_WIDTH);
-#ifdef RT_USING_MEMHEAP_AS_HEAP
-        /* If RT_USING_MEMHEAP_AS_HEAP is enabled, SDRAM is initialized to the heap */
-        rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE);
-#endif
-    }
-
-    return result;
-}
-INIT_BOARD_EXPORT(SDRAM_Init);
-
-#ifdef DRV_DEBUG
-#ifdef FINSH_USING_MSH
-int sdram_test(void)
-{
-    int i = 0;
-    uint32_t start_time = 0, time_cast = 0;
-#if SDRAM_DATA_WIDTH == 8
-    char data_width = 1;
-    uint8_t data = 0;
-#elif SDRAM_DATA_WIDTH == 16
-    char data_width = 2;
-    uint16_t data = 0;
-#else
-    char data_width = 4;
-    uint32_t data = 0;
-#endif
-
-    /* write data */
-    LOG_D("Writing the %ld bytes data, waiting....", SDRAM_SIZE);
-    start_time = rt_tick_get();
-    for (i = 0; i < SDRAM_SIZE / data_width; i++)
-    {
-#if SDRAM_DATA_WIDTH == 8
-        *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)0x55;
-#elif SDRAM_DATA_WIDTH == 16
-        *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)0x5555;
-#else
-        *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)0x55555555;
-#endif
-    }
-    time_cast = rt_tick_get() - start_time;
-    LOG_D("Write data success, total time: %d.%03dS.", time_cast / RT_TICK_PER_SECOND,
-          time_cast % RT_TICK_PER_SECOND / ((RT_TICK_PER_SECOND * 1 + 999) / 1000));
-
-    /* read data */
-    LOG_D("start Reading and verifying data, waiting....");
-    for (i = 0; i < SDRAM_SIZE / data_width; i++)
-    {
-#if SDRAM_DATA_WIDTH == 8
-        data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width);
-        if (data != 0x55)
-        {
-            LOG_E("SDRAM test failed!");
-            break;
-        }
-#elif SDRAM_DATA_WIDTH == 16
-        data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width);
-        if (data != 0x5555)
-        {
-            LOG_E("SDRAM test failed!");
-            break;
-        }
-#else
-        data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width);
-        if (data != 0x55555555)
-        {
-            LOG_E("SDRAM test failed!");
-            break;
-        }
-#endif
-    }
-
-    if (i >= SDRAM_SIZE / data_width)
-    {
-        LOG_D("SDRAM test success!");
-    }
-
-    return RT_EOK;
-}
-MSH_CMD_EXPORT(sdram_test, sdram test)
-#endif /* FINSH_USING_MSH */
-#endif /* DRV_DEBUG */
-#endif /* BSP_USING_SDRAM */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_soft_i2c.c
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_soft_i2c.c
@@ -1,221 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-08     balanceTWK   first version
- */
-
-#include <board.h>
-#include "drv_soft_i2c.h"
-#include "drv_config.h"
-
-#ifdef RT_USING_I2C
-
-//#define DRV_DEBUG
-#define LOG_TAG              "drv.i2c"
-#include <drv_log.h>
-
-#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4)
-#error "Please define at least one BSP_USING_I2Cx"
-/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
-#endif
-
-static const struct stm32_soft_i2c_config soft_i2c_config[] =
-{
-#ifdef BSP_USING_I2C1
-    I2C1_BUS_CONFIG,
-#endif
-#ifdef BSP_USING_I2C2
-    I2C2_BUS_CONFIG,
-#endif
-#ifdef BSP_USING_I2C3
-    I2C3_BUS_CONFIG,
-#endif
-#ifdef BSP_USING_I2C4
-    I2C4_BUS_CONFIG,
-#endif
-};
-
-static struct stm32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
-
-/**
- * This function initializes the i2c pin.
- *
- * @param Stm32 i2c dirver class.
- */
-static void stm32_i2c_gpio_init(struct stm32_i2c *i2c)
-{
-    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)i2c->ops.data;
-
-    rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
-    rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
-
-    rt_pin_write(cfg->scl, PIN_HIGH);
-    rt_pin_write(cfg->sda, PIN_HIGH);
-}
-
-/**
- * This function sets the sda pin.
- *
- * @param Stm32 config class.
- * @param The sda pin state.
- */
-static void stm32_set_sda(void *data, rt_int32_t state)
-{
-    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
-    if (state)
-    {
-        rt_pin_write(cfg->sda, PIN_HIGH);
-    }
-    else
-    {
-        rt_pin_write(cfg->sda, PIN_LOW);
-    }
-}
-
-/**
- * This function sets the scl pin.
- *
- * @param Stm32 config class.
- * @param The scl pin state.
- */
-static void stm32_set_scl(void *data, rt_int32_t state)
-{
-    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
-    if (state)
-    {
-        rt_pin_write(cfg->scl, PIN_HIGH);
-    }
-    else
-    {
-        rt_pin_write(cfg->scl, PIN_LOW);
-    }
-}
-
-/**
- * This function gets the sda pin state.
- *
- * @param The sda pin state.
- */
-static rt_int32_t stm32_get_sda(void *data)
-{
-    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
-    return rt_pin_read(cfg->sda);
-}
-
-/**
- * This function gets the scl pin state.
- *
- * @param The scl pin state.
- */
-static rt_int32_t stm32_get_scl(void *data)
-{
-    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
-    return rt_pin_read(cfg->scl);
-}
-/**
- * The time delay function.
- *
- * @param microseconds.
- */
-static void stm32_udelay(rt_uint32_t us)
-{
-    rt_uint32_t ticks;
-    rt_uint32_t told, tnow, tcnt = 0;
-    rt_uint32_t reload = SysTick->LOAD;
-
-    ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
-    told = SysTick->VAL;
-    while (1)
-    {
-        tnow = SysTick->VAL;
-        if (tnow != told)
-        {
-            if (tnow < told)
-            {
-                tcnt += told - tnow;
-            }
-            else
-            {
-                tcnt += reload - tnow + told;
-            }
-            told = tnow;
-            if (tcnt >= ticks)
-            {
-                break;
-            }
-        }
-    }
-}
-
-static const struct rt_i2c_bit_ops stm32_bit_ops_default =
-{
-    .data     = RT_NULL,
-    .set_sda  = stm32_set_sda,
-    .set_scl  = stm32_set_scl,
-    .get_sda  = stm32_get_sda,
-    .get_scl  = stm32_get_scl,
-    .udelay   = stm32_udelay,
-    .delay_us = 1,
-    .timeout  = 100
-};
-
-/**
- * if i2c is locked, this function will unlock it
- *
- * @param stm32 config class
- *
- * @return RT_EOK indicates successful unlock.
- */
-static rt_err_t stm32_i2c_bus_unlock(const struct stm32_soft_i2c_config *cfg)
-{
-    rt_int32_t i = 0;
-
-    if (PIN_LOW == rt_pin_read(cfg->sda))
-    {
-        while (i++ < 9)
-        {
-            rt_pin_write(cfg->scl, PIN_HIGH);
-            stm32_udelay(100);
-            rt_pin_write(cfg->scl, PIN_LOW);
-            stm32_udelay(100);
-        }
-    }
-    if (PIN_LOW == rt_pin_read(cfg->sda))
-    {
-        return -RT_ERROR;
-    }
-
-    return RT_EOK;
-}
-
-/* I2C initialization function */
-int rt_hw_i2c_init(void)
-{
-    rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct stm32_i2c);
-    rt_err_t result;
-
-    for (int i = 0; i < obj_num; i++)
-    {
-        i2c_obj[i].ops = stm32_bit_ops_default;
-        i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
-        i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
-        stm32_i2c_gpio_init(&i2c_obj[i]);
-        result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
-        RT_ASSERT(result == RT_EOK);
-        stm32_i2c_bus_unlock(&soft_i2c_config[i]);
-        
-        LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
-        soft_i2c_config[i].bus_name, 
-        soft_i2c_config[i].scl, 
-        soft_i2c_config[i].sda);
-    }
-
-    return RT_EOK;
-}
-INIT_BOARD_EXPORT(rt_hw_i2c_init);
-
-#endif /* RT_USING_I2C */
--- a/bsp/fm33lc026/libraries/HAL_Drivers/drv_soft_i2c.h
+++ b/bsp/fm33lc026/libraries/HAL_Drivers/drv_soft_i2c.h
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-08     balanceTWK   first version
- */
-
-#ifndef __DRV_I2C__
-#define __DRV_I2C__
-
-#include <rtthread.h>
-#include <rthw.h>
-#include <rtdevice.h>
-
-/* stm32 config class */
-struct stm32_soft_i2c_config
-{
-    rt_uint8_t scl;
-    rt_uint8_t sda;
-    const char *bus_name;
-};
-/* stm32 i2c dirver class */
-struct stm32_i2c
-{
-    struct rt_i2c_bit_ops ops;
-    struct rt_i2c_bus_device i2c2_bus;
-};
-
-#ifdef BSP_USING_I2C1
-#define I2C1_BUS_CONFIG                                  \
-    {                                                    \
-        .scl = BSP_I2C1_SCL_PIN,                         \
-        .sda = BSP_I2C1_SDA_PIN,                         \
-        .bus_name = "i2c1",                              \
-    }
-#endif
-    
-#ifdef BSP_USING_I2C2
-#define I2C2_BUS_CONFIG                                  \
-    {                                                    \
-        .scl = BSP_I2C2_SCL_PIN,                         \
-        .sda = BSP_I2C2_SDA_PIN,                         \
-        .bus_name = "i2c2",                              \
-    }
-#endif
-    
-#ifdef BSP_USING_I2C3
-#define I2C3_BUS_CONFIG                                  \
-    {                                                    \
-        .scl = BSP_I2C3_SCL_PIN,                         \
-        .sda = BSP_I2C3_SDA_PIN,                         \
-        .bus_name = "i2c3",                              \
-    }
-#endif
-		
-#ifdef BSP_USING_I2C4
-#define I2C4_BUS_CONFIG                                  \
-    {                                                    \
-        .scl = BSP_I2C4_SCL_PIN,                         \
-        .sda = BSP_I2C4_SDA_PIN,                         \
-        .bus_name = "i2c4",                              \
-    }
-#endif
-int rt_hw_i2c_init(void);
-
-#endif
--- a/Show More
+++ b/Show More