support cv181x c906_little (#8680)

2026-10-02 14:23:19 +08:00 · 2024-04-16 22:31:47 -04:00
parent f4c7d46300
commit 35c564c01a
69 changed files with 1737 additions and 1350 deletions
@@ -1,2 +1,6 @@
+cvitek_bootloader
 fip.bin
-boot.sd
+boot.sd
+output
+c906_little/board/script
+Image.lzma
@@ -8,7 +8,7 @@

 | 芯片名称 | 芯片架构 | 内存大小 | 默认日志串口 | 备注 |
 | ------- | ------- |------- | -------- | -------- |
-| cv1800b | RISC-V C906 | 64MByte | uart0 | 默认开启 MMU，运行 RT-SMART 模式 |
+| cv180x | RISC-V C906 | 64MByte | uart0 | 默认开启 MMU，运行 RT-SMART 模式 |

 - 小核

@@ -18,10 +18,30 @@

 > 注：异构芯片需单独编译每个核的 OS

+## 编译
+异构芯片需单独编译每个核的 OS，在大/小核对应的目录下，依次执行:
+
+1. 开发板选择
+Linux平台下，可以先执行：
+```shell
+$ scons --menuconfig
+```
+
+选择当前需要编译的目标开发板类型
+```shell
+Board Type (milkv-duo)  --->
+    ( ) milkv-duo
+    (X) milkv-duo256m
+```
+
+2. 编译
+```shell
+$ scons
+```

 ## 运行

-编译成功后，会在 `bsp/cvitek` 目录下自动生成 `fip.bin` 和 `boot.sd` 文件，其中大核运行文件在 `boot.sd` 中，小核的运行文件在 `fip.bin` 中。
+编译成功后，会在 `bsp/cvitek/output` 对应开发板型号目录下自动生成 `fip.bin` 和 `boot.sd` 文件，其中大核运行文件在 `boot.sd` 中，小核的运行文件在 `fip.bin` 中。

 1. 将 SD 卡分为 2 个分区，第 1 个分区用于存放 bin 文件，第 2 个分区用于作为数据存储分区，分区格式为 `FAT32`。
 2. 将根目录下的 `fip.bin` 和 `boot.sd` 复制 SD 卡第一个分区中。
@@ -39,10 +59,22 @@

 ## 支持开发板
 - milk-v duo: [https://milkv.io/duo](https://milkv.io/duo)
+- milk-v duo256m: [https://milkv.io/duo256m](https://milkv.io/docs/duo/getting-started/duo256m)

 ## FAQ
 1. 如遇到不能正常编译，请先使用 `scons --menuconfig` 重新生成配置。

+2. 错误：./mkimage: error while loading shared libraries: libssl.so.1.1: cannot open shared object file: No such file or directory
+
+可在 [http://security.ubuntu.com/ubuntu/pool/main/o/openssl](http://security.ubuntu.com/ubuntu/pool/main/o/openssl) 下载 `libssl1.1_1.1.1f-1ubuntu2_amd64.deb` 文件后安装即可解决。
+或使用以下命令下载安装:
+```shell
+$ wget http://security.ubuntu.com/ubuntu/pool/main/o/openssl/libssl1.1_1.1.1f-1ubuntu2_amd64.deb
+$ sudo dpkg -i libssl1.1_1.1.1f-1ubuntu2_amd64.deb
+```
+
 ## 联系人信息

-维护人：[flyingcys](https://github.com/flyingcys)
+维护人：[flyingcys](https://github.com/flyingcys)
+
+更多信息请参考 [https://riscv-rtthread-programming-manual.readthedocs.io](https://riscv-rtthread-programming-manual.readthedocs.io)
@@ -1001,6 +1001,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set

 #
 # Display
@@ -1087,3 +1088,5 @@ CONFIG_BSP_USING_C906_LITTLE=y
 CONFIG_PLIC_PHY_ADDR=0x70000000
 CONFIG_IRQ_MAX_NR=128
 CONFIG_TIMER_CLK_FREQ=25000000
+# CONFIG_BOARD_TYPE_MILKV_DUO is not set
+CONFIG_BOARD_TYPE_MILKV_DUO256M=y
@@ -37,4 +37,14 @@ config IRQ_MAX_NR

 config TIMER_CLK_FREQ
    int
-    default 25000000
+    default 25000000
+
+choice
+    prompt "Board Type"
+    default BOARD_TYPE_MILKV_DUO256M
+
+    config BOARD_TYPE_MILKV_DUO
+        bool "milkv-duo"
+    config BOARD_TYPE_MILKV_DUO256M
+        bool "milkv-duo256m"
+endchoice
@@ -17,20 +17,37 @@ $ export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin
 ```

 ## 编译
-1. Linux平台下，可以先执行：
+1. 依赖安装
+
+```shell
+$ sudo apt install -y scons libncurses5-dev wget flex bison
+```
+
+
+2. Linux平台下，先执行：
 ```shell
 $ scons --menuconfig
 ```

-它会自动下载env相关脚本到~/.env目录，然后执行
+选择当前需要编译的目标开发板类型
+```shell
+Board Type (milkv-duo)  --->
+    ( ) milkv-duo
+    (X) milkv-duo256m
+```
+
+它会自动下载 env 相关脚本到 ~/.env 目录，然后执行
 ```shell
 $ source ~/.env/env.sh
 $ pkgs --update
 ```
-更新完软件包后，执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令，在指定工具链位置的同时直接编译。编译正确无误，会产生rtthread.elf文件。
+更新完软件包后，执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令，在指定工具链位置的同时直接编译。编译正确无误，会产生rtthread.elf 文件。

 编译完成后脚本自动调用 `combine-fip.sh` 脚本进行打包，并生成 `fip.sd`, 该文件即为 SD 卡启动的 c906_little 文件。

+第一次调用 `combine-fip.sh` 脚本时会自动下载打包需要的 `opsbsbi`、`fsbl`、`uboot` 等相关文件至 `bsp/cvitek/cvitek_bootloader` 目录，请耐心等待。
+
+下载完成后会自动解压、编译，后续再次编译同一类型开发板只会调用相关文件打包合成 `fip.bin`。如需手工编译相关 `cvitek_bootloader` 文件，可在 `bsp/cvitek/cvitek_bootloader` 目录下执行 `bash build.sh lunch` 选择对应的开发板编译。

 ## 运行
 1. 将 SD 卡分为 2 个分区，第 1 个分区用于存放 bin 文件，第 2 个分区用于作为数据存储分区，分区格式为 `FAT32`。
@@ -37,5 +37,9 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
 # include libraries
 objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))

+if GetDepend('BOARD_TYPE_MILKV_DUO256M'):
+    env['LINKFLAGS'] = env['LINKFLAGS'].replace('cv180x_lscript.ld', 'cv181x_lscript.ld')
+    env['LINKFLAGS'] = env['LINKFLAGS'].replace('-L board/script/cv180x', '-L board/script/cv181x')
+
 # make a building
 DoBuilding(TARGET, objs)
@@ -7,6 +7,8 @@
 * Date           Author       Notes
 * 2024/01/11     flyingcys    The first version
 */
+INCLUDE ./cvi_board_memmap.ld
+
 _STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000;
 /* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */
 /*_HEAP_SIZE =  0x20000;*/
@@ -15,9 +17,6 @@ _EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
 _EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
 _EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;

-CVIMMAP_FREERTOS_ADDR = 0x83f40000;
-CVIMMAP_FREERTOS_SIZE = 0xc0000;
-
 /* Define Memories in the system */

 MEMORY
@@ -0,0 +1,30 @@
+CONFIG_SYS_TEXT_BASE = 0x80200000;
+CVIMMAP_ATF_SIZE = 0x80000;
+CVIMMAP_BOOTLOGO_ADDR = 0x82473000;
+CVIMMAP_BOOTLOGO_SIZE = 0x0;
+CVIMMAP_CONFIG_SYS_INIT_SP_ADDR = 0x82300000;
+CVIMMAP_CVI_UPDATE_HEADER_ADDR = 0x813ffc00;
+CVIMMAP_CVI_UPDATE_HEADER_SIZE = 0x400;
+CVIMMAP_DRAM_BASE = 0x80000000;
+CVIMMAP_DRAM_SIZE = 0x4000000;
+CVIMMAP_FREERTOS_ADDR = 0x83f40000;
+CVIMMAP_FREERTOS_RESERVED_ION_SIZE = 0x0;
+CVIMMAP_FREERTOS_SIZE = 0xc0000;
+CVIMMAP_FSBL_C906L_START_ADDR = 0x83f40000;
+CVIMMAP_FSBL_UNZIP_ADDR = 0x81400000;
+CVIMMAP_FSBL_UNZIP_SIZE = 0xf00000;
+CVIMMAP_H26X_BITSTREAM_ADDR = 0x82473000;
+CVIMMAP_H26X_BITSTREAM_SIZE = 0x0;
+CVIMMAP_H26X_ENC_BUFF_ADDR = 0x82473000;
+CVIMMAP_H26X_ENC_BUFF_SIZE = 0x0;
+CVIMMAP_ION_ADDR = 0x82473000;
+CVIMMAP_ION_SIZE = 0x1acd000;
+CVIMMAP_ISP_MEM_BASE_ADDR = 0x82473000;
+CVIMMAP_ISP_MEM_BASE_SIZE = 0x0;
+CVIMMAP_KERNEL_MEMORY_ADDR = 0x80000000;
+CVIMMAP_KERNEL_MEMORY_SIZE = 0x3f40000;
+CVIMMAP_MONITOR_ADDR = 0x80000000;
+CVIMMAP_OPENSBI_FDT_ADDR = 0x80080000;
+CVIMMAP_OPENSBI_SIZE = 0x80000;
+CVIMMAP_UIMAG_ADDR = 0x81400000;
+CVIMMAP_UIMAG_SIZE = 0xf00000;
@@ -0,0 +1,32 @@
+CONFIG_SYS_TEXT_BASE = 0x80200000;
+CVIMMAP_ATF_SIZE = 0x80000;
+CVIMMAP_BOOTLOGO_ADDR = 0x8b13e000;
+CVIMMAP_BOOTLOGO_SIZE = 0x1c2000;
+CVIMMAP_CONFIG_SYS_INIT_SP_ADDR = 0x82800000;
+CVIMMAP_CVI_UPDATE_HEADER_ADDR = 0x817ffc00;
+CVIMMAP_CVI_UPDATE_HEADER_SIZE = 0x400;
+CVIMMAP_DRAM_BASE = 0x80000000;
+CVIMMAP_DRAM_SIZE = 0x10000000;
+CVIMMAP_FRAMEBUFFER_ADDR = 0x8b13e000;
+CVIMMAP_FRAMEBUFFER_SIZE = 0x1c2000;
+CVIMMAP_FREERTOS_ADDR = 0x8fe00000;
+CVIMMAP_FREERTOS_RESERVED_ION_SIZE = 0x1600000;
+CVIMMAP_FREERTOS_SIZE = 0x200000;
+CVIMMAP_FSBL_C906L_START_ADDR = 0x8fe00000;
+CVIMMAP_FSBL_UNZIP_ADDR = 0x81800000;
+CVIMMAP_FSBL_UNZIP_SIZE = 0x1000000;
+CVIMMAP_H26X_BITSTREAM_ADDR = 0x8b300000;
+CVIMMAP_H26X_BITSTREAM_SIZE = 0x200000;
+CVIMMAP_H26X_ENC_BUFF_ADDR = 0x8b500000;
+CVIMMAP_H26X_ENC_BUFF_SIZE = 0x0;
+CVIMMAP_ION_ADDR = 0x8b300000;
+CVIMMAP_ION_SIZE = 0x4b00000;
+CVIMMAP_ISP_MEM_BASE_ADDR = 0x8b500000;
+CVIMMAP_ISP_MEM_BASE_SIZE = 0x1400000;
+CVIMMAP_KERNEL_MEMORY_ADDR = 0x80000000;
+CVIMMAP_KERNEL_MEMORY_SIZE = 0xfe00000;
+CVIMMAP_MONITOR_ADDR = 0x80000000;
+CVIMMAP_OPENSBI_FDT_ADDR = 0x80080000;
+CVIMMAP_OPENSBI_SIZE = 0x80000;
+CVIMMAP_UIMAG_ADDR = 0x81800000;
+CVIMMAP_UIMAG_SIZE = 0x1000000;
@@ -268,5 +268,6 @@
 #define PLIC_PHY_ADDR 0x70000000
 #define IRQ_MAX_NR 128
 #define TIMER_CLK_FREQ 25000000
+#define BOARD_TYPE_MILKV_DUO256M

 #endif
@@ -18,7 +18,7 @@ if os.getenv('RTT_CC'):

 if  CROSS_TOOL == 'gcc':
    PLATFORM    = 'gcc'
-    EXEC_PATH   = r'/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.0/bin'
+    EXEC_PATH   = r'/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin'
 else:
    print('Please make sure your toolchains is GNU GCC!')
    exit(0)
@@ -47,9 +47,10 @@ if PLATFORM == 'gcc':
    CFLAGS += ' -DCONFIG_64BIT'

    LINKER_SCRIPTS = r'cv180x_lscript.ld'
+    LINKER_SCRIPTS_PATH = r' -L board/script/cv180x'

    AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp'
-    LFLAGS  = DEVICE + ' -nostartfiles -fms-extensions -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T ' + LINKER_SCRIPTS
+    LFLAGS  = DEVICE + ' -nostartfiles -fms-extensions -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T ' + LINKER_SCRIPTS + LINKER_SCRIPTS_PATH
    CPATH   = ''
    LPATH   = ''

@@ -63,4 +64,4 @@ if PLATFORM == 'gcc':

 DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
 POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
-POST_ACTION += 'cd .. && ./combine-fip.sh c906_little/rtthread.bin\n'
+POST_ACTION += 'cd .. && bash combine-fip.sh ' + os.getcwd() + ' rtthread.bin' + ' \n'
@@ -1,23 +1,84 @@
 #!/bin/bash

-set -e
+PROJECT_PATH=$1
+IMAGE_NAME=$2

-LITTLE_BIN=$1
+if [ -z "$PROJECT_PATH" ] || [ -z "$IMAGE_NAME" ]; then
+	echo "Usage: $0 <PROJECT_DIR> <IMAGE_NAME>"
+	exit 1
+fi

-. ./pre-build/fsbl/build/cv1800b_milkv_duo_sd/blmacros.env && \
-./pre-build/fsbl/plat/cv180x/fiptool.py -v genfip \
-	'fip.bin' \
-	--MONITOR_RUNADDR="${MONITOR_RUNADDR}" \
-	--BLCP_2ND_RUNADDR="${BLCP_2ND_RUNADDR}" \
-	--CHIP_CONF='./pre-build/fsbl/build/cv1800b_milkv_duo_sd/chip_conf.bin' \
-	--NOR_INFO='FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF' \
-	--NAND_INFO='00000000'\
-	--BL2='pre-build/fsbl/build/cv1800b_milkv_duo_sd/bl2.bin' \
-	--BLCP_IMG_RUNADDR=0x05200200 \
-	--BLCP_PARAM_LOADADDR=0 \
-	--BLCP=pre-build/fsbl/test/empty.bin \
-	--DDR_PARAM='pre-build/fsbl/test/cv181x/ddr_param.bin' \
-	--BLCP_2ND=$LITTLE_BIN \
-	--MONITOR='pre-build/fw_dynamic.bin' \
-	--LOADER_2ND='pre-build/u-boot-raw.bin' \
-	--compress='lzma'
+ROOT_PATH=$(pwd)
+echo $ROOT_PATH
+
+function get_board_type()
+{
+	BOARD_CONFIG=("CONFIG_BOARD_TYPE_MILKV_DUO" "CONFIG_BOARD_TYPE_MILKV_DUO_SPINOR" "CONFIG_BOARD_TYPE_MILKV_DUO_SPINAND" "CONFIG_BOARD_TYPE_MILKV_DUO256M")
+	BOARD_VALUE=("milkv-duo" "milkv-duo-spinor" "milkv-duo-spinand" "milkv-duo256m")
+
+	for ((i=0;i<${#BOARD_CONFIG[@]};i++))
+	do
+		config_value=$(grep -w "${BOARD_CONFIG[i]}" ${PROJECT_PATH}/.config | cut -d= -f2)
+		if [ "$config_value" == "y" ]; then
+			BOARD_TYPE=${BOARD_VALUE[i]}
+			break
+		fi
+	done
+}
+
+get_board_type
+echo "board_type: ${BOARD_TYPE}"
+
+COUNTRY=China
+function get_country()
+{
+	restult=$(curl -m 10 -s http://www.ip-api.com/json)
+	COUNTRY=$(echo $restult | sed 's/.*"country":"\([^"]*\)".*/\1/')
+	echo "Country: $COUNTRY"
+}
+
+if [ "$COUNTRY" == "China" ]; then
+	cvitek_bootloader_url=https://gitee.com/flyingcys/cvitek_bootloader
+else
+	cvitek_bootloader_url=https://github.com/flyingcys/cvitek_bootloader
+fi
+
+if [ ! -d cvitek_bootloader ]; then
+	echo "cvitek_bootloader not exist, clone it from ${cvitek_bootloader_url}"
+	git clone ${cvitek_bootloader_url}
+
+	if [ $? -ne 0 ]; then
+    	echo "Failed to clone ${cvitek_bootloader_url} !"
+      	exit 1
+    fi
+fi
+
+export BLCP_2ND_PATH=${PROJECT_PATH}/${IMAGE_NAME}
+
+pushd cvitek_bootloader
+
+. env.sh
+
+get_build_board ${BOARD_TYPE}
+
+echo "board: ${MV_BOARD_LINK}"
+
+if [ ! -d opensbi/build/platform/generic ] || [ ! -d fsbl/build/${MV_BOARD_LINK} ] ||  [ ! -d u-boot-2021.10/build/${MV_BOARD_LINK} ]; then
+	do_build
+	
+	CHIP_ARCH_L=$(echo $CHIP_ARCH | tr '[:upper:]' '[:lower:]')
+	cp -rf build/output/${MV_BOARD_LINK}/cvi_board_memmap.ld ${ROOT_PATH}/c906_little/board/script/${CHIP_ARCH_L}
+else
+	echo "Build already done, skip build"
+
+	do_combine
+
+	if [ $? -ne 0 ]; then
+		do_build
+	fi
+fi
+
+popd
+
+mkdir -p output/${MV_BOARD}
+cp -rf cvitek_bootloader/install/soc_${MV_BOARD_LINK}/fip.bin output/${MV_BOARD}/fip.bin
@@ -1,7 +0,0 @@
-#/bin/sh
-set -e
-echo "start compress kernel..."
-
-lzma -c -9 -f -k Image > Image.lzma
-
-./mkimage -f multi.its -r ../boot.sd
@@ -1048,6 +1048,7 @@ CONFIG_RT_USING_LDSO=y
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set

 #
 # Display
@@ -1130,8 +1131,9 @@ CONFIG_UART_IRQ_BASE=44
 # CONFIG_RT_USING_UART4 is not set
 # CONFIG_BSP_USING_ADC is not set
 # CONFIG_BSP_USING_PWM is not set
-CONFIG_BSP_USING_CV1800B=y
+CONFIG_BSP_USING_CV180X=y
 CONFIG_C906_PLIC_PHY_ADDR=0x70000000
 CONFIG_IRQ_MAX_NR=64
 CONFIG_TIMER_CLK_FREQ=25000000
 CONFIG___STACKSIZE__=4096
+CONFIG_BOARD_TYPE_MILKV_DUO=y
@@ -19,7 +19,7 @@ source "$RTT_DIR/Kconfig"
 source "$PKGS_DIR/Kconfig"
 source "board/Kconfig"

-config BSP_USING_CV1800B
+config BSP_USING_CV180X
    bool
    select ARCH_RISCV64
    select RT_USING_SYSTEM_WORKQUEUE
@@ -45,3 +45,11 @@ config TIMER_CLK_FREQ
 config __STACKSIZE__
    int "stack size for interrupt"
    default 4096
+
+choice
+    prompt "Board Type"
+    default BOARD_TYPE_MILKV_DUO
+
+    config BOARD_TYPE_MILKV_DUO
+        bool "milkv-duo"
+endchoice
@@ -49,8 +49,9 @@ $ export RTT_EXEC_PATH=/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin
 1. 依赖安装

 ```shell
-$ sudo apt install -y device-tree-compiler
+$ sudo apt install -y scons libncurses5-dev device-tree-compiler
 ```
+
 2. Linux平台下，可以先执行：
 ```shell
 $ scons --menuconfig
@@ -61,7 +62,7 @@ $ scons --menuconfig
 $ source ~/.env/env.sh
 $ pkgs --update
 ```
-更新完软件包后，执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令，在指定工具链位置的同时直接编译。编译正确无误，会产生rtthread.elf文件。
+更新完软件包后，执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令，在指定工具链位置的同时直接编译。编译正确无误，会产生 rtthread.elf 文件。

 编译完成后脚本自动调用 `./mksdimg.sh` 脚本进行打包，并生成 `boot.sd`, 该文件即为 SD 卡启动的 kernel 文件。

@@ -311,10 +311,11 @@
 #define BSP_USING_UART
 #define RT_USING_UART0
 #define UART_IRQ_BASE 44
-#define BSP_USING_CV1800B
+#define BSP_USING_CV180X
 #define C906_PLIC_PHY_ADDR 0x70000000
 #define IRQ_MAX_NR 64
 #define TIMER_CLK_FREQ 25000000
 #define __STACKSIZE__ 4096
+#define BOARD_TYPE_MILKV_DUO

 #endif
@@ -25,6 +25,7 @@ if os.getenv('RTT_EXEC_PATH'):
    EXEC_PATH = os.getenv('RTT_EXEC_PATH')

 BUILD = 'debug'
+CHIP_TYPE = 'cv180x'

 if PLATFORM == 'gcc':
    # toolchains
@@ -56,4 +57,5 @@ if PLATFORM == 'gcc':
    CXXFLAGS = CFLAGS

 DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtthread.asm\n'
-POST_ACTION = OBJCPY + ' -O binary $TARGET Image\n' + SIZE + ' $TARGET \n' + './mksdimg.sh\n'
+POST_ACTION = OBJCPY + ' -O binary $TARGET Image \n' + SIZE + ' $TARGET \n'
+POST_ACTION += 'cd .. && bash mksdimg.sh ' + os.getcwd() + ' Image \n'
@@ -0,0 +1,6 @@
+# files format check exclude path, please follow the instructions below to modify;
+# If you need to exclude an entire folder, add the folder path in dir_path;
+# If you need to exclude a file, add the path to the file in file_path.
+
+dir_path:
+- libraries
@@ -2,17 +2,23 @@ from building import *

 cwd     = GetCurrentDir()
 src     = Split('''
-drv_uart.c
-drv_por.c
+    drv_uart.c
+    drv_por.c
 ''')
 CPPDEFINES = []

 CPPPATH = [cwd]

-if GetDepend('BSP_USING_CV1800B') or GetDepend('BSP_USING_C906_LITTLE'):
-    CPPPATH += [cwd + r'/cv1800b']
+CHIP_TYPE = 'cv180x'
+if GetDepend('BOARD_TYPE_MILKV_DUO256M'):
+    CHIP_TYPE = 'cv181x'
+elif GetDepend('BOARD_TYPE_MILKV_DUO') or GetDepend('BOARD_TYPE_MILKV_DUO_SPINOR') or GetDepend('BOARD_TYPE_MILKV_DUO_SPINAND'):
+    CHIP_TYPE = 'cv180x'

-if GetDepend('BSP_USING_CV1800B'):
+CPPPATH += [cwd + r'/libraries']
+CPPPATH += [cwd + r'/libraries/' + CHIP_TYPE]
+
+if GetDepend('BSP_USING_CV180X'):
    src += ['drv_gpio.c']

 if GetDepend('BSP_USING_I2C'):
@@ -26,7 +32,8 @@ if GetDepend('BSP_USING_WDT'):

 if GetDepend('BSP_USING_PWM'):
    src += ['drv_pwm.c']
-    CPPPATH += [cwd + r'/cv1800b/pwm']
+    CPPPATH += [cwd + r'/libraries/cv180x/pwm']
+    
 CPPDEFINES += ['-DCONFIG_64BIT']

 if GetDepend('BSP_USING_RTC'):
@@ -0,0 +1,46 @@
+#ifndef _CV181X_PINMUX_H_
+#define _CV181X_PINMUX_H_
+
+#define PINMUX_UART0    0
+#define PINMUX_UART1    1
+#define PINMUX_UART2    2
+#define PINMUX_UART3    3
+#define PINMUX_UART3_2  4
+#define PINMUX_I2C0     5
+#define PINMUX_I2C1     6
+#define PINMUX_I2C2     7
+#define PINMUX_I2C3     8
+#define PINMUX_I2C4     9
+#define PINMUX_I2C4_2   10
+#define PINMUX_SPI0     11
+#define PINMUX_SPI1     12
+#define PINMUX_SPI2     13
+#define PINMUX_SPI2_2   14
+#define PINMUX_SPI3     15
+#define PINMUX_SPI3_2   16
+#define PINMUX_I2S0     17
+#define PINMUX_I2S1     18
+#define PINMUX_I2S2     19
+#define PINMUX_I2S3     20
+#define PINMUX_USBID    21
+#define PINMUX_SDIO0    22
+#define PINMUX_SDIO1    23
+#define PINMUX_ND       24
+#define PINMUX_EMMC     25
+#define PINMUX_SPI_NOR  26
+#define PINMUX_SPI_NAND 27
+#define PINMUX_CAM0     28
+#define PINMUX_CAM1     29
+#define PINMUX_PCM0     30
+#define PINMUX_PCM1     31
+#define PINMUX_CSI0     32
+#define PINMUX_CSI1     33
+#define PINMUX_CSI2     34
+#define PINMUX_DSI      35
+#define PINMUX_VI0      36
+#define PINMUX_VO       37
+#define PINMUX_PWM1     38
+#define PINMUX_UART4    39
+#define PINMUX_SPI_NOR1 40
+
+#endif // end of _CV181X_PINMUX_H_
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved.
+ *
+ * File Name: pinctrl.h
+ * Description:
+ */
+
+#ifndef __PINCTRL_CV181X_H__
+#define __PINCTRL_CV181X_H__
+
+//#include "../core.h"
+#include "cv181x_pinlist_swconfig.h"
+#include "cv181x_reg_fmux_gpio.h"
+
+#define  PAD_MIPI_TXM4__MIPI_TXM4 0
+#define  PAD_MIPI_TXP4__MIPI_TXP4 0
+#define  PAD_MIPI_TXM3__MIPI_TXM3 0
+#define  PAD_MIPI_TXP3__MIPI_TXP3 0
+#define  PAD_MIPI_TXM2__MIPI_TXM2 0
+#define  PAD_MIPI_TXP2__MIPI_TXP2 0
+#define  PAD_MIPI_TXM1__MIPI_TXM1 0
+#define  PAD_MIPI_TXP1__MIPI_TXP1 0
+#define  PAD_MIPI_TXM0__MIPI_TXM0 0
+#define  PAD_MIPI_TXP0__MIPI_TXP0 0
+
+#define PINMUX_BASE 0x03001000
+#define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK
+#define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET
+#define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME
+#define PINMUX_CONFIG(PIN_NAME, FUNC_NAME) \
+		mmio_clrsetbits_32(PINMUX_BASE + FMUX_GPIO_FUNCSEL_##PIN_NAME, \
+		PINMUX_MASK(PIN_NAME) << PINMUX_OFFSET(PIN_NAME), \
+		PINMUX_VALUE(PIN_NAME, FUNC_NAME))
+
+#endif /* __PINCTRL_CV181X_H__ */
@@ -0,0 +1,37 @@
+#/bin/sh
+set -e
+
+PROJECT_PATH=$1
+IMAGE_NAME=$2
+
+if [ -z "$PROJECT_PATH" ] || [ -z "$IMAGE_NAME" ]; then
+	echo "Usage: $0 <PROJECT_DIR> <IMAGE_NAME>"
+	exit 1
+fi
+
+ROOT_PATH=$(pwd)
+echo ${ROOT_PATH}
+
+function get_board_type()
+{
+	BOARD_CONFIG=("CONFIG_BOARD_TYPE_MILKV_DUO" "CONFIG_BOARD_TYPE_MILKV_DUO_SPINOR" "CONFIG_BOARD_TYPE_MILKV_DUO_SPINAND" "CONFIG_BOARD_TYPE_MILKV_DUO256M")
+	BOARD_VALUE=("milkv-duo" "milkv-duo-spinor" "milkv-duo-spinand" "milkv-duo256m")
+
+	for ((i=0;i<${#BOARD_CONFIG[@]};i++))
+	do
+		config_value=$(grep -w "${BOARD_CONFIG[i]}" ${PROJECT_PATH}/.config | cut -d= -f2)
+		if [ "$config_value" == "y" ]; then
+			BOARD_TYPE=${BOARD_VALUE[i]}
+			break
+		fi
+	done
+}
+
+get_board_type
+
+echo "start compress kernel..."
+
+lzma -c -9 -f -k ${PROJECT_PATH}/${IMAGE_NAME} > ${PROJECT_PATH}/Image.lzma
+
+mkdir -p ${ROOT_PATH}/output/${BOARD_TYPE}
+./mkimage -f ${PROJECT_PATH}/multi.its -r ${ROOT_PATH}/output/${BOARD_TYPE}/boot.sd
@@ -1 +0,0 @@
-ﾭ�
@@ -1,2 +0,0 @@
-MONITOR_RUNADDR=0x0000000080000000
-BLCP_2ND_RUNADDR=0x0000000083f40000
@@ -1,35 +0,0 @@
-#ifndef __BOARD_MMAP__83494f74__
-#define __BOARD_MMAP__83494f74__
-
-#define CONFIG_SYS_TEXT_BASE 0x80200000  /* offset 2.0MiB */
-#define CVIMMAP_ATF_SIZE 0x80000  /* 512.0KiB */
-#define CVIMMAP_BOOTLOGO_ADDR 0x82473000  /* offset 36.44921875MiB */
-#define CVIMMAP_BOOTLOGO_SIZE 0x0  /* 0.0KiB */
-#define CVIMMAP_CONFIG_SYS_INIT_SP_ADDR 0x82300000  /* offset 35.0MiB */
-#define CVIMMAP_CVI_UPDATE_HEADER_ADDR 0x813ffc00  /* offset 19.9990234375MiB */
-#define CVIMMAP_CVI_UPDATE_HEADER_SIZE 0x400  /* 1.0KiB */
-#define CVIMMAP_DRAM_BASE 0x80000000  /* offset 0.0KiB */
-#define CVIMMAP_DRAM_SIZE 0x4000000  /* 64.0MiB */
-#define CVIMMAP_FREERTOS_ADDR 0x83f40000  /* offset 63.25MiB */
-#define CVIMMAP_FREERTOS_RESERVED_ION_SIZE 0x0  /* 0.0KiB */
-#define CVIMMAP_FREERTOS_SIZE 0xc0000  /* 768.0KiB */
-#define CVIMMAP_FSBL_C906L_START_ADDR 0x83f40000  /* offset 63.25MiB */
-#define CVIMMAP_FSBL_UNZIP_ADDR 0x81400000  /* offset 20.0MiB */
-#define CVIMMAP_FSBL_UNZIP_SIZE 0xf00000  /* 15.0MiB */
-#define CVIMMAP_H26X_BITSTREAM_ADDR 0x82473000  /* offset 36.44921875MiB */
-#define CVIMMAP_H26X_BITSTREAM_SIZE 0x0  /* 0.0KiB */
-#define CVIMMAP_H26X_ENC_BUFF_ADDR 0x82473000  /* offset 36.44921875MiB */
-#define CVIMMAP_H26X_ENC_BUFF_SIZE 0x0  /* 0.0KiB */
-#define CVIMMAP_ION_ADDR 0x82473000  /* offset 36.44921875MiB */
-#define CVIMMAP_ION_SIZE 0x1acd000  /* 26.80078125MiB */
-#define CVIMMAP_ISP_MEM_BASE_ADDR 0x82473000  /* offset 36.44921875MiB */
-#define CVIMMAP_ISP_MEM_BASE_SIZE 0x0  /* 0.0KiB */
-#define CVIMMAP_KERNEL_MEMORY_ADDR 0x80000000  /* offset 0.0KiB */
-#define CVIMMAP_KERNEL_MEMORY_SIZE 0x3f40000  /* 63.25MiB */
-#define CVIMMAP_MONITOR_ADDR 0x80000000  /* offset 0.0KiB */
-#define CVIMMAP_OPENSBI_FDT_ADDR 0x80080000  /* offset 512.0KiB */
-#define CVIMMAP_OPENSBI_SIZE 0x80000  /* 512.0KiB */
-#define CVIMMAP_UIMAG_ADDR 0x81400000  /* offset 20.0MiB */
-#define CVIMMAP_UIMAG_SIZE 0xf00000  /* 15.0MiB */
-
-#endif /* __BOARD_MMAP__83494f74__ */
@@ -1,38 +0,0 @@
-#!/usr/bin/env python3
-
-import logging
-import struct
-import argparse
-
-CHIP_CONF_CMD_DELAY_MS = 0xFFFFFFFD
-CHIP_CONF_CMD_DELAY_US = 0xFFFFFFFE
-
-CHIP_CONF_SCAN_START_1 = 0xFFFFFFA0
-
-
-def gen_chip_conf(args):
-    logging.info("gen_chip_conf")
-    regs = [
-        (0x0E00000C, 0xA0000001),  # ATF_DBG_REG = 0x0E00000C
-        (0x0E00000C, 0xA0000002),
-        # (CHIP_CONF_CMD_DELAY_MS, 100),
-        # (CHIP_CONF_CMD_DELAY_US, 100),
-        (CHIP_CONF_SCAN_START_1, 0xFFFFFFFF),
-    ]
-
-    chip_conf = b"".join(struct.pack("<II", a, v) for a, v in regs)
-    logging.info("chip_conf=%d bytes", len(chip_conf))
-
-    with open(args.CHIP_CONF, "wb") as fp:
-        fp.write(chip_conf)
-
-
-def main():
-    parser = argparse.ArgumentParser(description="generate test cases")
-    parser.add_argument("CHIP_CONF", type=str)
-    args = parser.parse_args()
-    gen_chip_conf(args)
-
-
-if __name__ == "__main__":
-    main()
@@ -1,85 +0,0 @@
-#
-# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-# Enable workarounds for selected Cortex-A53 errata
-ERRATA_A53_835769	:=	1
-ERRATA_A53_843419	:=	1
-ERRATA_A53_855873	:=	1
-
-PAGE_SIZE_64KB := 1
-TEST_FROM_SPINOR1 := 0
-
-DEFINES += -DLZ4_USER_MEMORY_FUNCTIONS=1
-
-# ifeq ($(FSBL_SECURE_BOOT_SUPPORT),1)
-DEFINES += \
-	-DNO_ALLOCS \
-	-DARGTYPE=3 \
-	-DLTC_NO_FILE \
-	-DLTM_NO_FILE \
-	-DLTM_DESC \
-	-DLTC_SOURCE
-
-CRYPT_INCLUDES := \
-	-Ilib/libtommath \
-	-Ilib/libtomcrypt/src/headers \
-	-Ilib/BigDigits
-
-CRYPT_SOURCES := \
-	lib/BigDigits/bigdigits.c \
-	lib/libtomcrypt/src/hashes/sha2/sha256.c
-# endif
-
-INCLUDES += \
-	-Iinclude \
-	${CPU_INCLUDES} \
-	-Iplat/ \
-	-Iplat/${CHIP_ARCH}/include/uart \
-	-Iplat/${CHIP_ARCH}/include/usb \
-	-Iplat/${CHIP_ARCH}/include \
-	-Iplat/${CHIP_ARCH}/include/${BOOT_CPU} \
-	-Ilib/utils \
-	-Ilib/lzma \
-	-Ilib/lz4 \
-	-Ilib/crc \
-	${STDLIB_INCLUDES} \
-	${CRYPT_INCLUDES}
-
-#BL_COMMON_SOURCES = \
-	${CPU_SOURCES} \
-	lib/tf_printf/tf_printf.c \
-	plat/${CHIP_ARCH}/platform.c \
-	plat/${CHIP_ARCH}/security/security.c \
-	${STDLIB_SRCS} \
-	${CRYPT_SOURCES}
-
-#DECOMPRESSION_SOURCES = \
-	lib/lzma/LzmaDec.c \
-	lib/lz4/lz4_all.c \
-	lib/lz4/xxhash.c
-
-#BL2_SRCS = \
-	${BL_COMMON_SOURCES} \
-	plat/${CHIP_ARCH}/platform_device.c \
-	plat/${CHIP_ARCH}/bl2/bl2_opt.c \
-	lib/utils/decompress.c \
-	plat/${CHIP_ARCH}/usb/cps_cvi.c  \
-	plat/${CHIP_ARCH}/usb/usb_tty.c  \
-	plat/${CHIP_ARCH}/usb/dwc2_udc_otg.c  \
-	plat/${CHIP_ARCH}/usb/dwc2_udc_otg_xfer_dma.c  \
-	plat/${CHIP_ARCH}/usb/cv_usb.c  \
-	lib/crc/crc16.c \
-	${DECOMPRESSION_SOURCES}
-
-BL2_SOURCES = \
-	${BL2_CPU_SOURCES} \
-	${BL2_SRCS} \
-	plat/${CHIP_ARCH}/bl2/bl2_main.c
-
-#include plat/${CHIP_ARCH}/ddr/ddr.mk
-
-BL2_LINKERFILE := plat/${CHIP_ARCH}/bl2/bl2.ld.S
-BL2_RLS_OBJS := plat/${CHIP_ARCH}/bl2_objs/${PROJECT_FULLNAME}/bl2/*.o
@@ -1,16 +0,0 @@
-sys.up
-
-; Reset
-break;
-WAIT !ISRUN() ;wait until target stop
-
-; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
-MWriteS32 PM:0x4400000++0xf 0x14000000
-MWriteS32 0x4400000++0xf 0x14000000
-Register.Set pc 0x04400000
-
-; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
-; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
-; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
-; MWriteS32 PM:0x03010000 0x13
-print "CLEAR ROM"
@@ -1,14 +0,0 @@
-DO up.cmm
-
-MWriteS32 PM:0x4400000++0xf 0x14000000
-MWriteS32 PM:0x4418000++0xf 0x6F
-Register.Set pc 0x04400000
-print "clear ROM"
-
-LoadBINARY ..\cv181x_c906b_bl1.bin 0x04418000 %S32
-print "C906B BL1 loaded"
-
-Data.Set PM:0x3003024 %LONG Data.Long(PM:0x3003024)|(1<<5)
-print "Release C906B"
-
-END
@@ -1,13 +0,0 @@
-DO up.cmm
-
-MWriteS32 PM:0x4400000++0xf 0x14000000
-Register.Set pc 0x04400000
-print "clear ROM"
-
-LoadBINARY ..\cv181x_ca53_bl1.bin 0x04400000 %S32
-print "CA53 BL1 loaded"
-
-Register.Set r0 0
-Register.Set pc 0x04400000
-
-END
@@ -1,40 +0,0 @@
-
-;winclear
-system.reset
-translation.reset
-
-system.cpu cortexa53
-system.config debugaccessport 0
-system.config apbaccessport 0
-system.config axiaccessport 1
-system.config memoryaccessport 1
-; set corenumber first
-sys.config corenumber 1
-; then set corebase and ctibase
-sys.config corebase 0x81010000
-sys.config ctibase  0x81020000
-sys.jc 5mhz
-
-Wait 10.ms
-system.option enreset on
-system.option trst on
-system.option resetbreak on
-system.option waitreset 500.ms
-OPTION.SerialWire ON
-
-sys.down
-Wait 50.ms
-sys.up
-
-if system.up()
-(
-	; data.list
-)
-else
-(
-	dialog.ok "system.up failed"
-)
-
-; Reset
-break;
-WAIT !ISRUN() ;wait until target stop