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[bsp][hpmicro] upgrade to bsp v1.10.0, add hpm6p00evk and hpm5e00evk support

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- upgraded bsp to v1.10.0
- moved hpm_sdk to rt-thread package
- added support for hpm6p00evk and hpm5e00evk

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
This commit is contained in:
Fan YANG
2025-09-23 13:38:22 +08:00
committed by R b b666
parent db1779e239
commit 35672cd5cb
1312 changed files with 37744 additions and 1030013 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/ALL_BSP_COMPILE.json
+3 -1
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@@ -424,7 +424,9 @@
"hpmicro/hpm5300evk",
"hpmicro/hpm5301evklite",
"hpmicro/hpm6800evk",
"hpmicro/hpm6e00evk"
"hpmicro/hpm6e00evk",
"hpmicro/hpm6p00evk",
"hpmicro/hpm5e00evk"
]
},
{
bsp/hpmicro/.ignore_format.yml
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@@ -4,11 +4,24 @@
dir_path:
- hpm6200evk/startup
- hpm6200evk/board
- hpm6300evk/startup
- hpm6300evk/board
- hpm6750evk/startup
- hpm6750evk/board
- hpm6750evk2/startup
- hpm6750evk2/board
- hpm6750evkmini/startup
- hpm6750evkmini/board
- hpm5300evk/startup
- hpm5300evk/board
- hpm5301evklite/startup
- hpm5301evklite/board
- hpm6800evk/startup
- libraries/hpm_sdk
- hpm6800evk/board
- hpm6e00evk/startup
- hpm6e00evk/board
- hpm6p00evk/startup
- hpm6p00evk/board
- hpm5e00evk/startup
- hpm5e00evk/board
bsp/hpmicro/README.md
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@@ -0,0 +1,193 @@
# HPMicro Board Support Package (BSP) Introduction
[中文页](README_zh.md) |
## Introduction
This document provides an overview of the HPMicro BSPs (Board Support Package) available in the RT-Thread repository. Each BSP is tailored for specific HPMicro development boards, offering necessary drivers and configurations to run RT-Thread seamlessly on RISC-V based HPMicro microcontrollers.
The document consists of the following parts:
- HPMicro BSP Overview
- Available BSPs
- Quick Start Guide
- Common Development Environment Setup
- References
By reading the Quick Start Guide section, developers can quickly get their hands on any HPMicro BSP and run RT-Thread on the board. Each individual BSP contains detailed documentation for specific board features and advanced usage.
## Available BSPs
Below is a comprehensive list of HPMicro BSPs currently supported:
| BSP Name | Supported Board | MCU | Description |
|----------|-----------------|-----|-------------|
| hpm5300evk | HPM5300EVK | HPM5361 | Development board for HPM5300 series |
| hpm5301evklite | HPM5301EVKLITE | HPM5301 | Lite version development board for HPM5301 |
| hpm5e00evk | HPM5E00EVK | HPM5E31 | Development board for HPM5E00 series |
| hpm6200evk | HPM6200EVK | HPM6200 | Development board for HPM6200 series |
| hpm6300evk | HPM6300EVK | HPM6360 | Development board for HPM6300 series with Ethernet support |
| hpm6750evk | HPM6750EVK | HPM6750 | Development board for HPM6750 series with dual-core RISC-V |
| hpm6750evk2 | HPM6750EVK2 | HPM6750 | Second generation development board for HPM6750 series |
| hpm6750evkmini | HPM6750EVKMINI | HPM6750 | Mini development board for HPM6750 series |
| hpm6800evk | HPM6800EVK | HPM6800 | Development board for HPM6800 series |
| hpm6e00evk | HPM6E00EVK | HPM6E00 | Development board for HPM6E00 series |
| hpm6p00evk | HPM6P00EVK | HPM6P00 | Development board for HPM6P00 series |
## Quick Start Guide
### Prerequisites
Before getting started with any HPMicro BSP, you need to prepare the following development environment:
#### 1. RT-Thread ENV
- Download and install [RT-Thread ENV](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)
#### 2. RISC-V Toolchain
- Download the RISC-V toolchain: [riscv32-gnu-toolchain](https://github.com/helloeagleyang/riscv32-gnu-toolchain-win/archive/2022.04.12.zip)
- Extract it to a specified directory, for example: `C:\DevTools\riscv32-gnu-toolchain`
- Set environment variable `RTT_RISCV_TOOLCHAIN` to `<TOOLCHAIN_DIR>\bin`
- For example: `C:\DevTools\riscv32-gnu-toolchain\bin`
#### 3. OpenOCD for HPMicro
- Download OpenOCD: [rtt-debugger-support-package](https://github.com/hpmicro/rtt-debugger-support-package/archive/v0.4.0.zip)
- Extract it to a specified directory, for example: `C:\DevTools\openocd-hpmicro`
- Set environment variable `OPENOCD_HPMICRO` to `<OPENOCD_HPMICRO_DIR>\bin`
- For example: `C:\DevTools\openocd-hpmicro\bin`
### Getting Started with a Specific BSP
1. **Navigate to the desired BSP directory**:
```bash
cd rt-thread/bsp/hpmicro/<bsp_name>
```
2. **Configure the project**:
- Open RT-Thread ENV command-line
- Change directory to the BSP directory
- Run `menuconfig` to configure the project
3. **Build the project**:
```bash
scons -jN # N equals to the number of CPU cores
```
4. **Hardware Connection**:
- Switch BOOT pin to 2'b00
- Connect the `PWR_DEBUG` port to PC via TYPE-C cable
5. **Download and Debug**:
- Use the provided OpenOCD scripts for downloading and debugging
- Refer to individual BSP README files for specific commands
### Running Results
Once the project is successfully downloaded, the system runs automatically. The LED on the board will flash periodically.
Connect the serial port of the board to the PC, communicate with it via a serial terminal tool (115200-8-1-N). Reset the board and the startup information of RT-Thread will be observed:
```
\ | /
- RT - Thread Operating System
/ | \ 5.2.2 build Aug 16 2025 18:18:18
2006 - 2025 Copyright by RT-Thread team
msh >
```
## Common Peripheral Support
Most HPMicro BSPs support the following peripherals:
| **On-board Peripherals** | **Support** | **Note** |
| ------------------------ | ----------- | -------- |
| USB | √ | |
| QSPI Flash | √ | |
| GPIO | √ | |
| SPI | √ | |
| I2C | √ | |
| UART | √ | |
| PWM | √ | |
| RTC | √ | |
| On-Board Debugger | √ | ft2232 |
Additional peripherals may be supported depending on the specific board:
- **Ethernet**: Available on
- HPM6300EVK
- HPM6750EVK
- HPM6750EVK2
- HPM6750EVKMINI + ART-Pi Industry IO extension
- HPM6800EVK
- HPM6E00EVK
- HPM6P00EVK
- HPM5E00EVK
- **CAN**: Available on HPM6750 series Development Boards, HPM5300EVK, HPM6800EVK, HPM6E00EVK, HPM6P00EVK and HPM5E00EVK
- **SDIO**: Available on HPM6300EVK, HPM6750EVKMINI, HPM6750EVK, HPM6750EVK2 and HPM6800EVK
- **Display/Audio**: Available on HPM6750EVK, HPM6800EVK, HPM6E00EVK，HPM6P00EVK
## Development Environment Setup
### Using Command Line Tools
1. Set up the environment variables as described in the Prerequisites section
2. Use `scons` for building
3. Use OpenOCD and GDB for debugging or use the Ozone + JLink for debugging
## Individual BSP Documentation
Each BSP contains its own detailed README file with:
- Board-specific hardware information
- Peripheral configuration details
- Specific download and debug commands
- Advanced features and examples
Please refer to the individual BSP directories for detailed documentation:
- `hpm5300evk/README.md`
- `hpm5301evklite/README.md`
- `hpm5e00evk/README.md`
- `hpm6200evk/README.md`
- `hpm6300evk/README.md`
- `hpm6750evk/README.md`
- `hpm6750evk2/README.md`
- `hpm6750evkmini/README.md`
- `hpm6800evk/README.md`
- `hpm6e00evk/README.md`
- `hpm6p00evk/README.md`
## Troubleshooting
### Common Issues
1. **Toolchain not found**: Ensure `RTT_RISCV_TOOLCHAIN` environment variable is set correctly
2. **OpenOCD connection failed**: Check USB connection and driver installation
3. **Build errors**: Verify all dependencies are installed and environment variables are set
4. **Serial communication issues**: Check baud rate (115200) and COM port settings
### Getting Help
- Check the individual BSP README files for board-specific issues
- Visit [RT-Thread Community](https://club.rt-thread.org/)
- Refer to [RT-Thread Documentation](https://www.rt-thread.org/document/site/)
## References
- [RT-Thread Document Center](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/README)
- [RT-Thread ENV](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md)
- [HPMicro Official Website](https://www.hpmicro.com/)
- [HPMicro SDK Documentation](https://hpmicro.github.io/)
- [RISC-V Toolchain](https://github.com/riscv/riscv-gnu-toolchain)
## Contributing
Contributions to enhance existing BSPs or add new ones are welcome. Please follow the RT-Thread contribution guidelines and ensure that your BSP adheres to the project's standards.
For contributing to HPMicro BSPs:
1. Fork the `RT-Thread` repository
2. Create a feature branch
3. Make your changes following the existing code style
4. Test your changes thoroughly
5. Submit a pull request with a clear description
## License
This BSP is released under the [RT-Thread license](https://github.com/RT-Thread/rt-thread/blob/master/LICENSE).
bsp/hpmicro/README_zh.md
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# HPMicro 板级支持包 (BSP) 介绍
[English](README.md) |
## 简介
本文档提供了 RT-Thread 仓库中可用的 HPMicro BSP（板级支持包）的概述。每个 BSP 都针对特定的 HPMicro 开发板进行了定制，提供必要的驱动程序和配置，以便在基于 RISC-V 的 HPMicro 微控制器上无缝运行 RT-Thread。
本文档包含以下部分：
- HPMicro BSP 概述
- 可用的 BSP
- 快速开始指南
- 通用开发环境设置
- 参考资料
通过阅读快速开始指南部分，开发者可以快速上手任何 HPMicro BSP 并在开发板上运行 RT-Thread。每个单独的 BSP 都包含特定开发板功能和高级用法的详细文档。
## 可用的 BSP
以下是当前支持的 HPMicro BSP 的完整列表：
| BSP 名称 | 支持的开发板 | MCU | 描述 |
|----------|-------------|-----|------|
| hpm5300evk | HPM5300EVK | HPM5361 | HPM5300 系列开发板 |
| hpm5301evklite | HPM5301EVKLITE | HPM5301 | HPM5301精简版开发板 |
| hpm5e00evk | HPM5E00EVK | HPM5E31 | HPM5E00 系列开发板 |
| hpm6200evk | HPM6200EVK | HPM6200 | HPM6200 系列开发板 |
| hpm6300evk | HPM6300EVK | HPM6360 | HPM6300 系列开发板，支持以太网 |
| hpm6750evk | HPM6750EVK | HPM6750 | HPM6750 系列开发板，双核 RISC-V |
| hpm6750evk2 | HPM6750EVK2 | HPM6750 | HPM6750 系列第二代开发板 |
| hpm6750evkmini | HPM6750EVKMINI | HPM6750 | HPM6750 系列迷你开发板 |
| hpm6800evk | HPM6800EVK | HPM6800 | HPM6800 系列开发板 |
| hpm6e00evk | HPM6E00EVK | HPM6E00 | HPM6E00 系列开发板 |
| hpm6p00evk | HPM6P00EVK | HPM6P00 | HPM6P00 系列开发板 |
## 快速开始指南
### 前提条件
在开始使用任何 HPMicro BSP 之前，您需要准备以下开发环境：
#### 1. RT-Thread ENV
- 下载并安装 [RT-Thread ENV](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)
#### 2. RISC-V 工具链
- 下载 RISC-V 工具链：[riscv32-gnu-toolchain](https://github.com/helloeagleyang/riscv32-gnu-toolchain-win/archive/2022.04.12.zip)
- 解压到指定目录，例如：`C:\DevTools\riscv32-gnu-toolchain`
- 设置环境变量 `RTT_RISCV_TOOLCHAIN` 为 `<TOOLCHAIN_DIR>\bin`
- 例如：`C:\DevTools\riscv32-gnu-toolchain\bin`
#### 3. HPMicro 专用 OpenOCD
- 下载 OpenOCD：[rtt-debugger-support-package](https://github.com/hpmicro/rtt-debugger-support-package/archive/v0.4.0.zip)
- 解压到指定目录，例如：`C:\DevTools\openocd-hpmicro`
- 设置环境变量 `OPENOCD_HPMICRO` 为 `<OPENOCD_HPMICRO_DIR>\bin`
- 例如：`C:\DevTools\openocd-hpmicro\bin`
### 使用特定 BSP 开始
1. **导航到所需的 BSP 目录**：
```bash
cd rt-thread/bsp/hpmicro/<bsp_name>
```
2. **配置项目**：
- 打开 RT-Thread ENV 命令行
- 切换到 BSP 目录
- 运行 `menuconfig` 来配置项目
3. **构建项目**：
```bash
scons -jN # N 等于 CPU 核心数
```
4. **硬件连接**：
- 将 BOOT 引脚切换到 2'b00
- 通过 TYPE-C 线缆将 `PWR_DEBUG` 端口连接到 PC
5. **下载和调试**：
- 使用提供的 OpenOCD 脚本进行下载和调试
- 参考各个 BSP 的 README 文件获取具体命令
### 运行结果
项目成功下载后，系统会自动运行。开发板上的 LED 会周期性闪烁。
将开发板的串口连接到 PC，通过串口终端工具（115200-8-1-N）与其通信。重置开发板后，将观察到 RT-Thread 的启动信息：
```
\ | /
- RT - Thread Operating System
/ | \ 5.2.2 build Aug 16 2025 18:18:18
2006 - 2025 Copyright by RT-Thread team
msh >
```
## 通用外设支持
大多数 HPMicro BSP 支持以下外设：
| **板载外设** | **支持** | **备注** |
| ------------ | -------- | -------- |
| USB | √ | |
| QSPI Flash | √ | |
| GPIO | √ | |
| SPI | √ | |
| I2C | √ | |
| UART | √ | |
| PWM | √ | |
| RTC | √ | |
| 板载调试器 | √ | ft2232 |
根据特定开发板，可能支持其他外设：
- **以太网**：在如下开发板上可用
- HPM6300EVK
- HPM6750EVK
- HPM6750EVK2
- HPM6750EVKMINI + ART-Pi Industry IO 扩展板
- HPM6800EVK
- HPM6E00EVK
- HPM6P00EVK
- HPM5E00EVK
- **CAN**：HPM5300EVK、HPM6750系列开发板，HPM6300EVK，HPM6800EVK, HPM6E00EVK, HPM6P00EVK 和HPM5E00EVK
- **SDIO**：HPM6300EVK、HPM6750EVK 系列可用
- **显示/音频**：HPM6750EVK 系列可用
## 开发环境设置
### 使用命令行工具
1. 按照前提条件部分所述设置环境变量
2. 使用 `scons` 进行构建
3. 使用 OpenOCD 和 GDB 进行调试
## 各个 BSP 文档
每个 BSP 都包含自己的详细 README 文件，内容包括：
- 特定开发板的硬件信息
- 外设配置详情
- 具体的下载和调试命令
- 高级功能和示例
请参考各个 BSP 目录获取详细文档：
- `hpm5300evk/README.md`
- `hpm5301evklite/README.md`
- `hpm5e00evk/README.md`
- `hpm6200evk/README.md`
- `hpm6300evk/README.md`
- `hpm6750evk/README.md`
- `hpm6750evk2/README.md`
- `hpm6750evkmini/README.md`
- `hpm6800evk/README.md`
- `hpm6e00evk/README.md`
- `hpm6p00evk/README.md`
## 故障排除
### 常见问题
1. **找不到工具链**：确保 `RTT_RISCV_TOOLCHAIN` 环境变量设置正确
2. **OpenOCD 连接失败**：检查 USB 连接和驱动程序安装
3. **构建错误**：验证所有依赖项已安装且环境变量已设置
4. **串口通信问题**：检查波特率（115200）和 COM 端口设置
### 获取帮助
- 查看各个 BSP 的 README 文件了解特定开发板的问题
- 访问 [RT-Thread 社区](https://club.rt-thread.org/)
- 参考 [RT-Thread 文档](https://www.rt-thread.org/document/site/)
## 参考资料
- [RT-Thread 文档中心](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/README)
- [RT-Thread ENV](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md)
- [HPMicro 官方网站](https://www.hpmicro.com/)
- [HPMicro SDK 文档](https://hpmicro.github.io/)
- [RISC-V 工具链](https://github.com/riscv/riscv-gnu-toolchain)
## 贡献
欢迎对增强现有 BSP 或添加新 BSP 做出贡献。请遵循 RT-Thread 贡献指南，确保您的 BSP 符合项目标准。
为 HPMicro BSP 做出贡献：
1. Fork `RT-Thread` 仓库
2. 创建功能分支
3. 按照现有代码风格进行更改
4. 彻底测试您的更改
5. 提交带有清晰描述的拉取请求
## 许可证
此 BSP 在 [RT-Thread 许可证](https://github.com/RT-Thread/rt-thread/blob/master/LICENSE) 下发布。
bsp/hpmicro/hpm5300evk/.config
+50 -3
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@@ -104,8 +104,6 @@
#
# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
# end of rt_strnlen options
# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
# end of klibc options
CONFIG_RT_NAME_MAX=8
@@ -183,6 +181,9 @@ CONFIG_RT_VER_NUM=0x50201
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV32=y
#
# RT-Thread Components
#
@@ -199,6 +200,7 @@ CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
# CONFIG_FINSH_USING_WORD_OPERATION is not set
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
@@ -376,6 +378,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
# CONFIG_PKG_USING_ESP_HOSTED is not set
#
# Wi-Fi
@@ -483,6 +486,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_QMODBUS is not set
# CONFIG_PKG_USING_PNET is not set
# CONFIG_PKG_USING_OPENER is not set
# CONFIG_PKG_USING_FREEMQTT is not set
# end of IoT - internet of things
#
@@ -572,6 +576,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_MCOREDUMP is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
@@ -617,6 +622,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_ZDEBUG is not set
# CONFIG_PKG_USING_RVBACKTRACE is not set
# CONFIG_PKG_USING_HPATCHLITE is not set
# CONFIG_PKG_USING_THREAD_METRIC is not set
# end of tools packages
#
@@ -710,6 +716,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_RMP is not set
# CONFIG_PKG_USING_R_RHEALSTONE is not set
# CONFIG_PKG_USING_HEARTBEAT is not set
# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
# end of system packages
#
@@ -791,6 +798,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_NUCLEI_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_MM32 is not set
@@ -833,6 +842,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# HC32 DDL Drivers
#
# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set
# end of HC32 DDL Drivers
#
@@ -846,6 +859,31 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
# end of NXP HAL & SDK Drivers
#
# NUVOTON Drivers
#
# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set
# end of NUVOTON Drivers
#
# GD32 Drivers
#
# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
# end of GD32 Drivers
#
# HPMicro SDK
#
CONFIG_PKG_USING_HPM_SDK=y
CONFIG_PKG_HPM_SDK_PATH="/packages/peripherals/hal-sdk/hpmicro/hpm_sdk"
# CONFIG_PKG_USING_HPM_SDK_V110 is not set
CONFIG_PKG_USING_HPM_SDK_LATEST_VERSION=y
CONFIG_PKG_HPM_SDK_VER="latest"
# end of HPMicro SDK
# end of HAL & SDK Drivers
#
@@ -1017,6 +1055,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_SEAN_WS2812B is not set
# CONFIG_PKG_USING_IC74HC165 is not set
# CONFIG_PKG_USING_IST8310 is not set
# CONFIG_PKG_USING_ST7789_SPI is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers
@@ -1355,20 +1394,28 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# end of Arduino libraries
# end of RT-Thread online packages
CONFIG_SOC_HPM5300_SERIES=y
#
# Hardware Drivers Config
#
CONFIG_SOC_HPM5000=y
CONFIG_SOC_HPM5300=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_GPIO_IRQ_PRIORITY=1
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
CONFIG_BSP_UART0_RX_BUFSIZE=128
CONFIG_BSP_UART0_TX_BUFSIZE=0
CONFIG_BSP_UART0_IRQ_PRIORITY=1
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_UART7 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_GPTMR is not set
bsp/hpmicro/hpm5300evk/SConstruct
-11
View File
@@ -55,17 +55,6 @@ GDB = rtconfig.GDB
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
hpm_library = 'hpm_sdk'
rtconfig.BSP_LIBRARY_TYPE = hpm_library
# include soc
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library,'soc', rtconfig.SOC_FAMILY, rtconfig.CHIP_NAME, 'SConscript')))
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'SConscript')))
# include components
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'components', 'SConscript')))
# includes rtt drivers
bsp/hpmicro/hpm5300evk/board/Kconfig
+326 -23
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bsp/hpmicro/hpm5300evk/board/board.c
+105 -140
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File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5300evk/board/board.h
+158 -44
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File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5300evk/board/linker_scripts/flash_rtt.ld → bsp/hpmicro/hpm5300evk/board/linker_scripts/gcc/flash_rtt.ld
+68 -34
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File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5300evk/board/linker_scripts/ram_rtt.ld → bsp/hpmicro/hpm5300evk/board/linker_scripts/gcc/ram_rtt.ld
+83 -65
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File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5300evk/board/pinmux.c
+80 -37
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 HPMicro
* Copyright (c) 2023-2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -15,15 +15,6 @@
#include "board.h"
#include "pinmux.h"
void init_xtal_pins(void)
{
/* Package QFN32 should be set PA30 and PA31 pins as analog type to enable xtal. */
/*
* HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
* HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
*/
}
void init_py_pins_as_pgpio(void)
{
/* Set PY00-PY05 default function to PGPIO */
@@ -48,10 +39,6 @@ void init_uart_pins(UART_Type *ptr)
/* using for uart_lin function */
HPM_IOC->PAD[IOC_PAD_PA14].FUNC_CTL = IOC_PA14_FUNC_CTL_UART3_RXD;
HPM_IOC->PAD[IOC_PAD_PA15].FUNC_CTL = IOC_PA15_FUNC_CTL_UART3_TXD;
} else if (ptr == HPM_UART7) {
/* using for uart_lin function */
HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PA31_FUNC_CTL_UART7_TXD;
HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PA30_FUNC_CTL_UART7_RXD;
} else {
;
}
@@ -115,6 +102,13 @@ void init_spi_pins(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI;
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PA25].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA27].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA28].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA29].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
@@ -126,6 +120,13 @@ void init_spi_pins_with_gpio_as_cs(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI;
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PA25].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA27].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA28].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA29].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
@@ -136,6 +137,7 @@ void init_gptmr_pins(GPTMR_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PB06].FUNC_CTL = IOC_PB06_FUNC_CTL_GPTMR0_CAPT_0;
HPM_IOC->PAD[IOC_PAD_PB07].FUNC_CTL = IOC_PB07_FUNC_CTL_GPTMR0_COMP_0;
HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_GPTMR0_COMP_1;
HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_GPTMR0_COMP_3;
}
}
@@ -197,31 +199,27 @@ void init_adc_qeiv2_pins(void)
HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IU: ADC0.5 /ADC1.5 */
}
void init_usb_pins(void)
void init_usb_pins(USB_Type *ptr)
{
/* Package QFN48 and LQFP64 should be set PA24 and PA25 pins as analog type to enable USB_P and USB_N. */
/*
* HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
* HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
*/
if (ptr == HPM_USB0) {
/* Package QFN48 and LQFP64 should be set PA24 and PA25 pins as analog type to enable USB_P and USB_N. */
/*
* HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
* HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
*/
/* Package QFN32 should be set PA26 and PA27 pins as analog type to enable USB_P and USB_N. */
/*
* HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
* HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
*/
/* USB0_ID */
HPM_IOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_USB0_ID;
/* USB0_OC */
HPM_IOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_USB0_OC;
/* USB0_PWR */
HPM_IOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_USB0_PWR;
/* USB0_ID */
HPM_IOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_USB0_ID;
/* USB0_OC */
HPM_IOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_USB0_OC;
/* USB0_PWR */
HPM_IOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_USB0_PWR;
/* PY port IO needs to configure PIOC as well */
HPM_PIOC->PAD[IOC_PAD_PY00].FUNC_CTL = PIOC_PY00_FUNC_CTL_SOC_GPIO_Y_00;
HPM_PIOC->PAD[IOC_PAD_PY01].FUNC_CTL = PIOC_PY01_FUNC_CTL_SOC_GPIO_Y_01;
HPM_PIOC->PAD[IOC_PAD_PY02].FUNC_CTL = PIOC_PY02_FUNC_CTL_SOC_GPIO_Y_02;
/* PY port IO needs to configure PIOC as well */
HPM_PIOC->PAD[IOC_PAD_PY00].FUNC_CTL = PIOC_PY00_FUNC_CTL_SOC_GPIO_Y_00;
HPM_PIOC->PAD[IOC_PAD_PY01].FUNC_CTL = PIOC_PY01_FUNC_CTL_SOC_GPIO_Y_01;
HPM_PIOC->PAD[IOC_PAD_PY02].FUNC_CTL = PIOC_PY02_FUNC_CTL_SOC_GPIO_Y_02;
}
}
void init_can_pins(MCAN_Type *ptr)
@@ -254,11 +252,18 @@ void init_dac_pins(DAC_Type *ptr)
}
}
void init_plb_pins(void)
void init_plb_pulse_pins(void)
{
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_TRGM0_P_02;
}
void init_plb_filter_pins(void)
{
HPM_IOC->PAD[IOC_PAD_PA28].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(0);
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_TRGM0_P_04;
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_TRGM0_P_02;
}
void init_qeo_pins(QEO_Type *ptr)
{
if (ptr == HPM_QEO0) {
@@ -323,3 +328,41 @@ void init_opamp_pins(void)
HPM_IOC->PAD[IOC_PAD_PB00].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
HPM_IOC->PAD[IOC_PAD_PB04].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
}
/* for uart_rx_line_status case, need to a gpio pin to sent break signal */
void init_uart_break_signal_pin(void)
{
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_GPIO_A_26;
}
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp)
{
if (ptr == HPM_GPTMR0) {
if (as_comp) {
switch (channel) {
case 0:
HPM_IOC->PAD[IOC_PAD_PB07].FUNC_CTL = IOC_PB07_FUNC_CTL_GPTMR0_COMP_0;
break;
case 1:
HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_GPTMR0_COMP_1;
break;
case 3:
HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_GPTMR0_COMP_3;
break;
default:
break;
}
} else {
if (channel == 0) {
HPM_IOC->PAD[IOC_PAD_PB06].FUNC_CTL = IOC_PB06_FUNC_CTL_GPTMR0_CAPT_0;
}
}
}
}
void init_clk_ref_pin(void)
{
HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PA30_FUNC_CTL_SOC_REF0;
}
bsp/hpmicro/hpm5300evk/board/pinmux.h
+8 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 HPMicro
* Copyright (c) 2022-2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -11,7 +11,6 @@
#ifdef __cplusplus
extern "C" {
#endif
void init_xtal_pins(void);
void init_py_pins_as_pgpio(void);
void init_uart_pins(UART_Type *ptr);
void init_uart_pin_as_gpio(UART_Type *ptr);
@@ -28,12 +27,13 @@ void init_pwm_pins(PWM_Type *ptr);
void init_adc_pins(void);
void init_adc_bldc_pins(void);
void init_adc_qeiv2_pins(void);
void init_usb_pins(void);
void init_usb_pins(USB_Type *ptr);
void init_can_pins(MCAN_Type *ptr);
void init_dac_pins(DAC_Type *ptr);
void init_led_pins_as_gpio(void);
void init_led_pins_as_pwm(void);
void init_plb_pins(void);
void init_plb_pulse_pins(void);
void init_plb_filter_pins(void);
void init_qeo_pins(QEO_Type *ptr);
void init_sei_pins(SEI_Type *ptr, uint8_t sei_ctrl_idx);
void init_rdc_pin(void);
@@ -42,6 +42,10 @@ void init_qeiv2_ab_pins(QEIV2_Type *ptr);
void init_qeiv2_abz_pins(QEIV2_Type *ptr);
void init_opamp_pins(void);
void init_lin_transceiver_ctrl_pin(void);
void init_uart_break_signal_pin(void);
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
void init_clk_ref_pin(void);
#ifdef __cplusplus
}
#endif
bsp/hpmicro/hpm5300evk/board/rtt_board.c
+51 -3
View File
@@ -52,7 +52,7 @@ void rtt_board_init(void)
os_tick_config();
/* Configure the USB pins*/
board_init_usb_pins();
board_init_usb(HPM_USB0);
/* Initialize the UART driver first, because later driver initialization may require the rt_kprintf */
rt_hw_uart_init();
@@ -63,6 +63,7 @@ void rtt_board_init(void)
void app_init_led_pins(void)
{
board_init_led_pins();
gpio_set_pin_output(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN);
gpio_write_pin(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, BOARD_LED_OFF_LEVEL);
}
@@ -95,7 +96,7 @@ void rt_hw_console_output(const char *str)
void app_init_usb_pins(void)
{
board_init_usb_pins();
board_init_usb(HPM_USB0);
}
ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
@@ -107,7 +108,7 @@ ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
void rt_hw_cpu_reset(void)
{
HPM_PPOR->RESET_ENABLE = (1UL << 31);
HPM_PPOR->RESET_ENABLE |= (1UL << 31);
HPM_PPOR->SOFTWARE_RESET = 1000U;
while(1) {
@@ -127,3 +128,50 @@ void rt_hw_cpu_dcache_ops(int ops, void *addr, int size)
}
}
#endif
uint32_t rtt_board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb)
{
uint32_t freq = 0;
if (ptr == HPM_ADC0) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc0, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc0, clk_adc_src_ana0);
clock_set_source_divider(clock_ana0, clk_src_pll0_clk2, 2U);
}
clock_add_to_group(clock_adc0, 0);
freq = clock_get_frequency(clock_adc0);
} else if (ptr == HPM_ADC1) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc1, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc1, clk_adc_src_ana1);
clock_set_source_divider(clock_ana1, clk_src_pll0_clk2, 2U);
}
clock_add_to_group(clock_adc1, 0);
freq = clock_get_frequency(clock_adc1);
}
return freq;
}
uint32_t rtt_board_init_pwm_clock(PWM_Type *ptr)
{
uint32_t freq = 0;
(void) ptr;
clock_add_to_group(clock_mot0, 0);
freq = clock_get_frequency(clock_mot0);
return freq;
}
#ifdef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER
extern void hpm_isr_usb0(void);
RTT_DECLARE_EXT_ISR_M(IRQn_USB0, hpm_isr_usb0)
#endif
bsp/hpmicro/hpm5300evk/board/rtt_board.h
+12 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 hpmicro
* Copyright (c) 2021 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -10,8 +10,10 @@
#include "hpm_common.h"
#include "hpm_soc.h"
#include <drv_gpio.h>
#include "board.h"
/* gpio section */
#define APP_LED0 (0U)
#define APP_LED0_PIN_NUM GET_PIN(A, 23)
#define APP_LED_ON (1)
#define APP_LED_OFF (0)
@@ -19,6 +21,11 @@
/* mchtimer section */
#define BOARD_MCHTMR_FREQ_IN_HZ (24000000UL)
#define BOARD_OS_TIMER HPM_GPTMR0
#define BOARD_OS_TIMER_CH 1
#define BOARD_OS_TIMER_IRQ IRQn_GPTMR0
#define BOARD_OS_TIMER_CLK_NAME (clock_gptmr0)
/* CAN section */
#define BOARD_CAN_NAME "can0"
#define BOARD_CAN_HWFILTER_INDEX (0U)
@@ -31,6 +38,10 @@
#define BOARD_PWM_NAME "pwm0"
#define BOARD_PWM_CHANNEL (6)
/* ADC section */
#define BOARD_ADC_NAME BOARD_APP_ADC16_NAME
#define BOARD_ADC_CHANNEL BOARD_APP_ADC16_CH_1
#define IRQn_PendSV IRQn_DEBUG0
/***************************************************************
bsp/hpmicro/hpm5300evk/rtconfig.h
+20 -1
View File
@@ -104,6 +104,8 @@
#define RT_VER_NUM 0x50201
#define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */
#define ARCH_RISCV
#define ARCH_RISCV32
/* RT-Thread Components */
@@ -300,6 +302,20 @@
/* NXP HAL & SDK Drivers */
/* end of NXP HAL & SDK Drivers */
/* NUVOTON Drivers */
/* end of NUVOTON Drivers */
/* GD32 Drivers */
/* end of GD32 Drivers */
/* HPMicro SDK */
#define PKG_USING_HPM_SDK
#define PKG_USING_HPM_SDK_LATEST_VERSION
/* end of HPMicro SDK */
/* end of HAL & SDK Drivers */
/* sensors drivers */
@@ -379,18 +395,21 @@
/* end of Arduino libraries */
/* end of RT-Thread online packages */
#define SOC_HPM5300_SERIES
/* Hardware Drivers Config */
#define SOC_HPM5000
#define SOC_HPM5300
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_GPIO_IRQ_PRIORITY 1
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_UART0_RX_BUFSIZE 128
#define BSP_UART0_TX_BUFSIZE 0
#define BSP_UART0_IRQ_PRIORITY 1
/* end of On-chip Peripheral Drivers */
/* end of Hardware Drivers Config */
bsp/hpmicro/hpm5300evk/rtconfig.py
+39 -6
View File
@@ -1,8 +1,41 @@
# Copyright 2021-2023 HPMicro
# Copyright 2021-2025 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
def bsp_pkg_check():
import subprocess
need_update = True
for p in os.listdir("packages"):
if p.startswith("hpm_sdk-"):
need_update = False
break
if need_update:
print("\n===============================================================================")
print("Dependency packages missing, please running 'pkgs --update'...")
print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
print("===============================================================================")
exit(1)
RegisterPreBuildingAction(bsp_pkg_check)
# toolchains options
ARCH='risc-v'
@@ -80,27 +113,27 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'ram_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'flash_debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
elif BUILD == 'flash_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
else:
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
LFLAGS += ' -T ' + LINKER_FILE
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
bsp/hpmicro/hpm5300evk/startup/HPM5361/startup.c
+129 -122
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5300evk/startup/HPM5361/toolchains/gcc/port_gcc.S
+1 -1
View File
@@ -5,7 +5,7 @@
*
*/
#include "cpuport.h"
.section .text.entry, "ax"
.globl rt_hw_do_after_save_above
.type rt_hw_do_after_save_above,@function
rt_hw_do_after_save_above:
bsp/hpmicro/hpm5300evk/startup/HPM5361/toolchains/gcc/start.S
-1
View File
@@ -62,7 +62,6 @@ _start:
nmi_handler:
1: j 1b
.global default_irq_handler
.weak default_irq_handler
.align 2
default_irq_handler:
bsp/hpmicro/hpm5301evklite/.config
+50 -6
View File
@@ -104,11 +104,9 @@
#
# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
# end of rt_strnlen options
# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
# end of klibc options
CONFIG_RT_NAME_MAX=8
CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_AMP is not set
@@ -131,7 +129,7 @@ CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=1024
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice options
@@ -183,6 +181,9 @@ CONFIG_RT_VER_NUM=0x50201
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV32=y
#
# RT-Thread Components
#
@@ -199,6 +200,7 @@ CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
# CONFIG_FINSH_USING_WORD_OPERATION is not set
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
@@ -376,6 +378,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
# CONFIG_PKG_USING_ESP_HOSTED is not set
#
# Wi-Fi
@@ -483,6 +486,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_QMODBUS is not set
# CONFIG_PKG_USING_PNET is not set
# CONFIG_PKG_USING_OPENER is not set
# CONFIG_PKG_USING_FREEMQTT is not set
# end of IoT - internet of things
#
@@ -572,6 +576,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_MCOREDUMP is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
@@ -617,6 +622,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_ZDEBUG is not set
# CONFIG_PKG_USING_RVBACKTRACE is not set
# CONFIG_PKG_USING_HPATCHLITE is not set
# CONFIG_PKG_USING_THREAD_METRIC is not set
# end of tools packages
#
@@ -710,6 +716,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_RMP is not set
# CONFIG_PKG_USING_R_RHEALSTONE is not set
# CONFIG_PKG_USING_HEARTBEAT is not set
# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
# end of system packages
#
@@ -791,6 +798,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_NUCLEI_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_MM32 is not set
@@ -833,6 +842,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# HC32 DDL Drivers
#
# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set
# end of HC32 DDL Drivers
#
@@ -846,6 +859,31 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
# end of NXP HAL & SDK Drivers
#
# NUVOTON Drivers
#
# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set
# end of NUVOTON Drivers
#
# GD32 Drivers
#
# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
# end of GD32 Drivers
#
# HPMicro SDK
#
CONFIG_PKG_USING_HPM_SDK=y
CONFIG_PKG_HPM_SDK_PATH="/packages/peripherals/hal-sdk/hpmicro/hpm_sdk"
# CONFIG_PKG_USING_HPM_SDK_V110 is not set
CONFIG_PKG_USING_HPM_SDK_LATEST_VERSION=y
CONFIG_PKG_HPM_SDK_VER="latest"
# end of HPMicro SDK
# end of HAL & SDK Drivers
#
@@ -1017,6 +1055,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_SEAN_WS2812B is not set
# CONFIG_PKG_USING_IC74HC165 is not set
# CONFIG_PKG_USING_IST8310 is not set
# CONFIG_PKG_USING_ST7789_SPI is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers
@@ -1355,21 +1394,26 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# end of Arduino libraries
# end of RT-Thread online packages
CONFIG_SOC_HPM5300_SERIES=y
#
# Hardware Drivers Config
#
CONFIG_SOC_HPM5000=y
CONFIG_SOC_HPM5300=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_GPIO_IRQ_PRIORITY=1
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
CONFIG_BSP_UART0_RX_BUFSIZE=128
CONFIG_BSP_UART0_TX_BUFSIZE=0
CONFIG_BSP_UART0_IRQ_PRIORITY=1
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_GPTMR is not set
# CONFIG_BSP_USING_I2C is not set
bsp/hpmicro/hpm5301evklite/SConstruct
-10
View File
@@ -55,17 +55,7 @@ GDB = rtconfig.GDB
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
hpm_library = 'hpm_sdk'
rtconfig.BSP_LIBRARY_TYPE = hpm_library
# include soc
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library,'soc', rtconfig.SOC_FAMILY, rtconfig.CHIP_NAME, 'SConscript')))
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'SConscript')))
# include components
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'components', 'SConscript')))
# includes rtt drivers
bsp/hpmicro/hpm5301evklite/board/Kconfig
+249 -26
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5301evklite/board/board.c
+107 -90
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5301evklite/board/board.h
+145 -76
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5301evklite/board/linker_scripts/flash_rtt.ld → bsp/hpmicro/hpm5301evklite/board/linker_scripts/gcc/flash_rtt.ld
+68 -34
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5301evklite/board/linker_scripts/ram_rtt.ld → bsp/hpmicro/hpm5301evklite/board/linker_scripts/gcc/ram_rtt.ld
+83 -65
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5301evklite/board/pinmux.c
+81 -30
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 HPMicro
* Copyright (c) 2023,2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -15,15 +15,6 @@
#include "board.h"
#include "pinmux.h"
void init_xtal_pins(void)
{
/* Package QFN32 should be set PA30 and PA31 pins as analog type to enable xtal. */
/*
* HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
* HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
*/
}
void init_py_pins_as_pgpio(void)
{
/* Set PY00-PY05 default function to PGPIO */
@@ -40,10 +31,6 @@ void init_uart_pins(UART_Type *ptr)
if (ptr == HPM_UART0) {
HPM_IOC->PAD[IOC_PAD_PA00].FUNC_CTL = IOC_PA00_FUNC_CTL_UART0_TXD;
HPM_IOC->PAD[IOC_PAD_PA01].FUNC_CTL = IOC_PA01_FUNC_CTL_UART0_RXD;
} else if (ptr == HPM_UART2) {
HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_UART2_TXD;
HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_UART2_RXD;
HPM_IOC->PAD[IOC_PAD_PB10].FUNC_CTL = IOC_PB10_FUNC_CTL_UART2_DE;
} else if (ptr == HPM_UART3) {
HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_UART3_TXD;
HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PB14_FUNC_CTL_UART3_RXD;
@@ -73,8 +60,11 @@ void init_i2c_pins(I2C_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_I2C2_SDA | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
HPM_IOC->PAD[IOC_PAD_PB08].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
HPM_IOC->PAD[IOC_PAD_PB09].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
} else {
;
} else if (ptr == HPM_I2C3) {
HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PB13_FUNC_CTL_I2C3_SCL | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PB12_FUNC_CTL_I2C3_SDA | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
HPM_IOC->PAD[IOC_PAD_PB13].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
HPM_IOC->PAD[IOC_PAD_PB12].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
}
}
@@ -96,6 +86,12 @@ void init_spi_pins(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI;
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA27].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA28].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA29].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
@@ -106,13 +102,26 @@ void init_spi_pins_with_gpio_as_cs(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI;
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA27].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA28].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PA29].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
void init_gptmr_pins(GPTMR_Type *ptr)
{
(void) ptr;
if (ptr == HPM_GPTMR0) {
HPM_IOC->PAD[IOC_PAD_PB10].FUNC_CTL = IOC_PB10_FUNC_CTL_GPTMR0_COMP_2;
HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_GPTMR0_COMP_3;
HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_GPTMR0_CAPT_1;
HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_GPTMR0_COMP_1;
} else if (ptr == HPM_GPTMR1) {
HPM_IOC->PAD[IOC_PAD_PA02].FUNC_CTL = IOC_PA02_FUNC_CTL_GPTMR1_COMP_1;
}
}
void init_butn_pins(void)
@@ -152,22 +161,24 @@ void init_adc_bldc_pins(void)
HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IV: ADC0.6 /ADC1.6 */
}
void init_usb_pins(void)
void init_usb_pins(USB_Type *ptr)
{
HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
if (ptr == HPM_USB0) {
HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
/* USB0_ID */
HPM_IOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_USB0_ID;
/* USB0_OC */
HPM_IOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_USB0_OC;
/* USB0_PWR */
HPM_IOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_USB0_PWR;
/* USB0_ID */
HPM_IOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_USB0_ID;
/* USB0_OC */
HPM_IOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_USB0_OC;
/* USB0_PWR */
HPM_IOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_USB0_PWR;
/* PY port IO needs to configure PIOC as well */
HPM_PIOC->PAD[IOC_PAD_PY00].FUNC_CTL = PIOC_PY00_FUNC_CTL_SOC_GPIO_Y_00;
HPM_PIOC->PAD[IOC_PAD_PY01].FUNC_CTL = PIOC_PY01_FUNC_CTL_SOC_GPIO_Y_01;
HPM_PIOC->PAD[IOC_PAD_PY02].FUNC_CTL = PIOC_PY02_FUNC_CTL_SOC_GPIO_Y_02;
/* PY port IO needs to configure PIOC as well */
HPM_PIOC->PAD[IOC_PAD_PY00].FUNC_CTL = PIOC_PY00_FUNC_CTL_SOC_GPIO_Y_00;
HPM_PIOC->PAD[IOC_PAD_PY01].FUNC_CTL = PIOC_PY01_FUNC_CTL_SOC_GPIO_Y_01;
HPM_PIOC->PAD[IOC_PAD_PY02].FUNC_CTL = PIOC_PY02_FUNC_CTL_SOC_GPIO_Y_02;
}
}
void init_led_pins_as_gpio(void)
@@ -175,3 +186,43 @@ void init_led_pins_as_gpio(void)
HPM_IOC->PAD[IOC_PAD_PA10].FUNC_CTL = IOC_PA10_FUNC_CTL_GPIO_A_10;
}
/* for uart_rx_line_status case, need to a gpio pin to sent break signal */
void init_uart_break_signal_pin(void)
{
HPM_IOC->PAD[IOC_PAD_PA26].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_GPIO_A_26;
}
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp)
{
if (ptr == HPM_GPTMR0) {
if (as_comp) {
switch (channel) {
case 1:
HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_GPTMR0_COMP_1;
break;
case 2:
HPM_IOC->PAD[IOC_PAD_PB10].FUNC_CTL = IOC_PB10_FUNC_CTL_GPTMR0_COMP_2;
break;
case 3:
HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_GPTMR0_COMP_3;
break;
default:
break;
}
} else {
if (channel == 1) {
HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_GPTMR0_CAPT_1;
}
}
} else if (ptr == HPM_GPTMR1) {
if ((as_comp == true) && (channel == 3)) {
HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PB13_FUNC_CTL_GPTMR1_COMP_3;
}
}
}
void init_clk_ref_pin(void)
{
HPM_IOC->PAD[IOC_PAD_PA09].FUNC_CTL = IOC_PA09_FUNC_CTL_SOC_REF0;
}
bsp/hpmicro/hpm5301evklite/board/pinmux.h
+7 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 HPMicro
* Copyright (c) 2023,2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -11,9 +11,9 @@
#ifdef __cplusplus
extern "C" {
#endif
void init_xtal_pins(void);
void init_py_pins_as_pgpio(void);
void init_uart_pins(UART_Type *ptr);
void init_uart_pin_as_gpio(UART_Type *ptr);
void init_i2c_pins(I2C_Type *ptr);
void init_gpio_pins(void);
void init_spi_pins(SPI_Type *ptr);
@@ -23,8 +23,12 @@ void init_butn_pins(void);
void init_acmp_pins(void);
void init_adc_pins(void);
void init_adc_bldc_pins(void);
void init_usb_pins(void);
void init_usb_pins(USB_Type *ptr);
void init_led_pins_as_gpio(void);
void init_uart_break_signal_pin(void);
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
void init_clk_ref_pin(void);
#ifdef __cplusplus
}
#endif
bsp/hpmicro/hpm5301evklite/board/rtt_board.c
+40 -3
View File
@@ -52,7 +52,7 @@ void rtt_board_init(void)
os_tick_config();
/* Configure the USB pins*/
board_init_usb_pins();
board_init_usb(HPM_USB0);
/* Initialize the UART driver first, because later driver initialization may require the rt_kprintf */
rt_hw_uart_init();
@@ -63,6 +63,7 @@ void rtt_board_init(void)
void app_init_led_pins(void)
{
board_init_led_pins();
gpio_set_pin_output(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN);
gpio_write_pin(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, BOARD_LED_OFF_LEVEL);
}
@@ -96,7 +97,7 @@ void rt_hw_console_output(const char *str)
void app_init_usb_pins(void)
{
board_init_usb_pins();
board_init_usb(HPM_USB0);
}
ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
@@ -108,7 +109,7 @@ ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
void rt_hw_cpu_reset(void)
{
HPM_PPOR->RESET_ENABLE = (1UL << 31);
HPM_PPOR->RESET_ENABLE |= (1UL << 31);
HPM_PPOR->SOFTWARE_RESET = 1000U;
while(1) {
@@ -117,3 +118,39 @@ void rt_hw_cpu_reset(void)
}
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reset, reset the board);
#ifdef RT_USING_CACHE
void rt_hw_cpu_dcache_ops(int ops, void *addr, int size)
{
if (ops == RT_HW_CACHE_FLUSH) {
l1c_dc_flush((uint32_t)addr, size);
} else {
l1c_dc_invalidate((uint32_t)addr, size);
}
}
#endif
uint32_t rtt_board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb)
{
uint32_t freq = 0;
if (ptr == HPM_ADC0) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc0, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc0, clk_adc_src_ana0);
clock_set_source_divider(clock_ana0, clk_src_pll0_clk2, 2U);
}
clock_add_to_group(clock_adc0, 0);
freq = clock_get_frequency(clock_adc0);
}
return freq;
}
#ifdef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER
extern void hpm_isr_usb0(void);
RTT_DECLARE_EXT_ISR_M(IRQn_USB0, hpm_isr_usb0)
#endif
bsp/hpmicro/hpm5301evklite/board/rtt_board.h
+15 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 hpmicro
* Copyright (c) 2021 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -10,8 +10,10 @@
#include "hpm_common.h"
#include "hpm_soc.h"
#include <drv_gpio.h>
#include "board.h"
/* gpio section */
#define APP_LED0 (0U)
#define APP_LED0_PIN_NUM GET_PIN(A, 10)
#define APP_LED_ON (1)
#define APP_LED_OFF (0)
@@ -21,13 +23,23 @@
/* mchtimer section */
#define BOARD_MCHTMR_FREQ_IN_HZ (24000000UL)
/* gptmr as os_tick */
#define BOARD_OS_TIMER HPM_GPTMR0
#define BOARD_OS_TIMER_CH 1
#define BOARD_OS_TIMER_IRQ IRQn_GPTMR0
#define BOARD_OS_TIMER_CLK_NAME (clock_gptmr0)
/* CAN section */
#define BOARD_CAN_NAME "can0"
#define BOARD_CAN_HWFILTER_INDEX (0U)
/* UART section */
#define BOARD_UART_NAME "uart2"
#define BOARD_UART_RX_BUFFER_SIZE BSP_UART2_RX_BUFSIZE
#define BOARD_UART_NAME "uart3"
#define BOARD_UART_RX_BUFFER_SIZE BSP_UART3_RX_BUFSIZE
/* ADC section */
#define BOARD_ADC_NAME BOARD_APP_ADC16_NAME
#define BOARD_ADC_CHANNEL BOARD_APP_ADC16_CH_1
#define IRQn_PendSV IRQn_DEBUG0
bsp/hpmicro/hpm5301evklite/rtconfig.h
+22 -2
View File
@@ -61,7 +61,7 @@
/* end of rt_strnlen options */
/* end of klibc options */
#define RT_NAME_MAX 8
#define RT_NAME_MAX 16
#define RT_CPUS_NR 1
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
@@ -76,6 +76,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 1024
#define RT_USING_CPU_USAGE_TRACER
/* kservice options */
@@ -104,6 +105,8 @@
#define RT_VER_NUM 0x50201
#define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */
#define ARCH_RISCV
#define ARCH_RISCV32
/* RT-Thread Components */
@@ -300,6 +303,20 @@
/* NXP HAL & SDK Drivers */
/* end of NXP HAL & SDK Drivers */
/* NUVOTON Drivers */
/* end of NUVOTON Drivers */
/* GD32 Drivers */
/* end of GD32 Drivers */
/* HPMicro SDK */
#define PKG_USING_HPM_SDK
#define PKG_USING_HPM_SDK_LATEST_VERSION
/* end of HPMicro SDK */
/* end of HAL & SDK Drivers */
/* sensors drivers */
@@ -379,18 +396,21 @@
/* end of Arduino libraries */
/* end of RT-Thread online packages */
#define SOC_HPM5300_SERIES
/* Hardware Drivers Config */
#define SOC_HPM5000
#define SOC_HPM5300
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_GPIO_IRQ_PRIORITY 1
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_UART0_RX_BUFSIZE 128
#define BSP_UART0_TX_BUFSIZE 0
#define BSP_UART0_IRQ_PRIORITY 1
/* end of On-chip Peripheral Drivers */
/* end of Hardware Drivers Config */
bsp/hpmicro/hpm5301evklite/rtconfig.py
+39 -6
View File
@@ -1,8 +1,41 @@
# Copyright 2021-2023 HPMicro
# Copyright 2021-2025 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
def bsp_pkg_check():
import subprocess
need_update = True
for p in os.listdir("packages"):
if p.startswith("hpm_sdk-"):
need_update = False
break
if need_update:
print("\n===============================================================================")
print("Dependency packages missing, please running 'pkgs --update'...")
print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
print("===============================================================================")
exit(1)
RegisterPreBuildingAction(bsp_pkg_check)
# toolchains options
ARCH='risc-v'
@@ -80,27 +113,27 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'ram_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'flash_debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
elif BUILD == 'flash_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
else:
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
LFLAGS += ' -T ' + LINKER_FILE
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
bsp/hpmicro/hpm5301evklite/startup/HPM5301/startup.c
+129 -122
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bsp/hpmicro/hpm5301evklite/startup/HPM5301/toolchains/gcc/port_gcc.S
+2 -1
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@@ -5,7 +5,8 @@
*
*/
#include "cpuport.h"
.section .text.entry, "ax"
.align 2
.globl rt_hw_do_after_save_above
.type rt_hw_do_after_save_above,@function
rt_hw_do_after_save_above:
bsp/hpmicro/hpm5e00evk/.config
+1434
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bsp/hpmicro/hpm5e00evk/.cproject
+227
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File diff suppressed because one or more lines are too long
bsp/hpmicro/hpm5e00evk/.project
+27
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@@ -0,0 +1,27 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>blink_led</name>
<comment />
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.rt-thread.studio.rttnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>
bsp/hpmicro/hpm5e00evk/.settings/org.eclipse.core.runtime.prefs
+3
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@@ -0,0 +1,3 @@
content-types/enabled=true
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
eclipse.preferences.version=1
bsp/hpmicro/hpm5e00evk/.settings/projcfg.ini
+20
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@@ -0,0 +1,20 @@
#RT-Thread Studio Project Configuration
# Fri Apr 25 13:53:29 2025
cfg_version=v3.0
board_name=
bsp_version=
bsp_path=
chip_name=
project_base_rtt_bsp=true
is_use_scons_build=true
hardware_adapter=
selected_rtt_version=latest
board_base_nano_proj=false
is_base_example_project=false
example_name=
project_type=rt-thread
os_branch=master
os_version=latest
project_name=blink_led
output_project_path=D:\oss\rt-thread\bsp\hpmicro\hpm6e00evk
bsp/hpmicro/hpm5e00evk/Kconfig
+12
View File
@@ -0,0 +1,12 @@
mainmenu "RT-Thread Configuration"
BSP_DIR := .
RTT_DIR := ../../..
PKGS_DIR := packages
source "$(RTT_DIR)/Kconfig"
osource "$PKGS_DIR/Kconfig"
rsource "../libraries/Kconfig"
rsource "board/Kconfig"
bsp/hpmicro/hpm5e00evk/README.md
+114
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@@ -0,0 +1,114 @@
# HPMicro HPM5E00EVK BSP(Board Support Package) Introduction
[中文页](README_zh.md) |
## Introduction
This document provides brief introduction of the BSP (board support package) for the HPM5E00EVK development board.
The document consists of the following parts:
- HPM5E00EVK Board Resources Introduction
- Quickly Getting Started
- Refreences
By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
## Board Resources Introduction
HPM5E00EVK is a development board based on the RISC-V core launched by HPMicro, with rich on-board resources and on-chip resources for Connectivity, motor control，etc.
![board](figures/board.png)
## Peripheral Condition
Each peripheral supporting condition for this BSP is as follows:
| **On-board Peripherals** | **Support** | **Note** |
| ------------------------ | ----------- | ------------------------------------- |
| USB | √ | |
| QSPI Flash | √ | |
| Ethernet | √ | |
| GPIO | √ | |
| SPI | √ | |
| I2C | √ | |
| PWM | √ | |
| On-Board Debugger | √ | ft2232 |
## Execution Instruction
### Quickly Getting Started
The BSP support being build via the 'scons' command, below is the steps of compiling the example via the 'scons' command
#### Parpare Environment
- Step 1: Prepare [RT-Thread ENV](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)
- Step 2: Prepare [toolcahin](https://github.com/helloeagleyang/riscv32-gnu-toolchain-win/archive/2022.04.12.zip)
- Download the package and extract it into a specified directory, for example: `C:\DevTools\riscv32-gnu-toolchain`
- Step 3: Set environment variable `RTT_RISCV_TOOLCHAIN` to `<TOOLCHAIN_DIR>\bin`
- For example: `C:\DevTools\riscv32-gnu-toolchain\bin`
- Step 4: Prepare [OpenOCD](https://github.com/hpmicro/rtt-debugger-support-package/archive/v0.4.0.zip)
- Download and extract it to specified directory, for example: `C:\DevTools\openocd-hpmicro`
- Add `OpenOCD` environment variable `OPENOCD_HPMICRO` to `<OPENOCD_HPMICRO_DIR>\bin`
- For example: `C:\DevTools\openocd-hpmicro\bin`
#### Configure and Build project
Open RT-Thread ENV command-line, and change directory to this BSP directory, then users can:
- Configure the project via `menuconfig` in `RT-Thread ENV`
- Build the project using `scons -jN`, `N` equals to the number of CPU cores
- Clean the project using `scons -c`
#### Hardware Connection
- Switch BOOT pin to 2'b00
- Connect the `PWR_DEBUG` port to PC via TYPE-C cable
#### Dowload / Debug
- Users can download the project via the below command:
```console
%OPENOCD_HPMICRO%\openocd.exe -f boards\debug_scripts\probes\ft2232.cfg -f boards\debug_scripts\soc\hpm5e00.cfg -f boards\debug_scripts\boards\hpm5e00evk.cfg -c "init; halt; flash write_image erase rtthread.elf; reset; shutdown"
```
- Users can debug the project via the below command:
- Connect debugger via `OpenOCD`:
```console
%OPENOCD_HPMICRO%\openocd.exe -f boards\debug_scripts\probes\ft2232.cfg -f boards\debug_scripts\soc\hpm5e00.cfg -f boards\debug_scripts\boards\hpm5e00evk.cfg
```
- Start Debugger via `GDB`:
```console
%RTT_EXEC_PATH%\riscv32-unknown-elf-gdb.exe rtthread.elf
```
- In the `gdb shell`, type the following commands:
```console
load
c
```
### **Running Results**
Once the project is successfully downloaded, the system runs automatically. The LED on the board will flash periodically.
Connect the serial port of the board to the PC, communicate with it via a serial terminal tool(115200-8-1-N). Reset the board and the startup information of RT-Thread will be observed:
```
\ | /
- RT - Thread Operating System
/ | \ 5.2.2 build Aug 16 2025 18:18:18
2006 - 2025 Copyright by RT-Thread team
```
## **References**
- [RT-Thread Documnent Center](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/README)
- [RT-Thread Env](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md)
- [HPM5E00EVK RT-Thread BSP Package](https://github.com/hpmicro/rtt-bsp-hpm5e00evk)
bsp/hpmicro/hpm5e00evk/README_zh.md
+113
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@@ -0,0 +1,113 @@
# 先楫 HPM5E00EVK BSP(板级支持包)说明
[English](README.md) |
## 简介
本文档为 HPM5E00EVK 的 BSP (板级支持包) 说明。
本文包含如下部分:
- HPM5E00EVK 板级资源介绍
- 快速上手指南
- 参考链接
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 板级资源介绍
HPM5E00EVK 是由先楫半导体推出的一款基于RISCV内核的开发板，带有丰富的片上资源和板上资源，可用于网络互联和电机控制等应用。
开发板外观如下图所示：
![board](figures/board.png)
## 板载外设
本 BSP 目前对外设的支持情况如下:
| **板载外设** | **支持情况** | **备注** |
| ------------------------ | ----------- | ------------------------------------- |
| USB | √ | |
| QSPI Flash | √ | |
| 以太网 | √ | |
| GPIO | √ | |
| SPI | √ | |
| I2C | √ | |
| PWM | √ | |
| 板载调试器 | √ | ft2232 |
## 使用说明
### 快速开始
本BSP支持通过`scons`命令来完成编译，在开始之前，需要先准备好开发所需的环境。
#### 准备环境
- 步骤 1: 准备 [RT-Thread ENV](https://www.rt-thread.org/download.html#download-rt-thread-env-tool)
- 步骤 2: 准备 [toolcahin](https://github.com/helloeagleyang/riscv32-gnu-toolchain-win/archive/2022.04.12.zip)
- 下载并解压到指定的目录，如: `C:\DevTools\riscv32-gnu-toolchain`
- 步骤 3: 设置环境变量： `RTT_RISCV_TOOLCHAIN` 为 `<TOOLCHAIN_DIR>\bin`， 如: `C:\DevTools\riscv32-gnu-toolchain\bin`
- 步骤 4: 准备 [OpenOCD](https://github.com/hpmicro/rtt-debugger-support-package/archive/v0.4.0.zip)
- 下载并解压到指定目录，如: `C:\DevTools\openocd-hpmicro`
- 将 `OPENOCD_HPMICRO`环境变量设置为 `<OPENOCD_HPMICRO_DIR>\bin`，如： `C:\DevTools\openocd-hpmicro\bin`
#### 配置和构建工程
通过 RT-Thread ENV 命令行切换目录到当前BSP所在目录后，用户可以:
- 通过 `menuconfig` 命令 配置RT-Thread BSP的功能
- 通过 `scons -jN` 命令完成构建, 其中`N` 最大值可以指定为CP拥有的物理内核数
- 通过 `scons -c` 命令清除构建
#### 硬件连接
- 将BOOT 引脚拨到2'b00
- 通过 TYPE-C线将板上的 `PWR_DEBUG` 连接到电脑
#### 下载 和 调试
- 通过如下命令完成下载:
```console
%OPENOCD_HPMICRO%\openocd.exe -f boards\debug_scripts\probes\ft2232.cfg -f boards\debug_scripts\soc\hpm5e00.cfg -f boards\debug_scripts\boards\hpm5e00evk.cfg -c "init; halt; flash write_image erase rtthread.elf; reset; shutdown"
```
- 通过如下命令实现调试:
- 通过 `OpenOCD` 来连接开发板:
```console
%OPENOCD_HPMICRO%\openocd.exe -f boards\debug_scripts\probes\ft2232.cfg -f boards\debug_scripts\soc\hpm5e00.cfg -f boards\debug_scripts\boards\hpm5e00evk.cfg
```
- 通过 `GDB` 实现调试:
```console
%RTT_EXEC_PATH%\riscv32-unknown-elf-gdb.exe rtthread.elf
```
- 在`GDB Shell`中使用如下命令来加载和运行:
```console
load
c
```
### **运行结果**
一旦成功下载，程序会自动运行并打印如下结果，板载LED灯会周期性闪烁。
配置好串口终端(串口配置为115200, 8-N-1),按复位键后，串口终端会打印如下日志：
```
\ | /
- RT - Thread Operating System
/ | \ 5.2.2 build Aug 16 2025 18:18:18
2006 - 2025 Copyright by RT-Thread team
```
## **参考链接**
- [RT-Thread 文档中心](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/README)
- [RT-Thread Env](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md)
- [HPM5E00EVK RT-Thread BSP 包](https://github.com/hpmicro/rtt-bsp-hpm5e00evk)
bsp/hpmicro/hpm5e00evk/SConscript
+17
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@@ -0,0 +1,17 @@
# for module compiling
import os
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
ASFLAGS = ' -I' + cwd
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
bsp/hpmicro/hpm5e00evk/SConstruct
+65
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@@ -0,0 +1,65 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
AddOption('--run',
dest = 'run',
type='string',
nargs=1,
action = 'store',
default = "",
help = 'Upload or debug application using openocd')
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(os.path.join(SDK_ROOT, 'libraries')):
libraries_path_prefix = os.path.join(SDK_ROOT, 'libraries')
else:
libraries_path_prefix = os.path.join(os.path.dirname(SDK_ROOT), 'libraries')
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
GDB = rtconfig.GDB
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# includes rtt drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
bsp/hpmicro/hpm5e00evk/applications/SConscript
+14
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@@ -0,0 +1,14 @@
import rtconfig
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPDEFINES=[]
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')
bsp/hpmicro/hpm5e00evk/applications/main.c
+43
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@@ -0,0 +1,43 @@
/*
* Copyright (c) 2021-2024 HPMicro
*
* Change Logs:
* Date Author Notes
* 2021-08-13 Fan YANG first version
*
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "rtt_board.h"
void thread_entry(void *arg);
int main(void)
{
app_init_led_pins();
static uint32_t led_thread_arg = 0;
rt_thread_t led_thread = rt_thread_create("led_th", thread_entry, &led_thread_arg, 1024, 1, 10);
rt_thread_startup(led_thread);
return 0;
}
void thread_entry(void *arg)
{
while(1){
app_led_write(0, APP_LED_ON);
rt_thread_mdelay(500);
app_led_write(0, APP_LED_OFF);
rt_thread_mdelay(500);
app_led_write(1, APP_LED_ON);
rt_thread_mdelay(500);
app_led_write(1, APP_LED_OFF);
rt_thread_mdelay(500);
app_led_write(2, APP_LED_ON);
rt_thread_mdelay(500);
app_led_write(2, APP_LED_OFF);
rt_thread_mdelay(500);
}
}
bsp/hpmicro/hpm5e00evk/board/Kconfig
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bsp/hpmicro/hpm5e00evk/board/SConscript
+18
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@@ -0,0 +1,18 @@
from building import *
cwd = GetCurrentDir()
# add the general drivers
src = Split("""
board.c
rtt_board.c
pinmux.c
fal_flash_port.c
""")
CPPPATH = [cwd]
CPPDEFINES=['D45', 'HPM5E31']
group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
bsp/hpmicro/hpm5e00evk/board/board.c
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bsp/hpmicro/hpm5e00evk/board/board.h
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bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/boards/hpm5e00evk.cfg
+89
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@@ -0,0 +1,89 @@
# Copyright (c) 2024 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
# openocd flash driver argument:
# - option0:
# [31:28] Flash probe type
# 0 - SFDP SDR / 1 - SFDP DDR
# 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
# 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
# 6 - OctaBus DDR (SPI -> OPI DDR)
# 8 - Xccela DDR (SPI -> OPI DDR)
# 10 - EcoXiP DDR (SPI -> OPI DDR)
# [27:24] Command Pads after Power-on Reset
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
# [23:20] Command Pads after Configuring FLASH
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
# [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
# 0 - Not needed
# 1 - QE bit is at bit6 in Status Register 1
# 2 - QE bit is at bit1 in Status Register 2
# 3 - QE bit is at bit7 in Status Register 2
# 4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
# [15:8] Dummy cycles
# 0 - Auto-probed / detected / default value
# Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
# [7:4] Misc.
# 0 - Not used
# 1 - SPI mode
# 2 - Internal loopback
# 3 - External DQS
# [3:0] Frequency option
# 1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
# - option1:
# [31:20] Reserved
# [19:16] IO voltage
# 0 - 3V / 1 - 1.8V
# [15:12] Pin group
# 0 - 1st group / 1 - 2nd group
# [11:8] Connection selection
# 0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
# [7:0] Drive Strength
# 0 - Default value
# xpi0 configs
# - flash driver: hpm_xpi
# - flash ctrl index: 0xF3000000
# - base address: 0x80000000
# - flash size: 0x2000000
# - flash option0: 0x5
# - flash option1: 0x1000
flash bank xpi0 hpm_xpi 0x80000000 0x2000000 1 1 $_TARGET0 0xF3000000 0x5 0x1000
# xpi0_hybrid configs
# - flash driver: hpm_xpi
# - flash ctrl index: 0xF3000000
# - base address: 0xB0000000
# - flash size: 0x2000000
# - flash option0: 0x5
# - flash option1: 0x1000
flash bank xpi0_hybrid hpm_xpi 0xB0000000 0x2000000 1 1 $_TARGET0 0xF3000000 0x5 0x1000
proc init_clock {} {
$::_TARGET0 riscv dmi_write 0x39 0xF4002000
$::_TARGET0 riscv dmi_write 0x3C 0x1
$::_TARGET0 riscv dmi_write 0x39 0xF4002000
$::_TARGET0 riscv dmi_write 0x3C 0x2
$::_TARGET0 riscv dmi_write 0x39 0xF4000800
$::_TARGET0 riscv dmi_write 0x3C 0xFFFFFFFF
$::_TARGET0 riscv dmi_write 0x39 0xF4000810
$::_TARGET0 riscv dmi_write 0x3C 0xFFFFFFFF
$::_TARGET0 riscv dmi_write 0x39 0xF4000820
$::_TARGET0 riscv dmi_write 0x3C 0xFFFFFFFF
$::_TARGET0 riscv dmi_write 0x39 0xF4000830
$::_TARGET0 riscv dmi_write 0x3C 0xFFFFFFFF
echo "clocks has been enabled!"
}
$_TARGET0 configure -event reset-init {
init_clock
}
$_TARGET0 configure -event gdb-attach {
reset halt
}
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/probes/cmsis_dap.cfg
+11
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@@ -0,0 +1,11 @@
# Copyright 2021 hpmicro
# SPDX-License-Identifier: BSD-3-Clause
bindto 0.0.0.0
adapter speed 10000
adapter srst delay 500
source [find interface/cmsis-dap.cfg]
transport select jtag
reset_config srst_only
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/probes/ft2232.cfg
+15
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@@ -0,0 +1,15 @@
# Copyright 2021 hpmicro
# SPDX-License-Identifier: BSD-3-Clause
bindto 0.0.0.0
adapter speed 10000
reset_config trst_and_srst
adapter srst delay 50
adapter driver ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0208 0x020b
ftdi_layout_signal nTRST -data 0x0200 -noe 0x0400
ftdi_layout_signal nSRST -data 0x0100 -noe 0x0800
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/probes/ft232.cfg
+14
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@@ -0,0 +1,14 @@
# Copyright 2021 hpmicro
# SPDX-License-Identifier: BSD-3-Clause
bindto 0.0.0.0
adapter speed 10000
reset_config trst_and_srst
adapter srst delay 50
adapter driver ftdi
ftdi_vid_pid 0x0403 0x6014
ftdi_layout_init 0x0018 0x001b
ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400
ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/probes/jlink.cfg
+11
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@@ -0,0 +1,11 @@
# Copyright 2021 hpmicro
# SPDX-License-Identifier: BSD-3-Clause
bindto 0.0.0.0
adapter speed 10000
adapter srst delay 500
source [find interface/jlink.cfg]
transport select jtag
reset_config srst_only
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/probes/nds_aice_micro.cfg
+14
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@@ -0,0 +1,14 @@
# Copyright 2021 hpmicro
# SPDX-License-Identifier: BSD-3-Clause
bindto 0.0.0.0
adapter speed 10000
adapter srst delay 500
reset_config srst_only
adapter driver ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0008 0x010b
ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400
ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800
bsp/hpmicro/hpm5e00evk/board/debug_scripts/openocd/soc/hpm5e00.cfg
+18
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@@ -0,0 +1,18 @@
# Copyright (c) 2024 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
set _CHIP hpm5e00
set _CPUTAPID 0x1000563D
jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
set _TARGET0 $_CHIP.cpu0
target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
targets $_TARGET0
proc reset_soc {} {
$::_TARGET0 riscv dmi_write 0x39 0xF410001C
$::_TARGET0 riscv dmi_write 0x3C 24000000
}
bsp/hpmicro/hpm5e00evk/board/fal_cfg.h
+40
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@@ -0,0 +1,40 @@
/*
* Copyright (c) 2022 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtconfig.h>
#include <board.h>
#ifdef RT_USING_FAL
#define NOR_FLASH_DEV_NAME "norflash0"
#define NOR_FLASH_MEM_BASE 0x80000000UL
#define NOR_FLASH_SIZE_IN_BYTES 0x1000000UL
/* ===================== Flash device Configuration ========================= */
extern struct fal_flash_dev nor_flash0;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&nor_flash0, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "app", NOR_FLASH_DEV_NAME, 0, 256*1024, 0}, \
{FAL_PART_MAGIC_WORD, "easyflash", NOR_FLASH_DEV_NAME, 256*1024, 256*1024, 0}, \
{FAL_PART_MAGIC_WORD, "download", NOR_FLASH_DEV_NAME, 512*1024, 256*1024, 0}, \
{FAL_PART_MAGIC_WORD, "flashdb", NOR_FLASH_DEV_NAME, 768*1024, 256*1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#endif /* RT_USING_FAL */
#endif /* _FAL_CFG_H_ */
bsp/hpmicro/hpm5e00evk/board/fal_flash_port.c
+268
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bsp/hpmicro/libraries/hpm_sdk/components/codec/wm8960/hpm_wm8960.c → bsp/hpmicro/hpm5e00evk/board/hpm_wm8960.c
+11 -6
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@@ -7,6 +7,7 @@
*
*/
#include <stdio.h>
#include "hpm_wm8960.h"
#ifndef HPM_WM8960_MCLK_TOLERANCE
@@ -491,16 +492,20 @@ hpm_stat_t wm8960_config_input_to_output_mixer(wm8960_control_t *control, uint32
hpm_stat_t wm8960_write_reg(wm8960_control_t *control, uint8_t reg, uint16_t val)
{
uint8_t buff[2];
/* The first 7 bits (B15 to B9) are address bits that select which control register */
/* is accessed. The remaining 9 bits (B8 to B0) are data bits */
buff[0] = (reg << 1) | (uint8_t)((val >> 8U) & 0x0001U);
buff[1] = (uint8_t)(val & 0xFFU);
rt_size_t size;
rt_uint8_t data[2];
data[0] = (reg << 1) | (uint8_t)((val >> 8U) & 0x0001U);
data[1] = (uint8_t)(val & 0xFFU);
size = rt_i2c_master_send(control->i2c_bus, control->slave_address, RT_I2C_WR, data, 2U);
if (size != 2) {
return status_fail;
}
/* record reg val */
wm8960_reg_val[reg] = val;
return i2c_master_write(control->ptr, control->slave_address, buff, 2U);
return status_success;
}
hpm_stat_t wm8960_read_reg(uint8_t reg, uint16_t *val)
bsp/hpmicro/libraries/hpm_sdk/components/codec/wm8960/hpm_wm8960.h → bsp/hpmicro/hpm5e00evk/board/hpm_wm8960.h
+10 -6
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@@ -7,11 +7,15 @@
*
*/
#ifndef _HPM_SGTL5000_H_
#define _HPM_SGTL5000_H_
#ifndef _HPM_WM8960_H_
#define _HPM_WM8960_H_
#include "hpm_i2c_drv.h"
#include "hpm_common.h"
//#include "hpm_i2c_drv.h"
//#include "hpm_common.h"
#include <rtthread.h>
#include <rtdevice.h>
#include "rtt_board.h"
#include "drivers/dev_i2c.h"
#include "hpm_wm8960_regs.h"
#define WM8960_I2C_ADDR 0x1A
@@ -81,7 +85,7 @@ typedef struct wm8960_config {
} wm8960_config_t;
typedef struct {
I2C_Type *ptr; /* I2C bus */
struct rt_i2c_bus_device *i2c_bus; /* I2C bus device */
uint8_t slave_address; /* code device address */
} wm8960_control_t;
@@ -220,4 +224,4 @@ hpm_stat_t wm8960_read_reg(uint8_t reg, uint16_t *val);
hpm_stat_t wm8960_modify_reg(wm8960_control_t *control, uint8_t reg, uint16_t mask, uint16_t val);
#endif /* _HPM_SGTL5000_H_ */
#endif /* _HPM_WM8960_H_ */
bsp/hpmicro/libraries/hpm_sdk/components/codec/wm8960/hpm_wm8960_regs.h → bsp/hpmicro/hpm5e00evk/board/hpm_wm8960_regs.h
View File
bsp/hpmicro/libraries/hpm_sdk/soc/HPM5300/HPM5301/toolchains/gcc/flash_xip.ld → bsp/hpmicro/hpm5e00evk/board/linker_scripts/gcc/flash_hybrid_rtt.ld
+142 -126
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File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm5e00evk/board/linker_scripts/gcc/flash_rtt.ld
+331
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bsp/hpmicro/hpm5e00evk/board/linker_scripts/gcc/flash_rtt_enet.ld
+350
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bsp/hpmicro/hpm5e00evk/board/linker_scripts/gcc/ram_rtt.ld
+265
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bsp/hpmicro/hpm5e00evk/board/pinmux.c
+640
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bsp/hpmicro/hpm5e00evk/board/pinmux.h
+57
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@@ -0,0 +1,57 @@
/*
* Copyright (c) 2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef HPM_PINMUX_H
#define HPM_PINMUX_H
#ifdef __cplusplus
extern "C" {
#endif
void init_uart_pins(UART_Type *ptr);
void init_uart_pin_as_gpio(UART_Type *ptr);
void init_i2c_pins(I2C_Type *ptr);
void init_ppi_pins(void);
void init_sdm_pins(void);
void init_pwm_pin_as_sdm_clock(void);
void init_gpio_pins(void);
void init_spi_pins(SPI_Type *ptr);
void init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
void init_gptmr_pins(GPTMR_Type *ptr);
void init_hall_trgm_pins(void);
void init_qei_trgm_pins(void);
void init_butn_pins(void);
void init_acmp_pins(void);
void init_pwm_pins(PWMV2_Type *ptr);
void init_usb_pins(USB_Type *ptr);
void init_qeo_pins(QEOV2_Type *ptr);
void init_qeiv2_uvw_pins(QEIV2_Type *ptr);
void init_qeiv2_ab_pins(QEIV2_Type *ptr);
void init_qeiv2_abz_pins(QEIV2_Type *ptr);
void init_enet_pins(ENET_Type *ptr);
void init_enet_pps_pins(void);
void init_adc16_pins(void);
void init_adc_bldc_pins(void);
void init_adc_qeiv2_pins(void);
void init_can_pins(MCAN_Type *ptr);
void init_led_pins(void);
void init_led_pins_as_gpio(void);
void init_led_pins_as_pwm(void);
void init_plb_ab_pins(void);
void init_plb_pulse_pins(void);
void init_plb_filter_pins(void);
void init_plb_lin_pins(void);
void init_esc_pins(void);
void init_esc_in_out_pin(void);
void init_eui_pins(EUI_Type *ptr);
void init_uart_break_signal_pin(void);
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
void init_owr_pins(OWR_Type *ptr);
void init_clk_ref_pins(void);
#ifdef __cplusplus
}
#endif
#endif /* HPM_PINMUX_H */
bsp/hpmicro/hpm5e00evk/board/rtt_board.c
+175
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@@ -0,0 +1,175 @@
/*
* Copyright (c) 2023-2024 HPMicro
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include "board.h"
#include "rtt_board.h"
#include "hpm_uart_drv.h"
#include "hpm_gpio_drv.h"
#include "hpm_pmp_drv.h"
#include "assert.h"
#include "hpm_clock_drv.h"
#include "hpm_sysctl_drv.h"
#include <rthw.h>
#include <rtthread.h>
#include "hpm_dma_mgr.h"
#include "hpm_mchtmr_drv.h"
extern int rt_hw_uart_init(void);
void os_tick_config(void);
void rtt_board_init(void);
void rt_hw_board_init(void)
{
rtt_board_init();
/* Call the RT-Thread Component Board Initialization */
rt_components_board_init();
}
void os_tick_config(void)
{
sysctl_config_clock(HPM_SYSCTL, clock_node_mchtmr0, clock_source_osc0_clk0, 1);
sysctl_add_resource_to_cpu0(HPM_SYSCTL, sysctl_resource_mchtmr0);
mchtmr_set_compare_value(HPM_MCHTMR, BOARD_MCHTMR_FREQ_IN_HZ / RT_TICK_PER_SECOND);
enable_mchtmr_irq();
}
void rtt_board_init(void)
{
board_init_clock();
board_init_console();
board_init_pmp();
dma_mgr_init();
/* initialize memory system */
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
/* Configure the OS Tick */
os_tick_config();
/* Initialize the UART driver first, because later driver initialization may require the rt_kprintf */
rt_hw_uart_init();
/* Set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
void app_init_led_pins(void)
{
board_init_led_pins();
gpio_set_pin_output(APP_LED0_GPIO_CTRL, APP_LED0_GPIO_INDEX, APP_LED0_GPIO_PIN);
gpio_write_pin(APP_LED0_GPIO_CTRL, APP_LED0_GPIO_INDEX, APP_LED0_GPIO_PIN, APP_LED_OFF);
}
void app_led_write(uint32_t index, bool state)
{
switch (index)
{
case 0:
gpio_write_pin(APP_LED0_GPIO_CTRL, APP_LED0_GPIO_INDEX, APP_LED0_GPIO_PIN, state);
break;
default:
/* Suppress the toolchain warnings */
break;
}
}
void rt_hw_console_output(const char *str)
{
while (*str != '\0')
{
uart_send_byte(BOARD_APP_UART_BASE, *str++);
}
}
void app_init_usb_pins(void)
{
board_init_usb(HPM_USB0);
}
ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
{
HPM_MCHTMR->MTIMECMP = HPM_MCHTMR->MTIME + BOARD_MCHTMR_FREQ_IN_HZ / RT_TICK_PER_SECOND;
rt_tick_increase();
}
void rt_hw_cpu_reset(void)
{
HPM_PPOR->RESET_ENABLE |= (1UL << 31);
HPM_PPOR->SOFTWARE_RESET = 1000U;
while(1) {
}
}
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reset, reset the board);
#ifdef RT_USING_CACHE
void rt_hw_cpu_dcache_ops(int ops, void *addr, int size)
{
if (ops == RT_HW_CACHE_FLUSH) {
l1c_dc_flush((uint32_t)addr, size);
} else {
l1c_dc_invalidate((uint32_t)addr, size);
}
}
#endif
uint32_t rtt_board_init_adc16_clock(void *ptr, bool clk_src_ahb) /* motor system should be use clk_adc_src_ahb0 */
{
uint32_t freq = 0;
if (ptr == (void *)HPM_ADC0) {
clock_add_to_group(clock_adc0, 0);
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc0, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from ANA (@200MHz by default)*/
clock_set_adc_source(clock_adc0, clk_adc_src_ana0);
clock_set_source_divider(clock_ana0, clk_src_pll1_clk0, 4U);
}
freq = clock_get_frequency(clock_adc0);
} else if (ptr == (void *)HPM_ADC1) {
clock_add_to_group(clock_adc1, 0);
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc1, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from ANA (@200MHz by default)*/
clock_set_adc_source(clock_adc1, clk_adc_src_ana1);
clock_set_source_divider(clock_ana0, clk_src_pll1_clk0, 4U);
}
freq = clock_get_frequency(clock_adc1);
} else {
;
}
return freq;
}
uint32_t rtt_board_init_pwm_clock(PWMV2_Type *ptr)
{
uint32_t freq = 0;
if (ptr == HPM_PWM0) {
clock_add_to_group(clock_pwm0, 0);
freq = clock_get_frequency(clock_pwm0);
} else if (ptr == HPM_PWM1) {
clock_add_to_group(clock_pwm1, 0);
freq = clock_get_frequency(clock_pwm1);
} else {
}
return freq;
}
#ifdef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER
extern void hpm_isr_usb0(void);
RTT_DECLARE_EXT_ISR_M(IRQn_USB0, hpm_isr_usb0)
#endif
bsp/hpmicro/hpm5e00evk/board/rtt_board.h
+93
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@@ -0,0 +1,93 @@
/*
* Copyright (c) 2021 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef _RTT_BOARD_H
#define _RTT_BOARD_H
#include "hpm_common.h"
#include "hpm_soc.h"
#include "board.h"
/* gpio section */
#define APP_LED0 (0U)
#define APP_LED0_GPIO_CTRL HPM_GPIO0
#define APP_LED0_GPIO_INDEX GPIO_DI_GPIOC
#define APP_LED0_GPIO_PIN 28
#define APP_LED_ON (1)
#define APP_LED_OFF (0)
/* mchtimer section */
#define BOARD_MCHTMR_FREQ_IN_HZ (24000000UL)
/* gptmr as os_tick */
#define BOARD_OS_TIMER HPM_GPTMR0
#define BOARD_OS_TIMER_CH 1
#define BOARD_OS_TIMER_IRQ IRQn_GPTMR0
#define BOARD_OS_TIMER_CLK_NAME (clock_gptmr0)
/* CAN section */
#define BOARD_CAN_NAME "can1"
#define BOARD_CAN_HWFILTER_INDEX (1U)
/* UART section */
#define BOARD_UART_NAME "uart4"
#define BOARD_UART_RX_BUFFER_SIZE BSP_UART4_RX_BUFSIZE
/* PWM section */
#define BOARD_PWM_NAME "pwm0"
#define BOARD_PWM_CHANNEL (0U)
/* ADC section */
#define BOARD_ADC_NAME BOARD_APP_ADC16_NAME
#define BOARD_ADC_CHANNEL BOARD_APP_ADC16_CH_1
#define IRQn_PendSV IRQn_DEBUG0
#define BOARD_ENET0_INF (1U) /* 0: RMII, 1: RGMII */
#define BOARD_ENET0_INT_REF_CLK (0U)
#define BOARD_ENET0_PHY_RST_TIME (30)
#if BOARD_ENET0_INF
#define BOARD_ENET0_TX_DLY (0U)
#define BOARD_ENET0_RX_DLY (0U)
#endif
#if defined(__USE_ENET_PTP) && __USE_ENET_PTP
#define BOARD_ENET0_PTP_CLOCK (clock_ptp0)
#endif
/***************************************************************
*
* RT-Thread related definitions
*
**************************************************************/
extern unsigned int __heap_start__;
extern unsigned int __heap_end__;
#define RT_HW_HEAP_BEGIN ((void*)&__heap_start__)
#define RT_HW_HEAP_END ((void*)&__heap_end__)
typedef struct {
uint16_t vdd;
uint8_t bus_width;
uint8_t drive_strength;
}sdxc_io_cfg_t;
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
void app_init_led_pins(void);
void app_led_write(uint32_t index, bool state);
void app_init_usb_pins(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _RTT_BOARD_H */
bsp/hpmicro/hpm5e00evk/figures/board.png
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bsp/hpmicro/hpm5e00evk/makefile.targets
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clean2:
-$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(SECONDARY_FLASH)$(SECONDARY_SIZE)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS)
-$(RM) $(OBJS) *.elf
-@echo ' '
*.elf: $(wildcard ../linkscripts/*/*.lds) $(wildcard ../linkscripts/*/*/*.lds)
bsp/hpmicro/hpm5e00evk/rtconfig.h
+418
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bsp/hpmicro/hpm5e00evk/rtconfig.py
+150
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@@ -0,0 +1,150 @@
# Copyright 2021-2025 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
def bsp_pkg_check():
import subprocess
need_update = True
for p in os.listdir("packages"):
if p.startswith("hpm_sdk-"):
need_update = False
break
if need_update:
print("\n===============================================================================")
print("Dependency packages missing, please running 'pkgs --update'...")
print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
print("===============================================================================")
exit(1)
RegisterPreBuildingAction(bsp_pkg_check)
# toolchains options
ARCH='risc-v'
CPU='hpmicro'
SOC_FAMILY='HPM5E00'
CHIP_NAME='HPM5E31'
CROSS_TOOL='gcc'
# bsp lib config
BSP_LIBRARY_TYPE = None
# Fallback toolchain info
FALLBACK_TOOLCHAIN_VENDOR='RISC-V'
FALLBACK_TOOLCHAIN_PKG='RISC-V-GCC-RV32'
FALLBACK_TOOLCHAIN_VER='2022-04-12'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
RTT_EXEC_PATH = os.getenv('RTT_EXEC_PATH')
if RTT_EXEC_PATH != None:
folders = RTT_EXEC_PATH.split(os.sep)
# If the `RT-Thread Env` is from the RT-Thread Studio, generate the RTT_EXEC_PATH using `FALLBACK_TOOLCHAIN_INFO`
if 'arm_gcc' in folders and 'platform' in folders:
RTT_EXEC_PATH = ''
for path in folders:
if path != 'platform':
RTT_EXEC_PATH = RTT_EXEC_PATH + path + os.sep
else:
break
RTT_EXEC_PATH = os.path.join(RTT_EXEC_PATH, 'repo', 'Extract', 'ToolChain_Support_Packages', FALLBACK_TOOLCHAIN_VENDOR, FALLBACK_TOOLCHAIN_PKG, FALLBACK_TOOLCHAIN_VER, 'bin')
# Override the 'RTT_RISCV_TOOLCHAIN' only if the `RT-Thread ENV` is from the RT-Thread Studio
if 'platform' in folders:
os.environ['RTT_RISCV_TOOLCHAIN'] = RTT_EXEC_PATH
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler path, for example, GNU RISC-V toolchain, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
if os.getenv('RTT_RISCV_TOOLCHAIN'):
EXEC_PATH = os.getenv('RTT_RISCV_TOOLCHAIN')
else:
EXEC_PATH = r'/opt/riscv-gnu-gcc/bin'
else:
print("CROSS_TOOL = {} not yet supported" % CROSS_TOOL)
BUILD = 'flash_debug'
if PLATFORM == 'gcc':
PREFIX = 'riscv32-unknown-elf-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
GDB = PREFIX + 'gdb'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip'
ARCH_ABI = ' -mcmodel=medlow '
DEVICE = ARCH_ABI + ' -DUSE_NONVECTOR_MODE=1 ' + ' -ffunction-sections -fdata-sections -fno-common '
CFLAGS = DEVICE
AFLAGS = CFLAGS
LFLAGS = ARCH_ABI + ' --specs=nano.specs --specs=nosys.specs -u _printf_float -u _scanf_float -nostartfiles -Wl,--gc-sections '
CPATH = ''
LPATH = ''
if BUILD == 'ram_debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'ram_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'flash_debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
elif BUILD == 'flash_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
else:
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
LFLAGS += ' -T ' + LINKER_FILE
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
# module setting
CXXFLAGS = CFLAGS + ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
CFLAGS = CFLAGS + ' -std=gnu11'
def dist_handle(BSP_ROOT, dist_dir):
import sys
cwd_path = os.getcwd()
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
from sdk_dist import dist_do_building
dist_do_building(BSP_ROOT, dist_dir)
bsp/hpmicro/hpm5e00evk/rtconfig_preinc.h
+18
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@@ -0,0 +1,18 @@
#ifndef RTCONFIG_PREINC_H__
#define RTCONFIG_PREINC_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread pre-include file */
#define D45
#define HPM6880
#define HPM6E80
#define HPMSOC_HAS_HPMSDK_DMAV2
#define RT_USING_LIBC
#define RT_USING_NEWLIBC
#define _POSIX_C_SOURCE 1
#define _REENT_SMALL
#define __RTTHREAD__
#endif /*RTCONFIG_PREINC_H__*/
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/SConscript
+19
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@@ -0,0 +1,19 @@
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
# add the startup files
src = Glob('*.c')
if rtconfig.PLATFORM == 'gcc':
src += [os.path.join('toolchains', 'gcc', 'start.S')]
src += [os.path.join('toolchains', 'gcc', 'port_gcc.S')]
CPPPATH = [cwd]
CPPDEFINES=['D45', rtconfig.CHIP_NAME]
group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/startup.c
+134
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@@ -0,0 +1,134 @@
/*
* Copyright (c) 2021-2024 HPMicro
*
*
*/
#include "hpm_common.h"
#include "hpm_soc.h"
#include "hpm_l1c_drv.h"
#include <rtthread.h>
void system_init(void);
extern int entry(void);
extern void __libc_init_array(void);
extern void __libc_fini_array(void);
void system_init(void)
{
disable_global_irq(CSR_MSTATUS_MIE_MASK);
disable_irq_from_intc();
enable_irq_from_intc();
enable_global_irq(CSR_MSTATUS_MIE_MASK);
#ifndef CONFIG_NOT_ENABLE_ICACHE
l1c_ic_enable();
#endif
#ifndef CONFIG_NOT_ENABLE_DCACHE
l1c_dc_enable();
#endif
}
__attribute__((weak)) void c_startup(void)
{
#ifndef __SES_RISCV
uint32_t i, size;
#ifdef FLASH_XIP
extern uint8_t __vector_ram_start__[], __vector_ram_end__[], __vector_load_addr__[];
size = __vector_ram_end__ - __vector_ram_start__;
for (i = 0; i < size; i++) {
*(__vector_ram_start__ + i) = *(__vector_load_addr__ + i);
}
#endif
extern uint8_t __etext[];
extern uint8_t __bss_start__[], __bss_end__[];
extern uint8_t __tbss_start__[], __tbss_end__[];
extern uint8_t __tdata_start__[], __tdata_end__[];
extern uint8_t __fast_load_addr__[];
extern uint8_t __noncacheable_init_load_addr__[];
extern uint8_t __data_load_addr__[];
extern uint8_t __tdata_load_addr__[];
extern uint8_t __data_start__[], __data_end__[];
extern uint8_t __noncacheable_bss_start__[], __noncacheable_bss_end__[];
extern uint8_t __ramfunc_start__[], __ramfunc_end__[];
extern uint8_t __noncacheable_init_start__[], __noncacheable_init_end__[];
/* tbss section */
size = __tbss_end__ - __tbss_start__;
for (i = 0; i < size; i++) {
*(__tbss_start__ + i) = 0;
}
/* bss section */
size = __bss_end__ - __bss_start__;
for (i = 0; i < size; i++) {
*(__bss_start__ + i) = 0;
}
/* noncacheable bss section */
size = __noncacheable_bss_end__ - __noncacheable_bss_start__;
for (i = 0; i < size; i++) {
*(__noncacheable_bss_start__ + i) = 0;
}
/* tdata section LMA: etext */
size = __tdata_end__ - __tdata_start__;
for (i = 0; i < size; i++) {
*(__tdata_start__ + i) = *(__tdata_load_addr__ + i);
}
/* data section LMA: etext */
size = __data_end__ - __data_start__;
for (i = 0; i < size; i++) {
*(__data_start__ + i) = *(__data_load_addr__ + i);
}
/* ramfunc section LMA: etext + data length */
size = __ramfunc_end__ - __ramfunc_start__;
for (i = 0; i < size; i++) {
*(__ramfunc_start__ + i) = *(__fast_load_addr__ + i);
}
/* noncacheable init section LMA: etext + data length + ramfunc length */
size = __noncacheable_init_end__ - __noncacheable_init_start__;
for (i = 0; i < size; i++) {
*(__noncacheable_init_start__ + i) = *(__noncacheable_init_load_addr__ + i);
}
#endif
}
__attribute__((weak)) int main(void)
{
while(1);
}
void reset_handler(void)
{
/**
* Disable preemptive interrupt
*/
HPM_PLIC->FEATURE = 0;
/*
* Initialize LMA/VMA sections.
* Relocation for any sections that need to be copied from LMA to VMA.
*/
c_startup();
/* Call platform specific hardware initialization */
system_init();
#ifndef __SES_RISCV
/* Do global constructors */
__libc_init_array();
#endif
/* Entry function */
entry();
}
__attribute__((weak)) void _init(void)
{
}
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/toolchains/gcc/port_gcc.S
+24
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@@ -0,0 +1,24 @@
/*
* Copyright (c) 2021-2023 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include "cpuport.h"
.section .text.entry, "ax"
.align 2
.globl rt_hw_do_after_save_above
.type rt_hw_do_after_save_above,@function
rt_hw_do_after_save_above:
addi sp, sp, -4
STORE ra, 0 * REGBYTES(sp)
csrr t1, mcause
andi t1, t1, 0x3FF
/* get ISR */
la t2, trap_entry
jalr t2
LOAD ra, 0 * REGBYTES(sp)
addi sp, sp, 4
ret
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/toolchains/gcc/start.S
+91
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@@ -0,0 +1,91 @@
/*
* Copyright (c) 2021-2023 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <rtconfig.h>
#include "hpm_csr_regs.h"
.section .start, "ax"
.global _start
.type _start,@function
_start:
/* Initialize global pointer */
.option push
.option norelax
la gp, __global_pointer$
la tp, __thread_pointer
.option pop
#ifdef __riscv_flen
/* Enable FPU */
li t0, CSR_MSTATUS_FS_MASK
csrrs t0, mstatus, t0
/* Initialize FCSR */
fscsr zero
#endif
#ifdef INIT_EXT_RAM_FOR_DATA
la t0, _stack_in_dlm
mv sp, t0
call _init_ext_ram
#endif
/* Initialize stack pointer */
la t0, _stack
mv sp, t0
#ifdef __nds_execit
/* Initialize EXEC.IT table */
la t0, _ITB_BASE_
csrw uitb, t0
#endif
#ifdef __riscv_flen
/* Enable FPU */
li t0, CSR_MSTATUS_FS_MASK
csrrs t0, mstatus, t0
/* Initialize FCSR */
fscsr zero
#endif
#ifdef HPM_USING_VECTOR_PREEMPTED_MODE
/* Initial machine trap-vector Base */
la t0, __vector_table
csrw mtvec, t0
/* Enable vectored external PLIC interrupt */
csrsi CSR_MMISC_CTL, 2
#else
/* Initial machine trap-vector Base */
la t0, SW_handler
csrw mtvec, t0
/* Disable vectored external PLIC interrupt */
csrci CSR_MMISC_CTL, 2
#endif
/* System reset handler */
call reset_handler
/* Infinite loop, if returned accidently */
1: j 1b
.weak nmi_handler
nmi_handler:
1: j 1b
.weak default_irq_handler
.align 2
default_irq_handler:
1: j 1b
.macro IRQ_HANDLER irq
.weak default_isr_\irq
.set default_isr_\irq, default_irq_handler
.long default_isr_\irq
.endm
#include "vectors.S"
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/toolchains/gcc/vectors.S
+92
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@@ -0,0 +1,92 @@
/*
* Copyright (c) 2021-2024 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
.section .vector_table, "a"
.global __vector_table
.align 9
__vector_table:
.weak default_isr_trap
.set default_isr_trap, SW_handler
.long default_isr_trap
IRQ_HANDLER 1 /* GPIO0_A IRQ handler */
IRQ_HANDLER 2 /* GPIO0_B IRQ handler */
IRQ_HANDLER 3 /* GPIO0_C IRQ handler */
IRQ_HANDLER 4 /* GPIO0_D IRQ handler */
IRQ_HANDLER 5 /* GPIO0_E IRQ handler */
IRQ_HANDLER 6 /* GPIO0_F IRQ handler */
IRQ_HANDLER 7 /* GPIO0_V IRQ handler */
IRQ_HANDLER 8 /* GPIO0_W IRQ handler */
IRQ_HANDLER 9 /* GPIO0_X IRQ handler */
IRQ_HANDLER 10 /* GPIO0_Y IRQ handler */
IRQ_HANDLER 11 /* GPTMR0 IRQ handler */
IRQ_HANDLER 12 /* GPTMR1 IRQ handler */
IRQ_HANDLER 13 /* GPTMR2 IRQ handler */
IRQ_HANDLER 14 /* GPTMR3 IRQ handler */
IRQ_HANDLER 15 /* OWR0 IRQ handler */
IRQ_HANDLER 16 /* OWR1 IRQ handler */
IRQ_HANDLER 17 /* EUI0 IRQ handler */
IRQ_HANDLER 18 /* EUI1 IRQ handler */
IRQ_HANDLER 19 /* UART0 IRQ handler */
IRQ_HANDLER 20 /* UART1 IRQ handler */
IRQ_HANDLER 21 /* UART2 IRQ handler */
IRQ_HANDLER 22 /* UART3 IRQ handler */
IRQ_HANDLER 23 /* UART4 IRQ handler */
IRQ_HANDLER 24 /* UART5 IRQ handler */
IRQ_HANDLER 25 /* UART6 IRQ handler */
IRQ_HANDLER 26 /* UART7 IRQ handler */
IRQ_HANDLER 27 /* I2C0 IRQ handler */
IRQ_HANDLER 28 /* I2C1 IRQ handler */
IRQ_HANDLER 29 /* I2C2 IRQ handler */
IRQ_HANDLER 30 /* I2C3 IRQ handler */
IRQ_HANDLER 31 /* SPI0 IRQ handler */
IRQ_HANDLER 32 /* SPI1 IRQ handler */
IRQ_HANDLER 33 /* SPI2 IRQ handler */
IRQ_HANDLER 34 /* SPI3 IRQ handler */
IRQ_HANDLER 35 /* TSNS IRQ handler */
IRQ_HANDLER 36 /* MBX0A IRQ handler */
IRQ_HANDLER 37 /* MBX0B IRQ handler */
IRQ_HANDLER 38 /* EWDG0 IRQ handler */
IRQ_HANDLER 39 /* EWDG1 IRQ handler */
IRQ_HANDLER 40 /* HDMA IRQ handler */
IRQ_HANDLER 41 /* LOBS IRQ handler */
IRQ_HANDLER 42 /* ADC0 IRQ handler */
IRQ_HANDLER 43 /* ADC1 IRQ handler */
IRQ_HANDLER 44 /* ACMP0[0] IRQ handler */
IRQ_HANDLER 45 /* ACMP0[1] IRQ handler */
IRQ_HANDLER 46 /* MCAN0 IRQ handler */
IRQ_HANDLER 47 /* MCAN1 IRQ handler */
IRQ_HANDLER 48 /* MCAN2 IRQ handler */
IRQ_HANDLER 49 /* MCAN3 IRQ handler */
IRQ_HANDLER 50 /* PTPC IRQ handler */
IRQ_HANDLER 51 /* QEI0 IRQ handler */
IRQ_HANDLER 52 /* QEI1 IRQ handler */
IRQ_HANDLER 53 /* PWM0 IRQ handler */
IRQ_HANDLER 54 /* PWM1 IRQ handler */
IRQ_HANDLER 55 /* SDM0 IRQ handler */
IRQ_HANDLER 56 /* TRGM[0] IRQ handler */
IRQ_HANDLER 57 /* TRGM[1] IRQ handler */
IRQ_HANDLER 58 /* ENET0 IRQ handler */
IRQ_HANDLER 59 /* NTMR0 IRQ handler */
IRQ_HANDLER 60 /* USB0 IRQ handler */
IRQ_HANDLER 61 /* ESC IRQ handler */
IRQ_HANDLER 62 /* ESC_SYNC0 IRQ handler */
IRQ_HANDLER 63 /* ESC_SYNC1 IRQ handler */
IRQ_HANDLER 64 /* ESC_RESET IRQ handler */
IRQ_HANDLER 65 /* XPI0 IRQ handler */
IRQ_HANDLER 66 /* PPI IRQ handler */
IRQ_HANDLER 67 /* XDMA IRQ handler */
IRQ_HANDLER 68 /* PGPIO IRQ handler */
IRQ_HANDLER 69 /* PEWDG IRQ handler */
IRQ_HANDLER 70 /* PTMR IRQ handler */
IRQ_HANDLER 71 /* PUART IRQ handler */
IRQ_HANDLER 72 /* FUSE IRQ handler */
IRQ_HANDLER 73 /* DGO_PAD_WAKEUP IRQ handler */
IRQ_HANDLER 74 /* DGO_CNT_WAKEUP IRQ handler */
IRQ_HANDLER 75 /* BROWNOUT IRQ handler */
IRQ_HANDLER 76 /* SYSCTL IRQ handler */
IRQ_HANDLER 77 /* CPU0 IRQ handler */
IRQ_HANDLER 78 /* DEBUG0 IRQ handler */
IRQ_HANDLER 79 /* DEBUG1 IRQ handler */
bsp/hpmicro/hpm5e00evk/startup/HPM5E31/trap.c
+311
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bsp/hpmicro/hpm5e00evk/startup/SConscript
+13
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@@ -0,0 +1,13 @@
# for module compiling
import os
Import('rtconfig')
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
objs = []
objs = objs + SConscript(os.path.join(cwd, rtconfig.CHIP_NAME, 'SConscript'))
ASFLAGS = ' -I' + cwd
Return('objs')
bsp/hpmicro/hpm6200evk/.config
+54 -25
View File
@@ -104,11 +104,9 @@
#
# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
# end of rt_strnlen options
# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
# end of klibc options
CONFIG_RT_NAME_MAX=8
CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_AMP is not set
@@ -131,7 +129,7 @@ CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice options
@@ -183,6 +181,9 @@ CONFIG_RT_VER_NUM=0x50201
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# end of RT-Thread Kernel
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV32=y
#
# RT-Thread Components
#
@@ -190,7 +191,7 @@ CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
# CONFIG_RT_USING_LEGACY is not set
CONFIG_RT_USING_LEGACY=y
CONFIG_RT_USING_MSH=y
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_USING_MSH=y
@@ -199,6 +200,7 @@ CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
# CONFIG_FINSH_USING_WORD_OPERATION is not set
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
@@ -211,22 +213,7 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
#
# DFS: device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_POSIX=y
CONFIG_DFS_USING_WORKDIR=y
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_DFS_FD_MAX=16
CONFIG_RT_USING_DFS_V1=y
# CONFIG_RT_USING_DFS_V2 is not set
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
# CONFIG_RT_USING_DFS_ELMFAT is not set
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_CROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_TMPFS is not set
# CONFIG_RT_USING_DFS_MQUEUE is not set
# CONFIG_RT_USING_DFS is not set
# end of DFS: device virtual file system
# CONFIG_RT_USING_FAL is not set
@@ -240,10 +227,11 @@ CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
# CONFIG_RT_USING_SERIAL_V1 is not set
CONFIG_RT_USING_SERIAL_V2=y
# CONFIG_RT_SERIAL_BUF_STRATEGY_DROP is not set
CONFIG_RT_SERIAL_BUF_STRATEGY_OVERWRITE=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_SERIAL_BYPASS is not set
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_CPUTIME is not set
@@ -390,6 +378,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
# CONFIG_PKG_USING_ESP_HOSTED is not set
#
# Wi-Fi
@@ -497,6 +486,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_QMODBUS is not set
# CONFIG_PKG_USING_PNET is not set
# CONFIG_PKG_USING_OPENER is not set
# CONFIG_PKG_USING_FREEMQTT is not set
# end of IoT - internet of things
#
@@ -586,6 +576,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_MCOREDUMP is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
@@ -631,6 +622,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_ZDEBUG is not set
# CONFIG_PKG_USING_RVBACKTRACE is not set
# CONFIG_PKG_USING_HPATCHLITE is not set
# CONFIG_PKG_USING_THREAD_METRIC is not set
# end of tools packages
#
@@ -724,6 +716,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_RMP is not set
# CONFIG_PKG_USING_R_RHEALSTONE is not set
# CONFIG_PKG_USING_HEARTBEAT is not set
# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
# end of system packages
#
@@ -805,6 +798,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_NUCLEI_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_MM32 is not set
@@ -847,6 +842,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# HC32 DDL Drivers
#
# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set
# end of HC32 DDL Drivers
#
@@ -860,6 +859,31 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
# end of NXP HAL & SDK Drivers
#
# NUVOTON Drivers
#
# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set
# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set
# end of NUVOTON Drivers
#
# GD32 Drivers
#
# CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
# end of GD32 Drivers
#
# HPMicro SDK
#
CONFIG_PKG_USING_HPM_SDK=y
CONFIG_PKG_HPM_SDK_PATH="/packages/peripherals/hal-sdk/hpmicro/hpm_sdk"
# CONFIG_PKG_USING_HPM_SDK_V110 is not set
CONFIG_PKG_USING_HPM_SDK_LATEST_VERSION=y
CONFIG_PKG_HPM_SDK_VER="latest"
# end of HPMicro SDK
# end of HAL & SDK Drivers
#
@@ -1031,6 +1055,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_SEAN_WS2812B is not set
# CONFIG_PKG_USING_IC74HC165 is not set
# CONFIG_PKG_USING_IST8310 is not set
# CONFIG_PKG_USING_ST7789_SPI is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers
@@ -1369,10 +1394,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# end of Arduino libraries
# end of RT-Thread online packages
CONFIG_SOC_HPM6200_SERIES=y
#
# Hardware Drivers Config
#
CONFIG_SOC_HPM6000=y
CONFIG_SOC_HPM6200=y
#
# On-chip Peripheral Drivers
@@ -1382,6 +1409,8 @@ CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_UART0_RX_USING_DMA is not set
# CONFIG_BSP_UART0_TX_USING_DMA is not set
CONFIG_BSP_UART0_RX_BUFSIZE=128
CONFIG_BSP_UART0_TX_BUFSIZE=0
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_SPI is not set
bsp/hpmicro/hpm6200evk/SConstruct
-11
View File
@@ -55,17 +55,6 @@ GDB = rtconfig.GDB
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
hpm_library = 'hpm_sdk'
rtconfig.BSP_LIBRARY_TYPE = hpm_library
# include soc
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library,'soc', rtconfig.SOC_FAMILY, rtconfig.CHIP_NAME, 'SConscript')))
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'SConscript')))
# include components
objs.extend(SConscript(os.path.join(libraries_path_prefix, hpm_library, 'components', 'SConscript')))
# includes rtt drivers
bsp/hpmicro/hpm6200evk/board/Kconfig
+2 -2
View File
@@ -1,8 +1,8 @@
menu "Hardware Drivers Config"
config SOC_HPM6000
config SOC_HPM6200
bool
select SOC_SERIES_HPM6000
select SOC_HPM6200_SERIES
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
bsp/hpmicro/hpm6200evk/board/board.c
+111 -203
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm6200evk/board/board.h
+146 -65
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm6200evk/board/linker_scripts/flash_rtt.ld → bsp/hpmicro/hpm6200evk/board/linker_scripts/gcc/flash_rtt.ld
+55 -22
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2021-2023 HPMicro
* Copyright 2021-2025 HPMicro
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -44,22 +44,26 @@ SECTIONS
.start __app_load_addr__ : {
. = ALIGN(8);
KEEP(*(.start))
. = ALIGN(16);
} > XPI0
__vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
.vectors : AT(__vector_load_addr__) {
. = ALIGN(8);
. = ALIGN(16);
__vector_ram_start__ = .;
KEEP(*(.vector_table))
KEEP(*(.isr_vector))
. = ALIGN(8);
. = ALIGN(16);
__vector_ram_end__ = .;
} > ILM
.fast : AT(etext + __data_end__ - __tdata_start__) {
. = ALIGN(8);
.fast : AT(__fast_load_addr__) {
. = ALIGN(16);
__ramfunc_start__ = .;
*(.fast)
*(.fast.*)
. = ALIGN(16);
/* RT-Thread Core Start */
KEEP(*context_gcc.o(.text* .rodata*))
@@ -80,12 +84,12 @@ SECTIONS
KEEP(*mempool.o (.text .text* .rodata .rodata*))
/* RT-Thread Core End */
. = ALIGN(8);
. = ALIGN(16);
__ramfunc_end__ = .;
} > ILM
.text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
. = ALIGN(8);
.text (__vector_load_addr__ + SIZEOF(.vectors)) : {
. = ALIGN(16);
*(.text)
*(.text*)
*(.rodata)
@@ -110,12 +114,6 @@ SECTIONS
* RT-Thread related sections - Start
*
*********************************************/
/* section information for utest */
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
@@ -149,6 +147,20 @@ SECTIONS
} > XPI0
.eh_frame :
{
__eh_frame_start = .;
KEEP(*(.eh_frame))
__eh_frame_end = .;
} > XPI0
.eh_frame_hdr :
{
KEEP(*(.eh_frame_hdr))
} > XPI0
__eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0;
__eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0;
.rel : {
KEEP(*(.rel*))
} > XPI0
@@ -161,6 +173,16 @@ SECTIONS
KEEP(*(.fast_ram))
} > DLM
__fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init);
.fast_ram.init : AT(__fast_ram_init_load_addr__) {
. = ALIGN(8);
__fast_ram_init_start__ = .;
KEEP(*(.fast_ram.init))
KEEP(*(.fast_ram.init.*))
__fast_ram_init_end__ = .;
. = ALIGN(8);
} > DLM
.bss(NOLOAD) : {
. = ALIGN(8);
__bss_start__ = .;
@@ -181,22 +203,26 @@ SECTIONS
. = ALIGN(8);
__tbss_start__ = .;
*(.tbss*)
*(.gnu.linkonce.tb.*)
*(.tcommon*)
_end = .;
__tbss_end__ = .;
} > DLM
.tdata : AT(etext) {
__tdata_load_addr__ = etext;
.tdata : AT(__tdata_load_addr__) {
. = ALIGN(8);
__tdata_start__ = .;
__thread_pointer = .;
*(.tdata)
*(.tdata*)
*(.gnu.linkonce.td.*)
. = ALIGN(8);
__tdata_end__ = .;
} > DLM
.data : AT(etext + __tdata_end__ - __tdata_start__) {
__data_load_addr__ = etext + SIZEOF(.tdata);
.data : AT(__data_load_addr__) {
. = ALIGN(8);
__data_start__ = .;
__global_pointer$ = . + 0x800;
@@ -224,10 +250,10 @@ SECTIONS
PROVIDE(__init_array_end = .);
. = ALIGN(8);
PROVIDE(__finit_array_start = .);
KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
KEEP(*(.finit_array))
PROVIDE(__finit_array_end = .);
PROVIDE(__fini_array_start = .);
KEEP(*(SORT_BY_INIT_PRIORITY(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE(__fini_array_end = .);
. = ALIGN(8);
PROVIDE(__ctors_start__ = .);
@@ -248,7 +274,10 @@ SECTIONS
PROVIDE (_edata = .);
PROVIDE (edata = .);
} > DLM
__fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
__fast_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.tdata);
__fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init) + SIZEOF(.eh_frame) + SIZEOF(.eh_frame_hdr);
.heap(NOLOAD) : {
. = ALIGN(8);
@@ -268,7 +297,8 @@ SECTIONS
PROVIDE( __rt_rvstack = . );
} > DLM
.noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
__noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.tdata) + SIZEOF(.fast);
.noncacheable.init : AT(__noncacheable_init_load_addr__) {
. = ALIGN(8);
__noncacheable_init_start__ = .;
KEEP(*(.noncacheable.init))
@@ -279,8 +309,11 @@ SECTIONS
.noncacheable.bss (NOLOAD) : {
. = ALIGN(8);
KEEP(*(.noncacheable))
KEEP(*(.noncacheable.non_init))
KEEP(*(.noncacheable.non_init.*))
__noncacheable_bss_start__ = .;
KEEP(*(.noncacheable.bss))
KEEP(*(.noncacheable.bss.*))
__noncacheable_bss_end__ = .;
. = ALIGN(8);
} > NONCACHEABLE_RAM
bsp/hpmicro/hpm6200evk/board/linker_scripts/gcc/flash_usb_nic.ld
+330
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm6200evk/board/linker_scripts/ram_rtt.ld → bsp/hpmicro/hpm6200evk/board/linker_scripts/gcc/ram_rtt.ld
+38 -18
View File
@@ -1,20 +1,20 @@
/*
* Copyright 2021-2023 HPMicro
* Copyright 2021-2025 HPMicro
* SPDX-License-Identifier: BSD-3-Clause
*/
ENTRY(_start)
STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x2000;
HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 0x8000;
NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 0x10000;
HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 128K;
NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 32k;
MEMORY
{
ILM (wx) : ORIGIN = 0, LENGTH = 128K
DLM (w) : ORIGIN = 0x80000, LENGTH = 96K
NONCACHEABLE_RAM (wx) : ORIGIN = 0x90000, LENGTH = NONCACHEABLE_SIZE
AXI_SRAM (wx) : ORIGIN = 0x01084000, LENGTH = 224K
ILM (wx) : ORIGIN = 0x00000000, LENGTH = 128K
DLM (w) : ORIGIN = 0x00080000, LENGTH = 128K
NONCACHEABLE_RAM (wx) : ORIGIN = 0x01080000, LENGTH = NONCACHEABLE_SIZE
AXI_SRAM (wx) : ORIGIN = 0x01088000, LENGTH = 208K
SHARE_RAM (w) : ORIGIN = 0x010BC000, LENGTH = 16K
AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k
}
@@ -94,11 +94,11 @@ SECTIONS
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
} > AXI_SRAM
} > ILM
.rel : {
KEEP(*(.rel*))
} > AXI_SRAM
} > ILM
.fast_ram (NOLOAD) : {
KEEP(*(.fast_ram))
@@ -124,22 +124,26 @@ SECTIONS
. = ALIGN(8);
__tbss_start__ = .;
*(.tbss*)
*(.gnu.linkonce.tb.*)
*(.tcommon*)
_end = .;
__tbss_end__ = .;
} > DLM
.tdata : AT(etext) {
__tdata_load_addr__ = etext;
.tdata : AT(__tdata_load_addr__) {
. = ALIGN(8);
__tdata_start__ = .;
__thread_pointer = .;
*(.tdata)
*(.tdata*)
*(.gnu.linkonce.td.*)
. = ALIGN(8);
__tdata_end__ = .;
} > DLM
.data : AT(etext + __tdata_end__ - __tdata_start__) {
__data_load_addr__ = etext + SIZEOF(.tdata);
.data : AT(__data_load_addr__) {
. = ALIGN(8);
__data_start__ = .;
__global_pointer$ = . + 0x800;
@@ -167,10 +171,10 @@ SECTIONS
PROVIDE(__init_array_end = .);
. = ALIGN(8);
PROVIDE(__finit_array_start = .);
KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
KEEP(*(.finit_array))
PROVIDE(__finit_array_end = .);
PROVIDE(__fini_array_start = .);
KEEP(*(SORT_BY_INIT_PRIORITY(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE(__fini_array_end = .);
. = ALIGN(8);
PROVIDE(__ctors_start__ = .);
@@ -193,7 +197,18 @@ SECTIONS
PROVIDE (edata = .);
} > DLM
.fast : AT(etext + __data_end__ - __tdata_start__) {
__fast_ram_init_load_addr__ = etext + SIZEOF(.tdata) + SIZEOF(.data);
.fast_ram.init : AT(__fast_ram_init_load_addr__) {
. = ALIGN(8);
__fast_ram_init_start__ = .;
KEEP(*(.fast_ram.init))
KEEP(*(.fast_ram.init.*))
__fast_ram_init_end__ = .;
. = ALIGN(8);
} > DLM
__fast_load_addr__ = etext + SIZEOF(.tdata) + SIZEOF(.data) + SIZEOF(.fast_ram.init);
.fast : AT(__fast_load_addr__) {
. = ALIGN(8);
PROVIDE(__ramfunc_start__ = .);
*(.fast)
@@ -201,7 +216,8 @@ SECTIONS
PROVIDE(__ramfunc_end__ = .);
} > ILM
.noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
__noncacheable_init_load_addr__ = etext + SIZEOF(.tdata) + SIZEOF(.data) + SIZEOF(.fast_ram.init) + SIZEOF(.fast);
.noncacheable.init : AT(__noncacheable_init_load_addr__) {
. = ALIGN(8);
__noncacheable_init_start__ = .;
KEEP(*(.noncacheable.init))
@@ -218,8 +234,11 @@ SECTIONS
.noncacheable.bss (NOLOAD) : {
. = ALIGN(8);
KEEP(*(.noncacheable))
KEEP(*(.noncacheable.non_init))
KEEP(*(.noncacheable.non_init.*))
__noncacheable_bss_start__ = .;
KEEP(*(.noncacheable.bss))
KEEP(*(.noncacheable.bss.*))
__noncacheable_bss_end__ = .;
. = ALIGN(8);
} > NONCACHEABLE_RAM
@@ -246,5 +265,6 @@ SECTIONS
. += HEAP_SIZE;
__heap_end__ = .;
} > DLM
} > AXI_SRAM
}
ASSERT((((__noncacheable_init_load_addr__ + SIZEOF(.noncacheable.init) <= ORIGIN(ILM) + LENGTH(ILM)))), "****** FAILED! ILM does not have enough space! ******")
bsp/hpmicro/hpm6200evk/board/pinmux.c
+72 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 hpmicro
* Copyright (c) 2023-2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -115,11 +115,12 @@ void init_spi_pins(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PB05].FUNC_CTL = IOC_PB05_FUNC_CTL_SPI1_MOSI;
HPM_IOC->PAD[IOC_PAD_PB03].FUNC_CTL = IOC_PB03_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PB04].FUNC_CTL = IOC_PB04_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
} else if (ptr == HPM_SPI2) {
HPM_IOC->PAD[IOC_PAD_PC22].FUNC_CTL = IOC_PC22_FUNC_CTL_SPI2_CSN;
HPM_IOC->PAD[IOC_PAD_PC24].FUNC_CTL = IOC_PC24_FUNC_CTL_SPI2_MISO;
HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_SPI2_MOSI;
HPM_IOC->PAD[IOC_PAD_PC25].FUNC_CTL = IOC_PC25_FUNC_CTL_SPI2_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PB02].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PB05].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PB03].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PB04].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
@@ -130,11 +131,12 @@ void init_spi_pins_with_gpio_as_cs(SPI_Type *ptr)
HPM_IOC->PAD[IOC_PAD_PB05].FUNC_CTL = IOC_PB05_FUNC_CTL_SPI1_MOSI;
HPM_IOC->PAD[IOC_PAD_PB03].FUNC_CTL = IOC_PB03_FUNC_CTL_SPI1_MISO;
HPM_IOC->PAD[IOC_PAD_PB04].FUNC_CTL = IOC_PB04_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
} else if (ptr == HPM_SPI2) {
HPM_IOC->PAD[IOC_PAD_PC22].FUNC_CTL = IOC_PC22_FUNC_CTL_GPIO_C_22;
HPM_IOC->PAD[IOC_PAD_PC24].FUNC_CTL = IOC_PC24_FUNC_CTL_SPI2_MISO;
HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_SPI2_MOSI;
HPM_IOC->PAD[IOC_PAD_PC25].FUNC_CTL = IOC_PC25_FUNC_CTL_SPI2_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);;
/* set max frequency slew rate(200M) */
HPM_IOC->PAD[IOC_PAD_PB02].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PRS_SET(1);
HPM_IOC->PAD[IOC_PAD_PB05].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PB03].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
HPM_IOC->PAD[IOC_PAD_PB04].PAD_CTL = IOC_PAD_PAD_CTL_SR_MASK | IOC_PAD_PAD_CTL_SPD_SET(3);
}
}
@@ -149,8 +151,18 @@ void init_gptmr_pins(GPTMR_Type *ptr)
{
if (ptr == HPM_GPTMR1) {
HPM_IOC->PAD[IOC_PAD_PA23].FUNC_CTL = IOC_PA23_FUNC_CTL_GPTMR1_CAPT_0;
/* TMR1 compare 0 */
HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PA25_FUNC_CTL_GPTMR1_COMP_0;
/* TMR1 compare 1 */
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_GPTMR1_COMP_1;
/* TMR1 compare 2 */
HPM_IOC->PAD[IOC_PAD_PA20].FUNC_CTL = IOC_PA20_FUNC_CTL_TRGM1_P_00;
trgm_output_t trgm1_io_config0 = {0};
trgm1_io_config0.invert = 0;
trgm1_io_config0.type = trgm_output_same_as_input;
trgm1_io_config0.input = HPM_TRGM1_INPUT_SRC_GPTMR1_OUT2;
trgm_output_config(HPM_TRGM1, HPM_TRGM1_OUTPUT_SRC_TRGM1_P0, &trgm1_io_config0);
trgm_enable_io_output(HPM_TRGM1, 1 << 0);
}
}
@@ -214,10 +226,13 @@ void init_adc_bldc_pins(void)
HPM_IOC->PAD[IOC_PAD_PC17].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
}
void init_usb_pins(void)
void init_usb_pins(USB_Type *ptr)
{
HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_GPIO_C_23;
HPM_IOC->PAD[IOC_PAD_PC23].PAD_CTL = IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1);
if (ptr == HPM_USB0) {
HPM_IOC->PAD[IOC_PAD_PC00].FUNC_CTL = IOC_PC00_FUNC_CTL_USB0_ID;
HPM_IOC->PAD[IOC_PAD_PC01].FUNC_CTL = IOC_PC01_FUNC_CTL_USB0_PWR;
HPM_IOC->PAD[IOC_PAD_PC02].FUNC_CTL = IOC_PC02_FUNC_CTL_USB0_OC;
}
}
void init_can_pins(MCAN_Type *ptr)
@@ -324,3 +339,46 @@ void init_tamper_pins(void)
HPM_BIOC->PAD[IOC_PAD_PZ04].PAD_CTL &= ~IOC_PAD_PAD_CTL_OD_MASK;
HPM_BIOC->PAD[IOC_PAD_PZ05].PAD_CTL &= ~IOC_PAD_PAD_CTL_OD_MASK;
}
/* for uart_rx_line_status case, need to a gpio pin to sent break signal */
void init_uart_break_signal_pin(void)
{
HPM_IOC->PAD[IOC_PAD_PB02].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
HPM_IOC->PAD[IOC_PAD_PB02].FUNC_CTL = IOC_PB02_FUNC_CTL_GPIO_B_02;
}
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp)
{
if (ptr == HPM_GPTMR1) {
if (as_comp) {
switch (channel) {
case 0:
HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PA25_FUNC_CTL_GPTMR1_COMP_0;
break;
case 1:
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_GPTMR1_COMP_1;
break;
case 2:
HPM_IOC->PAD[IOC_PAD_PA20].FUNC_CTL = IOC_PA20_FUNC_CTL_TRGM1_P_00;
trgm_output_t trgm1_io_config0 = {0};
trgm1_io_config0.invert = 0;
trgm1_io_config0.type = trgm_output_same_as_input;
trgm1_io_config0.input = HPM_TRGM1_INPUT_SRC_GPTMR1_OUT2;
trgm_output_config(HPM_TRGM1, HPM_TRGM1_OUTPUT_SRC_TRGM1_P0, &trgm1_io_config0);
trgm_enable_io_output(HPM_TRGM1, 1 << 0);
break;
default:
break;
}
} else {
if (channel == 0) {
HPM_IOC->PAD[IOC_PAD_PA23].FUNC_CTL = IOC_PA23_FUNC_CTL_GPTMR1_CAPT_0;
}
}
}
}
void init_clk_ref_pins(void)
{
HPM_IOC->PAD[IOC_PAD_PA14].FUNC_CTL = IOC_PA14_FUNC_CTL_SOC_REF0;
}
bsp/hpmicro/hpm6200evk/board/pinmux.h
+5 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 hpmicro
* Copyright (c) 2022-2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -27,7 +27,7 @@ void init_pwm_pins(PWM_Type *ptr);
void init_hrpwm_pins(PWM_Type *ptr);
void init_adc_pins(void);
void init_dac_pins(DAC_Type *ptr);
void init_usb_pins(void);
void init_usb_pins(USB_Type *ptr);
void init_can_pins(MCAN_Type *ptr);
void init_adc_bldc_pins(void);
void init_rgb_pwm_pins(void);
@@ -41,7 +41,9 @@ void init_sdm_pins(void);
void init_pla_tamagawa_pins(void);
void init_motor_over_zero_sensorless_adc_pins(void);
void init_tamper_pins(void);
void init_uart_break_signal_pin(void);
void init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
void init_clk_ref_pins(void);
#ifdef __cplusplus
}
#endif
bsp/hpmicro/hpm6200evk/board/rtt_board.c
+94 -2
View File
@@ -60,6 +60,7 @@ void rtt_board_init(void)
void app_init_led_pins(void)
{
board_init_led_pins();
gpio_set_pin_output(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN);
gpio_write_pin(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, BOARD_LED_OFF_LEVEL);
}
@@ -93,7 +94,7 @@ void rt_hw_console_output(const char *str)
void app_init_usb_pins(void)
{
board_init_usb_pins();
board_init_usb(HPM_USB0);
}
ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
@@ -105,7 +106,7 @@ ATTR_PLACE_AT(".isr_vector") void mchtmr_isr(void)
void rt_hw_cpu_reset(void)
{
HPM_PPOR->RESET_ENABLE = (1UL << 31);
HPM_PPOR->RESET_ENABLE |= (1UL << 31);
HPM_PPOR->RESET_HOT &= ~(1UL << 31);
HPM_PPOR->RESET_COLD |= (1UL << 31);
@@ -127,3 +128,94 @@ void rt_hw_cpu_dcache_ops(int ops, void *addr, int size)
}
}
#endif
uint32_t rtt_board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb)
{
uint32_t freq = 0;
if (ptr == HPM_ADC0) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc0, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc0, clk_adc_src_ana0);
clock_set_source_divider(clock_ana0, clk_src_pll0_clk0, 2U);
}
clock_add_to_group(clock_adc0, 0);
freq = clock_get_frequency(clock_adc0);
} else if (ptr == HPM_ADC1) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc1, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc1, clk_adc_src_ana1);
clock_set_source_divider(clock_ana1, clk_src_pll0_clk0, 2U);
}
clock_add_to_group(clock_adc1, 0);
freq = clock_get_frequency(clock_adc1);
} else if (ptr == HPM_ADC2) {
if (clk_src_ahb) {
/* Configure the ADC clock from AHB (@200MHz by default)*/
clock_set_adc_source(clock_adc2, clk_adc_src_ahb0);
} else {
/* Configure the ADC clock from pll0_clk0 divided by 2 (@200MHz by default) */
clock_set_adc_source(clock_adc2, clk_adc_src_ana2);
clock_set_source_divider(clock_ana2, clk_src_pll0_clk0, 2U);
}
clock_add_to_group(clock_adc2, 0);
freq = clock_get_frequency(clock_adc2);
}
return freq;
}
uint32_t rtt_board_init_pwm_clock(PWM_Type *ptr)
{
uint32_t freq = 0;
if (ptr == HPM_PWM0) {
clock_add_to_group(clock_mot0, 0);
freq = clock_get_frequency(clock_mot0);
} else if (ptr == HPM_PWM1) {
clock_add_to_group(clock_mot1, 0);
freq = clock_get_frequency(clock_mot1);
} else if (ptr == HPM_PWM2) {
clock_add_to_group(clock_mot2, 0);
freq = clock_get_frequency(clock_mot2);
} else if (ptr == HPM_PWM3) {
clock_add_to_group(clock_mot3, 0);
freq = clock_get_frequency(clock_mot3);
} else {
}
return freq;
}
#ifdef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER
extern void hpm_isr_usb0(void);
RTT_DECLARE_EXT_ISR_M(IRQn_USB0, hpm_isr_usb0)
#endif
void hpm_usb_isr_enable(uint32_t base)
{
if (base == HPM_USB0_BASE) {
intc_m_enable_irq_with_priority(IRQn_USB0, 4);
} else {
#ifdef HPM_USB1_BASE
intc_m_enable_irq_with_priority(IRQn_USB1, 4);
#endif
}
}
void hpm_usb_isr_disable(uint32_t base)
{
if (base == HPM_USB0_BASE) {
intc_m_disable_irq(IRQn_USB0);
} else {
#ifdef HPM_USB1_BASE
intc_m_disable_irq(IRQn_USB1);
#endif
}
}
bsp/hpmicro/hpm6200evk/board/rtt_board.h
+13 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 hpmicro
* Copyright (c) 2021 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -10,8 +10,10 @@
#include "hpm_common.h"
#include "hpm_soc.h"
#include <drv_gpio.h>
#include "board.h"
/* gpio section */
#define APP_LED0 (0U)
#define APP_LED0_PIN_NUM GET_PIN(B, 19)
#define APP_LED_ON (1)
#define APP_LED_OFF (0)
@@ -21,6 +23,12 @@
/* mchtimer section */
#define BOARD_MCHTMR_FREQ_IN_HZ (24000000UL)
/* gptmr as os_tick */
#define BOARD_OS_TIMER HPM_GPTMR0
#define BOARD_OS_TIMER_CH 1
#define BOARD_OS_TIMER_IRQ IRQn_GPTMR0
#define BOARD_OS_TIMER_CLK_NAME (clock_gptmr0)
/* CAN section */
#define BOARD_CAN_NAME "can0"
#define BOARD_CAN_HWFILTER_INDEX (0U)
@@ -33,6 +41,10 @@
#define BOARD_PWM_NAME "pwm0"
#define BOARD_PWM_CHANNEL (0)
/* ADC section */
#define BOARD_ADC_NAME BOARD_APP_ADC16_NAME
#define BOARD_ADC_CHANNEL BOARD_APP_ADC16_CH_1
#define IRQn_PendSV IRQn_DEBUG_0
/***************************************************************
bsp/hpmicro/hpm6200evk/rtconfig.h
+25 -12
View File
@@ -61,7 +61,7 @@
/* end of rt_strnlen options */
/* end of klibc options */
#define RT_NAME_MAX 8
#define RT_NAME_MAX 16
#define RT_CPUS_NR 1
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
@@ -75,6 +75,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_USING_CPU_USAGE_TRACER
/* kservice options */
@@ -103,6 +104,8 @@
#define RT_VER_NUM 0x50201
#define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */
#define ARCH_RISCV
#define ARCH_RISCV32
/* RT-Thread Components */
@@ -110,6 +113,7 @@
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
#define RT_USING_LEGACY
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
@@ -127,14 +131,6 @@
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_DEVFS
/* end of DFS: device virtual file system */
/* Device Drivers */
@@ -142,9 +138,9 @@
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_USING_SERIAL_V2
#define RT_SERIAL_BUF_STRATEGY_OVERWRITE
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* end of Device Drivers */
@@ -307,6 +303,20 @@
/* NXP HAL & SDK Drivers */
/* end of NXP HAL & SDK Drivers */
/* NUVOTON Drivers */
/* end of NUVOTON Drivers */
/* GD32 Drivers */
/* end of GD32 Drivers */
/* HPMicro SDK */
#define PKG_USING_HPM_SDK
#define PKG_USING_HPM_SDK_LATEST_VERSION
/* end of HPMicro SDK */
/* end of HAL & SDK Drivers */
/* sensors drivers */
@@ -386,16 +396,19 @@
/* end of Arduino libraries */
/* end of RT-Thread online packages */
#define SOC_HPM6200_SERIES
/* Hardware Drivers Config */
#define SOC_HPM6000
#define SOC_HPM6200
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_UART0_RX_BUFSIZE 128
#define BSP_UART0_TX_BUFSIZE 0
/* end of On-chip Peripheral Drivers */
/* end of Hardware Drivers Config */
bsp/hpmicro/hpm6200evk/rtconfig.py
+39 -6
View File
@@ -1,8 +1,41 @@
# Copyright 2021-2023 HPMicro
# Copyright 2021-2025 HPMicro
# SPDX-License-Identifier: BSD-3-Clause
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
def bsp_pkg_check():
import subprocess
need_update = True
for p in os.listdir("packages"):
if p.startswith("hpm_sdk-"):
need_update = False
break
if need_update:
print("\n===============================================================================")
print("Dependency packages missing, please running 'pkgs --update'...")
print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
print("===============================================================================")
exit(1)
RegisterPreBuildingAction(bsp_pkg_check)
# toolchains options
ARCH='risc-v'
@@ -80,27 +113,27 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'ram_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/ram_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/ram_rtt.ld'
elif BUILD == 'flash_debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
LFLAGS += ' -O0'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
elif BUILD == 'flash_release':
CFLAGS += ' -O2'
LFLAGS += ' -O2'
CFLAGS += ' -DFLASH_XIP=1'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
else:
CFLAGS += ' -O2'
LFLAGS += ' -O2'
LINKER_FILE = 'board/linker_scripts/flash_rtt.ld'
LINKER_FILE = 'board/linker_scripts/gcc/flash_rtt.ld'
LFLAGS += ' -T ' + LINKER_FILE
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
bsp/hpmicro/hpm6200evk/startup/HPM6280/startup.c
+130 -123
View File
File diff suppressed because it is too large Load Diff
bsp/hpmicro/hpm6200evk/startup/HPM6280/toolchains/gcc/port_gcc.S
+2 -1
View File
@@ -5,7 +5,8 @@
*
*/
#include "cpuport.h"
.section .text.entry, "ax"
.align 2
.globl rt_hw_do_after_save_above
.type rt_hw_do_after_save_above,@function
rt_hw_do_after_save_above:
bsp/hpmicro/hpm6200evk/startup/HPM6280/toolchains/gcc/start.S
-1
View File
@@ -54,7 +54,6 @@ _start:
nmi_handler:
1: j 1b
.global default_irq_handler
.weak default_irq_handler
.align 2
default_irq_handler:

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