*** EFM32 branch ***

- New branch for Energy Micro's MCUs (http://energymicro.com/).
 - Target board: FM32 Gecko Starter Kit (http://www.energymicro.com/tools)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1274 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
onelife.real
2011-02-17 03:33:15 +00:00
parent d128ba9169
commit 314bcbd3ea
117 changed files with 285505 additions and 0 deletions
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/******************************************************************//**
* @file context_gcc.S
* @brief Context switch functions
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2009-10-11 Bernard first version
* 2010-12-29 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.equ ICSR, 0xE000ED04 /* interrupt control state register */
.equ PENDSVSET_BIT, 0x10000000 /* value to trigger PendSV exception */
.equ SHPR3, 0xE000ED20 /* system priority register (3) */
.equ PENDSV_PRI_LOWEST, 0x00FF0000 /* PendSV priority value (lowest) */
/*
* rt_base_t rt_hw_interrupt_disable();
*/
.global rt_hw_interrupt_disable
.type rt_hw_interrupt_disable, %function
rt_hw_interrupt_disable:
MRS R0, PRIMASK
CPSID I
BX LR
/*
* void rt_hw_interrupt_enable(rt_base_t level);
*/
.global rt_hw_interrupt_enable
.type rt_hw_interrupt_enable, %function
rt_hw_interrupt_enable:
MSR PRIMASK, R0
BX LR
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* R0 --> from
* R1 --> to
*/
.global rt_hw_context_switch_interrupt
.type rt_hw_context_switch_interrupt, %function
.global rt_hw_context_switch
.type rt_hw_context_switch, %function
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
/* set rt_thread_switch_interrput_flag to 1 */
LDR R2, =rt_thread_switch_interrput_flag
LDR R3, [R2]
CMP R3, #1
BEQ _reswitch
MOV R3, #1
STR R3, [R2]
LDR R2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
STR R0, [R2]
_reswitch:
LDR R2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
STR R1, [R2]
LDR R0, =ICSR /* trigger the PendSV exception (causes context switch) */
LDR R1, =PENDSVSET_BIT
STR R1, [R0]
BX LR
/* R0 --> swith from thread stack
* R1 --> swith to thread stack
* psr, pc, LR, R12, R3, R2, R1, R0 are pushed into [from] stack
*/
.global rt_hw_pend_sv
.type rt_hw_pend_sv, %function
rt_hw_pend_sv:
/* disable interrupt to protect context switch */
MRS R2, PRIMASK
CPSID I
/* get rt_thread_switch_interrupt_flag */
LDR R0, =rt_thread_switch_interrput_flag
LDR R1, [R0]
CBZ R1, pendsv_exit /* pendsv aLReady handled */
/* clear rt_thread_switch_interrput_flag to 0 */
MOV R1, #0
STR R1, [R0]
LDR R0, =rt_interrupt_from_thread
LDR R1, [R0]
CBZ R1, swtich_to_thread /* skip register save at the first time */
MRS R1, PSP /* get from thread stack pointer */
STMFD R1!, {R4 - R11} /* push R4 - R11 register */
LDR R0, [R0]
STR R1, [R0] /* update from thread stack pointer */
swtich_to_thread:
LDR R1, =rt_interrupt_to_thread
LDR R1, [R1]
LDR R1, [R1] /* load thread stack pointer */
LDMFD R1!, {R4 - R11} /* pop R4 - R11 register */
MSR PSP, R1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, R2
ORR LR, LR, #0x04
BX LR
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* R0 --> to
*/
.global rt_hw_context_switch_to
.type rt_hw_context_switch_to, %function
rt_hw_context_switch_to:
LDR R1, =rt_interrupt_to_thread
STR R0, [R1]
/* set from thread to 0 */
LDR R1, =rt_interrupt_from_thread
MOV R0, #0
STR R0, [R1]
/* set interrupt flag to 1 */
LDR R1, =rt_thread_switch_interrput_flag
MOV R0, #1
STR R0, [R1]
/* set the PendSV exception priority */
LDR R0, =SHPR3
LDR R1, =PENDSV_PRI_LOWEST
LDR.W R2, [R0,#0] /* read */
ORR R1, R1, R2 /* modify */
STR R1, [R0] /* write-back */
LDR R0, =ICSR /* trigger the PendSV exception (causes context switch) */
LDR R1, =PENDSVSET_BIT
STR R1, [R0]
CPSIE I /* enable interrupts at processor level */
/* never reach here! */
/* compatible with old version */
.global rt_hw_interrupt_thread_switch
.type rt_hw_interrupt_thread_switch, %function
rt_hw_interrupt_thread_switch:
BX LR
NOP
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file cpu.c
* @brief This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2009-01-05 Bernard first version
* 2011-02-14 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
/* Includes -------------------------------------------------------------------*/
#include <rtthread.h>
/* Private typedef -------------------------------------------------------------*/
/* Private define --------------------------------------------------------------*/
/* Private macro --------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
/* Private function prototypes ---------------------------------------------------*/
/* Private functions ------------------------------------------------------------*/
/**
* reset cpu by dog's time-out
*
*/
void rt_hw_cpu_reset()
{
/*NOTREACHED*/
}
/**
* shutdown CPU
*
*/
void rt_hw_cpu_shutdown()
{
rt_kprintf("shutdown...\n");
RT_ASSERT(0);
}
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file fault.c
* @brief This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2009-01-05 Bernard first version
* 2011-02-14 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
/* Includes -------------------------------------------------------------------*/
#include <rtthread.h>
/* Private typedef -------------------------------------------------------------*/
struct stack_contex
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r12;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t psr;
};
/* Private define --------------------------------------------------------------*/
/* Private macro --------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
/* External function prototypes --------------------------------------------------*/
extern void list_thread(void);
extern rt_thread_t rt_current_thread;
/* Private function prototypes ---------------------------------------------------*/
/* Private functions ------------------------------------------------------------*/
void rt_hw_hard_fault_exception(struct stack_contex* contex)
{
rt_kprintf("psr: 0x%08x\n", contex->psr);
rt_kprintf(" pc: 0x%08x\n", contex->pc);
rt_kprintf(" lr: 0x%08x\n", contex->lr);
rt_kprintf("r12: 0x%08x\n", contex->r12);
rt_kprintf("r03: 0x%08x\n", contex->r3);
rt_kprintf("r02: 0x%08x\n", contex->r2);
rt_kprintf("r01: 0x%08x\n", contex->r1);
rt_kprintf("r00: 0x%08x\n", contex->r0);
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
#endif
while (1);
}
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file fault_gcc.S
* @brief Faults handling functions
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2009-10-11 Bernard first version
* 2010-12-29 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.global rt_hw_hard_fault
.type rt_hw_hard_fault, %function
rt_hw_hard_fault:
/* get current context */
MRS r0, psp /* get fault thread stack pointer */
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file interrupt.c
* @brief This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2009-01-05 Bernard first version
* 2011-02-14 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
/* Includes -------------------------------------------------------------------*/
#include <rtthread.h>
/* Private typedef -------------------------------------------------------------*/
/* Private define --------------------------------------------------------------*/
/* Private macro --------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag;
/* Private function prototypes ---------------------------------------------------*/
/* Private functions ------------------------------------------------------------*/
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file stack.c
* @brief This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author Bernard, onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2006-08-23 Bernard first version
* 2011-02-14 onelife Modify for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
/* Includes -------------------------------------------------------------------*/
#include <rtthread.h>
/* Private typedef -------------------------------------------------------------*/
/* Private define --------------------------------------------------------------*/
/* Private macro --------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
/* Private function prototypes ---------------------------------------------------*/
/* Private functions ------------------------------------------------------------*/
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
stk = (unsigned long *)stack_addr;
*(stk) = 0x01000000L; /* PSR */
*(--stk) = (unsigned long)tentry; /* entry point, pc */
*(--stk) = (unsigned long)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
*(--stk) = 0; /* r9 */
*(--stk) = 0; /* r8 */
*(--stk) = 0; /* r7 */
*(--stk) = 0; /* r6 */
*(--stk) = 0; /* r5 */
*(--stk) = 0; /* r4 */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}
/******************************************************************//**
* @}
*********************************************************************/
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/******************************************************************//**
* @file start_gcc.S
* @brief Context switch functions
* COPYRIGHT (C) 2009, RT-Thread Development Team
* @author onelife
* @version 0.4 beta
**********************************************************************
* @section License
* The license and distribution terms for this file may be found in the file LICENSE in this
* distribution or at http://www.rt-thread.org/license/LICENSE
**********************************************************************
* @section Change Logs
* Date Author Notes
* 2010-12-21 onelife Initial creation for EFM32
*********************************************************************/
/******************************************************************//**
* @addtogroup cortex-m3
* @{
*********************************************************************/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector, "a", %progbits
.global g_pfnVectors
.type g_pfnVectors, %object
g_pfnVectors:
.word Initial_spTop
.word Reset_Handler
.word NMI_Handler
.word rt_hw_hard_fault
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word rt_hw_pend_sv
.word rt_hw_timer_handler
/* External Interrupts */
.word DMA_IRQHandler /* 0: DMA Interrupt (efm32_dma.c) */
.word GPIO_EVEN_IRQHandler /* 1: GPIO_EVEN Interrupt */
.word TIMER0_IRQHandler /* 2: TIMER0 Interrupt */
.word USART0_RX_IRQHandler /* 3: USART0_RX Interrupt */
.word USART0_TX_IRQHandler /* 4: USART0_TX Interrupt */
.word ACMP0_IRQHandler /* 5: ACMP0 Interrupt */
.word ADC0_IRQHandler /* 6: ADC0 Interrupt */
.word DAC0_IRQHandler /* 7: DAC0 Interrupt */
.word I2C0_IRQHandler /* 8: I2C0 Interrupt */
.word GPIO_ODD_IRQHandler /* 9: GPIO_ODD Interrupt */
.word TIMER1_IRQHandler /* 10: TIMER1 Interrupt */
.word TIMER2_IRQHandler /* 11: TIMER2 Interrupt */
.word USART1_RX_IRQHandler /* 12: USART1_RX Interrupt */
.word USART1_TX_IRQHandler /* 13: USART1_TX Interrupt */
.word USART2_RX_IRQHandler /* 14: USART2_RX Interrupt */
.word USART2_TX_IRQHandler /* 15: USART2_TX Interrupt */
.word UART0_RX_IRQHandler /* 16: UART0_RX Interrupt */
.word UART0_TX_IRQHandler /* 17: UART0_TX Interrupt */
.word LEUART0_IRQHandler /* 18: LEUART0 Interrupt */
.word LEUART1_IRQHandler /* 19: LEUART1 Interrupt */
.word LETIMER0_IRQHandler /* 20: LETIMER0 Interrupt */
.word PCNT0_IRQHandler /* 21: PCNT0 Interrupt */
.word PCNT1_IRQHandler /* 22: PCNT1 Interrupt */
.word PCNT2_IRQHandler /* 23: PCNT2 Interrupt */
.word RTC_IRQHandler /* 24: RTC Interrupt */
.word CMU_IRQHandler /* 25: CMU Interrupt */
.word VCMP_IRQHandler /* 26: VCMP Interrupt */
.word LCD_IRQHandler /* 27: LCD Interrupt */
.word MSC_IRQHandler /* 28: MSC Interrupt */
.word AES_IRQHandler /* 29: AES Interrupt */
.size g_pfnVectors, .-g_pfnVectors
/**
* @brief Top of stack pointer
*/
.section .bss.init
.equ Stack_Size, 0x00000200
.space Stack_Size
Initial_spTop:
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval None
*/
.thumb
.thumb_func
.section .text.Reset_Handler, "ax", %progbits
.weak Reset_Handler
.global Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* restore original stack pointer */
ldr r0, =Initial_spTop
msr msp, r0
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval None
*/
.thumb
.thumb_func
.section .text.Default_Handler, "ax", %progbits
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler, Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler, Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler, Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler, Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler, Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler ,Default_Handler
.weak DMA_IRQHandler
.thumb_set DMA_IRQHandler, Default_Handler
.weak GPIO_EVEN_IRQHandler
.thumb_set GPIO_EVEN_IRQHandler, Default_Handler
.weak TIMER0_IRQHandler
.thumb_set TIMER0_IRQHandler, Default_Handler
.weak USART0_RX_IRQHandler
.thumb_set USART0_RX_IRQHandler, Default_Handler
.weak USART0_TX_IRQHandler
.thumb_set USART0_TX_IRQHandler, Default_Handler
.weak ACMP0_IRQHandler
.thumb_set ACMP0_IRQHandler, Default_Handler
.weak ADC0_IRQHandler
.thumb_set ADC0_IRQHandler, Default_Handler
.weak DAC0_IRQHandler
.thumb_set DAC0_IRQHandler, Default_Handler
.weak I2C0_IRQHandler
.thumb_set I2C0_IRQHandler, Default_Handler
.weak GPIO_ODD_IRQHandler
.thumb_set GPIO_ODD_IRQHandler, Default_Handler
.weak TIMER1_IRQHandler
.thumb_set TIMER1_IRQHandler, Default_Handler
.weak TIMER2_IRQHandler
.thumb_set TIMER2_IRQHandler, Default_Handler
.weak USART1_RX_IRQHandler
.thumb_set USART1_RX_IRQHandler, Default_Handler
.weak USART1_TX_IRQHandler
.thumb_set USART1_TX_IRQHandler, Default_Handler
.weak USART2_RX_IRQHandler
.thumb_set USART2_RX_IRQHandler, Default_Handler
.weak USART2_TX_IRQHandler
.thumb_set USART2_TX_IRQHandler, Default_Handler
.weak UART0_RX_IRQHandler
.thumb_set UART0_RX_IRQHandler, Default_Handler
.weak UART0_TX_IRQHandler
.thumb_set UART0_TX_IRQHandler, Default_Handler
.weak LEUART0_IRQHandler
.thumb_set LEUART0_IRQHandler, Default_Handler
.weak LEUART1_IRQHandler
.thumb_set LEUART1_IRQHandler, Default_Handler
.weak LETIMER0_IRQHandler
.thumb_set LETIMER0_IRQHandler, Default_Handler
.weak PCNT0_IRQHandler
.thumb_set PCNT0_IRQHandler, Default_Handler
.weak PCNT1_IRQHandler
.thumb_set PCNT1_IRQHandler, Default_Handler
.weak PCNT2_IRQHandler
.thumb_set PCNT2_IRQHandler, Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler, Default_Handler
.weak CMU_IRQHandler
.thumb_set CMU_IRQHandler, Default_Handler
.weak VCMP_IRQHandler
.thumb_set VCMP_IRQHandler, Default_Handler
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler, Default_Handler
.weak MSC_IRQHandler
.thumb_set MSC_IRQHandler, Default_Handler
.weak AES_IRQHandler
.thumb_set AES_IRQHandler, Default_Handler
/******************************************************************//**
* @}
*********************************************************************/