mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-02-08 20:05:29 +08:00
*** EFM32 branch ***
- New branch for Energy Micro's MCUs (http://energymicro.com/). - Target board: FM32 Gecko Starter Kit (http://www.energymicro.com/tools) git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1274 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
onelife.real
782
bsp/efm32/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c
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782
bsp/efm32/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c
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1818
bsp/efm32/Libraries/CMSIS/CM3/CoreSupport/core_cm3.h
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bsp/efm32/Libraries/CMSIS/CM3/CoreSupport/core_cm3.h
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@@ -0,0 +1,112 @@
|
||||
/**************************************************************************//**
|
||||
* @file
|
||||
* @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 Gxxx Device series
|
||||
*
|
||||
* This is a convenience header file for defining the EFM32 part number on the
|
||||
* build command line, instead of specifying the part specific header file.
|
||||
* @verbatim
|
||||
* Example: Add "-DEFM32G890F128" to your build options, to define part
|
||||
* Add "#include "efm32.h" to your source files
|
||||
* @endverbatim
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __EFM32_H
|
||||
#define __EFM32_H
|
||||
|
||||
/* Gecko Parts */
|
||||
|
||||
#if defined(EFM32G200F16)
|
||||
#include "efm32g200f16.h"
|
||||
|
||||
#elif defined(EFM32G200F32)
|
||||
#include "efm32g200f32.h"
|
||||
|
||||
#elif defined(EFM32G200F64)
|
||||
#include "efm32g200f64.h"
|
||||
|
||||
#elif defined(EFM32G210F128)
|
||||
#include "efm32g210f128.h"
|
||||
|
||||
#elif defined(EFM32G230F128)
|
||||
#include "efm32g230f128.h"
|
||||
|
||||
#elif defined(EFM32G230F32)
|
||||
#include "efm32g230f32.h"
|
||||
|
||||
#elif defined(EFM32G230F64)
|
||||
#include "efm32g230f64.h"
|
||||
|
||||
#elif defined(EFM32G280F128)
|
||||
#include "efm32g280f128.h"
|
||||
|
||||
#elif defined(EFM32G280F32)
|
||||
#include "efm32g280f32.h"
|
||||
|
||||
#elif defined(EFM32G280F64)
|
||||
#include "efm32g280f64.h"
|
||||
|
||||
#elif defined(EFM32G290F128)
|
||||
#include "efm32g290f128.h"
|
||||
|
||||
#elif defined(EFM32G290F32)
|
||||
#include "efm32g290f32.h"
|
||||
|
||||
#elif defined(EFM32G290F64)
|
||||
#include "efm32g290f64.h"
|
||||
|
||||
#elif defined(EFM32G840F128)
|
||||
#include "efm32g840f128.h"
|
||||
|
||||
#elif defined(EFM32G840F32)
|
||||
#include "efm32g840f32.h"
|
||||
|
||||
#elif defined(EFM32G840F64)
|
||||
#include "efm32g840f64.h"
|
||||
|
||||
#elif defined(EFM32G880F128)
|
||||
#include "efm32g880f128.h"
|
||||
|
||||
#elif defined(EFM32G880F32)
|
||||
#include "efm32g880f32.h"
|
||||
|
||||
#elif defined(EFM32G880F64)
|
||||
#include "efm32g880f64.h"
|
||||
|
||||
#elif defined(EFM32G890F128)
|
||||
#include "efm32g890f128.h"
|
||||
|
||||
#elif defined(EFM32G890F32)
|
||||
#include "efm32g890f32.h"
|
||||
|
||||
#elif defined(EFM32G890F64)
|
||||
#include "efm32g890f64.h"
|
||||
|
||||
#else
|
||||
#error "efm32.h: PART NUMBER undefined"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
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@@ -0,0 +1,255 @@
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_efm32.s
|
||||
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
|
||||
; * for the Energy Micro EFM32 device series
|
||||
; * @version 1.3.0
|
||||
; * @date: 7. September 2010
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
; *
|
||||
; * Copyright (C) 2008 ARM Limited. All rights reserved.
|
||||
; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
|
||||
; * processor based microcontrollers. This file can be freely distributed
|
||||
; * within development tools that are supporting such ARM based processors.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD DMA_IRQHandler ; 0: DMA Interrupt
|
||||
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
|
||||
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
|
||||
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
|
||||
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
|
||||
DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
|
||||
DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
|
||||
DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
|
||||
DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
|
||||
DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
|
||||
DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
|
||||
DCD TIMER2_IRQHandler ; 11: TIMER2 Interrupt
|
||||
DCD USART1_RX_IRQHandler ; 12: USART1_RX Interrupt
|
||||
DCD USART1_TX_IRQHandler ; 13: USART1_TX Interrupt
|
||||
DCD USART2_RX_IRQHandler ; 14: USART2_RX Interrupt
|
||||
DCD USART2_TX_IRQHandler ; 15: USART2_TX Interrupt
|
||||
DCD UART0_RX_IRQHandler ; 16: UART0_RX Interrupt
|
||||
DCD UART0_TX_IRQHandler ; 17: UART0_TX Interrupt
|
||||
DCD LEUART0_IRQHandler ; 18: LEUART0 Interrupt
|
||||
DCD LEUART1_IRQHandler ; 19: LEUART1 Interrupt
|
||||
DCD LETIMER0_IRQHandler ; 20: LETIMER0 Interrupt
|
||||
DCD PCNT0_IRQHandler ; 21: PCNT0 Interrupt
|
||||
DCD PCNT1_IRQHandler ; 22: PCNT1 Interrupt
|
||||
DCD PCNT2_IRQHandler ; 23: PCNT2 Interrupt
|
||||
DCD RTC_IRQHandler ; 24: RTC Interrupt
|
||||
DCD CMU_IRQHandler ; 25: CMU Interrupt
|
||||
DCD VCMP_IRQHandler ; 26: VCMP Interrupt
|
||||
DCD LCD_IRQHandler ; 27: LCD Interrupt
|
||||
DCD MSC_IRQHandler ; 28: MSC Interrupt
|
||||
DCD AES_IRQHandler ; 29: AES Interrupt
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
|
||||
EXPORT DMA_IRQHandler [WEAK]
|
||||
EXPORT GPIO_EVEN_IRQHandler [WEAK]
|
||||
EXPORT TIMER0_IRQHandler [WEAK]
|
||||
EXPORT USART0_RX_IRQHandler [WEAK]
|
||||
EXPORT USART0_TX_IRQHandler [WEAK]
|
||||
EXPORT ACMP0_IRQHandler [WEAK]
|
||||
EXPORT ADC0_IRQHandler [WEAK]
|
||||
EXPORT DAC0_IRQHandler [WEAK]
|
||||
EXPORT I2C0_IRQHandler [WEAK]
|
||||
EXPORT GPIO_ODD_IRQHandler [WEAK]
|
||||
EXPORT TIMER1_IRQHandler [WEAK]
|
||||
EXPORT TIMER2_IRQHandler [WEAK]
|
||||
EXPORT USART1_RX_IRQHandler [WEAK]
|
||||
EXPORT USART1_TX_IRQHandler [WEAK]
|
||||
EXPORT USART2_RX_IRQHandler [WEAK]
|
||||
EXPORT USART2_TX_IRQHandler [WEAK]
|
||||
EXPORT UART0_RX_IRQHandler [WEAK]
|
||||
EXPORT UART0_TX_IRQHandler [WEAK]
|
||||
EXPORT LEUART0_IRQHandler [WEAK]
|
||||
EXPORT LEUART1_IRQHandler [WEAK]
|
||||
EXPORT LETIMER0_IRQHandler [WEAK]
|
||||
EXPORT PCNT0_IRQHandler [WEAK]
|
||||
EXPORT PCNT1_IRQHandler [WEAK]
|
||||
EXPORT PCNT2_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT CMU_IRQHandler [WEAK]
|
||||
EXPORT VCMP_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT MSC_IRQHandler [WEAK]
|
||||
EXPORT AES_IRQHandler [WEAK]
|
||||
|
||||
|
||||
DMA_IRQHandler
|
||||
GPIO_EVEN_IRQHandler
|
||||
TIMER0_IRQHandler
|
||||
USART0_RX_IRQHandler
|
||||
USART0_TX_IRQHandler
|
||||
ACMP0_IRQHandler
|
||||
ADC0_IRQHandler
|
||||
DAC0_IRQHandler
|
||||
I2C0_IRQHandler
|
||||
GPIO_ODD_IRQHandler
|
||||
TIMER1_IRQHandler
|
||||
TIMER2_IRQHandler
|
||||
USART1_RX_IRQHandler
|
||||
USART1_TX_IRQHandler
|
||||
USART2_RX_IRQHandler
|
||||
USART2_TX_IRQHandler
|
||||
UART0_RX_IRQHandler
|
||||
UART0_TX_IRQHandler
|
||||
LEUART0_IRQHandler
|
||||
LEUART1_IRQHandler
|
||||
LETIMER0_IRQHandler
|
||||
PCNT0_IRQHandler
|
||||
PCNT1_IRQHandler
|
||||
PCNT2_IRQHandler
|
||||
RTC_IRQHandler
|
||||
CMU_IRQHandler
|
||||
VCMP_IRQHandler
|
||||
LCD_IRQHandler
|
||||
MSC_IRQHandler
|
||||
AES_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
@@ -0,0 +1,251 @@
|
||||
/* Linker script for Energy Micro EFM32G
|
||||
*
|
||||
* Version: Sourcery G++ 4.4-139 - Preview
|
||||
* Support: https://support.codesourcery.com/GNUToolchain/
|
||||
*
|
||||
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
|
||||
*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
ENTRY(__cs3_reset)
|
||||
SEARCH_DIR(.)
|
||||
GROUP(-lgcc -lc -lcs3 -lcs3unhosted)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 128K
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* These force the linker to search for particular symbols from
|
||||
* the start of the link process and thus ensure the user's
|
||||
* overrides are picked up
|
||||
*/
|
||||
|
||||
EXTERN(__cs3_reset __cs3_reset_efm32)
|
||||
EXTERN(__cs3_start_asm _start)
|
||||
EXTERN(__cs3_stack)
|
||||
EXTERN(__cs3_reset)
|
||||
EXTERN(NMI_Handler)
|
||||
EXTERN(HardFault_Handler)
|
||||
EXTERN(MemManage_Handler)
|
||||
EXTERN(BusFault_Handler)
|
||||
EXTERN(UsageFault_Handler)
|
||||
EXTERN(Reserved7_Handler)
|
||||
EXTERN(Reserved8_Handler)
|
||||
EXTERN(Reserved9_Handler)
|
||||
EXTERN(Reserved10_Handler)
|
||||
EXTERN(SVC_Handler)
|
||||
EXTERN(DebugMon_Handler)
|
||||
EXTERN(Reserved13_Handler)
|
||||
EXTERN(PendSV_Handler)
|
||||
EXTERN(SysTick_Handler)
|
||||
EXTERN(DMA_IRQHandler)
|
||||
EXTERN(GPIO_EVEN_IRQHandler)
|
||||
EXTERN(TIMER0_IRQHandler)
|
||||
EXTERN(USART0_RX_IRQHandler)
|
||||
EXTERN(USART0_TX_IRQHandler)
|
||||
EXTERN(ACMP0_IRQHandler)
|
||||
EXTERN(ADC0_IRQHandler)
|
||||
EXTERN(DAC0_IRQHandler)
|
||||
EXTERN(I2C0_IRQHandler)
|
||||
EXTERN(GPIO_ODD_IRQHandler)
|
||||
EXTERN(TIMER1_IRQHandler)
|
||||
EXTERN(TIMER2_IRQHandler)
|
||||
EXTERN(USART1_RX_IRQHandler)
|
||||
EXTERN(USART1_TX_IRQHandler)
|
||||
EXTERN(USART2_RX_IRQHandler)
|
||||
EXTERN(USART2_TX_IRQHandler)
|
||||
EXTERN(UART0_RX_IRQHandler)
|
||||
EXTERN(UART0_TX_IRQHandler)
|
||||
EXTERN(LEUART0_IRQHandler)
|
||||
EXTERN(LEUART1_IRQHandler)
|
||||
EXTERN(LETIMER0_IRQHandler)
|
||||
EXTERN(PCNT0_IRQHandler)
|
||||
EXTERN(PCNT1_IRQHandler)
|
||||
EXTERN(PCNT2_IRQHandler)
|
||||
EXTERN(RTC_IRQHandler)
|
||||
EXTERN(CMU_IRQHandler)
|
||||
EXTERN(VCMP_IRQHandler)
|
||||
EXTERN(LCD_IRQHandler)
|
||||
EXTERN(MSC_IRQHandler)
|
||||
EXTERN(AES_IRQHandler)
|
||||
EXTERN(__cs3_interrupt_vector_efm32g)
|
||||
EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
|
||||
|
||||
/* Provide fall-back values */
|
||||
PROVIDE(__cs3_heap_start = _end);
|
||||
PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
|
||||
PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
|
||||
PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__cs3_region_start_rom = .;
|
||||
*(.cs3.region-head.rom)
|
||||
ASSERT (. == __cs3_region_start_rom, ".cs3.region-head.rom not permitted");
|
||||
__cs3_interrupt_vector = __cs3_interrupt_vector_efm32g;
|
||||
*(.cs3.interrupt_vector)
|
||||
/* Make sure we pulled in an interrupt vector. */
|
||||
ASSERT (. != __cs3_interrupt_vector_efm32g, "No interrupt vector");
|
||||
|
||||
PROVIDE(__cs3_reset = __cs3_reset_efm32);
|
||||
*(.cs3.reset)
|
||||
PROVIDE(__cs3_start_asm = _start);
|
||||
|
||||
*(.text.cs3.init)
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
} >rom
|
||||
.eh_frame_hdr : ALIGN (4)
|
||||
{
|
||||
KEEP (*(.eh_frame_hdr))
|
||||
} >rom
|
||||
.eh_frame : ALIGN (4)
|
||||
{
|
||||
KEEP (*(.eh_frame))
|
||||
} >rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
PROVIDE_HIDDEN (__exidx_start = .);
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >rom
|
||||
PROVIDE_HIDDEN (__exidx_end = .);
|
||||
.rodata : ALIGN (4)
|
||||
{
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(4);
|
||||
__cs3_regions = .;
|
||||
LONG (0)
|
||||
LONG (__cs3_region_init_ram)
|
||||
LONG (__cs3_region_start_ram)
|
||||
LONG (__cs3_region_init_size_ram)
|
||||
LONG (__cs3_region_zero_size_ram)
|
||||
__cs3_regions_end = .;
|
||||
. = ALIGN (8);
|
||||
*(.rom)
|
||||
*(.rom.b .bss.rom)
|
||||
_etext = .;
|
||||
} >rom
|
||||
/* __cs3_region_end_rom is deprecated */
|
||||
__cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
|
||||
__cs3_region_size_rom = LENGTH(rom);
|
||||
|
||||
.data : ALIGN (8)
|
||||
{
|
||||
__cs3_region_start_ram = .;
|
||||
*(.cs3.region-head.ram)
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (8);
|
||||
*(.ram)
|
||||
_edata = .;
|
||||
} >ram AT>rom
|
||||
.bss :
|
||||
{
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
*(.ram.b .bss.ram)
|
||||
_end = .;
|
||||
__end = .;
|
||||
} >ram AT>rom
|
||||
/* __cs3_region_end_ram is deprecated */
|
||||
__cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
|
||||
__cs3_region_size_ram = LENGTH(ram);
|
||||
__cs3_region_init_ram = LOADADDR (.data);
|
||||
__cs3_region_init_size_ram = _edata - ADDR (.data);
|
||||
__cs3_region_zero_size_ram = _end - _edata;
|
||||
|
||||
.stab 0 (NOLOAD) : { *(.stab) }
|
||||
.stabstr 0 (NOLOAD) : { *(.stabstr) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to
|
||||
* the beginning of the section so we begin them at 0.
|
||||
*/
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* DWARF 2.1 */
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@@ -0,0 +1,223 @@
|
||||
/* Vector table for efm32g
|
||||
*
|
||||
* Version: Sourcery G++ 4.4-180
|
||||
* Support: https://support.codesourcery.com/GNUToolchain/
|
||||
*
|
||||
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
|
||||
*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*
|
||||
* Energy Micro release version
|
||||
* @version 1.3.0
|
||||
*/
|
||||
.section ".cs3.interrupt_vector", "ax"
|
||||
.globl __cs3_interrupt_vector_efm32g
|
||||
.type __cs3_interrupt_vector_efm32g, %object
|
||||
__cs3_interrupt_vector_efm32g:
|
||||
.long __cs3_stack
|
||||
.long __cs3_reset
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemManage_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long Reserved7_Handler
|
||||
.long Reserved8_Handler
|
||||
.long Reserved9_Handler
|
||||
.long Reserved10_Handler
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long Reserved13_Handler
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
.long DMA_IRQHandler
|
||||
.long GPIO_EVEN_IRQHandler
|
||||
.long TIMER0_IRQHandler
|
||||
.long USART0_RX_IRQHandler
|
||||
.long USART0_TX_IRQHandler
|
||||
.long ACMP0_IRQHandler
|
||||
.long ADC0_IRQHandler
|
||||
.long DAC0_IRQHandler
|
||||
.long I2C0_IRQHandler
|
||||
.long GPIO_ODD_IRQHandler
|
||||
.long TIMER1_IRQHandler
|
||||
.long TIMER2_IRQHandler
|
||||
.long USART1_RX_IRQHandler
|
||||
.long USART1_TX_IRQHandler
|
||||
.long USART2_RX_IRQHandler
|
||||
.long USART2_TX_IRQHandler
|
||||
.long UART0_RX_IRQHandler
|
||||
.long UART0_TX_IRQHandler
|
||||
.long LEUART0_IRQHandler
|
||||
.long LEUART1_IRQHandler
|
||||
.long LETIMER0_IRQHandler
|
||||
.long PCNT0_IRQHandler
|
||||
.long PCNT1_IRQHandler
|
||||
.long PCNT2_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long CMU_IRQHandler
|
||||
.long VCMP_IRQHandler
|
||||
.long LCD_IRQHandler
|
||||
.long MSC_IRQHandler
|
||||
.long AES_IRQHandler
|
||||
.size __cs3_interrupt_vector_efm32g, . - __cs3_interrupt_vector_efm32g
|
||||
|
||||
.thumb
|
||||
.thumb_func
|
||||
.section .cs3.reset,"ax",%progbits
|
||||
.globl __cs3_reset_efm32
|
||||
.type __cs3_reset_efm32, %function
|
||||
__cs3_reset_efm32:
|
||||
/* jump to common start code */
|
||||
ldr r0,=__cs3_start_asm
|
||||
bx r0
|
||||
.pool
|
||||
.size __cs3_reset_efm32,.-__cs3_reset_efm32
|
||||
.thumb
|
||||
|
||||
.globl _IRQHandlerinterrupt
|
||||
.type _IRQHandlerinterrupt, %function
|
||||
_IRQHandlerinterrupt:
|
||||
b .
|
||||
.size _IRQHandlerinterrupt, . - _IRQHandlerinterrupt
|
||||
|
||||
.weak NMI_Handler
|
||||
.globl NMI_Handler
|
||||
.set NMI_Handler, _IRQHandlerinterrupt
|
||||
.weak HardFault_Handler
|
||||
.globl HardFault_Handler
|
||||
.set HardFault_Handler, _IRQHandlerinterrupt
|
||||
.weak MemManage_Handler
|
||||
.globl MemManage_Handler
|
||||
.set MemManage_Handler, _IRQHandlerinterrupt
|
||||
.weak BusFault_Handler
|
||||
.globl BusFault_Handler
|
||||
.set BusFault_Handler, _IRQHandlerinterrupt
|
||||
.weak UsageFault_Handler
|
||||
.globl UsageFault_Handler
|
||||
.set UsageFault_Handler, _IRQHandlerinterrupt
|
||||
.weak Reserved7_Handler
|
||||
.globl Reserved7_Handler
|
||||
.set Reserved7_Handler, _IRQHandlerinterrupt
|
||||
.weak Reserved8_Handler
|
||||
.globl Reserved8_Handler
|
||||
.set Reserved8_Handler, _IRQHandlerinterrupt
|
||||
.weak Reserved9_Handler
|
||||
.globl Reserved9_Handler
|
||||
.set Reserved9_Handler, _IRQHandlerinterrupt
|
||||
.weak Reserved10_Handler
|
||||
.globl Reserved10_Handler
|
||||
.set Reserved10_Handler, _IRQHandlerinterrupt
|
||||
.weak SVC_Handler
|
||||
.globl SVC_Handler
|
||||
.set SVC_Handler, _IRQHandlerinterrupt
|
||||
.weak DebugMon_Handler
|
||||
.globl DebugMon_Handler
|
||||
.set DebugMon_Handler, _IRQHandlerinterrupt
|
||||
.weak Reserved13_Handler
|
||||
.globl Reserved13_Handler
|
||||
.set Reserved13_Handler, _IRQHandlerinterrupt
|
||||
.weak PendSV_Handler
|
||||
.globl PendSV_Handler
|
||||
.set PendSV_Handler, _IRQHandlerinterrupt
|
||||
.weak SysTick_Handler
|
||||
.globl SysTick_Handler
|
||||
.set SysTick_Handler, _IRQHandlerinterrupt
|
||||
.weak DMA_IRQHandler
|
||||
.globl DMA_IRQHandler
|
||||
.set DMA_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak GPIO_EVEN_IRQHandler
|
||||
.globl GPIO_EVEN_IRQHandler
|
||||
.set GPIO_EVEN_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak TIMER0_IRQHandler
|
||||
.globl TIMER0_IRQHandler
|
||||
.set TIMER0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART0_RX_IRQHandler
|
||||
.globl USART0_RX_IRQHandler
|
||||
.set USART0_RX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART0_TX_IRQHandler
|
||||
.globl USART0_TX_IRQHandler
|
||||
.set USART0_TX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak ACMP0_IRQHandler
|
||||
.globl ACMP0_IRQHandler
|
||||
.set ACMP0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak ADC0_IRQHandler
|
||||
.globl ADC0_IRQHandler
|
||||
.set ADC0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak DAC0_IRQHandler
|
||||
.globl DAC0_IRQHandler
|
||||
.set DAC0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak I2C0_IRQHandler
|
||||
.globl I2C0_IRQHandler
|
||||
.set I2C0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak GPIO_ODD_IRQHandler
|
||||
.globl GPIO_ODD_IRQHandler
|
||||
.set GPIO_ODD_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak TIMER1_IRQHandler
|
||||
.globl TIMER1_IRQHandler
|
||||
.set TIMER1_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak TIMER2_IRQHandler
|
||||
.globl TIMER2_IRQHandler
|
||||
.set TIMER2_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART1_RX_IRQHandler
|
||||
.globl USART1_RX_IRQHandler
|
||||
.set USART1_RX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART1_TX_IRQHandler
|
||||
.globl USART1_TX_IRQHandler
|
||||
.set USART1_TX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART2_RX_IRQHandler
|
||||
.globl USART2_RX_IRQHandler
|
||||
.set USART2_RX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak USART2_TX_IRQHandler
|
||||
.globl USART2_TX_IRQHandler
|
||||
.set USART2_TX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak UART0_RX_IRQHandler
|
||||
.globl UART0_RX_IRQHandler
|
||||
.set UART0_RX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak UART0_TX_IRQHandler
|
||||
.globl UART0_TX_IRQHandler
|
||||
.set UART0_TX_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak LEUART0_IRQHandler
|
||||
.globl LEUART0_IRQHandler
|
||||
.set LEUART0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak LEUART1_IRQHandler
|
||||
.globl LEUART1_IRQHandler
|
||||
.set LEUART1_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak LETIMER0_IRQHandler
|
||||
.globl LETIMER0_IRQHandler
|
||||
.set LETIMER0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak PCNT0_IRQHandler
|
||||
.globl PCNT0_IRQHandler
|
||||
.set PCNT0_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak PCNT1_IRQHandler
|
||||
.globl PCNT1_IRQHandler
|
||||
.set PCNT1_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak PCNT2_IRQHandler
|
||||
.globl PCNT2_IRQHandler
|
||||
.set PCNT2_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak RTC_IRQHandler
|
||||
.globl RTC_IRQHandler
|
||||
.set RTC_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak CMU_IRQHandler
|
||||
.globl CMU_IRQHandler
|
||||
.set CMU_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak VCMP_IRQHandler
|
||||
.globl VCMP_IRQHandler
|
||||
.set VCMP_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak LCD_IRQHandler
|
||||
.globl LCD_IRQHandler
|
||||
.set LCD_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak MSC_IRQHandler
|
||||
.globl MSC_IRQHandler
|
||||
.set MSC_IRQHandler, _IRQHandlerinterrupt
|
||||
.weak AES_IRQHandler
|
||||
.globl AES_IRQHandler
|
||||
.set AES_IRQHandler, _IRQHandlerinterrupt
|
||||
@@ -0,0 +1,290 @@
|
||||
/**************************************************************************//**
|
||||
* @file
|
||||
* @brief CMSIS Compatible EFM32 startup file in Cfor IAR EWARM
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#pragma language=extended
|
||||
#pragma segment="CSTACK"
|
||||
|
||||
/* IAR start function */
|
||||
extern void __iar_program_start(void);
|
||||
/* CMSIS init function */
|
||||
extern void SystemInit(void);
|
||||
|
||||
/* Auto defined by linker */
|
||||
extern unsigned char CSTACK$$Limit;
|
||||
|
||||
__weak void Reset_Handler(void)
|
||||
{
|
||||
SystemInit();
|
||||
__iar_program_start();
|
||||
}
|
||||
|
||||
__weak void NMI_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void MemManage_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void BusFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void UsageFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void SVC_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void DebugMon_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void PendSV_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void SysTick_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void DMA_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void GPIO_EVEN_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void TIMER0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART0_RX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART0_TX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void ACMP0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void ADC0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void DAC0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void I2C0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void GPIO_ODD_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void TIMER1_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void TIMER2_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART1_RX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART1_TX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART2_RX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void USART2_TX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void UART0_RX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void UART0_TX_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void LEUART0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void LEUART1_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void LETIMER0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void PCNT0_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void PCNT1_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void PCNT2_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void RTC_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void CMU_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void VCMP_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void LCD_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void MSC_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
__weak void AES_IRQHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
|
||||
/* With IAR, the CSTACK is defined via project options settings */
|
||||
#pragma location = ".intvec"
|
||||
const void * const __vector_table[]= {
|
||||
&CSTACK$$Limit,
|
||||
(void *) Reset_Handler, /* 1 - Reset (start instruction) */
|
||||
(void *) NMI_Handler, /* 2 - NMI */
|
||||
(void *) HardFault_Handler, /* 3 - HardFault */
|
||||
(void *) MemManage_Handler,
|
||||
(void *) BusFault_Handler,
|
||||
(void *) UsageFault_Handler,
|
||||
(void *) 0,
|
||||
(void *) 0,
|
||||
(void *) 0,
|
||||
(void *) 0,
|
||||
(void *) SVC_Handler,
|
||||
(void *) DebugMon_Handler,
|
||||
(void *) 0,
|
||||
(void *) PendSV_Handler,
|
||||
(void *) SysTick_Handler,
|
||||
(void *) DMA_IRQHandler, /* 0 - DMA */
|
||||
(void *) GPIO_EVEN_IRQHandler, /* 1 - GPIO_EVEN */
|
||||
(void *) TIMER0_IRQHandler, /* 2 - TIMER0 */
|
||||
(void *) USART0_RX_IRQHandler, /* 3 - USART0_RX */
|
||||
(void *) USART0_TX_IRQHandler, /* 4 - USART0_TX */
|
||||
(void *) ACMP0_IRQHandler, /* 5 - ACMP0 */
|
||||
(void *) ADC0_IRQHandler, /* 6 - ADC0 */
|
||||
(void *) DAC0_IRQHandler, /* 7 - DAC0 */
|
||||
(void *) I2C0_IRQHandler, /* 8 - I2C0 */
|
||||
(void *) GPIO_ODD_IRQHandler, /* 9 - GPIO_ODD */
|
||||
(void *) TIMER1_IRQHandler, /* 10 - TIMER1 */
|
||||
(void *) TIMER2_IRQHandler, /* 11 - TIMER2 */
|
||||
(void *) USART1_RX_IRQHandler, /* 12 - USART1_RX */
|
||||
(void *) USART1_TX_IRQHandler, /* 13 - USART1_TX */
|
||||
(void *) USART2_RX_IRQHandler, /* 14 - USART2_RX */
|
||||
(void *) USART2_TX_IRQHandler, /* 15 - USART2_TX */
|
||||
(void *) UART0_RX_IRQHandler, /* 16 - UART0_RX */
|
||||
(void *) UART0_TX_IRQHandler, /* 17 - UART0_TX */
|
||||
(void *) LEUART0_IRQHandler, /* 18 - LEUART0 */
|
||||
(void *) LEUART1_IRQHandler, /* 19 - LEUART1 */
|
||||
(void *) LETIMER0_IRQHandler, /* 20 - LETIMER0 */
|
||||
(void *) PCNT0_IRQHandler, /* 21 - PCNT0 */
|
||||
(void *) PCNT1_IRQHandler, /* 22 - PCNT1 */
|
||||
(void *) PCNT2_IRQHandler, /* 23 - PCNT2 */
|
||||
(void *) RTC_IRQHandler, /* 24 - RTC */
|
||||
(void *) CMU_IRQHandler, /* 25 - CMU */
|
||||
(void *) VCMP_IRQHandler, /* 26 - VCMP */
|
||||
(void *) LCD_IRQHandler, /* 27 - LCD */
|
||||
(void *) MSC_IRQHandler, /* 28 - MSC */
|
||||
(void *) AES_IRQHandler, /* 29 - AES */
|
||||
};
|
||||
@@ -0,0 +1,325 @@
|
||||
;/*************************************************************************//**
|
||||
; * @file: startup_efm32.s
|
||||
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
|
||||
; * for the Energy Micro 'EFM32G' Device Series
|
||||
; * @version 1.3.0
|
||||
; * @date: 7. September 2010
|
||||
; *----------------------------------------------------------------------------
|
||||
; *
|
||||
; * Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||
; *
|
||||
; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
|
||||
; * processor based microcontrollers. This file can be freely distributed
|
||||
; * within development tools that are supporting such ARM based processors.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; ******************************************************************************/
|
||||
|
||||
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM wtih at least a 128 byte
|
||||
; alignment, 256 byte alignment is requied if all interrupt vectors are in use.
|
||||
;
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
PUBLIC __vector_table_0x1c
|
||||
PUBLIC __Vectors
|
||||
PUBLIC __Vectors_End
|
||||
PUBLIC __Vectors_Size
|
||||
|
||||
DATA
|
||||
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler
|
||||
|
||||
DCD NMI_Handler
|
||||
DCD HardFault_Handler
|
||||
DCD MemManage_Handler
|
||||
DCD BusFault_Handler
|
||||
DCD UsageFault_Handler
|
||||
__vector_table_0x1c
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD SVC_Handler
|
||||
DCD DebugMon_Handler
|
||||
DCD 0
|
||||
DCD PendSV_Handler
|
||||
DCD SysTick_Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD DMA_IRQHandler ; 0: DMA Interrupt
|
||||
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
|
||||
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
|
||||
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
|
||||
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
|
||||
DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
|
||||
DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
|
||||
DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
|
||||
DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
|
||||
DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
|
||||
DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
|
||||
DCD TIMER2_IRQHandler ; 11: TIMER2 Interrupt
|
||||
DCD USART1_RX_IRQHandler ; 12: USART1_RX Interrupt
|
||||
DCD USART1_TX_IRQHandler ; 13: USART1_TX Interrupt
|
||||
DCD USART2_RX_IRQHandler ; 14: USART2_RX Interrupt
|
||||
DCD USART2_TX_IRQHandler ; 15: USART2_TX Interrupt
|
||||
DCD UART0_RX_IRQHandler ; 16: UART0_RX Interrupt
|
||||
DCD UART0_TX_IRQHandler ; 17: UART0_TX Interrupt
|
||||
DCD LEUART0_IRQHandler ; 18: LEUART0 Interrupt
|
||||
DCD LEUART1_IRQHandler ; 19: LEUART1 Interrupt
|
||||
DCD LETIMER0_IRQHandler ; 20: LETIMER0 Interrupt
|
||||
DCD PCNT0_IRQHandler ; 21: PCNT0 Interrupt
|
||||
DCD PCNT1_IRQHandler ; 22: PCNT1 Interrupt
|
||||
DCD PCNT2_IRQHandler ; 23: PCNT2 Interrupt
|
||||
DCD RTC_IRQHandler ; 24: RTC Interrupt
|
||||
DCD CMU_IRQHandler ; 25: CMU Interrupt
|
||||
DCD VCMP_IRQHandler ; 26: VCMP Interrupt
|
||||
DCD LCD_IRQHandler ; 27: LCD Interrupt
|
||||
DCD MSC_IRQHandler ; 28: MSC Interrupt
|
||||
DCD AES_IRQHandler ; 29: AES Interrupt
|
||||
|
||||
__Vectors_End
|
||||
__Vectors EQU __vector_table
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
; EFM32G specific interrupt handlers
|
||||
|
||||
PUBWEAK DMA_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA_IRQHandler
|
||||
B DMA_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_EVEN_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
GPIO_EVEN_IRQHandler
|
||||
B GPIO_EVEN_IRQHandler
|
||||
|
||||
PUBWEAK TIMER0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIMER0_IRQHandler
|
||||
B TIMER0_IRQHandler
|
||||
|
||||
PUBWEAK USART0_RX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART0_RX_IRQHandler
|
||||
B USART0_RX_IRQHandler
|
||||
|
||||
PUBWEAK USART0_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART0_TX_IRQHandler
|
||||
B USART0_TX_IRQHandler
|
||||
|
||||
PUBWEAK ACMP0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
ACMP0_IRQHandler
|
||||
B ACMP0_IRQHandler
|
||||
|
||||
PUBWEAK ADC0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
ADC0_IRQHandler
|
||||
B ADC0_IRQHandler
|
||||
|
||||
PUBWEAK DAC0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DAC0_IRQHandler
|
||||
B DAC0_IRQHandler
|
||||
|
||||
PUBWEAK I2C0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C0_IRQHandler
|
||||
B I2C0_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_ODD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
GPIO_ODD_IRQHandler
|
||||
B GPIO_ODD_IRQHandler
|
||||
|
||||
PUBWEAK TIMER1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIMER1_IRQHandler
|
||||
B TIMER1_IRQHandler
|
||||
|
||||
PUBWEAK TIMER2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIMER2_IRQHandler
|
||||
B TIMER2_IRQHandler
|
||||
|
||||
PUBWEAK USART1_RX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART1_RX_IRQHandler
|
||||
B USART1_RX_IRQHandler
|
||||
|
||||
PUBWEAK USART1_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART1_TX_IRQHandler
|
||||
B USART1_TX_IRQHandler
|
||||
|
||||
PUBWEAK USART2_RX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART2_RX_IRQHandler
|
||||
B USART2_RX_IRQHandler
|
||||
|
||||
PUBWEAK USART2_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART2_TX_IRQHandler
|
||||
B USART2_TX_IRQHandler
|
||||
|
||||
PUBWEAK UART0_RX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
UART0_RX_IRQHandler
|
||||
B UART0_RX_IRQHandler
|
||||
|
||||
PUBWEAK UART0_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
UART0_TX_IRQHandler
|
||||
B UART0_TX_IRQHandler
|
||||
|
||||
PUBWEAK LEUART0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LEUART0_IRQHandler
|
||||
B LEUART0_IRQHandler
|
||||
|
||||
PUBWEAK LEUART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LEUART1_IRQHandler
|
||||
B LEUART1_IRQHandler
|
||||
|
||||
PUBWEAK LETIMER0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LETIMER0_IRQHandler
|
||||
B LETIMER0_IRQHandler
|
||||
|
||||
PUBWEAK PCNT0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PCNT0_IRQHandler
|
||||
B PCNT0_IRQHandler
|
||||
|
||||
PUBWEAK PCNT1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PCNT1_IRQHandler
|
||||
B PCNT1_IRQHandler
|
||||
|
||||
PUBWEAK PCNT2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PCNT2_IRQHandler
|
||||
B PCNT2_IRQHandler
|
||||
|
||||
PUBWEAK RTC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RTC_IRQHandler
|
||||
B RTC_IRQHandler
|
||||
|
||||
PUBWEAK CMU_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
CMU_IRQHandler
|
||||
B CMU_IRQHandler
|
||||
|
||||
PUBWEAK VCMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
VCMP_IRQHandler
|
||||
B VCMP_IRQHandler
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
PUBWEAK MSC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
MSC_IRQHandler
|
||||
B MSC_IRQHandler
|
||||
|
||||
PUBWEAK AES_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
AES_IRQHandler
|
||||
B AES_IRQHandler
|
||||
|
||||
END
|
||||
@@ -0,0 +1,343 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "efm32.h"
|
||||
|
||||
/*******************************************************************************
|
||||
****************************** DEFINES ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** LFRCO frequency, tuned to below frequency during manufacturing. */
|
||||
#define EFM32_LFRCO_FREQ (32768)
|
||||
|
||||
/*******************************************************************************
|
||||
************************** LOCAL VARIABLES ********************************
|
||||
******************************************************************************/
|
||||
|
||||
/* System oscillator frequencies. These frequencies are normally constant */
|
||||
/* for a target, but they are made configurable in order to allow run-time */
|
||||
/* handling of different boards. The crystal oscillator clocks can be set */
|
||||
/* compile time to a non-default value by defining respective EFM32_nFXO_FREQ */
|
||||
/* values according to board design. By defining the EFM32_nFXO_FREQ to 0, */
|
||||
/* one indicates that the oscillator is not present, in order to save some */
|
||||
/* SW footprint. */
|
||||
|
||||
#ifndef EFM32_HFXO_FREQ
|
||||
#define EFM32_HFXO_FREQ (32000000)
|
||||
#endif
|
||||
/* Do not define variable if HF crystal oscillator not present */
|
||||
#if (EFM32_HFXO_FREQ > 0)
|
||||
/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
|
||||
/** System HFXO clock. */
|
||||
static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
|
||||
/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
|
||||
#endif
|
||||
|
||||
#ifndef EFM32_LFXO_FREQ
|
||||
#define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
|
||||
#endif
|
||||
/* Do not define variable if LF crystal oscillator not present */
|
||||
#if (EFM32_LFXO_FREQ > 0)
|
||||
/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
|
||||
/** System LFXO clock. */
|
||||
static uint32_t SystemLFXOClock = 32768;
|
||||
/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
************************** GLOBAL VARIABLES *******************************
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* System System Clock Frequency (Core Clock).
|
||||
*
|
||||
* @details
|
||||
* Required CMSIS global variable that must be kept up-to-date.
|
||||
*/
|
||||
uint32_t SystemCoreClock;
|
||||
|
||||
/*******************************************************************************
|
||||
************************** GLOBAL FUNCTIONS *******************************
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get the current core clock frequency.
|
||||
*
|
||||
* @details
|
||||
* Calculate and get the current core clock frequency based on the current
|
||||
* configuration. Assuming that the SystemCoreClock global variable is
|
||||
* maintained, the core clock frequency is stored in that variable as well.
|
||||
* This function will however calculate the core clock based on actual HW
|
||||
* configuration. It will also update the SystemCoreClock global variable.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @return
|
||||
* The current core clock frequency in Hz.
|
||||
******************************************************************************/
|
||||
uint32_t SystemCoreClockGet(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
ret = SystemHFClockGet();
|
||||
ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>
|
||||
_CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;
|
||||
|
||||
/* Keep CMSIS variable up-to-date just in case */
|
||||
SystemCoreClock = ret;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get the current HFCLK frequency.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @return
|
||||
* The current HFCLK frequency in Hz.
|
||||
******************************************************************************/
|
||||
uint32_t SystemHFClockGet(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |
|
||||
CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))
|
||||
{
|
||||
case CMU_STATUS_LFXOSEL:
|
||||
#if (EFM32_LFXO_FREQ > 0)
|
||||
ret = SystemLFXOClock;
|
||||
#else
|
||||
/* We should not get here, since core should not be clocked. May */
|
||||
/* be caused by a misconfiguration though. */
|
||||
ret = 0;
|
||||
#endif
|
||||
break;
|
||||
|
||||
case CMU_STATUS_LFRCOSEL:
|
||||
ret = EFM32_LFRCO_FREQ;
|
||||
break;
|
||||
|
||||
case CMU_STATUS_HFXOSEL:
|
||||
#if (EFM32_HFXO_FREQ > 0)
|
||||
ret = SystemHFXOClock;
|
||||
#else
|
||||
/* We should not get here, since core should not be clocked. May */
|
||||
/* be caused by a misconfiguration though. */
|
||||
ret = 0;
|
||||
#endif
|
||||
break;
|
||||
|
||||
default: /* CMU_STATUS_HFRCOSEL */
|
||||
switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)
|
||||
{
|
||||
case CMU_HFRCOCTRL_BAND_28MHZ:
|
||||
ret = 28000000;
|
||||
break;
|
||||
|
||||
case CMU_HFRCOCTRL_BAND_21MHZ:
|
||||
ret = 21000000;
|
||||
break;
|
||||
|
||||
case CMU_HFRCOCTRL_BAND_14MHZ:
|
||||
ret = 14000000;
|
||||
break;
|
||||
|
||||
case CMU_HFRCOCTRL_BAND_11MHZ:
|
||||
ret = 11000000;
|
||||
break;
|
||||
|
||||
case CMU_HFRCOCTRL_BAND_7MHZ:
|
||||
ret = 7000000;
|
||||
break;
|
||||
|
||||
case CMU_HFRCOCTRL_BAND_1MHZ:
|
||||
ret = 1000000;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Get high frequency crystal oscillator clock frequency for target system.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @return
|
||||
* HFXO frequency in Hz.
|
||||
*****************************************************************************/
|
||||
uint32_t SystemHFXOClockGet(void)
|
||||
{
|
||||
/* External crystal oscillator present? */
|
||||
#if (EFM32_HFXO_FREQ > 0)
|
||||
return SystemHFXOClock;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Set high frequency crystal oscillator clock frequency for target system.
|
||||
*
|
||||
* @note
|
||||
* This function is mainly provided for being able to handle target systems
|
||||
* with different HF crystal oscillator frequencies run-time. If used, it
|
||||
* should probably only be used once during system startup.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @param[in] freq
|
||||
* HFXO frequency in Hz used for target.
|
||||
*****************************************************************************/
|
||||
void SystemHFXOClockSet(uint32_t freq)
|
||||
{
|
||||
/* External crystal oscillator present? */
|
||||
#if (EFM32_HFXO_FREQ > 0)
|
||||
SystemHFXOClock = freq;
|
||||
|
||||
/* Update core clock frequency if HFXO is used to clock core */
|
||||
if (CMU->STATUS & CMU_STATUS_HFXOSEL)
|
||||
{
|
||||
/* The function will update the global variable */
|
||||
SystemCoreClockGet();
|
||||
}
|
||||
#else
|
||||
(void)freq; /* Unused parameter */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Initialize the system.
|
||||
*
|
||||
* @details
|
||||
* Do required generic HW system init.
|
||||
*
|
||||
* @note
|
||||
* This function is invoked during system init, before the main() routine
|
||||
* and any data has been initialized. For this reason, it cannot do any
|
||||
* initialization of variables etc.
|
||||
*****************************************************************************/
|
||||
void SystemInit(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Get low frequency RC oscillator clock frequency for target system.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @return
|
||||
* LFRCO frequency in Hz.
|
||||
*****************************************************************************/
|
||||
uint32_t SystemLFRCOClockGet(void)
|
||||
{
|
||||
/* Currently we assume that this frequency is properly tuned during */
|
||||
/* manufacturing and is not changed after reset. If future requirements */
|
||||
/* for re-tuning by user, we can add support for that. */
|
||||
return EFM32_LFRCO_FREQ;
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Get low frequency crystal oscillator clock frequency for target system.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @return
|
||||
* LFXO frequency in Hz.
|
||||
*****************************************************************************/
|
||||
uint32_t SystemLFXOClockGet(void)
|
||||
{
|
||||
/* External crystal oscillator present? */
|
||||
#if (EFM32_LFXO_FREQ > 0)
|
||||
return SystemLFXOClock;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Set low frequency crystal oscillator clock frequency for target system.
|
||||
*
|
||||
* @note
|
||||
* This function is mainly provided for being able to handle target systems
|
||||
* with different HF crystal oscillator frequencies run-time. If used, it
|
||||
* should probably only be used once during system startup.
|
||||
*
|
||||
* @note
|
||||
* This is an EFM32 proprietary function, not part of the CMSIS definition.
|
||||
*
|
||||
* @param[in] freq
|
||||
* LFXO frequency in Hz used for target.
|
||||
*****************************************************************************/
|
||||
void SystemLFXOClockSet(uint32_t freq)
|
||||
{
|
||||
/* External crystal oscillator present? */
|
||||
#if (EFM32_LFXO_FREQ > 0)
|
||||
SystemLFXOClock = freq;
|
||||
|
||||
/* Update core clock frequency if LFXO is used to clock core */
|
||||
if (CMU->STATUS & CMU_STATUS_LFXOSEL)
|
||||
{
|
||||
/* The function will update the global variable */
|
||||
SystemCoreClockGet();
|
||||
}
|
||||
#else
|
||||
(void)freq; /* Unused parameter */
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,85 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __SYSTEM_EFM32_H
|
||||
#define __SYSTEM_EFM32_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*******************************************************************************
|
||||
************************** GLOBAL VARIABLES *******************************
|
||||
******************************************************************************/
|
||||
|
||||
extern uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
uint32_t SystemCoreClockGet(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Update CMSIS SystemCoreClock variable.
|
||||
*
|
||||
* @details
|
||||
* CMSIS defines a global variable SystemCoreClock that shall hold the
|
||||
* core frequency in Hz. If the core frequency is dynamically changed, the
|
||||
* variable must be kept updated in order to be CMSIS compliant.
|
||||
*
|
||||
* Notice that if only changing core clock frequency through the EFM32 CMU
|
||||
* API, this variable will be kept updated. This function is only provided
|
||||
* for CMSIS compliance and if a user modifies the the core clock outside
|
||||
* the CMU API.
|
||||
*****************************************************************************/
|
||||
static __INLINE void SystemCoreClockUpdate(void)
|
||||
{
|
||||
SystemCoreClockGet();
|
||||
}
|
||||
|
||||
uint32_t SystemHFClockGet(void);
|
||||
|
||||
uint32_t SystemHFXOClockGet(void);
|
||||
void SystemHFXOClockSet(uint32_t freq);
|
||||
|
||||
void SystemInit(void);
|
||||
|
||||
uint32_t SystemLFRCOClockGet(void);
|
||||
|
||||
uint32_t SystemLFXOClockGet(void);
|
||||
void SystemLFXOClockSet(uint32_t freq);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_EFM32_H */
|
||||
44
bsp/efm32/Libraries/SConscript
Normal file
44
bsp/efm32/Libraries/SConscript
Normal file
@@ -0,0 +1,44 @@
|
||||
import rtconfig
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
src = Split("""
|
||||
CMSIS/CM3/CoreSupport/core_cm3.c
|
||||
CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.c
|
||||
efm32lib/src/efm32_acmp.c
|
||||
efm32lib/src/efm32_adc.c
|
||||
efm32lib/src/efm32_aes.c
|
||||
efm32lib/src/efm32_assert.c
|
||||
efm32lib/src/efm32_cmu.c
|
||||
efm32lib/src/efm32_dac.c
|
||||
efm32lib/src/efm32_dbg.c
|
||||
efm32lib/src/efm32_dma.c
|
||||
efm32lib/src/efm32_ebi.c
|
||||
efm32lib/src/efm32_emu.c
|
||||
efm32lib/src/efm32_gpio.c
|
||||
efm32lib/src/efm32_i2c.c
|
||||
efm32lib/src/efm32_lcd.c
|
||||
efm32lib/src/efm32_letimer.c
|
||||
efm32lib/src/efm32_leuart.c
|
||||
efm32lib/src/efm32_mpu.c
|
||||
efm32lib/src/efm32_msc.c
|
||||
efm32lib/src/efm32_pcnt.c
|
||||
efm32lib/src/efm32_prs.c
|
||||
efm32lib/src/efm32_rmu.c
|
||||
efm32lib/src/efm32_rtc.c
|
||||
efm32lib/src/efm32_system.c
|
||||
efm32lib/src/efm32_timer.c
|
||||
efm32lib/src/efm32_usart.c
|
||||
efm32lib/src/efm32_vcmp.c
|
||||
efm32lib/src/efm32_wdog.c
|
||||
""")
|
||||
|
||||
path = [RTT_ROOT + '/bsp/efm32/Libraries/efm32lib/inc',
|
||||
RTT_ROOT + '/bsp/efm32/Libraries/CMSIS/CM3/CoreSupport',
|
||||
RTT_ROOT + '/bsp/efm32/Libraries/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32']
|
||||
|
||||
CPPDEFINES = ['USE_STDPERIPH_DRIVER', rtconfig.EFM32_TYPE]
|
||||
group = DefineGroup('EFM32_StdPeriph', src, depend = [''], CPPPATH = path)
|
||||
|
||||
Return('group')
|
||||
335
bsp/efm32/Libraries/efm32lib/inc/efm32_acmp.h
Normal file
335
bsp/efm32/Libraries/efm32lib/inc/efm32_acmp.h
Normal file
@@ -0,0 +1,335 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Analog Comparator (ACMP) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_ACMP_H
|
||||
#define __EFM32_ACMP_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup ACMP
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Resistor values used for capacative sense. See the datasheet for your
|
||||
* device for details on each resistor value. */
|
||||
typedef enum
|
||||
{
|
||||
/** resistor value 0 */
|
||||
acmpResistor0 = _ACMP_INPUTSEL_CSRESSEL_RES0,
|
||||
/** resistor value 1 */
|
||||
acmpResistor1 = _ACMP_INPUTSEL_CSRESSEL_RES1,
|
||||
/** resistor value 2 */
|
||||
acmpResistor2 = _ACMP_INPUTSEL_CSRESSEL_RES2,
|
||||
/** resistor value 3 */
|
||||
acmpResistor3 = _ACMP_INPUTSEL_CSRESSEL_RES3
|
||||
} ACMP_CapsenseResistor_TypeDef;
|
||||
|
||||
/** Hysteresis level. See datasheet for your device for details on each
|
||||
* level. */
|
||||
typedef enum
|
||||
{
|
||||
acmpHysteresisLevel0 = _ACMP_CTRL_HYSTSEL_HYST0, /**< Hysteresis level 0 */
|
||||
acmpHysteresisLevel1 = _ACMP_CTRL_HYSTSEL_HYST1, /**< Hysteresis level 1 */
|
||||
acmpHysteresisLevel2 = _ACMP_CTRL_HYSTSEL_HYST2, /**< Hysteresis level 2 */
|
||||
acmpHysteresisLevel3 = _ACMP_CTRL_HYSTSEL_HYST3, /**< Hysteresis level 3 */
|
||||
acmpHysteresisLevel4 = _ACMP_CTRL_HYSTSEL_HYST4, /**< Hysteresis level 4 */
|
||||
acmpHysteresisLevel5 = _ACMP_CTRL_HYSTSEL_HYST5, /**< Hysteresis level 5 */
|
||||
acmpHysteresisLevel6 = _ACMP_CTRL_HYSTSEL_HYST6, /**< Hysteresis level 6 */
|
||||
acmpHysteresisLevel7 = _ACMP_CTRL_HYSTSEL_HYST7 /**< Hysteresis level 7 */
|
||||
} ACMP_HysteresisLevel_TypeDef;
|
||||
|
||||
/** ACMP warmup time. The delay is measured in HFPERCLK cycles and should
|
||||
* be at least 10 us. */
|
||||
typedef enum
|
||||
{
|
||||
/** 4 HFPERCLK cycles warmup */
|
||||
acmpWarmTime4 = _ACMP_CTRL_WARMTIME_4CYCLES,
|
||||
/** 8 HFPERCLK cycles warmup */
|
||||
acmpWarmTime8 = _ACMP_CTRL_WARMTIME_8CYCLES,
|
||||
/** 16 HFPERCLK cycles warmup */
|
||||
acmpWarmTime16 = _ACMP_CTRL_WARMTIME_16CYCLES,
|
||||
/** 32 HFPERCLK cycles warmup */
|
||||
acmpWarmTime32 = _ACMP_CTRL_WARMTIME_32CYCLES,
|
||||
/** 64 HFPERCLK cycles warmup */
|
||||
acmpWarmTime64 = _ACMP_CTRL_WARMTIME_64CYCLES,
|
||||
/** 128 HFPERCLK cycles warmup */
|
||||
acmpWarmTime128 = _ACMP_CTRL_WARMTIME_128CYCLES,
|
||||
/** 256 HFPERCLK cycles warmup */
|
||||
acmpWarmTime256 = _ACMP_CTRL_WARMTIME_256CYCLES,
|
||||
/** 512 HFPERCLK cycles warmup */
|
||||
acmpWarmTime512 = _ACMP_CTRL_WARMTIME_512CYCLES
|
||||
} ACMP_WarmTime_TypeDef;
|
||||
|
||||
/** ACMP inputs. Note that scaled VDD and bandgap references can only be used
|
||||
* as negative inputs. */
|
||||
typedef enum
|
||||
{
|
||||
/** Channel 0 */
|
||||
acmpChannel0 = _ACMP_INPUTSEL_NEGSEL_CH0,
|
||||
/** Channel 1 */
|
||||
acmpChannel1 = _ACMP_INPUTSEL_NEGSEL_CH1,
|
||||
/** Channel 2 */
|
||||
acmpChannel2 = _ACMP_INPUTSEL_NEGSEL_CH2,
|
||||
/** Channel 3 */
|
||||
acmpChannel3 = _ACMP_INPUTSEL_NEGSEL_CH3,
|
||||
/** Channel 4 */
|
||||
acmpChannel4 = _ACMP_INPUTSEL_NEGSEL_CH4,
|
||||
/** Channel 5 */
|
||||
acmpChannel5 = _ACMP_INPUTSEL_NEGSEL_CH5,
|
||||
/** Channel 6 */
|
||||
acmpChannel6 = _ACMP_INPUTSEL_NEGSEL_CH6,
|
||||
/** Channel 7 */
|
||||
acmpChannel7 = _ACMP_INPUTSEL_NEGSEL_CH7,
|
||||
/** 1.25V internal reference */
|
||||
acmpChannel1V25 = _ACMP_INPUTSEL_NEGSEL_1V25,
|
||||
/** 2.5V internal reference */
|
||||
acmpChannel2V5 = _ACMP_INPUTSEL_NEGSEL_2V5,
|
||||
/** Scaled VDD reference */
|
||||
acmpChannelVDD = _ACMP_INPUTSEL_NEGSEL_VDD
|
||||
} ACMP_Channel_TypeDef;
|
||||
|
||||
/*******************************************************************************
|
||||
****************************** STRUCTS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Capsense initialization structure. */
|
||||
typedef struct
|
||||
{
|
||||
/** Full bias current. See section 23.3.2 in the reference manual
|
||||
* for details. */
|
||||
bool fullBias;
|
||||
|
||||
/** Half bias current. See section 23.3.2 in the reference manual
|
||||
* for details. */
|
||||
bool halfBias;
|
||||
|
||||
/** Bias current. See section 23.3.2 in the reference manual for
|
||||
* details. Valid values are in the range 0-7. */
|
||||
uint32_t biasProg;
|
||||
|
||||
/** Warmup time. This is measured in HFPERCLK cycles and should be
|
||||
* about 10us in wall clock time. */
|
||||
ACMP_WarmTime_TypeDef warmTime;
|
||||
|
||||
/** Hysteresis level */
|
||||
ACMP_HysteresisLevel_TypeDef hysteresisLevel;
|
||||
|
||||
/** Resistor used in the capacative sensing circuit. For values see
|
||||
* your device datasheet. */
|
||||
ACMP_CapsenseResistor_TypeDef resistor;
|
||||
|
||||
/** Low power reference enabled. This setting, if enabled, reduces the
|
||||
* power used by the VDD and bandgap references. */
|
||||
bool lowPowerReferenceEnabled;
|
||||
|
||||
/** Vdd reference value. VDD_SCALED = VDD × VDDLEVEL × 50mV/3.8V.
|
||||
* Valid values are in the range 0-63. */
|
||||
uint32_t vddLevel;
|
||||
} ACMP_CapsenseInit_TypeDef;
|
||||
|
||||
/** Default config for capacitive sense on the STK */
|
||||
#define ACMP_CAPSENSE_STK_DEFAULT \
|
||||
{ false, /* fullBias */ \
|
||||
false, /* halfBias */ \
|
||||
0xF, /* biasProg */ \
|
||||
acmpWarmTime512, /* 512 cycle warmup to be safe */ \
|
||||
acmpHysteresisLevel5, \
|
||||
acmpResistor3, \
|
||||
false, /* low power reference */ \
|
||||
0x3D /* VDD level */ \
|
||||
}
|
||||
|
||||
/** ACMP initialization structure. */
|
||||
typedef struct
|
||||
{
|
||||
/** Full bias current. See section 23.3.2 in the reference manual
|
||||
* for details. */
|
||||
bool fullBias;
|
||||
|
||||
/** Half bias current. See section 23.3.2 in the reference manual
|
||||
* for details. */
|
||||
bool halfBias;
|
||||
|
||||
/** Bias current. See section 23.3.2 in the reference manual for
|
||||
* details. Valid values are in the range 0-7. */
|
||||
uint32_t biasProg;
|
||||
|
||||
/** Enable setting the interrupt flag on falling edge */
|
||||
bool interruptOnFallingEdge;
|
||||
|
||||
/** Enable setting the interrupt flag on rising edge */
|
||||
bool interruptOnRisingEdge;
|
||||
|
||||
/** Warmup time. This is measured in HFPERCLK cycles and should be
|
||||
* about 10us in wall clock time. */
|
||||
ACMP_WarmTime_TypeDef warmTime;
|
||||
|
||||
/** Hysteresis level */
|
||||
ACMP_HysteresisLevel_TypeDef hysteresisLevel;
|
||||
|
||||
/** Inactive value emitted by the ACMP during warmup */
|
||||
bool inactiveValue;
|
||||
|
||||
/** Low power reference enabled. This setting, if enabled, reduces the
|
||||
* power used by the VDD and bandgap references. */
|
||||
bool lowPowerReferenceEnabled;
|
||||
|
||||
/** Vdd reference value. VDD_SCALED = VDD × VDDLEVEL × 50mV/3.8V.
|
||||
* Valid values are in the range 0-63. */
|
||||
uint32_t vddLevel;
|
||||
} ACMP_Init_TypeDef;
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void ACMP_CapsenseInit(ACMP_TypeDef *acmp, const ACMP_CapsenseInit_TypeDef *init);
|
||||
void ACMP_CapsenseChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef channel);
|
||||
void ACMP_ChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef negSel, ACMP_Channel_TypeDef posSel);
|
||||
void ACMP_Disable(ACMP_TypeDef *acmp);
|
||||
void ACMP_DisableNoReset(ACMP_TypeDef *acmp);
|
||||
void ACMP_Enable(ACMP_TypeDef *acmp);
|
||||
void ACMP_GPIOSetup(ACMP_TypeDef *acmp, uint32_t location, bool enable, bool invert);
|
||||
void ACMP_Init(ACMP_TypeDef *acmp, const ACMP_Init_TypeDef *init);
|
||||
void ACMP_Reset(ACMP_TypeDef *acmp);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending ACMP interrupts.
|
||||
*
|
||||
* @param[in] acmp
|
||||
* Pointer to ACMP peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending ACMP interrupt source to clear. Use a logical OR combination
|
||||
* of valid interrupt flags for the ACMP module (ACMP_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void ACMP_IntClear(ACMP_TypeDef *acmp, uint32_t flags)
|
||||
{
|
||||
acmp->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more ACMP interrupts.
|
||||
*
|
||||
* @param[in] acmp
|
||||
* Pointer to ACMP peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* ACMP interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the ACMP module (ACMP_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void ACMP_IntDisable(ACMP_TypeDef *acmp, uint32_t flags)
|
||||
{
|
||||
acmp->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more ACMP interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using ACMP_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] acmp
|
||||
* Pointer to ACMP peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* ACMP interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the ACMP module (ACMP_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void ACMP_IntEnable(ACMP_TypeDef *acmp, uint32_t flags)
|
||||
{
|
||||
acmp->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending ACMP interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @param[in] acmp
|
||||
* Pointer to ACMP peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* ACMP interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the ACMP module (ACMP_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t ACMP_IntGet(ACMP_TypeDef *acmp)
|
||||
{
|
||||
return(acmp->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending ACMP interrupts from SW.
|
||||
*
|
||||
* @param[in] acmp
|
||||
* Pointer to ACMP peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* ACMP interrupt sources to set to pending. Use a logical OR combination
|
||||
* of valid interrupt flags for the ACMP module (ACMP_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void ACMP_IntSet(ACMP_TypeDef *acmp, uint32_t flags)
|
||||
{
|
||||
acmp->IFS = flags;
|
||||
}
|
||||
|
||||
/** @} (end addtogroup ACMP) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_ACMP_H */
|
||||
557
bsp/efm32/Libraries/efm32lib/inc/efm32_adc.h
Normal file
557
bsp/efm32/Libraries/efm32lib/inc/efm32_adc.h
Normal file
File diff suppressed because it is too large
Load Diff
228
bsp/efm32/Libraries/efm32lib/inc/efm32_aes.h
Normal file
228
bsp/efm32/Libraries/efm32lib/inc/efm32_aes.h
Normal file
@@ -0,0 +1,228 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Advanced encryption standard (AES) accelerator peripheral API for
|
||||
* EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_AES_H
|
||||
#define __EFM32_AES_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#if defined(AES_COUNT) && (AES_COUNT > 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup AES
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
****************************** TYPEDEFS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* AES counter modification function pointer.
|
||||
* @details
|
||||
* Parameters:
|
||||
* @li ctr - Ptr to byte array (16 bytes) holding counter to be modified.
|
||||
*/
|
||||
typedef void (*AES_CtrFuncPtr_TypeDef)(uint8_t *ctr);
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void AES_CBC128(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv,
|
||||
bool encrypt);
|
||||
|
||||
void AES_CBC256(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv,
|
||||
bool encrypt);
|
||||
|
||||
void AES_CFB128(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv,
|
||||
bool encrypt);
|
||||
|
||||
void AES_CFB256(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv,
|
||||
bool encrypt);
|
||||
|
||||
void AES_CTR128(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
uint8_t *ctr,
|
||||
AES_CtrFuncPtr_TypeDef ctrFunc);
|
||||
|
||||
void AES_CTR256(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
uint8_t *ctr,
|
||||
AES_CtrFuncPtr_TypeDef ctrFunc);
|
||||
|
||||
void AES_CTRUpdate32Bit(uint8_t *ctr);
|
||||
|
||||
void AES_DecryptKey128(uint8_t *out, const uint8_t *in);
|
||||
|
||||
void AES_DecryptKey256(uint8_t *out, const uint8_t *in);
|
||||
|
||||
void AES_ECB128(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
bool encrypt);
|
||||
|
||||
void AES_ECB256(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
bool encrypt);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending AES interrupts.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending AES interrupt source to clear. Use a logical OR combination of
|
||||
* valid interrupt flags for the AES module (AES_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void AES_IntClear(uint32_t flags)
|
||||
{
|
||||
AES->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more AES interrupts.
|
||||
*
|
||||
* @param[in] flags
|
||||
* AES interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the AES module (AES_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void AES_IntDisable(uint32_t flags)
|
||||
{
|
||||
AES->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more AES interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using AES_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] flags
|
||||
* AES interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the AES module (AES_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void AES_IntEnable(uint32_t flags)
|
||||
{
|
||||
AES->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending AES interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @return
|
||||
* AES interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the AES module (AES_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t AES_IntGet(void)
|
||||
{
|
||||
return(AES->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending AES interrupts from SW.
|
||||
*
|
||||
* @param[in] flags
|
||||
* AES interrupt sources to set to pending. Use a logical OR combination of
|
||||
* valid interrupt flags for the AES module (AES_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void AES_IntSet(uint32_t flags)
|
||||
{
|
||||
AES->IFS = flags;
|
||||
}
|
||||
|
||||
|
||||
void AES_OFB128(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv);
|
||||
|
||||
void AES_OFB256(uint8_t *out,
|
||||
const uint8_t *in,
|
||||
unsigned int len,
|
||||
const uint8_t *key,
|
||||
const uint8_t *iv);
|
||||
|
||||
|
||||
/** @} (end addtogroup AES) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_AES_H */
|
||||
|
||||
#endif /* defined(AES_COUNT) && (AES_COUNT > 0) */
|
||||
74
bsp/efm32/Libraries/efm32lib/inc/efm32_assert.h
Normal file
74
bsp/efm32/Libraries/efm32lib/inc/efm32_assert.h
Normal file
@@ -0,0 +1,74 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief EFM32 peripheral API "assert" implementation.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*
|
||||
* @details
|
||||
* By default, EFM32 library assert usage is not included in order to reduce
|
||||
* footprint and processing overhead. Further, EFM32 assert usage is decoupled
|
||||
* from ISO C assert handling (NDEBUG usage), to allow a user to use ISO C
|
||||
* assert without including EFM32 assert statements.
|
||||
*
|
||||
* Below are available defines for controlling EFM32 assert inclusion. The defines
|
||||
* are typically defined for a project to be used by the preprocessor.
|
||||
*
|
||||
* @li If DEBUG_EFM is defined, the internal EFM32 library assert handling will
|
||||
* be used, which may be a quite rudimentary implementation.
|
||||
*
|
||||
* @li If DEBUG_EFM_USER is defined instead, the user must provide its own EFM32
|
||||
* assert handling routine (assertEFM()).
|
||||
*
|
||||
* As indicated above, if none of the above defines are used, EFM32 assert
|
||||
* statements are not compiled.
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_ASSERT_H
|
||||
#define __EFM32_ASSERT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
|
||||
|
||||
#if defined(DEBUG_EFM) || defined(DEBUG_EFM_USER)
|
||||
|
||||
/* Due to footprint considerations, we only pass file name and line number, */
|
||||
/* not the assert expression (nor function name (C99)) */
|
||||
void assertEFM(const char *file, int line);
|
||||
#define EFM_ASSERT(expr) ((expr) ? ((void) 0) : assertEFM(__FILE__, __LINE__))
|
||||
|
||||
#else
|
||||
|
||||
#define EFM_ASSERT(expr) ((void) 0)
|
||||
|
||||
#endif /* defined(DEBUG_EFM) || defined(DEBUG_EFM_USER) */
|
||||
|
||||
/** @endcond */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_ASSERT_H */
|
||||
103
bsp/efm32/Libraries/efm32lib/inc/efm32_bitband.h
Normal file
103
bsp/efm32/Libraries/efm32lib/inc/efm32_bitband.h
Normal file
@@ -0,0 +1,103 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief EFM32 bitband utilities.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_BITBAND_H
|
||||
#define __EFM32_BITBAND_H
|
||||
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup BITBAND
|
||||
* @brief EFM32 bit-band utilities.
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Perform bit-band operation on peripheral memory location.
|
||||
*
|
||||
* @details
|
||||
* Bit-banding provides atomic read-modify-write cycle for single bit
|
||||
* modification. Please refer to the reference manual for further details
|
||||
* about bit-banding.
|
||||
*
|
||||
* @param[in,out] addr Peripheral address location to modify bit in.
|
||||
*
|
||||
* @param[in] bit Bit position to modify, 0-31.
|
||||
*
|
||||
* @param[in] val Value to set bit to, 0 or 1.
|
||||
******************************************************************************/
|
||||
static __INLINE void BITBAND_Peripheral(volatile uint32_t *addr,
|
||||
uint32_t bit,
|
||||
uint32_t val)
|
||||
{
|
||||
uint32_t tmp = BITBAND_PER_BASE + (((uint32_t) addr - PER_MEM_BASE) * 32) + (bit * 4);
|
||||
|
||||
*((volatile uint32_t *) tmp) = (uint32_t) val;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Perform bit-band operation on SRAM memory location.
|
||||
*
|
||||
* @details
|
||||
* Bit-banding provides atomic read-modify-write cycle for single bit
|
||||
* modification. Please refer to the reference manual for further details
|
||||
* about bit-banding.
|
||||
*
|
||||
* @param[in,out] addr SRAM address location to modify bit in.
|
||||
*
|
||||
* @param[in] bit Bit position to modify, 0-31.
|
||||
*
|
||||
* @param[in] val Value to set bit to, 0 or 1.
|
||||
******************************************************************************/
|
||||
static __INLINE void BITBAND_SRAM(uint32_t *addr, uint32_t bit, uint32_t val)
|
||||
{
|
||||
uint32_t tmp = BITBAND_RAM_BASE + (((uint32_t) addr - RAM_MEM_BASE) * 32) + (bit * 4);
|
||||
|
||||
*((volatile uint32_t *) tmp) = (uint32_t) val;
|
||||
}
|
||||
|
||||
|
||||
/** @} (end addtogroup BITBAND) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_BITBAND_H */
|
||||
157
bsp/efm32/Libraries/efm32lib/inc/efm32_chip.h
Normal file
157
bsp/efm32/Libraries/efm32lib/inc/efm32_chip.h
Normal file
@@ -0,0 +1,157 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Chip initialization, SW workarounds for chip errata issues
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_CHIP_H
|
||||
#define __EFM32_CHIP_H
|
||||
|
||||
#include "efm32.h"
|
||||
#include "efm32_system.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup CHIP
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Chip initialization routine for revision errata workarounds
|
||||
*
|
||||
* This init function will configure the EFM32 device to a state where it is
|
||||
* as similar as later revisions as possible, to improve software compatibility
|
||||
* with newer parts. See the device specific errata for details.
|
||||
*****************************************************************************/
|
||||
static __INLINE void CHIP_Init(void)
|
||||
{
|
||||
uint32_t rev;
|
||||
SYSTEM_ChipRevision_TypeDef chipRev;
|
||||
volatile uint32_t *reg;
|
||||
|
||||
rev = *(volatile uint32_t *)(0x0FE081FC);
|
||||
/* Engineering Sample calibration setup */
|
||||
if ((rev >> 24) == 0)
|
||||
{
|
||||
reg = (volatile uint32_t *) 0x400CA00C;
|
||||
*reg &= ~(0x70UL);
|
||||
/* DREG */
|
||||
reg = (volatile uint32_t *) 0x400C6020;
|
||||
*reg &= ~(0xE0000000UL);
|
||||
*reg |= ~(7UL << 25);
|
||||
}
|
||||
if ((rev >> 24) <= 3)
|
||||
{
|
||||
/* DREG */
|
||||
reg = (volatile uint32_t *) 0x400C6020;
|
||||
*reg &= ~(0x00001F80UL);
|
||||
/* Update CMU reset values */
|
||||
reg = (volatile uint32_t *) 0x400C8040;
|
||||
*reg = 0;
|
||||
reg = (volatile uint32_t *) 0x400C8044;
|
||||
*reg = 0;
|
||||
reg = (volatile uint32_t *) 0x400C8058;
|
||||
*reg = 0;
|
||||
reg = (volatile uint32_t *) 0x400C8060;
|
||||
*reg = 0;
|
||||
reg = (volatile uint32_t *) 0x400C8078;
|
||||
*reg = 0;
|
||||
}
|
||||
|
||||
SYSTEM_ChipRevisionGet(&chipRev);
|
||||
if (chipRev.major == 0x01)
|
||||
{
|
||||
/* Rev A errata handling for EM2/3. Must enable DMA clock in order for EM2/3 */
|
||||
/* to work. This will be fixed in later chip revisions, so only do for rev A. */
|
||||
if (chipRev.minor == 00)
|
||||
{
|
||||
reg = (volatile uint32_t *) 0x400C8040;
|
||||
*reg |= 0x2;
|
||||
}
|
||||
|
||||
/* Rev A+B errata handling for I2C when using EM2/3. USART0 clock must be enabled */
|
||||
/* after waking up from EM2/EM3 in order for I2C to work. This will be fixed in */
|
||||
/* later chip revisions, so only do for rev A+B. */
|
||||
if (chipRev.minor <= 0x01)
|
||||
{
|
||||
reg = (volatile uint32_t *) 0x400C8044;
|
||||
*reg |= 0x1;
|
||||
}
|
||||
}
|
||||
/* Ensure correct ADC/DAC calibration value */
|
||||
rev = *(volatile uint32_t *) 0x0FE081F0;
|
||||
if ( rev < 0x4C8ABA00 )
|
||||
{
|
||||
uint32_t cal;
|
||||
|
||||
/* Enable ADC/DAC clocks */
|
||||
reg = (volatile uint32_t *) 0x400C8044UL;
|
||||
*reg |= (1<<14|1<<11);
|
||||
|
||||
/* Retrive calibration values */
|
||||
cal = ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x00007F00UL) >>
|
||||
8) << 24;
|
||||
|
||||
cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x0000007FUL) >>
|
||||
0) << 16;
|
||||
|
||||
cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x00007F00UL) >>
|
||||
8) << 8;
|
||||
|
||||
cal |= ((*(volatile uint32_t *)(0x0FE081B4UL) & 0x0000007FUL) >>
|
||||
0) << 0;
|
||||
|
||||
/* ADC0->CAL = 1.25 reference */
|
||||
reg = (volatile uint32_t *) 0x40002034UL;
|
||||
*reg = cal;
|
||||
|
||||
/* DAC0->CAL = 1.25 reference */
|
||||
reg = (volatile uint32_t *) (0x4000402CUL);
|
||||
cal = *(volatile uint32_t *) 0x0FE081C8UL;
|
||||
*reg = cal;
|
||||
|
||||
/* Turn off ADC/DAC clocks */
|
||||
reg = (volatile uint32_t *) 0x400C8044UL;
|
||||
*reg &= ~(1<<14|1<<11);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** @} (end addtogroup SYSTEM) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_CHIP_H */
|
||||
563
bsp/efm32/Libraries/efm32lib/inc/efm32_cmu.h
Normal file
563
bsp/efm32/Libraries/efm32lib/inc/efm32_cmu.h
Normal file
File diff suppressed because it is too large
Load Diff
323
bsp/efm32/Libraries/efm32lib/inc/efm32_dac.h
Normal file
323
bsp/efm32/Libraries/efm32lib/inc/efm32_dac.h
Normal file
@@ -0,0 +1,323 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Digital to Analog Converter (DAC) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_DAC_H
|
||||
#define __EFM32_DAC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup DAC
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Conversion mode. */
|
||||
typedef enum
|
||||
{
|
||||
dacConvModeContinuous = _DAC_CTRL_CONVMODE_CONTINUOUS, /**< Continuous mode. */
|
||||
dacConvModeSampleHold = _DAC_CTRL_CONVMODE_SAMPLEHOLD, /**< Sample/hold mode. */
|
||||
dacConvModeSampleOff = _DAC_CTRL_CONVMODE_SAMPLEOFF /**< Sample/shut off mode. */
|
||||
} DAC_ConvMode_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* Low pass filter cut-off frequency. Refer to datasheet for filter
|
||||
* characteristics.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
dacLPFreq0 = _DAC_CTRL_LPFFREQ_FREQ0, /**< Cut-off frequency at FREQ0. */
|
||||
dacLPFreq1 = _DAC_CTRL_LPFFREQ_FREQ1, /**< Cut-off frequency at FREQ1. */
|
||||
dacLPFreq2 = _DAC_CTRL_LPFFREQ_FREQ2, /**< Cut-off frequency at FREQ2. */
|
||||
dacLPFreq3 = _DAC_CTRL_LPFFREQ_FREQ3 /**< Cut-off frequency at FREQ3. */
|
||||
} DAC_LPFreq_TypeDef;
|
||||
|
||||
|
||||
/** Output mode. */
|
||||
typedef enum
|
||||
{
|
||||
dacOutputDisable = _DAC_CTRL_OUTMODE_DISABLE, /**< Output to pin and ADC disabled. */
|
||||
dacOutputPin = _DAC_CTRL_OUTMODE_PIN, /**< Output to pin only. */
|
||||
dacOutputADC = _DAC_CTRL_OUTMODE_ADC, /**< Output to ADC only */
|
||||
dacOutputPinADC = _DAC_CTRL_OUTMODE_PINADC /**< Output to pin and ADC. */
|
||||
} DAC_Output_TypeDef;
|
||||
|
||||
|
||||
/** Peripheral Reflex System signal used to trigger single sample. */
|
||||
typedef enum
|
||||
{
|
||||
dacPRSSELCh0 = _DAC_CH0CTRL_PRSSEL_PRSCH0, /**< PRS channel 0. */
|
||||
dacPRSSELCh1 = _DAC_CH0CTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
|
||||
dacPRSSELCh2 = _DAC_CH0CTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
|
||||
dacPRSSELCh3 = _DAC_CH0CTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
|
||||
dacPRSSELCh4 = _DAC_CH0CTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
|
||||
dacPRSSELCh5 = _DAC_CH0CTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
|
||||
dacPRSSELCh6 = _DAC_CH0CTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
|
||||
dacPRSSELCh7 = _DAC_CH0CTRL_PRSSEL_PRSCH7 /**< PRS channel 7. */
|
||||
} DAC_PRSSEL_TypeDef;
|
||||
|
||||
|
||||
/** Reference voltage for DAC. */
|
||||
typedef enum
|
||||
{
|
||||
dacRef1V25 = _DAC_CTRL_REFSEL_1V25, /**< Internal 1.25V bandgap reference. */
|
||||
dacRef2V5 = _DAC_CTRL_REFSEL_2V5, /**< Internal 2.5V bandgap reference. */
|
||||
dacRefVDD = _DAC_CTRL_REFSEL_VDD /**< VDD reference. */
|
||||
} DAC_Ref_TypeDef;
|
||||
|
||||
|
||||
/** Refresh interval. */
|
||||
typedef enum
|
||||
{
|
||||
dacRefresh8 = _DAC_CTRL_REFRSEL_8CYCLES, /**< Refresh every 8 prescaled cycles. */
|
||||
dacRefresh16 = _DAC_CTRL_REFRSEL_16CYCLES, /**< Refresh every 16 prescaled cycles. */
|
||||
dacRefresh32 = _DAC_CTRL_REFRSEL_32CYCLES, /**< Refresh every 32 prescaled cycles. */
|
||||
dacRefresh64 = _DAC_CTRL_REFRSEL_64CYCLES /**< Refresh every 64 prescaled cycles. */
|
||||
} DAC_Refresh_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/** DAC init structure, common for both channels. */
|
||||
typedef struct
|
||||
{
|
||||
/** Refresh interval. Only used if REFREN bit set for a DAC channel. */
|
||||
DAC_Refresh_TypeDef refresh;
|
||||
|
||||
/** Low pass cut-off frequency. Only applicable if @p lpEnable true. */
|
||||
DAC_LPFreq_TypeDef lpFreq;
|
||||
|
||||
/** Reference voltage to use. */
|
||||
DAC_Ref_TypeDef reference;
|
||||
|
||||
/** Output mode */
|
||||
DAC_Output_TypeDef outMode;
|
||||
|
||||
/** Conversion mode. */
|
||||
DAC_ConvMode_TypeDef convMode;
|
||||
|
||||
/**
|
||||
* Prescaler used to get DAC clock. Derived as follows:
|
||||
* DACclk=HFPERclk/(2^prescale). The DAC clock should be <= 1MHz.
|
||||
*/
|
||||
uint8_t prescale;
|
||||
|
||||
/** Enable/disable use of low pass filter on output. */
|
||||
bool lpEnable;
|
||||
|
||||
/** Enable/disable reset of prescaler on ch0 start. */
|
||||
bool ch0ResetPre;
|
||||
|
||||
/** Enable/disable output enable control by CH1 PRS signal. */
|
||||
bool outEnablePRS;
|
||||
|
||||
/** Enable/disable sine mode. */
|
||||
bool sineEnable;
|
||||
|
||||
/** Select if single ended or differential mode. */
|
||||
bool diff;
|
||||
} DAC_Init_TypeDef;
|
||||
|
||||
/** Default config for DAC init structure. */
|
||||
#define DAC_INIT_DEFAULT \
|
||||
{ dacRefresh8, /* Refresh every 8 prescaled cycles. */ \
|
||||
dacLPFreq0, /* Cut-off at freq0 (if cut-off enabled). */ \
|
||||
dacRef1V25, /* 1.25V internal reference. */ \
|
||||
dacOutputPin, /* Output to pin only. */ \
|
||||
dacConvModeContinuous, /* Continuous mode. */ \
|
||||
0, /* No prescaling. */ \
|
||||
false, /* Do not enable low pass filter. */ \
|
||||
false, /* Do not reset prescaler on ch0 start. */ \
|
||||
false, /* DAC output enable always on. */ \
|
||||
false, /* Disable sine mode. */ \
|
||||
false /* Single ended mode. */ \
|
||||
}
|
||||
|
||||
|
||||
/** DAC channel init structure. */
|
||||
typedef struct
|
||||
{
|
||||
/** Enable channel. */
|
||||
bool enable;
|
||||
|
||||
/**
|
||||
* Peripheral reflex system trigger enable. If false, channel is triggered
|
||||
* by writing to CHnDATA.
|
||||
*/
|
||||
bool prsEnable;
|
||||
|
||||
/**
|
||||
* Enable/disable automatic refresh of channel. Refresh interval must be
|
||||
* defined in common control init, please see DAC_Init().
|
||||
*/
|
||||
bool refreshEnable;
|
||||
|
||||
/**
|
||||
* Peripheral reflex system trigger selection. Only applicable if @p prsEnable
|
||||
* is enabled.
|
||||
*/
|
||||
DAC_PRSSEL_TypeDef prsSel;
|
||||
} DAC_InitChannel_TypeDef;
|
||||
|
||||
/** Default config for DAC channel init structure. */
|
||||
#define DAC_INITCHANNEL_DEFAULT \
|
||||
{ false, /* Leave channel disabled when init done. */ \
|
||||
false, /* Disable PRS triggering. */ \
|
||||
false, /* Channel not refreshed automatically. */ \
|
||||
dacPRSSELCh0 /* Select PRS ch0 (if PRS triggering enabled). */ \
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void DAC_Enable(DAC_TypeDef *dac, unsigned int ch, bool enable);
|
||||
void DAC_Init(DAC_TypeDef *dac, const DAC_Init_TypeDef *init);
|
||||
void DAC_InitChannel(DAC_TypeDef *dac,
|
||||
const DAC_InitChannel_TypeDef *init,
|
||||
unsigned int ch);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending DAC interrupts.
|
||||
*
|
||||
* @param[in] dac
|
||||
* Pointer to DAC peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending DAC interrupt source to clear. Use a logical OR combination of
|
||||
* valid interrupt flags for the DAC module (DAC_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void DAC_IntClear(DAC_TypeDef *dac, uint32_t flags)
|
||||
{
|
||||
dac->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more DAC interrupts.
|
||||
*
|
||||
* @param[in] dac
|
||||
* Pointer to DAC peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* DAC interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the DAC module (DAC_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void DAC_IntDisable(DAC_TypeDef *dac, uint32_t flags)
|
||||
{
|
||||
dac->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more DAC interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using DAC_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] dac
|
||||
* Pointer to DAC peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* DAC interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the DAC module (DAC_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void DAC_IntEnable(DAC_TypeDef *dac, uint32_t flags)
|
||||
{
|
||||
dac->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending DAC interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @param[in] dac
|
||||
* Pointer to DAC peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* DAC interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the DAC module (DAC_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t DAC_IntGet(DAC_TypeDef *dac)
|
||||
{
|
||||
return(dac->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending DAC interrupts from SW.
|
||||
*
|
||||
* @param[in] dac
|
||||
* Pointer to DAC peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* DAC interrupt sources to set to pending. Use a logical OR combination of
|
||||
* valid interrupt flags for the DAC module (DAC_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void DAC_IntSet(DAC_TypeDef *dac, uint32_t flags)
|
||||
{
|
||||
dac->IFS = flags;
|
||||
}
|
||||
|
||||
uint8_t DAC_PrescaleCalc(uint32_t dacFreq, uint32_t hfperFreq);
|
||||
void DAC_Reset(DAC_TypeDef *dac);
|
||||
|
||||
/** @} (end addtogroup DAC) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_DAC_H */
|
||||
84
bsp/efm32/Libraries/efm32lib/inc/efm32_dbg.h
Normal file
84
bsp/efm32/Libraries/efm32lib/inc/efm32_dbg.h
Normal file
@@ -0,0 +1,84 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Debug (DBG) utilities API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_DBG_H
|
||||
#define __EFM32_DBG_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup DBG
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Check if a debugger is connected (and debug session activated)
|
||||
*
|
||||
* @details
|
||||
* Used to make run-time decisions depending on whether a debug session
|
||||
* has been active since last reset, ie using a debug probe or similar. In
|
||||
* some cases special handling is required in that scenario.
|
||||
*
|
||||
* @return
|
||||
* true if a debug session is active since last reset, otherwise false.
|
||||
******************************************************************************/
|
||||
static __INLINE bool DBG_Connected(void)
|
||||
{
|
||||
if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
void DBG_SWOEnable(unsigned int location);
|
||||
|
||||
/** @} (end addtogroup DBG) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_DBG_H */
|
||||
372
bsp/efm32/Libraries/efm32lib/inc/efm32_dma.h
Normal file
372
bsp/efm32/Libraries/efm32lib/inc/efm32_dma.h
Normal file
@@ -0,0 +1,372 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Direct memory access (DMA) API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __EFM32_DMA_H
|
||||
#define __EFM32_DMA_H
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup DMA
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* Amount source/destination address should be incremented for each data
|
||||
* transfer.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
dmaDataInc1 = _DMA_CTRL_SRC_INC_BYTE, /**< Increment address 1 byte. */
|
||||
dmaDataInc2 = _DMA_CTRL_SRC_INC_HALFWORD, /**< Increment address 2 bytes. */
|
||||
dmaDataInc4 = _DMA_CTRL_SRC_INC_WORD, /**< Increment address 4 bytes. */
|
||||
dmaDataIncNone = _DMA_CTRL_SRC_INC_NONE /**< Do not increment address. */
|
||||
} DMA_DataInc_TypeDef;
|
||||
|
||||
|
||||
/** Data sizes (in number of bytes) to be read/written by DMA transfer. */
|
||||
typedef enum
|
||||
{
|
||||
dmaDataSize1 = _DMA_CTRL_SRC_SIZE_BYTE, /**< 1 byte DMA transfer size. */
|
||||
dmaDataSize2 = _DMA_CTRL_SRC_SIZE_HALFWORD, /**< 2 byte DMA transfer size. */
|
||||
dmaDataSize4 = _DMA_CTRL_SRC_SIZE_WORD /**< 4 byte DMA transfer size. */
|
||||
} DMA_DataSize_TypeDef;
|
||||
|
||||
|
||||
/** Type of DMA transfer. */
|
||||
typedef enum
|
||||
{
|
||||
/** Basic DMA cycle. */
|
||||
dmaCycleCtrlBasic = _DMA_CTRL_CYCLE_CTRL_BASIC,
|
||||
/** Auto-request DMA cycle. */
|
||||
dmaCycleCtrlAuto = _DMA_CTRL_CYCLE_CTRL_AUTO,
|
||||
/** Ping-pong DMA cycle. */
|
||||
dmaCycleCtrlPingPong = _DMA_CTRL_CYCLE_CTRL_PINGPONG,
|
||||
/** Memory scatter-gather DMA cycle. */
|
||||
dmaCycleCtrlMemScatterGather = _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER,
|
||||
/** Peripheral scatter-gather DMA cycle. */
|
||||
dmaCycleCtrlPerScatterGather = _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER
|
||||
} DMA_CycleCtrl_TypeDef;
|
||||
|
||||
|
||||
/** Number of transfers before controller does new arbitration. */
|
||||
typedef enum
|
||||
{
|
||||
dmaArbitrate1 = _DMA_CTRL_R_POWER_1, /**< Arbitrate after 1 DMA transfer. */
|
||||
dmaArbitrate2 = _DMA_CTRL_R_POWER_2, /**< Arbitrate after 2 DMA transfers. */
|
||||
dmaArbitrate4 = _DMA_CTRL_R_POWER_4, /**< Arbitrate after 4 DMA transfers. */
|
||||
dmaArbitrate8 = _DMA_CTRL_R_POWER_8, /**< Arbitrate after 8 DMA transfers. */
|
||||
dmaArbitrate16 = _DMA_CTRL_R_POWER_16, /**< Arbitrate after 16 DMA transfers. */
|
||||
dmaArbitrate32 = _DMA_CTRL_R_POWER_32, /**< Arbitrate after 32 DMA transfers. */
|
||||
dmaArbitrate64 = _DMA_CTRL_R_POWER_64, /**< Arbitrate after 64 DMA transfers. */
|
||||
dmaArbitrate128 = _DMA_CTRL_R_POWER_128, /**< Arbitrate after 128 DMA transfers. */
|
||||
dmaArbitrate256 = _DMA_CTRL_R_POWER_256, /**< Arbitrate after 256 DMA transfers. */
|
||||
dmaArbitrate512 = _DMA_CTRL_R_POWER_512, /**< Arbitrate after 512 DMA transfers. */
|
||||
dmaArbitrate1024 = _DMA_CTRL_R_POWER_1024 /**< Arbitrate after 1024 DMA transfers. */
|
||||
} DMA_ArbiterConfig_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* DMA interrupt callback function pointer.
|
||||
* @details
|
||||
* Parameters:
|
||||
* @li channel - The DMA channel the callback function is invoked for.
|
||||
* @li primary - Indicates if callback is invoked for completion of primary
|
||||
* (true) or alternate (false) descriptor. This is mainly useful for
|
||||
* ping-pong DMA cycles, in order to know which descriptor to refresh.
|
||||
* @li user - User definable reference that may be used to pass information
|
||||
* to be used by the callback handler. If used, the referenced data must be
|
||||
* valid at the point when the interrupt handler invokes the callback.
|
||||
* If callback changes any data in the provided user structure, remember
|
||||
* that those changes are done in interrupt context, and proper protection
|
||||
* of data may be required.
|
||||
*/
|
||||
typedef void (*DMA_FuncPtr_TypeDef)(unsigned int channel, bool primary, void *user);
|
||||
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Callback structure that can be used to define DMA complete actions.
|
||||
* @details
|
||||
* A reference to this structure is only stored in the primary descriptor
|
||||
* for a channel (if callback feature is used). If callback is required
|
||||
* for both primary and alternate descriptor completion, this must be
|
||||
* handled by one common callback, using the provided 'primary' parameter
|
||||
* with the callback function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* Pointer to callback function to invoke when DMA transfer cycle done.
|
||||
* Notice that this function is invoked in interrupt context, and therefore
|
||||
* should be short and non-blocking.
|
||||
*/
|
||||
DMA_FuncPtr_TypeDef cbFunc;
|
||||
|
||||
/** User defined pointer to provide with callback function. */
|
||||
void *userPtr;
|
||||
|
||||
/**
|
||||
* For internal use only: Indicates if next callback applies to primary
|
||||
* or alternate descriptor completion. Mainly useful for ping-pong DMA
|
||||
* cycles. Set this value to 0 prior to configuring callback handling.
|
||||
*/
|
||||
uint8_t primary;
|
||||
} DMA_CB_TypeDef;
|
||||
|
||||
|
||||
/** Configuration structure for a channel. */
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* Select if channel priority is in the high or default priority group
|
||||
* with respect to arbitration. Within a priority group, lower numbered
|
||||
* channels have higher priority than higher numbered channels.
|
||||
*/
|
||||
bool highPri;
|
||||
|
||||
/**
|
||||
* Select if interrupt shall be enabled for channel (triggering interrupt
|
||||
* handler when dma_done signal is asserted). It should normally be
|
||||
* enabled if using the callback feature for a channel, and disabled if
|
||||
* not using the callback feature.
|
||||
*/
|
||||
bool enableInt;
|
||||
|
||||
/**
|
||||
* Channel control specifying the source of DMA signals. If accessing
|
||||
* peripherals, use one of the DMAREQ_nnn defines available for the
|
||||
* peripheral. Set it to 0 for memory-to-memory DMA cycles.
|
||||
*/
|
||||
uint32_t select;
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* User definable callback handling configuration.
|
||||
* @details
|
||||
* Please refer to structure definition for details. The callback
|
||||
* is invoked when the specified DMA cycle is complete (when dma_done
|
||||
* signal asserted). The callback is invoked in interrupt context,
|
||||
* and should be efficient and non-blocking. Set to NULL to not
|
||||
* use the callback feature.
|
||||
* @note
|
||||
* The referenced structure is used by the interrupt handler, and must
|
||||
* be available until no longer used. Thus, in most cases it should
|
||||
* not be located on the stack.
|
||||
*/
|
||||
DMA_CB_TypeDef *cb;
|
||||
} DMA_CfgChannel_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* Configuration structure for primary or alternate descriptor
|
||||
* (not used for scatter-gather DMA cycles).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/** Destination increment size for each DMA transfer */
|
||||
DMA_DataInc_TypeDef dstInc;
|
||||
|
||||
/** Source increment size for each DMA transfer */
|
||||
DMA_DataInc_TypeDef srcInc;
|
||||
|
||||
/** DMA transfer unit size. */
|
||||
DMA_DataSize_TypeDef size;
|
||||
|
||||
/**
|
||||
* Arbitration rate, ie number of DMA transfers done before rearbitration
|
||||
* takes place.
|
||||
*/
|
||||
DMA_ArbiterConfig_TypeDef arbRate;
|
||||
|
||||
/**
|
||||
* HPROT signal state, please refer to reference manual, DMA chapter for
|
||||
* further details. Normally set to 0 if protection is not an issue.
|
||||
* The following bits are available:
|
||||
* @li bit 0 - HPROT[1] control for source read accesses,
|
||||
* privileged/non-privileged access
|
||||
* @li bit 3 - HPROT[1] control for destination write accesses,
|
||||
* privileged/non-privileged access
|
||||
*/
|
||||
uint8_t hprot;
|
||||
} DMA_CfgDescr_TypeDef;
|
||||
|
||||
|
||||
/** Configuration structure for alternate scatter-gather descriptor. */
|
||||
typedef struct
|
||||
{
|
||||
/** Pointer to location to transfer data from. */
|
||||
void *src;
|
||||
|
||||
/** Pointer to location to transfer data to. */
|
||||
void *dst;
|
||||
|
||||
/** Destination increment size for each DMA transfer */
|
||||
DMA_DataInc_TypeDef dstInc;
|
||||
|
||||
/** Source increment size for each DMA transfer */
|
||||
DMA_DataInc_TypeDef srcInc;
|
||||
|
||||
/** DMA transfer unit size. */
|
||||
DMA_DataSize_TypeDef size;
|
||||
|
||||
/**
|
||||
* Arbitration rate, ie number of DMA transfers done before rearbitration
|
||||
* takes place.
|
||||
*/
|
||||
DMA_ArbiterConfig_TypeDef arbRate;
|
||||
|
||||
/** Number of DMA transfers minus 1 to do. Must be <= 1023. */
|
||||
uint16_t nMinus1;
|
||||
|
||||
/**
|
||||
* HPROT signal state, please refer to reference manual, DMA chapter for
|
||||
* further details. Normally set to 0 if protection is not an issue.
|
||||
* The following bits are available:
|
||||
* @li bit 0 - HPROT[1] control for source read accesses,
|
||||
* privileged/non-privileged access
|
||||
* @li bit 3 - HPROT[1] control for destination write accesses,
|
||||
* privileged/non-privileged access
|
||||
*/
|
||||
uint8_t hprot;
|
||||
|
||||
/** Specify if a memory or peripheral scatter-gather DMA cycle. Notice
|
||||
* that this parameter should be the same for all alternate
|
||||
* descriptors.
|
||||
* @li true - this is a peripheral scatter-gather cycle
|
||||
* @li false - this is a memory scatter-gather cycle
|
||||
*/
|
||||
bool peripheral;
|
||||
} DMA_CfgDescrSGAlt_TypeDef;
|
||||
|
||||
|
||||
/** DMA init structure */
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* HPROT signal state when accessing the primary/alternate
|
||||
* descriptors. Normally set to 0 if protection is not an issue.
|
||||
* The following bits are available:
|
||||
* @li bit 0 - HPROT[1] control for descriptor accesses (ie when
|
||||
* the DMA controller accesses the channel control block itself),
|
||||
* privileged/non-privileged access
|
||||
*/
|
||||
uint8_t hprot;
|
||||
|
||||
/**
|
||||
* Pointer to the controlblock in memory holding descriptors (channel
|
||||
* control data structures). This memory must be properly aligned
|
||||
* according to requirements. Please refer to the reference manual,
|
||||
* DMA chapter for details.
|
||||
*
|
||||
* It is possible to provide a smaller memory block, only covering
|
||||
* those channels actually used, if not all available channels are used.
|
||||
* Ie, if only using 4 channels (0-3), both primary and alternate
|
||||
* structures, then only 16*2*4 = 128 bytes must be provided. This
|
||||
* implementation has however no check if later exceeding such a limit
|
||||
* by configuring for instance channel 4, in which case memory overwrite
|
||||
* of some other data will occur.
|
||||
*/
|
||||
DMA_DESCRIPTOR_TypeDef *controlBlock;
|
||||
} DMA_Init_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void DMA_ActivateAuto(unsigned int channel,
|
||||
bool primary,
|
||||
void *dst,
|
||||
void *src,
|
||||
unsigned int nMinus1);
|
||||
void DMA_ActivateBasic(unsigned int channel,
|
||||
bool primary,
|
||||
bool useBurst,
|
||||
void *dst,
|
||||
void *src,
|
||||
unsigned int nMinus1);
|
||||
void DMA_ActivatePingPong(unsigned int channel,
|
||||
bool useBurst,
|
||||
void *primDst,
|
||||
void *primSrc,
|
||||
unsigned int primNMinus1,
|
||||
void *altDst,
|
||||
void *altSrc,
|
||||
unsigned int altNMinus1);
|
||||
void DMA_ActivateScatterGather(unsigned int channel,
|
||||
bool useBurst,
|
||||
DMA_DESCRIPTOR_TypeDef *altDescr,
|
||||
unsigned int count);
|
||||
void DMA_CfgChannel(unsigned int channel, DMA_CfgChannel_TypeDef *cfg);
|
||||
void DMA_CfgDescr(unsigned int channel,
|
||||
bool primary,
|
||||
DMA_CfgDescr_TypeDef *cfg);
|
||||
void DMA_CfgDescrScatterGather(DMA_DESCRIPTOR_TypeDef *descr,
|
||||
unsigned int indx,
|
||||
DMA_CfgDescrSGAlt_TypeDef *cfg);
|
||||
bool DMA_ChannelEnabled(unsigned int channel);
|
||||
void DMA_Init(DMA_Init_TypeDef *init);
|
||||
void DMA_IRQHandler(void);
|
||||
void DMA_RefreshPingPong(unsigned int channel,
|
||||
bool primary,
|
||||
bool useBurst,
|
||||
void *dst,
|
||||
void *src,
|
||||
unsigned int nMinus1,
|
||||
bool last);
|
||||
void DMA_Reset(void);
|
||||
|
||||
/** @} (end addtogroup DMA) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_DMA_H */
|
||||
213
bsp/efm32/Libraries/efm32lib/inc/efm32_ebi.h
Normal file
213
bsp/efm32/Libraries/efm32lib/inc/efm32_ebi.h
Normal file
@@ -0,0 +1,213 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief External Bus Iterface (EBI) peripheral API for EFM32
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_EBI_H
|
||||
#define __EFM32_EBI_H
|
||||
|
||||
#include "efm32.h"
|
||||
|
||||
#if defined(EBI_COUNT) && (EBI_COUNT > 0)
|
||||
#include "efm32_bitband.h"
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EBI
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @verbatim
|
||||
*
|
||||
* --------- ---------
|
||||
* | EBI | /| |\ | Ext. |
|
||||
* | | / --------- \ | Async |
|
||||
* |(EFM32)| \ --------- / | Device|
|
||||
* | | \| |/ | |
|
||||
* --------- ---------
|
||||
* Parallel interface
|
||||
*
|
||||
* @endverbatim
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* DEFINES ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
#define EBI_BANK0 (1 << 1) /**< EBI address bank 0 */
|
||||
#define EBI_BANK1 (1 << 2) /**< EBI address bank 1 */
|
||||
#define EBI_BANK2 (1 << 3) /**< EBI address bank 2 */
|
||||
#define EBI_BANK3 (1 << 4) /**< EBI address bank 3 */
|
||||
|
||||
#define EBI_CS0 (1 << 1) /**< EBI chip select line 0 */
|
||||
#define EBI_CS1 (1 << 2) /**< EBI chip select line 1 */
|
||||
#define EBI_CS2 (1 << 3) /**< EBI chip select line 2 */
|
||||
#define EBI_CS3 (1 << 4) /**< EBI chip select line 3 */
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** EBI Mode of operation */
|
||||
typedef enum
|
||||
{
|
||||
/** 8 data bits, 8 address bits */
|
||||
ebiModeD8A8 = EBI_CTRL_MODE_D8A8,
|
||||
/** 16 data bits, 16 address bits, using address latch enable */
|
||||
ebiModeD16A16ALE = EBI_CTRL_MODE_D16A16ALE,
|
||||
/** 8 data bits, 24 address bits, using address latch enable */
|
||||
ebiModeD8A24ALE = EBI_CTRL_MODE_D8A24ALE
|
||||
} EBI_Mode_TypeDef;
|
||||
|
||||
/** EBI Polarity configuration */
|
||||
typedef enum
|
||||
{
|
||||
/** Active Low */
|
||||
ebiActiveLow = 0,
|
||||
/** Active High */
|
||||
ebiActiveHigh = 1
|
||||
} EBI_Polarity_TypeDef;
|
||||
|
||||
/** EBI Pin Line types */
|
||||
typedef enum
|
||||
{
|
||||
/** Address Ready polarity */
|
||||
ebiLineARDY,
|
||||
/** Address Latch Enable polarity */
|
||||
ebiLineALE,
|
||||
/** Write Enable polarity */
|
||||
ebiLineWE,
|
||||
/** Read Enable polarity */
|
||||
ebiLineRE,
|
||||
/** Chip Select polarity */
|
||||
ebiLineCS
|
||||
} EBI_Line_TypeDef;
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/** EBI Initialization structure */
|
||||
typedef struct
|
||||
{
|
||||
/** EBI operation mode, data and address limits */
|
||||
EBI_Mode_TypeDef mode;
|
||||
/** Address Ready pin polarity, active high or low */
|
||||
EBI_Polarity_TypeDef ardyPolarity;
|
||||
/** Address Latch Enable pin polarity, active high or low */
|
||||
EBI_Polarity_TypeDef alePolarity;
|
||||
/** Write Enable pin polarity, active high or low */
|
||||
EBI_Polarity_TypeDef wePolarity;
|
||||
/** Read Enable pin polarity, active high or low */
|
||||
EBI_Polarity_TypeDef rePolarity;
|
||||
/** Chip Select pin polarity, active high or low */
|
||||
EBI_Polarity_TypeDef csPolarity;
|
||||
/** Flag to enable or disable Address Ready support */
|
||||
bool ardyEnable;
|
||||
/** Set to turn off 32 cycle timeout ability */
|
||||
bool ardyDisableTimeout;
|
||||
/** Mask of flags which selects address banks to configure EBI_BANK<0-3> */
|
||||
uint32_t banks;
|
||||
/** Mask of flags which selects chip select lines t configure EBI_CS<0-3> */
|
||||
uint32_t csLines;
|
||||
/** Number of cycles address is held after Adress Latch Enable is asserted */
|
||||
int addrSetupCycles;
|
||||
/** Number of cycles address is driven onto the ADDRDAT bus before ALE is asserted */
|
||||
int addrHoldCycles;
|
||||
/** Number of cycles for address setup before REn is asserted */
|
||||
int readSetupCycles;
|
||||
/** Number of cycles REn is held active */
|
||||
int readStrobeCycles;
|
||||
/** Number of cycles CSn is held active after REn is deasserted */
|
||||
int readHoldCycles;
|
||||
/** Number of cycles for address setup before WEn is asserted */
|
||||
int writeSetupCycles;
|
||||
/** Number of cycles WEn is held active */
|
||||
int writeStrobeCycles;
|
||||
/** Number of cycles CSn is held active after WEn is deasserted */
|
||||
int writeHoldCycles;
|
||||
/** Flag, if EBI should be enabled after configuration */
|
||||
bool enable;
|
||||
} EBI_Init_TypeDef;
|
||||
|
||||
/** Default config for EBI init structures */
|
||||
#define EBI_INIT_DEFAULT \
|
||||
{ ebiModeD8A8, /* 8 bit address, 8 bit data */ \
|
||||
ebiActiveLow, /* ARDY polarity */ \
|
||||
ebiActiveLow, /* ALE polarity */ \
|
||||
ebiActiveLow, /* WE polarity */ \
|
||||
ebiActiveLow, /* RE polarity */ \
|
||||
ebiActiveLow, /* CS polarity */ \
|
||||
false, /* enable ARDY */ \
|
||||
false, /* don't disable ARDY timeout */ \
|
||||
EBI_BANK0, /* enable bank 0 */ \
|
||||
EBI_CS0, /* enable chip select 0 */ \
|
||||
0, /* addr setup cycles */ \
|
||||
1, /* addr hold cycles */ \
|
||||
0, /* read setup cycles */ \
|
||||
0, /* read strobe cycles */ \
|
||||
0, /* read hold cycles */ \
|
||||
0, /* write setup cycles */ \
|
||||
0, /* write strobe cycles */ \
|
||||
1, /* write hold cycles */ \
|
||||
true, /* enable EBI */ \
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void EBI_Init(const EBI_Init_TypeDef *ebiInit);
|
||||
void EBI_Disable(void);
|
||||
uint32_t EBI_BankAddress(uint32_t bank);
|
||||
void EBI_BankEnable(uint32_t banks, bool enable);
|
||||
void EBI_ChipSelectEnable(uint32_t banks, bool enable);
|
||||
void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles);
|
||||
void EBI_WriteTimingSet(int setupCycles, int strobeCycles, int holdCycles);
|
||||
void EBI_AddressTimingSet(int setupCycles, int holdCycles);
|
||||
void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
|
||||
|
||||
/** @} (end addtogroup EBI) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* defined(EBI_COUNT) && (EBI_COUNT > 0) */
|
||||
|
||||
#endif /* __EFM32_EBI_H */
|
||||
104
bsp/efm32/Libraries/efm32lib/inc/efm32_emu.h
Normal file
104
bsp/efm32/Libraries/efm32lib/inc/efm32_emu.h
Normal file
@@ -0,0 +1,104 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Energy management unit (EMU) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_EMU_H
|
||||
#define __EFM32_EMU_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EMU
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enter energy mode 1 (EM1).
|
||||
******************************************************************************/
|
||||
static __INLINE void EMU_EnterEM1(void)
|
||||
{
|
||||
/* Just enter Cortex-M3 sleep mode */
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
__WFI();
|
||||
}
|
||||
|
||||
|
||||
void EMU_EnterEM2(bool restore);
|
||||
void EMU_EnterEM3(bool restore);
|
||||
void EMU_EnterEM4(void);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Lock the EMU in order to protect all its registers against unintended
|
||||
* modification.
|
||||
*
|
||||
* @note
|
||||
* If locking the EMU registers, they must be unlocked prior to using any
|
||||
* EMU API functions modifying EMU registers. An exception to this is the
|
||||
* energy mode entering API (EMU_EnterEMn()), which can be used when the
|
||||
* EMU registers are locked.
|
||||
******************************************************************************/
|
||||
static __INLINE void EMU_Lock(void)
|
||||
{
|
||||
EMU->LOCK = EMU_LOCK_LOCKKEY_LOCK;
|
||||
}
|
||||
|
||||
void EMU_MemPwrDown(uint32_t blocks);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Unlock the EMU so that writing to locked registers again is possible.
|
||||
******************************************************************************/
|
||||
static __INLINE void EMU_Unlock(void)
|
||||
{
|
||||
EMU->LOCK = EMU_LOCK_LOCKKEY_UNLOCK;
|
||||
}
|
||||
|
||||
void EMU_UpdateOscConfig(void);
|
||||
|
||||
/** @} (end addtogroup EMU) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_EMU_H */
|
||||
321
bsp/efm32/Libraries/efm32lib/inc/efm32_gpio.h
Normal file
321
bsp/efm32/Libraries/efm32lib/inc/efm32_gpio.h
Normal file
@@ -0,0 +1,321 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief General Purpose IO (GPIO) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_GPIO_H
|
||||
#define __EFM32_GPIO_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
#include "efm32_bitband.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup GPIO
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** GPIO ports identificator. */
|
||||
typedef enum
|
||||
{
|
||||
gpioPortA = 0, /**< Port A */
|
||||
gpioPortB = 1, /**< Port B */
|
||||
gpioPortC = 2, /**< Port C */
|
||||
gpioPortD = 3, /**< Port D */
|
||||
gpioPortE = 4, /**< Port E */
|
||||
gpioPortF = 5 /**< Port F */
|
||||
} GPIO_Port_TypeDef;
|
||||
|
||||
/** GPIO drive mode. */
|
||||
typedef enum
|
||||
{
|
||||
/** Default 6mA */
|
||||
gpioDriveModeStandard = GPIO_P_CTRL_DRIVEMODE_STANDARD,
|
||||
/** 0.5 mA */
|
||||
gpioDriveModeLowest = GPIO_P_CTRL_DRIVEMODE_LOWEST,
|
||||
/** 20 mA */
|
||||
gpioDriveModeHigh = GPIO_P_CTRL_DRIVEMODE_HIGH,
|
||||
/** 2 mA */
|
||||
gpioDriveModeLow = GPIO_P_CTRL_DRIVEMODE_LOW
|
||||
} GPIO_DriveMode_TypeDef;
|
||||
|
||||
/** Pin mode. For more details on each mode, please refer to the EFM32
|
||||
* reference manual. */
|
||||
typedef enum
|
||||
{
|
||||
/** Input disabled. Pullup if DOUT is set. */
|
||||
gpioModeDisabled = _GPIO_P_MODEL_MODE0_DISABLED,
|
||||
/** Input enabled. Filter if DOUT is set */
|
||||
gpioModeInput = _GPIO_P_MODEL_MODE0_INPUT,
|
||||
/** Input enabled. DOUT determines pull direction */
|
||||
gpioModeInputPull = _GPIO_P_MODEL_MODE0_INPUTPULL,
|
||||
/** Input enabled with filter. DOUT determines pull direction */
|
||||
gpioModeInputPullFilter = _GPIO_P_MODEL_MODE0_INPUTPULLFILTER,
|
||||
/** Push-pull output */
|
||||
gpioModePushPull = _GPIO_P_MODEL_MODE0_PUSHPULL,
|
||||
/** Push-pull output with drive-strength set by DRIVEMODE */
|
||||
gpioModePushPullDrive = _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE,
|
||||
/** Wired-or output */
|
||||
gpioModeWiredOr = _GPIO_P_MODEL_MODE0_WIREDOR,
|
||||
/** Wired-or output with pull-down */
|
||||
gpioModeWiredOrPullDown = _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN,
|
||||
/** Open-drain output */
|
||||
gpioModeWiredAnd = _GPIO_P_MODEL_MODE0_WIREDAND,
|
||||
/** Open-drain output with filter */
|
||||
gpioModeWiredAndFilter = _GPIO_P_MODEL_MODE0_WIREDANDFILTER,
|
||||
/** Open-drain output with pullup */
|
||||
gpioModeWiredAndPullUp = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP,
|
||||
/** Open-drain output with filter and pullup */
|
||||
gpioModeWiredAndPullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER,
|
||||
/** Open-drain output with drive-strength set by DRIVEMODE */
|
||||
gpioModeWiredAndDrive = _GPIO_P_MODEL_MODE0_WIREDANDDRIVE,
|
||||
/** Open-drain output with filter and drive-strength set by DRIVEMODE */
|
||||
gpioModeWiredAndDriveFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER,
|
||||
/** Open-drain output with pullup and drive-strength set by DRIVEMODE */
|
||||
gpioModeWiredAndDrivePullUp = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP,
|
||||
/** Open-drain output with filter, pullup and drive-strength set by DRIVEMODE */
|
||||
gpioModeWiredAndDrivePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
|
||||
} GPIO_Mode_TypeDef;
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
void GPIO_DbgLocationSet(unsigned int location);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable/disable serial wire clock pin.
|
||||
*
|
||||
* @note
|
||||
* Disabling SWDClk will disable the debug interface, which may result in
|
||||
* a lockout if done early in startup (before debugger is able to halt core).
|
||||
*
|
||||
* @param[in] enable
|
||||
* @li false - disable serial wire clock.
|
||||
* @li true - enable serial wire clock (default after reset).
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_DbgSWDClkEnable(bool enable)
|
||||
{
|
||||
BITBAND_Peripheral(&(GPIO->ROUTE), _GPIO_ROUTE_SWCLKPEN_SHIFT, (unsigned int) enable);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable/disable serial wire data pin.
|
||||
*
|
||||
* @note
|
||||
* Disabling SWDClk will disable the debug interface, which may result in
|
||||
* a lockout if done early in startup (before debugger is able to halt core).
|
||||
*
|
||||
* @param[in] enable
|
||||
* @li false - disable serial wire data pin.
|
||||
* @li true - enable serial wire data pin (default after reset).
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_DbgSWDIOEnable(bool enable)
|
||||
{
|
||||
BITBAND_Peripheral(&(GPIO->ROUTE), _GPIO_ROUTE_SWDIOPEN_SHIFT, (unsigned int) enable);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable/Disable serial wire output pin.
|
||||
*
|
||||
* @note
|
||||
* Enabling this pin is not sufficient to fully enable serial wire output
|
||||
* which is also dependent on issues outside the GPIO module. Please refer to
|
||||
* DBG_SWOEnable().
|
||||
*
|
||||
* @param[in] enable
|
||||
* @li false - disable serial wire viewer pin (default after reset).
|
||||
* @li true - enable serial wire viewer pin.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_DbgSWOEnable(bool enable)
|
||||
{
|
||||
BITBAND_Peripheral(&(GPIO->ROUTE), _GPIO_ROUTE_SWOPEN_SHIFT, (unsigned int) enable);
|
||||
}
|
||||
|
||||
|
||||
void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable/disable input sensing.
|
||||
*
|
||||
* @details
|
||||
* Disabling input sensing if not used, can save some energy consumption.
|
||||
*
|
||||
* @param[in] val
|
||||
* Logical OR of one or more of:
|
||||
* @li GPIO_INSENSE_INTSENSE - interrupt input sensing.
|
||||
* @li GPIO_INSENSE_PRSSENSE - peripheral reflex system input sensing.
|
||||
*
|
||||
* @param[in] mask
|
||||
* Mask containing logical OR of bits similar as for @p val used to indicate
|
||||
* which input sense options to disable/enable.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_InputSenseSet(uint32_t val, uint32_t mask)
|
||||
{
|
||||
GPIO->INSENSE = (GPIO->INSENSE & ~mask) | (val & mask);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending GPIO interrupts.
|
||||
*
|
||||
* @param[in] flags
|
||||
* GPIO interrupt sources to clear.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_IntClear(uint32_t flags)
|
||||
{
|
||||
GPIO->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_IntConfig(GPIO_Port_TypeDef port,
|
||||
unsigned int pin,
|
||||
bool risingEdge,
|
||||
bool fallingEdge,
|
||||
bool enable);
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more GPIO interrupts.
|
||||
*
|
||||
* @param[in] flags
|
||||
* GPIO interrupt sources to disable.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_IntDisable(uint32_t flags)
|
||||
{
|
||||
GPIO->IEN &= ~flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more GPIO interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using GPIO_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] flags
|
||||
* GPIO interrupt sources to enable.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_IntEnable(uint32_t flags)
|
||||
{
|
||||
GPIO->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending GPIO interrupts.
|
||||
*
|
||||
* @return
|
||||
* GPIO interrupt sources pending.
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t GPIO_IntGet(void)
|
||||
{
|
||||
return(GPIO->IF);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending GPIO interrupts from SW.
|
||||
*
|
||||
* @param[in] flags
|
||||
* GPIO interrupt sources to set to pending.
|
||||
*****************************************************************************/
|
||||
static __INLINE void GPIO_IntSet(uint32_t flags)
|
||||
{
|
||||
GPIO->IFS = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Locks the GPIO configuration.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_Lock(void)
|
||||
{
|
||||
GPIO->LOCK = GPIO_LOCK_LOCKKEY_LOCK;
|
||||
}
|
||||
|
||||
|
||||
unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin);
|
||||
void GPIO_PinModeSet(GPIO_Port_TypeDef port,
|
||||
unsigned int pin,
|
||||
GPIO_Mode_TypeDef mode,
|
||||
unsigned int out);
|
||||
void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin);
|
||||
unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port, unsigned int pin);
|
||||
void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin);
|
||||
void GPIO_PinOutToggle(GPIO_Port_TypeDef port, unsigned int pin);
|
||||
|
||||
uint32_t GPIO_PortInGet(GPIO_Port_TypeDef port);
|
||||
void GPIO_PortOutClear(GPIO_Port_TypeDef port, uint32_t pins);
|
||||
uint32_t GPIO_PortOutGet(GPIO_Port_TypeDef port);
|
||||
void GPIO_PortOutSet(GPIO_Port_TypeDef port, uint32_t pins);
|
||||
void GPIO_PortOutSetVal(GPIO_Port_TypeDef port, uint32_t val, uint32_t mask);
|
||||
void GPIO_PortOutToggle(GPIO_Port_TypeDef port, uint32_t pins);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Unlocks the GPIO configuration.
|
||||
******************************************************************************/
|
||||
static __INLINE void GPIO_Unlock(void)
|
||||
{
|
||||
GPIO->LOCK = GPIO_LOCK_LOCKKEY_UNLOCK;
|
||||
}
|
||||
|
||||
|
||||
/** @} (end addtogroup GPIO) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_GPIO_H */
|
||||
483
bsp/efm32/Libraries/efm32lib/inc/efm32_i2c.h
Normal file
483
bsp/efm32/Libraries/efm32lib/inc/efm32_i2c.h
Normal file
@@ -0,0 +1,483 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Inter-intergrated circuit (I2C) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_I2C_H
|
||||
#define __EFM32_I2C_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup I2C
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* DEFINES ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Standard mode max frequency assuming using 4:4 ratio for Nlow:Nhigh.
|
||||
* @details
|
||||
* From I2C specification: Min Tlow = 4.7us, min Thigh = 4.0us,
|
||||
* max Trise=1.0us, max Tfall=0.3us. Since ratio is 4:4, have to use
|
||||
* worst case value of Tlow or Thigh as base.
|
||||
*
|
||||
* 1/(Tlow + Thigh + 1us + 0.3us) = 1/(4.7 + 4.7 + 1.3)us = 93458Hz
|
||||
*/
|
||||
#define I2C_FREQ_STANDARD_MAX 93500
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Fast mode max frequency assuming using 6:3 ratio for Nlow:Nhigh.
|
||||
* @details
|
||||
* From I2C specification: Min Tlow = 1.3us, min Thigh = 0.6us,
|
||||
* max Trise=0.3us, max Tfall=0.3us. Since ratio is 6:3, have to use
|
||||
* worst case value of Tlow or 2xThigh as base.
|
||||
*
|
||||
* 1/(Tlow + Thigh + 0.3us + 0.3us) = 1/(1.3 + 0.65 + 0.6)us = 392157Hz
|
||||
*/
|
||||
#define I2C_FREQ_FAST_MAX 392500
|
||||
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Fast mode+ max frequency assuming using 11:6 ratio for Nlow:Nhigh.
|
||||
* @details
|
||||
* From I2C specification: Min Tlow = 0.5us, min Thigh = 0.26us,
|
||||
* max Trise=0.012us, max Tfall=0.12us. Since ratio is 11:6, have to use
|
||||
* worst case value of Tlow or (11/6)xThigh as base.
|
||||
*
|
||||
* 1/(Tlow + Thigh + 0.12us + 0.12us) = 1/(0.5 + 0.273 + 0.24)us = 987167Hz
|
||||
*/
|
||||
#define I2C_FREQ_FASTPLUS_MAX 987500
|
||||
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Indicate plain write sequence: S+ADDR(W)+DATA0+P.
|
||||
* @details
|
||||
* @li S - Start
|
||||
* @li ADDR(W) - address with W/R bit cleared
|
||||
* @li DATA0 - Data taken from buffer with index 0
|
||||
* @li P - Stop
|
||||
*/
|
||||
#define I2C_FLAG_WRITE 0x0001
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Indicate plain read sequence: S+ADDR(R)+DATA0+P.
|
||||
* @details
|
||||
* @li S - Start
|
||||
* @li ADDR(R) - address with W/R bit set
|
||||
* @li DATA0 - Data read into buffer with index 0
|
||||
* @li P - Stop
|
||||
*/
|
||||
#define I2C_FLAG_READ 0x0002
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Indicate combined write/read sequence: S+ADDR(W)+DATA0+Sr+ADDR(R)+DATA1+P.
|
||||
* @details
|
||||
* @li S - Start
|
||||
* @li Sr - Repeated start
|
||||
* @li ADDR(W) - address with W/R bit cleared
|
||||
* @li ADDR(R) - address with W/R bit set
|
||||
* @li DATAn - Data written from/read into buffer with index n
|
||||
* @li P - Stop
|
||||
*/
|
||||
#define I2C_FLAG_WRITE_READ 0x0004
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Indicate write sequence using two buffers: S+ADDR(W)+DATA0+DATA1+P.
|
||||
* @details
|
||||
* @li S - Start
|
||||
* @li ADDR(W) - address with W/R bit cleared
|
||||
* @li DATAn - Data written from buffer with index n
|
||||
* @li P - Stop
|
||||
*/
|
||||
#define I2C_FLAG_WRITE_WRITE 0x0008
|
||||
|
||||
/** Use 10 bit address. */
|
||||
#define I2C_FLAG_10BIT_ADDR 0x0010
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Clock low to high ratio settings. */
|
||||
typedef enum
|
||||
{
|
||||
i2cClockHLRStandard = _I2C_CTRL_CLHR_STANDARD, /**< Ratio is 4:4 */
|
||||
i2cClockHLRAsymetric = _I2C_CTRL_CLHR_ASYMMETRIC, /**< Ratio is 6:3 */
|
||||
i2cClockHLRFast = _I2C_CTRL_CLHR_FAST /**< Ratio is 11:3 */
|
||||
} I2C_ClockHLR_TypeDef;
|
||||
|
||||
|
||||
/** Return codes for single master mode transfer function. */
|
||||
typedef enum
|
||||
{
|
||||
/* In progress code (>0) */
|
||||
i2cTransferInProgress = 1, /**< Transfer in progress. */
|
||||
|
||||
/* Complete code (=0) */
|
||||
i2cTransferDone = 0, /**< Transfer completed successfully. */
|
||||
|
||||
/* Transfer error codes (<0) */
|
||||
i2cTransferNack = -1, /**< NACK received during transfer. */
|
||||
i2cTransferBusErr = -2, /**< Bus error during transfer (misplaced START/STOP). */
|
||||
i2cTransferArbLost = -3, /**< Arbitration lost during transfer. */
|
||||
i2cTransferUsageFault = -4, /**< Usage fault. */
|
||||
i2cTransferSwFault = -5 /**< SW fault. */
|
||||
} I2C_TransferReturn_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/** I2C initialization structure. */
|
||||
typedef struct
|
||||
{
|
||||
/** Enable I2C peripheral when init completed. */
|
||||
bool enable;
|
||||
|
||||
/** Set to master (true) or slave (false) mode */
|
||||
bool master;
|
||||
|
||||
/**
|
||||
* I2C reference clock assumed when configuring bus frequency setup.
|
||||
* Set it to 0 if currently configurated reference clock shall be used
|
||||
* This parameter is only applicable if operating in master mode.
|
||||
*/
|
||||
uint32_t refFreq;
|
||||
|
||||
/**
|
||||
* (Max) I2C bus frequency to use. This parameter is only applicable
|
||||
* if operating in master mode.
|
||||
*/
|
||||
uint32_t freq;
|
||||
|
||||
/** Clock low/high ratio control. */
|
||||
I2C_ClockHLR_TypeDef clhr;
|
||||
} I2C_Init_TypeDef;
|
||||
|
||||
/** Suggested default config for I2C init structure. */
|
||||
#define I2C_INIT_DEFAULT \
|
||||
{ true, /* Enable when init done */ \
|
||||
true, /* Set to master mode */ \
|
||||
0, /* Use currently configured reference clock */ \
|
||||
I2C_FREQ_STANDARD_MAX, /* Set to standard rate assuring being */ \
|
||||
/* within I2C spec */ \
|
||||
i2cClockHLRStandard /* Set to use 4:4 low/high duty cycle */ \
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Master mode transfer message structure used to define a complete
|
||||
* I2C transfer sequence (from start to stop).
|
||||
* @details
|
||||
* The structure allows for defining the following types of sequences,
|
||||
* please refer to defines for sequence details.
|
||||
* @li #I2C_FLAG_READ - data read into buf[0].data
|
||||
* @li #I2C_FLAG_WRITE - data written from buf[0].data
|
||||
* @li #I2C_FLAG_WRITE_READ - data written from buf[0].data and read
|
||||
* into buf[1].data
|
||||
* @li #I2C_FLAG_WRITE_WRITE - data written from buf[0].data and
|
||||
* buf[1].data
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* @brief
|
||||
* Address to use after (repeated) start.
|
||||
* @details
|
||||
* Layout details, A = address bit, X = don't care bit (set to 0):
|
||||
* @li 7 bit address - use format AAAA AAAX.
|
||||
* @li 10 bit address - use format XXXX XAAX AAAA AAAA
|
||||
*/
|
||||
uint16_t addr;
|
||||
|
||||
/** Flags defining sequence type and details, see I2C_FLAG_... defines. */
|
||||
uint16_t flags;
|
||||
|
||||
/**
|
||||
* Buffers used to hold data to send from or receive into depending
|
||||
* on sequence type.
|
||||
*/
|
||||
struct
|
||||
{
|
||||
/** Buffer used for data to transmit/receive, must be @p len long. */
|
||||
uint8_t *data;
|
||||
|
||||
/**
|
||||
* Number of bytes in @p data to send or receive. Notice that when
|
||||
* receiving data to this buffer, at least 1 byte must be received.
|
||||
* Setting @p len to 0 in the receive case is considered a usage fault.
|
||||
* Transmitting 0 bytes is legal, in which case only the address
|
||||
* is transmitted after the start condition.
|
||||
*/
|
||||
uint16_t len;
|
||||
} buf[2];
|
||||
} I2C_TransferSeq_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c);
|
||||
void I2C_BusFreqSet(I2C_TypeDef *i2c,
|
||||
uint32_t refFreq,
|
||||
uint32_t freq,
|
||||
I2C_ClockHLR_TypeDef type);
|
||||
void I2C_Enable(I2C_TypeDef *i2c, bool enable);
|
||||
void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending I2C interrupts.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending I2C interrupt source to clear. Use a logical OR combination of
|
||||
* valid interrupt flags for the I2C module (I2C_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
|
||||
{
|
||||
i2c->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more I2C interrupts.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* I2C interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the I2C module (I2C_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
|
||||
{
|
||||
i2c->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more I2C interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using I2C_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* I2C interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the I2C module (I2C_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
|
||||
{
|
||||
i2c->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending I2C interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* I2C interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the I2C module (I2C_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
|
||||
{
|
||||
return(i2c->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending I2C interrupts from SW.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* I2C interrupt sources to set to pending. Use a logical OR combination of
|
||||
* valid interrupt flags for the I2C module (I2C_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
|
||||
{
|
||||
i2c->IFS = flags;
|
||||
}
|
||||
|
||||
void I2C_Reset(I2C_TypeDef *i2c);
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get slave address used for I2C peripheral (when operating in slave mode).
|
||||
*
|
||||
* @details
|
||||
* For 10 bit addressing mode, the address is split in two bytes, and only
|
||||
* the first byte setting is fetched, effectively only controlling the 2 most
|
||||
* significant bits of the 10 bit address. Full handling of 10 bit addressing
|
||||
* in slave mode requires additional SW handling.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* I2C slave address in use. The 7 most significant bits define the actual
|
||||
* address, the least significant bit is reserved and always returned as 0.
|
||||
******************************************************************************/
|
||||
static __INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
|
||||
{
|
||||
return((uint8_t)(i2c->SADDR));
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set slave address to use for I2C peripheral (when operating in slave mode).
|
||||
*
|
||||
* @details
|
||||
* For 10 bit addressing mode, the address is split in two bytes, and only
|
||||
* the first byte is set, effectively only controlling the 2 most significant
|
||||
* bits of the 10 bit address. Full handling of 10 bit addressing in slave
|
||||
* mode requires additional SW handling.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] addr
|
||||
* I2C slave address to use. The 7 most significant bits define the actual
|
||||
* address, the least significant bit is reserved and always set to 0.
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
|
||||
{
|
||||
i2c->SADDR = (uint32_t) addr & 0xfe;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get slave address mask used for I2C peripheral (when operating in slave
|
||||
* mode).
|
||||
*
|
||||
* @details
|
||||
* The address mask defines how the comparator works. A bit position with
|
||||
* value 0 means that the corresponding slave address bit is ignored during
|
||||
* comparison (don't care). A bit position with value 1 means that the
|
||||
* corresponding slave address bit must match.
|
||||
*
|
||||
* For 10 bit addressing mode, the address is split in two bytes, and only
|
||||
* the mask for the first address byte is fetched, effectively only
|
||||
* controlling the 2 most significant bits of the 10 bit address.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* I2C slave address mask in use. The 7 most significant bits define the
|
||||
* actual address mask, the least significant bit is reserved and always
|
||||
* returned as 0.
|
||||
******************************************************************************/
|
||||
static __INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
|
||||
{
|
||||
return((uint8_t)(i2c->SADDRMASK));
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set slave address mask used for I2C peripheral (when operating in slave
|
||||
* mode).
|
||||
*
|
||||
* @details
|
||||
* The address mask defines how the comparator works. A bit position with
|
||||
* value 0 means that the corresponding slave address bit is ignored during
|
||||
* comparison (don't care). A bit position with value 1 means that the
|
||||
* corresponding slave address bit must match.
|
||||
*
|
||||
* For 10 bit addressing mode, the address is split in two bytes, and only
|
||||
* the mask for the first address byte is set, effectively only controlling
|
||||
* the 2 most significant bits of the 10 bit address.
|
||||
*
|
||||
* @param[in] i2c
|
||||
* Pointer to I2C peripheral register block.
|
||||
*
|
||||
* @param[in] mask
|
||||
* I2C slave address mask to use. The 7 most significant bits define the
|
||||
* actual address mask, the least significant bit is reserved and should
|
||||
* be 0.
|
||||
******************************************************************************/
|
||||
static __INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
|
||||
{
|
||||
i2c->SADDRMASK = (uint32_t) mask & 0xfe;
|
||||
}
|
||||
|
||||
|
||||
I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c);
|
||||
I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c,
|
||||
I2C_TransferSeq_TypeDef *seq);
|
||||
|
||||
/** @} (end addtogroup I2C) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_I2C_H */
|
||||
516
bsp/efm32/Libraries/efm32lib/inc/efm32_lcd.h
Normal file
516
bsp/efm32/Libraries/efm32lib/inc/efm32_lcd.h
Normal file
File diff suppressed because it is too large
Load Diff
258
bsp/efm32/Libraries/efm32lib/inc/efm32_letimer.h
Normal file
258
bsp/efm32/Libraries/efm32lib/inc/efm32_letimer.h
Normal file
@@ -0,0 +1,258 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Low Energy Timer (LETIMER) peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_LETIMER_H
|
||||
#define __EFM32_LETIMER_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup LETIMER
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Repeat mode. */
|
||||
typedef enum
|
||||
{
|
||||
/** Count until stopped by SW. */
|
||||
letimerRepeatFree = _LETIMER_CTRL_REPMODE_FREE,
|
||||
/** Count REP0 times. */
|
||||
letimerRepeatOneshot = _LETIMER_CTRL_REPMODE_ONESHOT,
|
||||
/**
|
||||
* Count REP0 times, if REP1 has been written to, it is loaded into
|
||||
* REP0 when REP0 is about to be decremented to 0.
|
||||
*/
|
||||
letimerRepeatBuffered = _LETIMER_CTRL_REPMODE_BUFFERED,
|
||||
/**
|
||||
* Run as long as both REP0 and REP1 are not 0. Both REP0 and REP1
|
||||
* are decremented when counter underflows.
|
||||
*/
|
||||
letimerRepeatDouble = _LETIMER_CTRL_REPMODE_DOUBLE
|
||||
} LETIMER_RepeatMode_TypeDef;
|
||||
|
||||
|
||||
/** Underflow action on output. */
|
||||
typedef enum
|
||||
{
|
||||
/** No output action. */
|
||||
letimerUFOANone = _LETIMER_CTRL_UFOA0_NONE,
|
||||
/** Toggle output when counter underflows. */
|
||||
letimerUFOAToggle = _LETIMER_CTRL_UFOA0_TOGGLE,
|
||||
/** Hold output one LETIMER clock cycle when counter underflows. */
|
||||
letimerUFOAPulse = _LETIMER_CTRL_UFOA0_PULSE,
|
||||
/** Set output idle when counter underflows, and active when matching COMP1. */
|
||||
letimerUFOAPwm = _LETIMER_CTRL_UFOA0_PWM
|
||||
} LETIMER_UFOA_TypeDef;
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/** LETIMER initialization structure. */
|
||||
typedef struct
|
||||
{
|
||||
bool enable; /**< Start counting when init completed. */
|
||||
bool debugRun; /**< Counter shall keep running during debug halt. */
|
||||
bool rtcComp0Enable; /**< Start counting on RTC COMP0 match. */
|
||||
bool rtcComp1Enable; /**< Start counting on RTC COMP1 match. */
|
||||
bool comp0Top; /**< Load COMP0 register into CNT when counter underflows. */
|
||||
bool bufTop; /**< Load COMP1 into COMP0 when REP0 reaches 0. */
|
||||
uint8_t out0Pol; /**< Idle value for output 0. */
|
||||
uint8_t out1Pol; /**< Idle value for output 1. */
|
||||
LETIMER_UFOA_TypeDef ufoa0; /**< Underflow output 0 action. */
|
||||
LETIMER_UFOA_TypeDef ufoa1; /**< Underflow output 1 action. */
|
||||
LETIMER_RepeatMode_TypeDef repMode; /**< Repeat mode. */
|
||||
} LETIMER_Init_TypeDef;
|
||||
|
||||
/** Default config for LETIMER init structure. */
|
||||
#define LETIMER_INIT_DEFAULT \
|
||||
{ true, /* Enable timer when init complete. */ \
|
||||
false, /* Stop counter during debug halt. */ \
|
||||
false, /* Do not start counting on RTC COMP0 match. */ \
|
||||
false, /* Do not start counting on RTC COMP1 match. */ \
|
||||
false, /* Do not load COMP0 into CNT on underflow. */ \
|
||||
false, /* Do not load COMP1 into COMP0 when REP0 reaches 0. */ \
|
||||
0, /* Idle value 0 for output 0. */ \
|
||||
0, /* Idle value 0 for output 1. */ \
|
||||
letimerUFOANone, /* No action on underflow on output 0. */ \
|
||||
letimerUFOANone, /* No action on underflow on output 1. */ \
|
||||
letimerRepeatFree /* Count until stopped by SW. */ \
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
uint32_t LETIMER_CompareGet(LETIMER_TypeDef *letimer, unsigned int comp);
|
||||
void LETIMER_CompareSet(LETIMER_TypeDef *letimer,
|
||||
unsigned int comp,
|
||||
uint32_t value);
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get LETIMER counter value.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* Current LETIMER counter value.
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t LETIMER_CounterGet(LETIMER_TypeDef *letimer)
|
||||
{
|
||||
return(letimer->CNT);
|
||||
}
|
||||
|
||||
|
||||
void LETIMER_Enable(LETIMER_TypeDef *letimer, bool enable);
|
||||
void LETIMER_FreezeEnable(LETIMER_TypeDef *letimer, bool enable);
|
||||
void LETIMER_Init(LETIMER_TypeDef *letimer, const LETIMER_Init_TypeDef *init);
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending LETIMER interrupts.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending LETIMER interrupt source to clear. Use a logical OR combination
|
||||
* of valid interrupt flags for the LETIMER module (LETIMER_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LETIMER_IntClear(LETIMER_TypeDef *letimer, uint32_t flags)
|
||||
{
|
||||
letimer->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more LETIMER interrupts.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LETIMER interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the LETIMER module (LETIMER_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LETIMER_IntDisable(LETIMER_TypeDef *letimer, uint32_t flags)
|
||||
{
|
||||
letimer->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more LETIMER interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using LETIMER_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LETIMER interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the LETIMER module (LETIMER_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LETIMER_IntEnable(LETIMER_TypeDef *letimer, uint32_t flags)
|
||||
{
|
||||
letimer->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending LETIMER interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* LETIMER interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the LETIMER module (LETIMER_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t LETIMER_IntGet(LETIMER_TypeDef *letimer)
|
||||
{
|
||||
return(letimer->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending LETIMER interrupts from SW.
|
||||
*
|
||||
* @param[in] letimer
|
||||
* Pointer to LETIMER peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LETIMER interrupt sources to set to pending. Use a logical OR combination
|
||||
* of valid interrupt flags for the LETIMER module (LETIMER_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LETIMER_IntSet(LETIMER_TypeDef *letimer, uint32_t flags)
|
||||
{
|
||||
letimer->IFS = flags;
|
||||
}
|
||||
|
||||
uint32_t LETIMER_RepeatGet(LETIMER_TypeDef *letimer, unsigned int rep);
|
||||
void LETIMER_RepeatSet(LETIMER_TypeDef *letimer,
|
||||
unsigned int rep,
|
||||
uint32_t value);
|
||||
void LETIMER_Reset(LETIMER_TypeDef *letimer);
|
||||
|
||||
|
||||
/** @} (end addtogroup LETIMER) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_LETIMER_H */
|
||||
255
bsp/efm32/Libraries/efm32lib/inc/efm32_leuart.h
Normal file
255
bsp/efm32/Libraries/efm32lib/inc/efm32_leuart.h
Normal file
@@ -0,0 +1,255 @@
|
||||
/***************************************************************************//**
|
||||
* @file
|
||||
* @brief Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
|
||||
* peripheral API for EFM32.
|
||||
* @author Energy Micro AS
|
||||
* @version 1.3.0
|
||||
*******************************************************************************
|
||||
* @section License
|
||||
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
|
||||
*******************************************************************************
|
||||
*
|
||||
* This source code is the property of Energy Micro AS. The source and compiled
|
||||
* code may only be used on Energy Micro "EFM32" microcontrollers.
|
||||
*
|
||||
* This copyright notice may not be removed from the source code nor changed.
|
||||
*
|
||||
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
|
||||
* obligation to support this Software. Energy Micro AS is providing the
|
||||
* Software "AS IS", with no express or implied warranties of any kind,
|
||||
* including, but not limited to, any implied warranties of merchantability
|
||||
* or fitness for any particular purpose or warranties against infringement
|
||||
* of any proprietary rights of a third party.
|
||||
*
|
||||
* Energy Micro AS will not be liable for any consequential, incidental, or
|
||||
* special damages, or any other relief, or for any claim by any third party,
|
||||
* arising from your use of this Software.
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __EFM32_LEUART_H
|
||||
#define __EFM32_LEUART_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "efm32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup EFM32_Library
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/***************************************************************************//**
|
||||
* @addtogroup LEUART
|
||||
* @{
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
******************************** ENUMS ************************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Databit selection. */
|
||||
typedef enum
|
||||
{
|
||||
leuartDatabits8 = LEUART_CTRL_DATABITS_EIGHT, /**< 8 databits. */
|
||||
leuartDatabits9 = LEUART_CTRL_DATABITS_NINE /**< 9 databits. */
|
||||
} LEUART_Databits_TypeDef;
|
||||
|
||||
|
||||
/** Enable selection. */
|
||||
typedef enum
|
||||
{
|
||||
/** Disable both receiver and transmitter. */
|
||||
leuartDisable = 0x0,
|
||||
|
||||
/** Enable receiver only, transmitter disabled. */
|
||||
leuartEnableRx = LEUART_CMD_RXEN,
|
||||
|
||||
/** Enable transmitter only, receiver disabled. */
|
||||
leuartEnableTx = LEUART_CMD_TXEN,
|
||||
|
||||
/** Enable both receiver and transmitter. */
|
||||
leuartEnable = (LEUART_CMD_RXEN | LEUART_CMD_TXEN)
|
||||
} LEUART_Enable_TypeDef;
|
||||
|
||||
|
||||
/** Parity selection. */
|
||||
typedef enum
|
||||
{
|
||||
leuartNoParity = LEUART_CTRL_PARITY_NONE, /**< No parity. */
|
||||
leuartEvenParity = LEUART_CTRL_PARITY_EVEN, /**< Even parity. */
|
||||
leuartOddParity = LEUART_CTRL_PARITY_ODD /**< Odd parity. */
|
||||
} LEUART_Parity_TypeDef;
|
||||
|
||||
|
||||
/** Stopbits selection. */
|
||||
typedef enum
|
||||
{
|
||||
leuartStopbits1 = LEUART_CTRL_STOPBITS_ONE, /**< 1 stopbits. */
|
||||
leuartStopbits2 = LEUART_CTRL_STOPBITS_TWO /**< 2 stopbits. */
|
||||
} LEUART_Stopbits_TypeDef;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
******************************* STRUCTS ***********************************
|
||||
******************************************************************************/
|
||||
|
||||
/** Init structure. */
|
||||
typedef struct
|
||||
{
|
||||
/** Specifies whether TX and/or RX shall be enabled when init completed. */
|
||||
LEUART_Enable_TypeDef enable;
|
||||
|
||||
/**
|
||||
* LEUART reference clock assumed when configuring baudrate setup. Set
|
||||
* it to 0 if currently configurated reference clock shall be used.
|
||||
*/
|
||||
uint32_t refFreq;
|
||||
|
||||
/** Desired baudrate. */
|
||||
uint32_t baudrate;
|
||||
|
||||
/** Number of databits in frame. */
|
||||
LEUART_Databits_TypeDef databits;
|
||||
|
||||
/** Parity mode to use. */
|
||||
LEUART_Parity_TypeDef parity;
|
||||
|
||||
/** Number of stopbits to use. */
|
||||
LEUART_Stopbits_TypeDef stopbits;
|
||||
} LEUART_Init_TypeDef;
|
||||
|
||||
/** Default config for LEUART init structure. */
|
||||
#define LEUART_INIT_DEFAULT \
|
||||
{ leuartEnable, /* Enable RX/TX when init completed. */ \
|
||||
0, /* Use current configured reference clock for configuring baudrate. */ \
|
||||
9600, /* 9600 bits/s. */ \
|
||||
leuartDatabits8, /* 8 databits. */ \
|
||||
leuartNoParity, /* No parity. */ \
|
||||
leuartStopbits1 /* 1 stopbit. */ \
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***************************** PROTOTYPES **********************************
|
||||
******************************************************************************/
|
||||
|
||||
uint32_t LEUART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv);
|
||||
uint32_t LEUART_BaudrateGet(LEUART_TypeDef *leuart);
|
||||
void LEUART_BaudrateSet(LEUART_TypeDef *leuart,
|
||||
uint32_t refFreq,
|
||||
uint32_t baudrate);
|
||||
void LEUART_Enable(LEUART_TypeDef *leuart, LEUART_Enable_TypeDef enable);
|
||||
void LEUART_FreezeEnable(LEUART_TypeDef *leuart, bool enable);
|
||||
void LEUART_Init(LEUART_TypeDef *leuart, LEUART_Init_TypeDef *init);
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Clear one or more pending LEUART interrupts.
|
||||
*
|
||||
* @param[in] leuart
|
||||
* Pointer to LEUART peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* Pending LEUART interrupt source to clear. Use a logical OR combination
|
||||
* of valid interrupt flags for the LEUART module (LEUART_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LEUART_IntClear(LEUART_TypeDef *leuart, uint32_t flags)
|
||||
{
|
||||
leuart->IFC = flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Disable one or more LEUART interrupts.
|
||||
*
|
||||
* @param[in] leuart
|
||||
* Pointer to LEUART peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LEUART interrupt sources to disable. Use a logical OR combination of
|
||||
* valid interrupt flags for the LEUART module (LEUART_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LEUART_IntDisable(LEUART_TypeDef *leuart, uint32_t flags)
|
||||
{
|
||||
leuart->IEN &= ~(flags);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Enable one or more LEUART interrupts.
|
||||
*
|
||||
* @note
|
||||
* Depending on the use, a pending interrupt may already be set prior to
|
||||
* enabling the interrupt. Consider using LEUART_IntClear() prior to enabling
|
||||
* if such a pending interrupt should be ignored.
|
||||
*
|
||||
* @param[in] leuart
|
||||
* Pointer to LEUART peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LEUART interrupt sources to enable. Use a logical OR combination of
|
||||
* valid interrupt flags for the LEUART module (LEUART_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LEUART_IntEnable(LEUART_TypeDef *leuart, uint32_t flags)
|
||||
{
|
||||
leuart->IEN |= flags;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Get pending LEUART interrupt flags.
|
||||
*
|
||||
* @note
|
||||
* The event bits are not cleared by the use of this function.
|
||||
*
|
||||
* @param[in] leuart
|
||||
* Pointer to LEUART peripheral register block.
|
||||
*
|
||||
* @return
|
||||
* LEUART interrupt sources pending. A logical OR combination of valid
|
||||
* interrupt flags for the LEUART module (LEUART_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE uint32_t LEUART_IntGet(LEUART_TypeDef *leuart)
|
||||
{
|
||||
return(leuart->IF);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* @brief
|
||||
* Set one or more pending LEUART interrupts from SW.
|
||||
*
|
||||
* @param[in] leuart
|
||||
* Pointer to LEUART peripheral register block.
|
||||
*
|
||||
* @param[in] flags
|
||||
* LEUART interrupt sources to set to pending. Use a logical OR combination
|
||||
* of valid interrupt flags for the LEUART module (LEUART_IF_nnn).
|
||||
******************************************************************************/
|
||||
static __INLINE void LEUART_IntSet(LEUART_TypeDef *leuart, uint32_t flags)
|
||||
{
|
||||
leuart->IFS = flags;
|
||||
}
|
||||
|
||||
void LEUART_Reset(LEUART_TypeDef *leuart);
|
||||
uint8_t LEUART_Rx(LEUART_TypeDef *leuart);
|
||||
uint16_t LEUART_RxExt(LEUART_TypeDef *leuart);
|
||||
void LEUART_Tx(LEUART_TypeDef *leuart, uint8_t data);
|
||||
void LEUART_TxExt(LEUART_TypeDef *leuart, uint16_t data);
|
||||
|
||||
|
||||
/** @} (end addtogroup LEUART) */
|
||||
/** @} (end addtogroup EFM32_Library) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __EFM32_LEUART_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user