add BSP for Renesas M16C62P

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@620 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz
2010-04-14 00:31:17 +00:00
parent 02564df01e
commit 2fcd4bccbd
16 changed files with 5683 additions and 0 deletions
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/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
* 2010-04-09 fify modified for M16C
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
#include <rtthread.h>
#include "bsp.h"
static struct rt_thread led;
static rt_uint8_t led_stack[256];
static void rt_thread_entry_led(void* parameter)
{
while (1)
{
/* led off */
led_off();
rt_thread_delay(100); /* sleep 1 second and switch to other thread */
/* led on */
led_on();
rt_thread_delay(100);
}
}
int rt_application_init(void)
{
/* create led thread */
rt_thread_init(&led,
"led",
rt_thread_entry_led, RT_NULL,
&led_stack[0], sizeof(led_stack),
5, 32);
if (&led != RT_NULL)
rt_thread_startup(&led);
return 0;
}
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/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-04-09 fify the first version
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
#include <rthw.h>
#include <rtthread.h>
#include "uart.h"
#include "board.h"
/**
* This function will initial m16c board.
*/
void rt_hw_board_init()
{
#ifdef RT_USING_UART0
rt_hw_uart_init();
rt_console_set_device("uart0");
#endif
rt_kprintf("\r\n\r\nSystemInit......\r\n");
}
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/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
* 2010-02-04 Magicoe add board.h to LPC176x bsp
*/
#ifndef __BOARD_H__
#define __BOARD_H__
void rt_hw_board_init(void);
#endif
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/*
* File : bsp.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-04-09 fify the first version
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
#include "iom16c62p.h"
#include "bsp.h"
#include "rtconfig.h"
void led_init(void)
{
pu37 = 1;
pd11_0 = 1;
led_off();
}
void led_on(void)
{
p11_0 = 1;
}
void led_off(void)
{
p11_0 = 0;
}
static void mcu_init(void)
{
volatile rt_uint32_t count;
/* Configure clock for divide by 1 mode */
prcr |= 0x01; /* Enable access to clock registers PRCR.PRC0 = 1 */
cm1 = 0x20; /* Set CM16, CM17 divide ratio to 1: */
/* ... main clock on in high drive no PLL */
cm0 &= ~0x40; /* Set divide ratio to 1 CM0.CM06 = 0 */
/* Configure main PLL */
prcr |= 0x02; /* Allow writing to processor mode register PRCR.PRC0 = 1 */
pm2 |= 0x01; /* Set SFR access to 2 wait, which is required for */
/* ... operation greater than 16 MHz PM2.PM20 = 1 */
prcr &= ~0x02; /* Protect processor mode register PRCR.PRC0 = 0 */
plc0 = 0x91; /* Enable and turn on PLL */
count = 20000; /* Delay while PLL stabilizes */
while (count > 0) {
count--;
}
cm1 |= 0x02; /* Switch to PLL CM1.CM11 = 1 */
prcr &= ~0x01; /* Protect clock control register PRCR.PRC0 = 0 */
prcr |= 0x02; /* Allow writing to processor mode register PRCR.PRC0 = 1 */
pm1 |= 0x01; /* Enable data flash area PM1.PM10 = 1 */
prcr &= ~0x02; /* Protect processor mode register PRCR.PRC0 = 0 */
}
/*
*********************************************************************************************************
* TICKER INITIALIZATION
*
* Description : This function is called to initialize rt-thread's tick source (typically a timer generating
* interrupts every 1 to 100 mS).
*
* We decided to use Timer #B0 as the tick interrupt source.
*
* Arguments : none
*
* Returns :
*
* Notes : (1) Timer B channel 0 is setup as a periodic timer, generating an interrupt
* OS_TICKS_PER_SEC times per second. The timer counts down and generates an interrupt
* when it underflows.
*
* (2) The timer ISR handler, rt_hw_timer_handler(), is placed into the vector table in vectors.s34.
*********************************************************************************************************
*/
static void timer_tick_init(void)
{
/* Set timer to timer mode */
/* Set count source as PLL clock / 8 (f8) */
tb0mr = 0x40;
/* Assign timer value and reload value */
tb0 = (CPU_CLK_FREQ / 8) / RT_TICK_PER_SECOND;
/* Set timer B channel 0 interrupt level = 7 */
/* Clear interrupt request */
tb0ic = 0x07;
tabsr |= 0x20; /* Start timer */
}
void system_init(void)
{
mcu_init();
led_init(); /* Initialize the I/Os for the LED controls */
timer_tick_init(); /* Initialize the rt-thread tick interrupt */
}
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/*
* File : bsp.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-04-09 fify the first version
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
#ifndef __BSP_H__
#define __BSP_H__
#include <rtthread.h>
#define CPU_CLK_FREQ 14000000 /* CPU frequency, in Hz*/
void system_init(void);
void led_on(void);
void led_off(void);
#endif
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/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second */
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
///#define SCHEDULER_DEBUG
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
///#define RT_USING_HOOK
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
/* SECTION: IPC */
/* Using Semaphore */
#define RT_USING_SEMAPHORE
/* Using Mutex */
#define RT_USING_MUTEX
/* Using Event */
#define RT_USING_EVENT
/* Using MailBox */
#define RT_USING_MAILBOX
/* Using Message Queue */
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
/* Using Small MM */
#define RT_USING_SMALL_MEM
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
/* RT_USING_UART */
#define RT_USING_UART0
#define RT_UART_RX_BUFFER_SIZE 64
/* SECTION: Console options */
/* the buffer size of console */
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */
/* Using FinSH as Shell*/
#define RT_USING_FINSH
/* Using symbol table */
///#define FINSH_USING_SYMTAB
///#define FINSH_USING_DESCRIPTION
/* SECTION: device filesystem support */
/* #define RT_USING_DFS */
///#define RT_USING_DFS_ELMFAT
/* the max number of mounted filesystem */
///#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
///#define DFS_FD_MAX 4
/* the max number of cached sector */
///#define DFS_CACHE_MAX_NUM 4
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
//#define RT_USING_LWIP
/* Enable ICMP protocol*/
///#define RT_LWIP_ICMP
/* Enable UDP protocol*/
///#define RT_LWIP_UDP
/* Enable TCP protocol*/
///#define RT_LWIP_TCP
/* Enable DNS */
///#define RT_LWIP_DNS
/* the number of simulatenously active TCP connections*/
///#define RT_LWIP_TCP_PCB_NUM 5
/* ip address of target*/
///#define RT_LWIP_IPADDR0 192
///#define RT_LWIP_IPADDR1 168
///#define RT_LWIP_IPADDR2 1
///#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
/* SECTION: RT-Thread/GUI */
/* #define RT_USING_RTGUI */
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 12
/* support 16 weight font */
#define RTGUI_USING_FONT16
/* support Chinese font */
#define RTGUI_USING_FONTHZ
/* use DFS as file interface */
#define RTGUI_USING_DFS_FILERW
/* use font file as Chinese font */
#define RTGUI_USING_HZ_FILE
/* use small size in RTGUI */
#define RTGUI_USING_SMALL_SIZE
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
/* default font size in RTGUI */
#define RTGUI_DEFAULT_FONT_SIZE 16
#endif
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\rtt2m16c.ewp</path>
</project>
<batchBuild/>
</workspace>
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/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
* 2010-04-09 fify for M16C
*/
#include <rthw.h>
#include <rtthread.h>
#include "iom16c62p.h"
#include "board.h"
#include "bsp.h"
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef RT_USING_HEAP
#ifdef __ICCM16C__
#pragma section="DATA16_HEAP"
#endif
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
#ifdef __ICCM16C__
rt_system_heap_init(__segment_begin("DATA16_HEAP"),__segment_end("DATA16_HEAP"));
#endif
#endif
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_DEVICE
/* init all device */
rt_device_init_all();
#endif
/* init application */
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
finsh_set_device("uart0");
#endif
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* init system setting */
system_init();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
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#ifndef __UART_H__
#define __UART_H__
#define BAUD_RATE 9600
void rt_hw_uart_init(void);
#endif
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/*
* File : vectors.s34
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-04-09 fify the first version
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
*/
;********************************************************************************************************
; RELOCATABLE EXCEPTION VECTOR TABLE
;********************************************************************************************************
MODULE ?vectors
EXTERN rt_hw_timer_handler
EXTERN rt_hw_uart0_receive_handler
PUBLIC RelocatableVectTbl
RSEG INTVEC:NOROOT
RelocatableVectTbl:
ORG 0
DC32 0 ; Vector 0: BRK
DC32 0 ; Vector 1: Reserved
DC32 0 ; Vector 2: Reserved
DC32 0 ; Vector 3: Reserved
DC32 0 ; Vector 4: INT3
DC32 0 ; Vector 5: Timer B5
DC32 0 ; Vector 6: Timer B4, UART1 Bus Collision Detect
DC32 0 ; Vector 7: Timer B3, UART0 Bus Collision Detect
DC32 0 ; Vector 8: SI/O4, INT5
DC32 0 ; Vector 9: SI/O3, INT4
DC32 0 ; Vector 10: UART2 Bus Collision Detect
DC32 0 ; Vector 11: DMA0
DC32 0 ; Vector 12: DMA1
DC32 0 ; Vector 13: Key Input Interrupt
DC32 0 ; Vector 14: A/D
DC32 0 ; Vector 15: UART2 Transmit, NACK2
DC32 0 ; Vector 16: UART2 Receive, ACK2
DC32 0 ; Vector 17: UART0 Transmit, NACK0
DC32 rt_hw_uart0_receive_handler ; Vector 18: UART0 Receive, ACK0
DC32 0 ; Vector 19: UART1 Transmit, NACK1
DC32 0 ; Vector 20: UART1 Receive, ACK1
DC32 0 ; Vector 21: Timer A0
DC32 0 ; Vector 22: Timer A1
DC32 0 ; Vector 23: Timer A2
DC32 0 ; Vector 24: Timer A3
DC32 0 ; Vector 25: Timer A4
DC32 rt_hw_timer_handler ; Vector 26: Timer B0
DC32 0 ; Vector 27: Timer B1
DC32 0 ; Vector 28: Timer B2
DC32 0 ; Vector 29:
DC32 0 ; Vector 30:
DC32 0 ; Vector 31:
ENDMOD
END