[Renesas]Add HMI-Board bsp

This commit is contained in:
Rbb666
2023-04-19 14:01:34 +08:00
committed by guo
parent cbedb6b40b
commit 2f9d3bfe20
167 changed files with 121255 additions and 0 deletions

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@@ -183,6 +183,7 @@ jobs:
- "xplorer4330/M4"
- "renesas/ra6m3-ek"
- "renesas/ra6m4-cpk"
- "renesas/ra6m3-hmi-board"
- RTT_BSP: "gd32_n32_apm32"
RTT_TOOL_CHAIN: "sourcery-arm"
SUB_RTT_BSP:

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@@ -0,0 +1,5 @@
/RTE
/Listings
/Objects
ra_cfg.txt

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@@ -0,0 +1,9 @@
# files format check exclude path, please follow the instructions below to modify;
# If you need to exclude an entire folder, add the folder path in dir_path;
# If you need to exclude a file, add the path to the file in file_path.
dir_path:
- ra
- ra_gen
- ra_cfg
- RTE

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@@ -0,0 +1,28 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>ra6m3-temp</name>
<comment />
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.rt-thread.studio.rttnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources />
</projectDescription>

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@@ -0,0 +1,14 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1208902908258079360" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
</project>

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@@ -0,0 +1,3 @@
content-types/enabled=true
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
eclipse.preferences.version=1

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@@ -0,0 +1,19 @@
#RT-Thread Studio Project Configuration
#Tue Jan 10 14:37:39 CST 2023
cfg_version=v3.0
board_name=ra6m3-ek
example_name=
hardware_adapter=J-Link
board_base_nano_proj=false
project_type=rt-thread
chip_name=R7FA6M3AH\n
selected_rtt_version=latest
bsp_version=
os_branch=master
project_base_rtt_bsp=true
output_project_path=E\:softwareRT-ThreadStudioworkspace\ra6m3-temp
is_base_example_project=false
is_use_scons_build=true
project_name=ra6m3-temp
os_version=latest
bsp_path=

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@@ -0,0 +1,90 @@
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@@ -0,0 +1,19 @@
#Tue Apr 18 17:25:03 CST 2023
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h|143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.552817864=false
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1728953905,ra/fsp/inc/fsp_features.h|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|2208590403,ra/fsp/inc/instances/r_ioport.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3297195641,ra/fsp/inc/fsp_version.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2425160085,ra/fsp/inc/api/bsp_api.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|546480625,ra/fsp/inc/fsp_common_api.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#R7FA6M3AH3CFB\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1441545198,ra/arm/CMSIS_5/LICENSE.txt|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/all=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=2208590403,ra/fsp/inc/instances/r_ioport.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c|1939984091,ra/fsp/inc/api/r_ioport_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=3916852077,ra/fsp/inc/api/r_uart_api.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|1889256766,ra/fsp/inc/instances/r_sci_uart.h
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=

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@@ -0,0 +1,9 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

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@@ -0,0 +1,40 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
EraseType = 0x00
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 0
Device="ARM7"
[GENERAL]
WorkRAMSize = 0xA0000
WorkRAMAddr = 0x1FFE0000
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF

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@@ -0,0 +1,29 @@
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
# you can change the RTT_ROOT default "../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
config ENV_DIR
string
option env="ENV_ROOT"
default "/"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "../libraries/Kconfig"
source "$BSP_DIR/board/Kconfig"

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<?xml version="1.0" encoding="utf-8"?>
<v1:pinSettings xmlns:v1="http://www.tasking.com/schema/pinsettings/v1.1">
<v1:pinMappingsRef version="2.03" file="" />
<v1:deviceSetting id="renesas.ra6m3_fc" pattern="R7FA6M3****FC">
<v1:packageSetting id="renesas.176lqfp" />
</v1:deviceSetting>
<v1:configSetting configurationId="debug0.mode" altId="debug0.mode.jtag" />
<v1:configSetting configurationId="p300.gpio_mode" altId="p300.gpio_mode.gpio_mode_peripheral" />
<v1:configSetting configurationId="p300" altId="p300.debug0.tck">
<v1:connectionSetting altId="debug0.tck.p300" />
</v1:configSetting>
<v1:configSetting configurationId="debug0.tck" altId="debug0.tck.p300">
<v1:connectionSetting altId="p300.debug0.tck" />
</v1:configSetting>
<v1:configSetting configurationId="p108.gpio_mode" altId="p108.gpio_mode.gpio_mode_peripheral" />
<v1:configSetting configurationId="p108" altId="p108.debug0.tms">
<v1:connectionSetting altId="debug0.tms.p108" />
</v1:configSetting>
<v1:configSetting configurationId="debug0.tms" altId="debug0.tms.p108">
<v1:connectionSetting altId="p108.debug0.tms" />
</v1:configSetting>
<v1:configSetting configurationId="p109.gpio_mode" altId="p109.gpio_mode.gpio_mode_peripheral" />
<v1:configSetting configurationId="p109" altId="p109.debug0.tdo">
<v1:connectionSetting altId="debug0.tdo.p109" />
</v1:configSetting>
<v1:configSetting configurationId="debug0.tdo" altId="debug0.tdo.p109">
<v1:connectionSetting altId="p109.debug0.tdo" />
</v1:configSetting>
<v1:configSetting configurationId="p110.gpio_mode" altId="p110.gpio_mode.gpio_mode_peripheral" />
<v1:configSetting configurationId="p110" altId="p110.debug0.tdi">
<v1:connectionSetting altId="debug0.tdi.p110" />
</v1:configSetting>
<v1:configSetting configurationId="debug0.tdi" altId="debug0.tdi.p110">
<v1:connectionSetting altId="p110.debug0.tdi" />
</v1:configSetting>
</v1:pinSettings>

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# 瑞萨 RA6M3-HMI-Board 开发板 BSP 说明
## 简介
本文档为 RA6M3-HMI-Board 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP将 RT-Thread 运行在开发板上。
主要内容如下:
- 开发板介绍
- BSP 快速上手指南
## 开发板介绍
基于瑞萨 RA6M3 MCU 开发的 EK-RA6M3 MCU 评估板,通过灵活配置软件包和 IDE可帮助用户对 RA6M3 MCU 群组的特性轻松进行评估,并对嵌入系统应用程序进行开发。
开发板正面外观如下图:
该开发板常用 **板载资源** 如下:
- MCUR7FA6M3AH120MHzArm Cortex®-M4 内核2MB 代码闪存, 640KB SRAM
- 调试接口:板载 J-Link 接口
- 扩展接口:两个 PMOD 连接器
**更多详细资料及工具**
## 外设支持
本 BSP 目前对外设的支持情况如下:
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------------- | :------------- |
| UART | 支持 | UART9 为默认日志输出端口 |
| GPIO | 支持 | |
| LCD | 支持 | |
* 注意:仓库刚拉下来是最小系统,若需添加/使能其他外设需参考:[外设驱动使用教程 (rt-thread.org)](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列BSP外设驱动使用教程)
## 使用说明
使用说明分为如下两个章节:
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。
### 快速上手
本 BSP 目前仅提供 MDK5 工程。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。
**硬件连接**
使用 USB 数据线连接开发板到 PC使用 J-link 接口下载和 DEBUG 程序。使用 USB 转串口工具连接 UART7P401(TXD)、P402(RXD)。
**编译下载**
- 编译:双击 project.uvprojx 文件,打开 MDK5 工程,编译程序。
- 下载:点击 MDK 的 Debug 按钮进行下载调试
**查看运行结果**
下载程序成功之后,系统会自动运行并打印系统信息。
连接开发板对应串口到 PC , 在终端工具里打开相应的串口115200-8-1-N复位设备后可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
```bash
\ | /
- RT - Thread Operating System
/ | \ 5.0.0 build Jan 4 2023 10:14:56
2006 - 2022 Copyright by RT-Thread team
Hello RT-Thread!
msh >
msh >help
help - RT-Thread shell help.
ps - List threads in the system.
free - Show the memory usage in the system.
clear - clear the terminal screen
version - show RT-Thread version information
list - list objects
msh >
```
**应用入口函数**
应用层的入口函数在 **bsp\ra6m3-ek\src\hal_emtry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
```c
void hal_entry(void)
{
rt_kprintf("\nHello RT-Thread!\n");
while (1)
{
rt_pin_write(LED3_PIN, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED3_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
}
```
### 进阶使用
**资料及文档**
- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)
- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191)
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
**FSP 配置**
需要修改瑞萨的 BSP 外设配置或添加新的外设端口,需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp),请使用 FSP 3.5.0 版本
2. 下载安装完成后,需要添加 EK-RA6M3 开发板的官方板级支持包
> 打开[ EK-RA6M3 开发板详情页](https://www.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra6m3-evaluation-kit-ra6m3-mcu-group#document),在 **“下载”** 列表中找到 **” EK-RA6M3板级支持包“** ,点击链接即可下载
3. 如何将 **”EK-RA6M3板级支持包“**添加到 FSP 中,请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
4. 请查看文档:[使用 FSP 配置外设驱动](../docs/RA系列使用FSP配置外设驱动.md),在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
**ENV 配置**
- 如何使用 ENV 工具:[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
此 BSP 默认只开启了 UART7 的功能,如果需使用更多高级功能例如组件、软件包等,需要利用 ENV 工具进行配置。
步骤如下:
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程,配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk5` 命令重新生成工程。
## 联系人信息
在使用过程中若您有任何的想法和建议,建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
## 贡献代码
如果您对 EK-RA6M3 感兴趣,并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码,您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)。

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# for module compiling
import os
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = []
CPPPATH = []
list = os.listdir(cwd)
if rtconfig.PLATFORM in ['iccarm']:
print("\nThe current project does not support IAR build\n")
Return('group')
elif rtconfig.PLATFORM in ['gcc', 'armclang']:
if GetOption('target') != 'mdk5':
CPPPATH = [cwd]
src = Glob('./src/*.c')
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
Return('group')

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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM in ['iccarm']:
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
rtconfig.BSP_LIBRARY_TYPE = None
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)

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menu "Hardware Drivers Config"
config SOC_R7FA6M4AF
bool
select SOC_SERIES_R7FA6M3
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
menu "Onboard Peripheral Drivers"
endmenu
menu "On-chip Peripheral Drivers"
source "../libraries/HAL_Drivers/Kconfig"
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
select RT_USING_SERIAL_V2
if BSP_USING_UART
menuconfig BSP_USING_UART4
bool "Enable UART4"
default n
if BSP_USING_UART4
config BSP_UART4_RX_USING_DMA
bool "Enable UART4 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART4_TX_USING_DMA
bool "Enable UART4 TX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART4_RX_BUFSIZE
int "Set UART4 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART4_TX_BUFSIZE
int "Set UART4 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 0
endif
menuconfig BSP_USING_UART9
bool "Enable UART9"
default n
if BSP_USING_UART9
config BSP_UART9_RX_USING_DMA
bool "Enable UART9 RX DMA"
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
default n
config BSP_UART9_TX_USING_DMA
bool "Enable UART9 TX DMA"
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
default n
config BSP_UART9_RX_BUFSIZE
int "Set UART9 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART9_TX_BUFSIZE
int "Set UART9 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 0
endif
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI0
bool "Enable SPI0 BUS"
default n
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
config BSP_USING_SCI_SPI0
bool "Enable SCI SPI0 BUS"
default n
config BSP_USING_SCI_SPI6
bool "Enable SCI SPI6 BUS"
default n
endif
menuconfig BSP_USING_FS
bool "Enable filesystem"
default n
if BSP_USING_FS
config BSP_USING_SDCARD_FS
bool "Enable SDCARD filesystem"
select BSP_USING_SDHI
select RT_USING_DFS_ELMFAT
default n
config BSP_USING_SPICARD_FS
bool "Enable SPI FLASH filesystem"
select BSP_USING_SPI
select BSP_USING_SCI_SPI6
select RT_USING_SPI_MSD
select RT_USING_DFS_ELMFAT
default n
endif
menuconfig BSP_USING_SDHI
bool "Enable SDHI"
default n
select RT_USING_SDIO
select RT_USING_DFS
select RT_LIBC_USING_FILEIO
select RT_USING_POSIX_DEVIO
if BSP_USING_SDHI
config SDHI_USING_1_BIT
bool "Use 1-bit Mode(4-bit when disable)"
default y
endif
menuconfig BSP_USING_PWM
bool "Enable PWM"
default n
select RT_USING_PWM
if BSP_USING_PWM
config BSP_USING_PWM12
bool "Enable GPT12 (16-Bits) output PWM"
default n
endif
config BSP_USING_LCD
bool "Enable LCD"
select BSP_USING_GPIO
default n
config BSP_USING_SPI_LCD
bool "Enable SPI LCD"
select BSP_USING_GPIO
select BSP_USING_SPI
select BSP_USING_SPI0
default n
config BSP_USING_G2D
bool "Enable G2D"
default n
config BSP_USING_JPEG
bool "Enable JPEG"
default n
config BSP_USING_ETH
bool "Enable Ethernet"
select RT_USING_SAL
select RT_USING_LWIP
select RT_USING_NETDEV
default n
menuconfig BSP_USING_LVGL
bool "Enable LVGL for LCD"
select PKG_USING_LVGL
default n
if BSP_USING_LVGL
config BSP_USING_LCD_ILI9431
bool "Enable LVGL for LCD_ILI9431"
select PKG_USING_ILI9341
select BSP_USING_SPI_LCD
default n
config BSP_USING_LCD_RGB
bool "Enable LVGL for LCD_RGB565"
select BSP_USING_LCD
default n
endif
if BSP_USING_LVGL
config BSP_USING_LVGL_DEMO
bool "Enable LVGL demo"
select PKG_USING_LV_MUSIC_DEMO
default y
endif
endmenu
menu "Board extended module Drivers"
endmenu
endmenu

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import os
from building import *
objs = []
cwd = GetCurrentDir()
list = os.listdir(cwd)
CPPPATH = [cwd]
src = Glob('*.c')
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
objs = objs + SConscript(os.path.join(item, 'SConscript'))
Return('objs')

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-10 Sherman first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RA_SRAM_SIZE 640 /* The SRAM size of the chip needs to be modified */
#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024)
#ifdef __ARMCC_VERSION
extern int Image$$RAM_END$$ZI$$Base;
#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __RAM_segment_used_end__;
#define HEAP_BEGIN (&__RAM_segment_used_end__)
#endif
#define HEAP_END RA_SRAM_END
#ifdef __cplusplus
}
#endif
#endif

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from building import *
import os
cwd = GetCurrentDir()
group = []
src = Glob('*.c')
CPPPATH = [cwd]
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
group = group + DefineGroup('LVGL-port', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH)
Return('group')

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from building import *
import os
cwd = GetCurrentDir()
group = []
src = Glob('*.c')
CPPPATH = [cwd]
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
group = group + SConscript(os.path.join(d, 'SConscript'))
group = group + DefineGroup('LVGL-demo', src, depend = ['BSP_USING_LVGL', 'BSP_USING_LVGL_DEMO'], CPPPATH = CPPPATH)
Return('group')

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-17 Meco Man First version
* 2022-05-10 Meco Man improve rt-thread initialization process
*/
void lv_user_gui_init(void)
{
/* display demo; you may replace with your LVGL application at here */
extern void lv_demo_music(void);
lv_demo_music();
}

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-22 Rbb666 First version
*/
#ifndef LV_CONF_H
#define LV_CONF_H
#include <rtconfig.h>
/* Enable additional color format support */
#define DLG_LVGL_CF 1
/* Enable sub byte color formats to be swapped. If disabled, which is recommended for
* performance, bitmaps need to be in correct order */
#define DLG_LVGL_CF_SUB_BYTE_SWAP 0
#define LV_USE_PERF_MONITOR 1
#define LV_COLOR_DEPTH 16
#ifdef PKG_USING_ILI9341
#define LV_HOR_RES_MAX 240
#define LV_VER_RES_MAX 320
#define LV_COLOR_16_SWAP 1
#define LV_DPI_DEF 99
#else
#define LV_HOR_RES_MAX 480
#define LV_VER_RES_MAX 272
#define LV_DPI_DEF 89
#endif
#define DLG_LVGL_USE_GPU_RA6M3 0
#ifdef PKG_USING_LV_MUSIC_DEMO
/* music player demo */
#define LV_USE_DEMO_RTT_MUSIC 1
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
#define LV_FONT_MONTSERRAT_12 1
#define LV_FONT_MONTSERRAT_16 1
#define LV_COLOR_SCREEN_TRANSP 0
#endif /* PKG_USING_LV_MUSIC_DEMO */
#endif

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-11-24 Rbb666 The first version
*/
#include <lvgl.h>
#include "hal_data.h"
#if DLG_LVGL_USE_GPU_RA6M3
#include "lv_port_gpu.h"
#endif
#ifdef PKG_USING_ILI9341
#include "lcd_ili9341.h"
#else
#include "lcd_port.h"
#endif
#define COLOR_BUFFER (LV_HOR_RES_MAX * LV_VER_RES_MAX / 4)
/*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf;
/*Descriptor of a display driver*/
static lv_disp_drv_t disp_drv;
static struct rt_device_graphic_info info;
/*Static or global buffer(s). The second buffer is optional*/
// 0x1FFE0000 0x20040000
__attribute__((section(".ARM.__at_0x1FFE0000"))) lv_color_t buf_1[COLOR_BUFFER];
#if !DLG_LVGL_USE_GPU_RA6M3
static void color_to16_maybe(lv_color16_t *dst, lv_color_t *src)
{
#if (LV_COLOR_DEPTH == 16)
dst->full = src->full;
#else
dst->ch.blue = src->ch.blue;
dst->ch.green = src->ch.green;
dst->ch.red = src->ch.red;
#endif
}
#endif
static void disp_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
{
#ifdef PKG_USING_ILI9341
lcd_fill_array_spi(area->x1, area->y1, area->x2, area->y2, color_p);
#elif DLG_LVGL_USE_GPU_RA6M3
lv_port_gpu_flush();
#else
int x1, x2, y1, y2;
x1 = area->x1;
x2 = area->x2;
y1 = area->y1;
y2 = area->y2;
/*Return if the area is out the screen*/
if (x2 < 0)
return;
if (y2 < 0)
return;
if (x1 > info.width - 1)
return;
if (y1 > info.height - 1)
return;
/*Truncate the area to the screen*/
int32_t act_x1 = x1 < 0 ? 0 : x1;
int32_t act_y1 = y1 < 0 ? 0 : y1;
int32_t act_x2 = x2 > info.width - 1 ? info.width - 1 : x2;
int32_t act_y2 = y2 > info.height - 1 ? info.height - 1 : y2;
uint32_t x;
uint32_t y;
long int location = 0;
/* color_p is a buffer pointer; the buffer is provided by LVGL */
lv_color16_t *fbp16 = (lv_color16_t *)info.framebuffer;
for (y = act_y1; y <= act_y2; y++)
{
for (x = act_x1; x <= act_x2; x++)
{
location = (x) + (y) * info.width;
color_to16_maybe(&fbp16[location], color_p);
color_p++;
}
color_p += x2 - act_x2;
}
#endif
lv_disp_flush_ready(disp_drv);
}
void lv_port_disp_init(void)
{
#ifdef PKG_USING_ILI9341
spi_lcd_init(20);
#else
static rt_device_t device;
/* LCD Device Init */
device = rt_device_find("lcd");
RT_ASSERT(device != RT_NULL);
if (rt_device_open(device, RT_DEVICE_OFLAG_RDWR) == RT_EOK)
{
rt_device_control(device, RTGRAPHIC_CTRL_GET_INFO, &info);
}
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32);
#endif
/*Initialize `disp_buf` with the buffer(s). With only one buffer use NULL instead buf_2 */
lv_disp_draw_buf_init(&disp_buf, buf_1, NULL, COLOR_BUFFER);
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
/*Set the resolution of the display*/
disp_drv.hor_res = LV_HOR_RES_MAX;
disp_drv.ver_res = LV_VER_RES_MAX;
/*Set a display buffer*/
disp_drv.draw_buf = &disp_buf;
/*Used to copy the buffer's content to the display*/
disp_drv.flush_cb = disp_flush;
#if DLG_LVGL_USE_GPU_RA6M3
/* Initialize GPU module */
lv_port_gpu_init();
#endif /* LV_PORT_DISP_GPU_EN */
/*Finally register the driver*/
lv_disp_drv_register(&disp_drv);
}

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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#include <lvgl.h>
#include <rtdevice.h>
void lv_port_indev_init(void)
{
}

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@@ -0,0 +1,16 @@
import os
from building import *
src = []
objs = []
cwd = GetCurrentDir()
CPPPATH = [cwd]
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
list = os.listdir(cwd)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
objs = objs + SConscript(os.path.join(item, 'SConscript'))
Return('objs')

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@@ -0,0 +1,82 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-01-19 Sherman first version
*/
/* Number of IRQ channels on the device */
#define RA_IRQ_MAX 16
/* PIN to IRQx table */
#define PIN2IRQX_TABLE \
{ \
switch (pin) \
{ \
case BSP_IO_PORT_04_PIN_00: \
case BSP_IO_PORT_02_PIN_06: \
case BSP_IO_PORT_01_PIN_05: \
return 0; \
case BSP_IO_PORT_02_PIN_05: \
case BSP_IO_PORT_01_PIN_01: \
case BSP_IO_PORT_01_PIN_04: \
return 1; \
case BSP_IO_PORT_02_PIN_03: \
case BSP_IO_PORT_01_PIN_00: \
case BSP_IO_PORT_02_PIN_13: \
return 2; \
case BSP_IO_PORT_02_PIN_02: \
case BSP_IO_PORT_01_PIN_10: \
case BSP_IO_PORT_02_PIN_12: \
return 3; \
case BSP_IO_PORT_04_PIN_02: \
case BSP_IO_PORT_01_PIN_11: \
case BSP_IO_PORT_04_PIN_11: \
return 4; \
case BSP_IO_PORT_04_PIN_01: \
case BSP_IO_PORT_03_PIN_02: \
case BSP_IO_PORT_04_PIN_10: \
return 5; \
case BSP_IO_PORT_03_PIN_01: \
case BSP_IO_PORT_00_PIN_00: \
case BSP_IO_PORT_04_PIN_09: \
return 6; \
case BSP_IO_PORT_00_PIN_01: \
case BSP_IO_PORT_04_PIN_08: \
return 7; \
case BSP_IO_PORT_00_PIN_02: \
case BSP_IO_PORT_03_PIN_05: \
case BSP_IO_PORT_04_PIN_15: \
return 8; \
case BSP_IO_PORT_00_PIN_04: \
case BSP_IO_PORT_03_PIN_04: \
case BSP_IO_PORT_04_PIN_14: \
return 9; \
case BSP_IO_PORT_00_PIN_05: \
case BSP_IO_PORT_07_PIN_09: \
return 10; \
case BSP_IO_PORT_05_PIN_01: \
case BSP_IO_PORT_00_PIN_06: \
case BSP_IO_PORT_07_PIN_08: \
return 11; \
case BSP_IO_PORT_05_PIN_02: \
case BSP_IO_PORT_00_PIN_08: \
return 12; \
case BSP_IO_PORT_00_PIN_15: \
case BSP_IO_PORT_00_PIN_09: \
return 13; \
case BSP_IO_PORT_04_PIN_03: \
case BSP_IO_PORT_05_PIN_12: \
case BSP_IO_PORT_05_PIN_05: \
return 14; \
case BSP_IO_PORT_04_PIN_04: \
case BSP_IO_PORT_05_PIN_11: \
case BSP_IO_PORT_05_PIN_06: \
return 15; \
default : \
return -1; \
} \
}

View File

@@ -0,0 +1,34 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-07-28 liu2guang the first version for STM32F469NI-Discovery.
*/
#ifndef __DRV_LCD_H_
#define __DRV_LCD_H_
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
typedef enum
{
ROTATION_ZERO = 0,
ROTATION_090 = 90,
ROTATION_180 = 180,
ROTATION_270 = 270,
} bsp_rotation;
#define LCD_WIDTH DISPLAY_HSIZE_INPUT0
#define LCD_HEIGHT DISPLAY_VSIZE_INPUT0
#define LCD_BITS_PER_PIXEL DISPLAY_BITS_PER_PIXEL_INPUT1
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
#define LCD_BL_PIN BSP_IO_PORT_06_PIN_03
#endif

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@@ -0,0 +1,159 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
<vendor>Renesas</vendor>
<name>Project Content</name>
<description>Project content managed by the Renesas Smart Configurator</description>
<url/>
<releases>
<release version="1.0.0"/>
</releases>
<generators>
<generator id="Renesas RA Smart Configurator">
<project_files>
<file category="include" name="src/"/>
<file category="source" name="src/hal_entry.c"/>
</project_files>
</generator>
</generators>
<components generator="Renesas RA Smart Configurator">
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
<files>
<file category="include" name="ra/arm/CMSIS_5/CMSIS/Core/Include/"/>
<file category="include" name="ra/fsp/inc/"/>
<file category="include" name="ra/fsp/inc/api/"/>
<file category="include" name="ra/fsp/inc/instances/"/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h" path=""/>
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h" path=""/>
<file category="other" name="ra/arm/CMSIS_5/LICENSE.txt"/>
<file category="header" name="ra/board/ra6m3/board.h" path=""/>
<file category="header" name="ra/board/ra6m3/board_ethernet_phy.h" path=""/>
<file category="source" name="ra/board/ra6m3/board_init.c"/>
<file category="header" name="ra/board/ra6m3/board_init.h" path=""/>
<file category="source" name="ra/board/ra6m3/board_leds.c"/>
<file category="header" name="ra/board/ra6m3/board_leds.h" path=""/>
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_common_api.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_glcdc.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o"/>
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_common.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_delay.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_guard.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_io.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_irq.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_security.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h" path=""/>
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
<file category="other" name="ra/fsp/src/r_ioport/r_ioport.o"/>
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
<file category="other" name="ra/fsp/src/r_sci_uart/r_sci_uart.o"/>
<file category="other" name="ra/SConscript"/>
</files>
</component>
<component Cclass="Flex Software" Cgroup="Build Configuration">
<files>
<file category="include" name="ra_cfg/fsp_cfg/"/>
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
<file category="other" name="ra_cfg/SConscript"/>
</files>
</component>
<component Cclass="Flex Software" Cgroup="Generated Data">
<files>
<file category="include" name="ra_gen/"/>
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
<file category="source" name="ra_gen/common_data.c"/>
<file category="header" name="ra_gen/common_data.h" path=""/>
<file category="source" name="ra_gen/hal_data.c"/>
<file category="header" name="ra_gen/hal_data.h" path=""/>
<file category="source" name="ra_gen/main.c"/>
<file category="source" name="ra_gen/pin_data.c"/>
<file category="other" name="ra_gen/SConscript"/>
<file category="source" name="ra_gen/vector_data.c"/>
<file category="header" name="ra_gen/vector_data.h" path=""/>
</files>
</component>
<component Cclass="Flex Software" Cgroup="Linker Script">
<files>
<file category="linkerScript" name="script/fsp.scat"/>
<file category="other" name="script/ac6/fsp_keep.via"/>
</files>
</component>
</components>
</package>

View File

@@ -0,0 +1,238 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<raConfiguration version="7">
<generalSettings>
<option key="#Board#" value="board.custom"/>
<option key="CPU" value="RA6M3"/>
<option key="#TargetName#" value="R7FA6M3AH3CFB"/>
<option key="#TargetARCHITECTURE#" value="cortex-m4"/>
<option key="#DeviceCommand#" value="R7FA6M3AH"/>
<option key="#RTOS#" value="_none"/>
<option key="#pinconfiguration#" value="R7FA6M3AH3CFB.pincfg"/>
<option key="#FSPVersion#" value="3.5.0"/>
<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
</generalSettings>
<raBspConfiguration>
<config id="config.bsp.ra6m3.R7FA6M3AH3CFB">
<property id="config.bsp.part_number" value="config.bsp.part_number.value"/>
<property id="config.bsp.rom_size_bytes" value="config.bsp.rom_size_bytes.value"/>
<property id="config.bsp.rom_size_bytes_hidden" value="2097152"/>
<property id="config.bsp.ram_size_bytes" value="config.bsp.ram_size_bytes.value"/>
<property id="config.bsp.data_flash_size_bytes" value="config.bsp.data_flash_size_bytes.value"/>
<property id="config.bsp.package_style" value="config.bsp.package_style.value"/>
<property id="config.bsp.package_pins" value="config.bsp.package_pins.value"/>
</config>
<config id="config.bsp.ra6m3">
<property id="config.bsp.series" value="config.bsp.series.value"/>
</config>
<config id="config.bsp.ra6m3.fsp">
<property id="config.bsp.fsp.OFS0.iwdt_start_mode" value="config.bsp.fsp.OFS0.iwdt_start_mode.disabled"/>
<property id="config.bsp.fsp.OFS0.iwdt_timeout" value="config.bsp.fsp.OFS0.iwdt_timeout.2048"/>
<property id="config.bsp.fsp.OFS0.iwdt_divisor" value="config.bsp.fsp.OFS0.iwdt_divisor.128"/>
<property id="config.bsp.fsp.OFS0.iwdt_window_end" value="config.bsp.fsp.OFS0.iwdt_window_end.0"/>
<property id="config.bsp.fsp.OFS0.iwdt_window_start" value="config.bsp.fsp.OFS0.iwdt_window_start.100"/>
<property id="config.bsp.fsp.OFS0.iwdt_reset_interrupt" value="config.bsp.fsp.OFS0.iwdt_reset_interrupt.Reset"/>
<property id="config.bsp.fsp.OFS0.iwdt_stop_control" value="config.bsp.fsp.OFS0.iwdt_stop_control.stops"/>
<property id="config.bsp.fsp.OFS0.wdt_start_mode" value="config.bsp.fsp.OFS0.wdt_start_mode.register"/>
<property id="config.bsp.fsp.OFS0.wdt_timeout" value="config.bsp.fsp.OFS0.wdt_timeout.16384"/>
<property id="config.bsp.fsp.OFS0.wdt_divisor" value="config.bsp.fsp.OFS0.wdt_divisor.128"/>
<property id="config.bsp.fsp.OFS0.wdt_window_end" value="config.bsp.fsp.OFS0.wdt_window_end.0"/>
<property id="config.bsp.fsp.OFS0.wdt_window_start" value="config.bsp.fsp.OFS0.wdt_window_start.100"/>
<property id="config.bsp.fsp.OFS0.wdt_reset_interrupt" value="config.bsp.fsp.OFS0.wdt_reset_interrupt.Reset"/>
<property id="config.bsp.fsp.OFS0.wdt_stop_control" value="config.bsp.fsp.OFS0.wdt_stop_control.stops"/>
<property id="config.bsp.fsp.OFS1.voltage_detection0.start" value="config.bsp.fsp.OFS1.voltage_detection0.start.disabled"/>
<property id="config.bsp.fsp.OFS1.voltage_detection0_level" value="config.bsp.fsp.OFS1.voltage_detection0_level.280"/>
<property id="config.bsp.fsp.OFS1.hoco_osc" value="config.bsp.fsp.OFS1.hoco_osc.disabled"/>
<property id="config.bsp.fsp.mpu_pc0_enable" value="config.bsp.fsp.mpu_pc0_enable.disabled"/>
<property id="config.bsp.fsp.mpu_pc0_start" value="0xFFFFFFFC"/>
<property id="config.bsp.fsp.mpu_pc0_end" value="0xFFFFFFFF"/>
<property id="config.bsp.fsp.mpu_pc1_enable" value="config.bsp.fsp.mpu_pc1_enable.disabled"/>
<property id="config.bsp.fsp.mpu_pc1_start" value="0xFFFFFFFC"/>
<property id="config.bsp.fsp.mpu_pc1_end" value="0xFFFFFFFF"/>
<property id="config.bsp.fsp.mpu_reg0_enable" value="config.bsp.fsp.mpu_reg0_enable.disabled"/>
<property id="config.bsp.fsp.mpu_reg0_start" value="0x00FFFFFC"/>
<property id="config.bsp.fsp.mpu_reg0_end" value="0x00FFFFFF"/>
<property id="config.bsp.fsp.mpu_reg1_enable" value="config.bsp.fsp.mpu_reg1_enable.disabled"/>
<property id="config.bsp.fsp.mpu_reg1_start" value="0x200FFFFC"/>
<property id="config.bsp.fsp.mpu_reg1_end" value="0x200FFFFF"/>
<property id="config.bsp.fsp.mpu_reg2_enable" value="config.bsp.fsp.mpu_reg2_enable.disabled"/>
<property id="config.bsp.fsp.mpu_reg2_start" value="0x407FFFFC"/>
<property id="config.bsp.fsp.mpu_reg2_end" value="0x407FFFFF"/>
<property id="config.bsp.fsp.mpu_reg3_enable" value="config.bsp.fsp.mpu_reg3_enable.disabled"/>
<property id="config.bsp.fsp.mpu_reg3_start" value="0x400DFFFC"/>
<property id="config.bsp.fsp.mpu_reg3_end" value="0x400DFFFF"/>
<property id="config.bsp.fsp.hoco_fll" value="config.bsp.fsp.hoco_fll.disabled"/>
<property id="config.bsp.common.main_osc_wait" value="config.bsp.common.main_osc_wait.wait_8163"/>
<property id="config.bsp.fsp.mcu.adc.max_freq_hz" value="60000000"/>
<property id="config.bsp.fsp.mcu.sci_uart.max_baud" value="20000000"/>
<property id="config.bsp.fsp.mcu.adc.sample_and_hold" value="1"/>
<property id="config.bsp.fsp.mcu.sci_spi.max_bitrate" value="30000000"/>
<property id="config.bsp.fsp.mcu.spi.max_bitrate" value="30000000"/>
<property id="config.bsp.fsp.mcu.iic_master.rate.rate_fastplus" value="1"/>
<property id="config.bsp.fsp.mcu.sci_uart.cstpen_channels" value="0x0"/>
<property id="config.bsp.fsp.mcu.gpt.pin_count_source_channels" value="0xFFFF"/>
<property id="config.bsp.common.id_mode" value="config.bsp.common.id_mode.unlocked"/>
<property id="config.bsp.common.id_code" value="FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"/>
<property id="config.bsp.common.id1" value=""/>
<property id="config.bsp.common.id2" value=""/>
<property id="config.bsp.common.id3" value=""/>
<property id="config.bsp.common.id4" value=""/>
<property id="config.bsp.common.id_fixed" value=""/>
</config>
<config id="config.bsp.ra">
<property id="config.bsp.common.main" value="0x400"/>
<property id="config.bsp.common.heap" value="0"/>
<property id="config.bsp.common.vcc" value="3300"/>
<property id="config.bsp.common.checking" value="config.bsp.common.checking.disabled"/>
<property id="config.bsp.common.assert" value="config.bsp.common.assert.none"/>
<property id="config.bsp.common.error_log" value="config.bsp.common.error_log.none"/>
<property id="config.bsp.common.soft_reset" value="config.bsp.common.soft_reset.disabled"/>
<property id="config.bsp.common.main_osc_populated" value="config.bsp.common.main_osc_populated.enabled"/>
<property id="config.bsp.common.pfs_protect" value="config.bsp.common.pfs_protect.enabled"/>
<property id="config.bsp.common.c_runtime_init" value="config.bsp.common.c_runtime_init.enabled"/>
<property id="config.bsp.common.early_init" value="config.bsp.common.early_init.disabled"/>
<property id="config.bsp.common.main_osc_clock_source" value="config.bsp.common.main_osc_clock_source.crystal"/>
<property id="config.bsp.common.subclock_populated" value="config.bsp.common.subclock_populated.enabled"/>
<property id="config.bsp.common.subclock_drive" value="config.bsp.common.subclock_drive.standard"/>
<property id="config.bsp.common.subclock_stabilization_ms" value="1000"/>
</config>
</raBspConfiguration>
<raClockConfiguration>
<node id="board.clock.xtal.freq" mul="24000000" option="_edit"/>
<node id="board.clock.usbmclk.freq" option="board.clock.usbmclk.freq"/>
<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
<node id="board.clock.pll.div" option="board.clock.pll.div.2"/>
<node id="board.clock.pll.mul" option="board.clock.pll.mul.200"/>
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
<node id="board.clock.sdclkout.div" option="board.clock.sdclkout.div.1"/>
<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
<node id="board.clock.bclk.div" option="board.clock.bclk.div.2"/>
<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
<node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
<node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
</raClockConfiguration>
<raComponentSelection>
<component apiversion="" class="Common" condition="" group="all" subgroup="fsp_common" variant="" vendor="Renesas" version="3.5.0">
<description>Board Support Package Common Files</description>
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ioport" variant="" vendor="Renesas" version="3.5.0">
<description>I/O Port</description>
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="CMSIS" condition="" group="CMSIS5" subgroup="CoreM" variant="" vendor="Arm" version="5.8.0+renesas.0.fsp.3.5.0">
<description>Arm CMSIS Version 5 - Core (M)</description>
<originalPack>Arm.CMSIS5.5.8.0+renesas.0.fsp.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="BSP" condition="" group="ra6m3" subgroup="device" variant="R7FA6M3AH3CFB" vendor="Renesas" version="3.5.0">
<description>Board support package for R7FA6M3AH3CFB</description>
<originalPack>Renesas.RA_mcu_ra6m3.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="BSP" condition="" group="ra6m3" subgroup="device" variant="" vendor="Renesas" version="3.5.0">
<description>Board support package for RA6M3</description>
<originalPack>Renesas.RA_mcu_ra6m3.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="BSP" condition="" group="ra6m3" subgroup="fsp" variant="" vendor="Renesas" version="3.5.0">
<description>Board support package for RA6M3 - FSP Data</description>
<originalPack>Renesas.RA_mcu_ra6m3.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="BSP" condition="" group="Board" subgroup="custom" variant="" vendor="Renesas" version="3.5.0">
<description>Custom Board Support Files</description>
<originalPack>Renesas.RA_board_custom.3.5.0.pack</originalPack>
</component>
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_sci_uart" variant="" vendor="Renesas" version="3.5.0">
<description>SCI UART</description>
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
</component>
</raComponentSelection>
<raElcConfiguration/>
<raIcuConfiguration/>
<raModuleConfiguration>
<module id="module.driver.ioport_on_ioport.0">
<property id="module.driver.ioport.name" value="g_ioport"/>
<property id="module.driver.ioport.elc_trigger_ioport1" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioport2" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioport3" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioport4" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioportb" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioportc" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioportd" value="_disabled"/>
<property id="module.driver.ioport.elc_trigger_ioporte" value="_disabled"/>
<property id="module.driver.ioport.pincfg" value="g_bsp_pin_cfg"/>
</module>
<module id="module.driver.uart_on_sci_uart.552817864">
<property id="module.driver.uart.name" value="g_uart9"/>
<property id="module.driver.uart.channel" value="9"/>
<property id="module.driver.uart.data_bits" value="module.driver.uart.data_bits.data_bits_8"/>
<property id="module.driver.uart.parity" value="module.driver.uart.parity.parity_off"/>
<property id="module.driver.uart.stop_bits" value="module.driver.uart.stop_bits.stop_bits_1"/>
<property id="module.driver.uart.baud" value="115200"/>
<property id="module.driver.uart.baudrate_modulation" value="module.driver.uart.baudrate_modulation.disabled"/>
<property id="module.driver.uart.baudrate_max_err" value="5"/>
<property id="module.driver.uart.flow_control" value="module.driver.uart.flow_control.rts"/>
<property id="module.driver.uart.pin_control_port" value="module.driver.uart.pin_control_port.PORT_DISABLE"/>
<property id="module.driver.uart.pin_control_pin" value="module.driver.uart.pin_control_pin.PIN_DISABLE"/>
<property id="module.driver.uart.clk_src" value="module.driver.uart.clk_src.int_clk"/>
<property id="module.driver.uart.rx_edge_start" value="module.driver.uart.rx_edge_start.falling_edge"/>
<property id="module.driver.uart.noisecancel_en" value="module.driver.uart.noisecancel_en.disabled"/>
<property id="module.driver.uart.rx_fifo_trigger" value="module.driver.uart.rx_fifo_trigger.max"/>
<property id="module.driver.uart.callback" value="user_uart9_callback"/>
<property id="module.driver.uart.rxi_ipl" value="board.icu.common.irq.priority12"/>
<property id="module.driver.uart.txi_ipl" value="board.icu.common.irq.priority12"/>
<property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority12"/>
<property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority12"/>
</module>
<context id="_hal.0">
<stack module="module.driver.ioport_on_ioport.0"/>
<stack module="module.driver.uart_on_sci_uart.552817864"/>
</context>
<config id="config.driver.ioport">
<property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
</config>
<config id="config.driver.sci_uart">
<property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
<property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
<property id="config.driver.sci_uart.dtc_support" value="config.driver.sci_uart.dtc_support.disabled"/>
<property id="config.driver.sci_uart.flow_control" value="config.driver.sci_uart.flow_control.disabled"/>
</config>
</raModuleConfiguration>
<raPinConfiguration>
<pincfg active="true" name="R7FA6M3AH3CFB.pincfg" selected="true" symbol="g_bsp_pin_cfg">
<configSetting altId="debug0.mode.swd" configurationId="debug0.mode"/>
<configSetting altId="debug0.swclk.p300" configurationId="debug0.swclk"/>
<configSetting altId="debug0.swdio.p108" configurationId="debug0.swdio"/>
<configSetting altId="p108.debug0.swdio" configurationId="p108"/>
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
<configSetting altId="p109.sci9.txd" configurationId="p109"/>
<configSetting altId="p109.gpio_mode.gpio_mode_peripheral" configurationId="p109.gpio_mode"/>
<configSetting altId="p110.sci9.rxd" configurationId="p110"/>
<configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
<configSetting altId="p300.debug0.swclk" configurationId="p300"/>
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
<configSetting altId="sci9.mode.asynchronous.free" configurationId="sci9.mode"/>
<configSetting altId="sci9.rxd.p110" configurationId="sci9.rxd"/>
<configSetting altId="sci9.txd.p109" configurationId="sci9.txd"/>
</pincfg>
</raPinConfiguration>
</raConfiguration>

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# RA6M3-HMI-Board-lvgl 使用文档
## ENV 配置
首先在BSP目录下打开env工具输入 `menuconfig` 进入配置界面
![](picture/lvgl/00.png)
## RGB 屏使用配置
`Hardware Drivers Config → On-chip Peripheral Drivers → Enable LVGL for LCD` 中使能 `Enable LVGL for LCD_RGB565` 选项
![](picture/lvgl/12.png)
接下来退出菜单界面,输入 `pkgs --update` 命令手动联网获取 lvgl 的软件包到 `packages` 文件夹下
![](picture/lvgl/02.png)
接着在env 终端中输入 `scons --target=mdk5` 生成 mdk 工程
![](picture/lvgl/03.png)
### fsp 中配置 GLCDC 外设
点击 mdk 中的 `Tools->RA Smart Configurator` 进入 rasc 配置软件
![](picture/lvgl/04.png)
点击 New Stack选择 `Graphics->Graphics LCD`,使能 LCD 外设
![](picture/lvgl/05.png)
`Interrupt->Callback Function` 中,设置中断回调函数,输入 `_ra_port_display_callback`
![](picture/lvgl/06.png)
`Input->Graphics Layer 1->Framebuffer` 中,将 `Number of framebuffers` 属性设置为1其他选项默认
![](picture/lvgl/07.png)
接着我们配置 LCD 的引脚属性,进入 Pins 界面按照下图进行配置:
![](picture/lvgl/08.png)
接着向下拉,按照下图配置 LCD_TCONx 引脚:
![](picture/lvgl/09.png)
完成以上配置后,点击 `Generate Project Content` 生成配置相关代码
![](picture/lvgl/10.png)
### 编译烧录
退出 rasc 后,在 mdk 中进行编译,仿真下载即可
![](picture/lvgl/11.png)
## SPI(ILI9431) 屏使用配置
### 硬件连接
硬件按照如下引脚进行连接:
![](picture/lvgl/tft-pin.png)
`Hardware Drivers Config → On-chip Peripheral Drivers → Enable LVGL for LCD` 中使能 `Enable LVGL for LCD_ILI9431` 选项
![](picture/lvgl/01.png)
接下来退出菜单界面,输入 `pkgs --update` 命令手动联网获取 lvgl 的软件包到 `packages` 文件夹下
![](picture/lvgl/02.png)
接着在env 终端中输入 `scons --target=mdk5` 生成 mdk 工程
![](picture/lvgl/03.png)
### fsp 中配置 SPI 外设
点击 mdk 中的 `Tools->RA Smart Configurator` 进入 rasc 配置软件
![](picture/lvgl/04.png)
点击 New Stack选择 `Connectivity->SPI(r_spi)`,使能 SPI 外设
![](picture/lvgl/13.png)
`Callback`设置中断回调函数默认使用SPI0输入 `spi0_callback`
![](picture/lvgl/14.png)
接着我们配置 SPI 的引脚属性默认使用SPI0进入 Pins 界面按照下图进行配置:
![](picture/lvgl/15.png)
完成以上配置后,点击 `Generate Project Content` 生成配置相关代码
![](picture/lvgl/16.png)
### 编译烧录
退出 rasc 后,在 mdk 中进行编译,仿真下载即可
![](picture/lvgl/11.png)

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