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add bl808-d0 spi && i2c
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@@ -1,3 +1,4 @@
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[English](README_en.md) | **中文**
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# bouffalo_lab bsp
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## 1. 简介
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@@ -149,7 +150,7 @@ Windows下推荐使用[env工具][1]，在console下进入bsp/bouffalo_lab/bl61x
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4. 点击"Download"开始下载
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@@ -170,7 +171,7 @@ Windows下推荐使用[env工具][1]，在console下进入bsp/bouffalo_lab/bl61x
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如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
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@@ -199,6 +200,7 @@ Windows下推荐使用[env工具][1]，在console下进入bsp/bouffalo_lab/bl61x
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| WDT | 支持 | |
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| HWTIMER | 支持 | |
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| FLASH | 支持 | |
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| SDCARD | 支持 | |
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@@ -0,0 +1,200 @@
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**English** | [中文](README.md)
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# bouffalo_lab bsp
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## 1. Introduction
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bouffalo_lab bsp is a board support package for bouffalo_lab's series of AIoT chips. It adopts the latest **LHAL** driver library from bouffalo_lab, which is synchronized with the [bouffalo_sdk](https://github.com/bouffalolab/bouffalo_sdk) (formerly known as bl_mcu_sdk) code at commit id: `e6e8da79a50aeb4fcb67ac380c3bd8885cd56faf`.
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Currently, the following chips are supported:
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| | Chip Model | Kernel |
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| ---- | :----------------------- | ---------------------------------------- |
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| 1 | bl60x(bl602/bl604) | RISC-V SiFive E24 |
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| 2 | bl70x(bl702/bl704/bl706) | RISC-V SiFive E24 |
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| 3 | bl61x(bl616/bl618) | RISC-V T-Head E907 |
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| 4 | bl808 | RISC-V T-Head E902(lp)+E907(m0)+C906(d0) |
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**LHAL** is a driver library designed by bouffalo_lab for unified general peripheral interfaces. The code is concise and supports all series of bouffalo_lab chips.
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| Peripheral | BL602/BL604 | BL702/BL704/BL706 | BL616/BL618 | BL808 |
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| :------: | :---------: | :---------------: | :---------: | :---: |
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| ADC | ○ | √ | √ | ○ |
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| CAM | - | × | × | × |
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| CKS | ○ | √ | √ | ○ |
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| DAC | ○ | √ | √ | ○ |
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| DMA | ○ | √ | √ | √ |
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| EFUSE | × | √ | √ | √ |
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| EMAC | - | √ | √ | √ |
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| FLASH | √ | √ | √ | √ |
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| GPIO | ○ | √ | √ | √ |
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| I2C | ○ | √ | √ | ○ |
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| I2S | ○ | ○ | √ | ○ |
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| IR | ○ | √ | √ | ○ |
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| MJPEG | × | × | √ | √ |
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| PWM_v1 | ○ | √ | - | - |
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| PWM_v2 | - | - | √ | √ |
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| RTC | ○ | √ | √ | √ |
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| SEC_AES | ○ | √ | √ | √ |
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| SEC_SHA | ○ | √ | √ | √ |
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| SEC_TRNG | ○ | √ | √ | √ |
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| SEC_PKA | ○ | √ | √ | √ |
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| SPI | ○ | √ | √ | √ |
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| TIMER | ○ | √ | √ | √ |
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| UART | √ | √ | √ | √ |
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| USB_v1 | - | √ | - | - |
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| USB_v2 | - | - | √ | √ |
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| WDG | ○ | √ | √ | ○ |
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Note: **√** means supported; **×** means unsupported; **○** means supported but not tested; **-** means the peripheral is not available.
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## 2. Environment Setup and Compilation
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bl60x/bl70x/bl61x can be directly compiled for the corresponding chips. bl808 is a multi-core heterogeneous architecture, divided into m0, lp, and d0. Each core needs to be compiled separately and burned to the corresponding location. Please refer to [bl808 triple-core user guide](./bl808/README_en.md) for detailed usage.
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The following operations are based on the single-core bl61x chip, and the operations for other chips are the same.
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### 2.1. Download
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Please download the toolchain for the corresponding chip using the download links below.
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| Chip Model | Download Link |
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| ----------- | ------------------------------------------------------------ |
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| bl60x/bl70x | [Linux](https://gitee.com/bouffalolab/toolchain_gcc_sifive_linux)/[windows](https://gitee.com/bouffalolab/toolchain_gcc_sifive_windows) |
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| bl61x/bl808 | [T-Head Website](https://occ.t-head.cn/community/download?id=4073475960903634944) or [Linux](https://gitee.com/bouffalolab/linuxtoolchain_gcc_t-head)/[windows](https://gitee.com/bouffalolab/toolchain_gcc_t-head_windows) |
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### 2.2. Setup
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For Windows, please use the [env tool][1] and extract the cross-compiler with the command `tar -xvf Xuantie-900-gcc-elf-newlib-mingw-V2.6.1-20220906.tar.gz`. Extracting the cross-compiler directly with Windows tools may cause compilation errors on Windows.
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Add the path of the RISC-V toolchain to `EXEC_PATH` in `rtconfig.py` or specify the path using the `RTT_EXEC_PATH` environment variable.
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Windows:
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```
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set RTT_EXEC_PATH=C:\Users\xxxx\Downloads\Xuantie-900-gcc-elf-newlib-x86_64-V2.6.1\bin
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```
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Linux:
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```
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export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.6.1/bin
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```
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### 2.3. Compilation
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For Windows, it is recommended to use the [env tool][1]. Open the console and navigate to the bsp/bouffalo_lab/bl61x directory, then run:
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cd bsp/bouffalo_lab/bl61x
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menuconfig
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pkgs --update
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If you are using Linux, you can execute:
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scons --menuconfig
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It will automatically download the env-related scripts to the ~/.env directory, then execute:
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source ~/.env/env.sh
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cd bsp/bouffalo_lab/bl61x
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pkgs --update
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After updating the software packages, use the command `scons -j10` or `scons -j10 --verbose` to compile the board support package. Alternatively, you can use the `scons --exec-path="GCC toolchain path"` command to specify the toolchain path and compile at the same time.
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If the compilation is successful, the rtthread.elf and rtthread.bin files will be generated. After the compilation, the script will automatically call `libraries/bl_mcu_sdk/tools/bflb_tools/bflb_fw_post_proc` to package the rtthread.bin for subsequent burning using the `bouffalo_flash_cube` tool.
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The script will automatically download `bflb_fw_post_proc` using the curl command line method. If the automatic download fails, you can manually download the corresponding file for your operating system and save it to the `libraries/bl_mcu_sdk/tools/bflb_tools/bflb_fw_post_proc` directory.
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| Download Link 1 | [windows](https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc.exe)/[Linux](https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc-ubuntu)/[macos](https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc-macos) |
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| -------------- | ------------------------------------------------------------ |
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| Download Link 2 | [bflb_fw_post_proc-win.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-win.tar.gz)/[bflb_fw_post_proc-linux.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-linux.tar.gz)/[bflb_fw_post_proc-macos.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-macos.tar.gz) |
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| Download Link 3 | [bflb_fw_post_proc-win.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-win.tar.gz)/[bflb_fw_post_proc-linux.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-linux.tar.gz)/[bflb_fw_post_proc-macos.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bflb_fw_post_proc-macos.tar.gz) |
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## 3. Download and Flashing
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### 3.1. Download the Flashing Tool
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The current bsp must use the `bouffalo_flash_cube-1.0.4` tool for flashing, other tools may not work correctly.
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- Download Link 1: [Baidu Pan](https://pan.baidu.com/s/1eG9pkxf3riAqQAu9aXiOjw?pwd=miv1)
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- Download Link 2: [bouffalo_flash_cube-win.zip](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-win.zip)/[bouffalo_flash_cube-win.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-win.tar.gz), [bouffalo_flash_cube-linux.zip](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-linux.zip)/[bouffalo_flash_cube-linux.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-linux.tar.gz), [bouffalo_flash_cube-macos.zip](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-macos.zip)/[bouffalo_flash_cube-macos.tar.gz](https://gitee.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-macos.tar.gz)
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- Download Link 3: [bouffalo_flash_cube-win.zip](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-win.zip)/[bouffalo_flash_cube-win.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-win.tar.gz), [bouffalo_flash_cube-linux.zip](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-linux.zip)/[bouffalo_flash_cube-linux.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-linux.tar.gz), [bouffalo_flash_cube-macos.zip](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-macos.zip)/[bouffalo_flash_cube-macos.tar.gz](https://github.com/flyingcys/bflb_tools/releases/download/v1.0.4/bouffalo_flash_cube-macos.tar.gz)
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### 3.2. Flashing via GUI
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1. Connect the serial port and select the corresponding port on the tool.
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2. Open the flash_prog_cfg.ini file in the corresponding chip folder.
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3. Hold down the boot button on the development board, then power on the board to enter flashing mode.
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4. Click "Download" to start the flashing process.
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### 3.2. Flashing via Command Line
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You can use the `bouffalo_flash_cube.sh` script in the `bsp/bouffalo_lab` directory to flash the chip via command line. Enter `./bouffalo_flash_cube.sh bl616 /dev/ttyUSB1` and the script will automatically download `bouffalo_flash_cube` using the curl command line method.
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If the automatic download fails, you can manually download the corresponding file for your operating system and save it to the `libraries/bl_mcu_sdk/tools/bflb_tools/bouffalo_flash_cube` directory.
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- bl616: chip name (bl808: simultaneous flashing of three cores; or enter: bl808-m0/bl808-lp/bl808-d0 to flash the corresponding core individually, but m0 must be flashed for normal operation)
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- /dev/ttyUSB1: download serial port number (in Linux it is /dev/ttyUSBx or /dev/ttyACMx, in Windows it is COMx)
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### 4. Running
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If the compilation and flashing are successful, when you reset the device, you will see the RT-Thread startup logo information on the serial port:
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## 5. Supported Development Boards
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| | Board Model |
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| ----- | ---------------------- |
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| bl602 | BL602-IoT-3S/BL-HWC-G1 |
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| bl702 | Maix Zero Sense |
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| bl616/bl618 | M0S Dock/M0P Dock |
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| bl808 | M1s Dock |
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## 6. Driver Support List
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| Driver | Support Status | Remarks |
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| :----- | :------------- | :--------------------- |
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| UART | Supported | Default baud rate 2000000 |
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| GPIO | Supported | |
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| I2C | Supported | |
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| SPI | Supported | Supports DMA |
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| PWM | Supported | |
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| ADC | Supported | |
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| RTC | Supported | |
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| WDT | Supported | |
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| HWTIMER | Supported | |
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| FLASH | Supported | |
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| SDCARD | Supported | |
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## 7. Contact Information
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Maintainer: [flyingcys](https://github.com/flyingcys)
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## 8. References
|
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* Chip [datasheet][2]
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|
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[1]: https://www.rt-thread.org/download.html#download-rt-thread-env-tool
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[2]: https://github.com/bouffalolab/bl_docs
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@@ -1,3 +1,4 @@
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[English](README_en.md) | **中文**
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# 博流智能 BL808板级支持包说明
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## 1. 简介
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@@ -127,7 +128,7 @@ bl808-d0运行在S态下，支持RT-Smart，采用的交叉编译器为`riscv64-
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其中内核虚拟地址开始地址为`0x50000000`
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bl808-d0编译完成后通过`merge_rtsmart.py`脚本，将`hw.dtb.5M`,`spl_bl808_d0.bin`，`opensbi_v0.6.bin`与`rtthread_d0.bin`，合成最终烧录文件`whole_img_d0.bin`，烧录地址为`0x100000`，否则无法启动。
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@@ -135,7 +136,7 @@ bl808-d0编译完成后通过`merge_rtsmart.py`脚本，将`hw.dtb.5M`,`spl_bl80
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d0单独烧录文件为`bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini`
|
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@@ -144,7 +145,7 @@ d0单独烧录文件为`bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini`
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- 可运行`bsp/bouffalo_lab/bl808/build_bl808_all.sh`依次编译m0、lp、d0核
|
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- 可通过`bsp/bouffalo_lab/bl808/flash_prog_cfg.ini`烧录配置文件，同时烧录m0、lp、d0核。
|
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||||
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||||
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||||
@@ -0,0 +1,155 @@
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**English** | [中文](README.md)
|
||||
# BL808 Board Support Package Documentation
|
||||
|
||||
## 1. Introduction
|
||||
|
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BL808 is a highly integrated AIoT chip with wireless connectivity units such as Wi-Fi/BT/BLE/Zigbee, multiple CPUs, audio and video codec, and AI hardware accelerator. It is suitable for various high-performance and low-power applications.
|
||||
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||||
The BL808 chip consists of two subsystems: wireless and multimedia.
|
||||
|
||||
The wireless subsystem includes a RISC-V 32-bit high-performance CPU (m0) and integrated Wi-Fi/BT/Zigbee wireless subsystem, which enables various wireless connections and data transmission for diverse connectivity and user experiences.
|
||||
The multimedia subsystem includes a RISC-V 64-bit ultra-high-performance CPU (d0) and integrated DVP/CSI/H264/NPU video processing modules, which can be widely used in video surveillance, smart speakers, and other AI applications.
|
||||
|
||||
The components of the multimedia subsystem include:
|
||||
|
||||
- NPU HW NN co-processor (BLAI-100) for AI applications
|
||||
- Camera interface
|
||||
- Audio codec
|
||||
- Video codec
|
||||
- Sensors
|
||||
- Display interface
|
||||
|
||||
The power management unit controls the low-power mode. It also supports various security features.
|
||||
|
||||
Peripheral interfaces include USB2.0, Ethernet, SD/MMC, SPI, UART, I2C, I2S, PWM, GPDAC/GPADC, ACOMP, PIR, Touch, IR remote, Display, and GPIO.
|
||||
|
||||
It supports flexible GPIO configuration, with a maximum of 40 GPIO pins.
|
||||
|
||||
The chip specifications are as follows:
|
||||
|
||||
| Hardware | Description |
|
||||
| -------- | ------------------------------------- |
|
||||
| Chip Model | bl808 |
|
||||
| CPU | Three-core heterogeneous RISC-V CPUs: <br />RV64GCV 480MHz<br />RV32GCP 320MHz<br />RV32EMC 160MHz |
|
||||
| RAM | 768KB SRAM + 64MB UHS PSRAM |
|
||||
| Peripherals | Built-in AES and SHA256 algorithm accelerators |
|
||||
| AI NN general hardware accelerator | BLAI-100 for video/audio detection/recognition, 100GOPS computational power |
|
||||
| Camera Interface | DVP and MIPI-CSI |
|
||||
| Display Interface | SPI, DBI, DPI (RGB) |
|
||||
| Wireless | Supports Wi-Fi 802.11 b/g/n<br />Supports Bluetooth 5.x Dual-mode (BT+BLE)<br />Supports Wi-Fi/Bluetooth coexistence |
|
||||
|
||||
|
||||
|
||||
## 2. RT-Thread Versions
|
||||
|
||||
BL808 is a three-core heterogeneous architecture, including m0, lp, and d0 cores. The current BSP supports all three cores running simultaneously and uses different RT-Thread versions for each core.
|
||||
|
||||
| Name | Core | RT-Thread Version |
|
||||
| ----------- | ----- | ---------------- |
|
||||
| M0 | E907 | RT-Thread Standard Edition |
|
||||
| LP | E902 | RT-Thread Nano |
|
||||
| D0 | C906 | RT-SMART |
|
||||
|
||||
|
||||
|
||||
|
||||
## 3. Compilation Instructions
|
||||
|
||||
BL808 is a three-core heterogeneous architecture, including m0, lp, and d0 cores. Each core needs to be compiled separately and burned to the corresponding location.
|
||||
|
||||
Flashing addresses:
|
||||
|
||||
| Name | Core | Flash Address | Description |
|
||||
| ---- | ----- | ------------- | ------------------------------------------------------------ |
|
||||
| M0 | E907 | 0x00000 | |
|
||||
| LP | E902 | 0xC0000 | Modify the lp flash address in `bsp/bouffalo_lab/bl808/lp/board/linker_scripts/bl808_flash_lp.ld` and `bsp/bouffalo_lab/bl808/m0/board/board.h` `CONFIG_LP_FLASH_ADDR` address |
|
||||
| D0 | C906 | 0x100000 | Set in the SPL file. To adjust the d0 flash address, the SPL file and the packaged file `bsp/bouffalo_lab/bl808/d0/merge_rtsmart.py` need to be recompiled |
|
||||
|
||||
|
||||
|
||||
### 3.1. m0/lp
|
||||
|
||||
- #### Toolchain Download
|
||||
|
||||
Download the RISC-V toolchain from [Download Link 1](https://occ.t-head.cn/community/download?id=4073475960903634944) or [Download Link 2](https://dl.sipeed.com/shareURL/others/toolchain).
|
||||
|
||||
For Windows, use the [env tool][1] and extract the cross-compiler with the command `tar -xvf Xuantie-900-gcc-elf-newlib-mingw-V2.6.1-20220906.tar.gz`. Extracting the cross-compiler directly with Windows tools may cause compilation errors on Windows.
|
||||
|
||||
Add the path of the RISC-V toolchain to `EXEC_PATH` in `rtconfig.py` or specify the path using the `RTT_EXEC_PATH` environment variable.
|
||||
|
||||
Windows:
|
||||
```
|
||||
set RTT_EXEC_PATH=C:\Users\xxxx\Downloads\Xuantie-900-gcc-elf-newlib-x86_64-V2.6.1\bin
|
||||
```
|
||||
|
||||
Linux:
|
||||
```
|
||||
export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.6.1/bin
|
||||
```
|
||||
|
||||
- ### Compilation
|
||||
|
||||
For Windows, it is recommended to use the [env tool][1]. Open the console and navigate to the bsp/bl808 directory, then select the core, m0 or lp, and run:
|
||||
|
||||
cd bsp/bl808/m0
|
||||
menuconfig
|
||||
pkgs --update
|
||||
|
||||
If you are using Linux, you can execute:
|
||||
|
||||
scons --menuconfig
|
||||
|
||||
It will automatically download the env-related scripts to the ~/.env directory, then execute:
|
||||
|
||||
source ~/.env/env.sh
|
||||
|
||||
cd bsp/bl808/m0
|
||||
pkgs --update
|
||||
|
||||
After updating the software packages, use the command `scons -j10` or `scons -j10 --verbose` to compile the board support package. Alternatively, you can use the `scons --exec-path="GCC toolchain path"` command to specify the toolchain path and compile at the same time.
|
||||
|
||||
If the compilation is successful, the rtthread.elf and rtthread_m0.bin files will be generated. The rtthread_m0.bin file needs to be burned into the device for execution.
|
||||
|
||||
|
||||
|
||||
- #### Note
|
||||
|
||||
Since BL808 is a three-core heterogeneous architecture, the lp and d0 cores are started through the m0 core. It is necessary to burn the m0 core correctly to enable all three cores to run properly.
|
||||
|
||||
Configuration file for m0 flashing: `bsp/bouffalo_lab/bl808/m0/flash_prog_cfg.ini`
|
||||
|
||||
|
||||
|
||||
### 3.2. d0
|
||||
|
||||
bl808-d0 runs in S-mode and supports RT-Smart. The cross-compiler used is `riscv64-unknown-linux-musl-gcc`. Please refer to the [Build Kernel Image](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-smart/quick-start/qemu-linux/quickstart?id=%e6%9e%84%e5%bb%ba%e5%86%85%e6%a0%b8%e9%95%9c%e5%83%8f) for compilation instructions.
|
||||
|
||||
The starting address of the kernel virtual address is `0x50000000`.
|
||||
|
||||
|
||||
|
||||
After the bl808-d0 is compiled, use the `merge_rtsmart.py` script to merge `hw.dtb.5M`, `spl_bl808_d0.bin`, `opensbi_v0.6.bin`, and `rtthread_d0.bin` into the final flash file `whole_img_d0.bin`, which should be burned at address `0x100000`. Otherwise, the board will not be able to start.
|
||||
|
||||
The pre-compiled bin files are located in the `bsp/bouffalo_lab/bl808/d0/pre_build_bin` folder. If there are any modification requirements, you can download the [Low-Starup-BL808](https://github.com/flyingcys/Low-Starup-BL808) repository and modify it.
|
||||
|
||||
The separate flashing file for d0 is `bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini`.
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
### 3.3. Compilation and Flashing of Three Cores Simultaneously
|
||||
|
||||
- You can run `bsp/bouffalo_lab/bl808/build_bl808_all.sh` to compile m0, lp, d0 cores one by one.
|
||||
- You can use the `bsp/bouffalo_lab/bl808/flash_prog_cfg.ini` flashing configuration file to flash m0, lp, and d0 cores simultaneously.
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
## 4. FAQ
|
||||
|
||||
- In a Windows environment, when connecting the development board to the computer via the UART interface, only two USB converter devices are recognized, but the corresponding serial port device is not recognized.
|
||||
- Go to Device Manager, right-click on the corresponding USB converter device, go to Properties, and in the Advanced Settings, check the vcp option. After refreshing, you will see the corresponding serial port device.
|
||||
- Alternatively, you can install the following driver to solve the problem: https://dl.sipeed.com/shareURL/MAIX/tools/ftdi_vcp_driver
|
||||
- When connecting the computer to the board's UART port using a TypeC data cable, two serial ports will appear on the computer (if the mouse cannot move, unplug the USB and check [Updating the board's bl702 firmware](https://wiki.sipeed.com/hardware/zh/maix/m1s/other/start.html) for a solution).
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -107,10 +107,14 @@
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_TTY
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_NULL
|
||||
#define RT_USING_ZERO
|
||||
#define RT_USING_RANDOM
|
||||
#define RT_USING_RTC
|
||||
#define RT_USING_SPI
|
||||
|
||||
/* Using USB */
|
||||
|
||||
@@ -145,6 +149,7 @@
|
||||
/* Utilities */
|
||||
|
||||
#define RT_USING_ADT
|
||||
#define RT_USING_RESOURCE_ID
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
Binary file not shown.
|
Before Width: | Height: | Size: 73 KiB |
BIN
Binary file not shown.
|
After Width: | Height: | Size: 199 KiB |
Binary file not shown.
|
Before Width: | Height: | Size: 13 KiB |
Executable
BIN
Binary file not shown.
|
After Width: | Height: | Size: 82 KiB |
@@ -15,6 +15,8 @@ if GetDepend('BL808_CORE_D0'):
|
||||
src = Split("""
|
||||
src/bflb_gpio.c
|
||||
src/bflb_uart.c
|
||||
src/bflb_spi.c
|
||||
src/bflb_i2c.c
|
||||
""")
|
||||
else:
|
||||
src = Split("""
|
||||
|
||||
@@ -88,6 +88,16 @@ struct bflb_device_s bl808_device_table[] = {
|
||||
.irq_num = BL808_IRQ_SPI0,
|
||||
#else
|
||||
.irq_num = 0xff,
|
||||
#endif
|
||||
.idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_SPI,
|
||||
.user_data = NULL },
|
||||
{ .name = "spi1",
|
||||
.reg_base = SPI1_BASE,
|
||||
#if defined(CPU_D0)
|
||||
.irq_num = BL808_IRQ_SPI1,
|
||||
#else
|
||||
.irq_num = 0xff,
|
||||
#endif
|
||||
.idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_SPI,
|
||||
@@ -202,6 +212,39 @@ struct bflb_device_s bl808_device_table[] = {
|
||||
.sub_idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_I2C,
|
||||
.user_data = NULL },
|
||||
{ .name = "i2c1",
|
||||
.reg_base = I2C1_BASE,
|
||||
#if defined(CPU_M0) || defined(CPU_LP)
|
||||
.irq_num = BL808_IRQ_I2C1,
|
||||
#else
|
||||
.irq_num = 0xff,
|
||||
#endif
|
||||
.idx = 1,
|
||||
.sub_idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_I2C,
|
||||
.user_data = NULL },
|
||||
{ .name = "i2c2",
|
||||
.reg_base = I2C2_BASE,
|
||||
#if defined(CPU_D0)
|
||||
.irq_num = BL808_IRQ_I2C2,
|
||||
#else
|
||||
.irq_num = 0xff,
|
||||
#endif
|
||||
.idx = 2,
|
||||
.sub_idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_I2C,
|
||||
.user_data = NULL },
|
||||
{ .name = "i2c3",
|
||||
.reg_base = I2C3_BASE,
|
||||
#if defined(CPU_D0)
|
||||
.irq_num = BL808_IRQ_I2C3,
|
||||
#else
|
||||
.irq_num = 0xff,
|
||||
#endif
|
||||
.idx = 3,
|
||||
.sub_idx = 0,
|
||||
.dev_type = BFLB_DEVICE_TYPE_I2C,
|
||||
.user_data = NULL },
|
||||
{ .name = "timer0",
|
||||
.reg_base = TIMER0_BASE,
|
||||
#if defined(CPU_M0) || defined(CPU_LP)
|
||||
|
||||
@@ -206,7 +206,7 @@ static int bflb_i2c_write_bytes(struct bflb_device_s *dev, uint8_t *data, uint32
|
||||
uint32_t reg_base;
|
||||
uint32_t temp = 0;
|
||||
uint8_t *tmp_buf;
|
||||
uint64_t start_time;
|
||||
// uint64_t start_time;
|
||||
|
||||
reg_base = dev->reg_base;
|
||||
tmp_buf = data;
|
||||
@@ -216,12 +216,12 @@ static int bflb_i2c_write_bytes(struct bflb_device_s *dev, uint8_t *data, uint32
|
||||
}
|
||||
tmp_buf += 4;
|
||||
len -= 4;
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_TX_FIFO_CNT_MASK) == 0) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_TX_FIFO_CNT_MASK) == 0) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
putreg32(temp, reg_base + I2C_FIFO_WDATA_OFFSET);
|
||||
if (!bflb_i2c_isenable(dev)) {
|
||||
bflb_i2c_enable(dev);
|
||||
@@ -233,24 +233,24 @@ static int bflb_i2c_write_bytes(struct bflb_device_s *dev, uint8_t *data, uint32
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
temp += (tmp_buf[i] << ((i % 4) * 8));
|
||||
}
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_TX_FIFO_CNT_MASK) == 0) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_TX_FIFO_CNT_MASK) == 0) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
putreg32(temp, reg_base + I2C_FIFO_WDATA_OFFSET);
|
||||
if (!bflb_i2c_isenable(dev)) {
|
||||
bflb_i2c_enable(dev);
|
||||
}
|
||||
}
|
||||
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while (bflb_i2c_isbusy(dev) || !bflb_i2c_isend(dev) || bflb_i2c_isnak(dev)) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while (bflb_i2c_isbusy(dev) || !bflb_i2c_isend(dev) || bflb_i2c_isnak(dev)) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
bflb_i2c_disable(dev);
|
||||
|
||||
return 0;
|
||||
@@ -261,7 +261,7 @@ static int bflb_i2c_read_bytes(struct bflb_device_s *dev, uint8_t *data, uint32_
|
||||
uint32_t reg_base;
|
||||
uint32_t temp = 0;
|
||||
uint8_t *tmp_buf;
|
||||
uint64_t start_time;
|
||||
// uint64_t start_time;
|
||||
|
||||
reg_base = dev->reg_base;
|
||||
tmp_buf = data;
|
||||
@@ -269,12 +269,12 @@ static int bflb_i2c_read_bytes(struct bflb_device_s *dev, uint8_t *data, uint32_
|
||||
bflb_i2c_enable(dev);
|
||||
|
||||
while (len >= 4) {
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_RX_FIFO_CNT_MASK) == 0) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_RX_FIFO_CNT_MASK) == 0) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
temp = getreg32(reg_base + I2C_FIFO_RDATA_OFFSET);
|
||||
PUT_UINT32_LE(tmp_buf, temp);
|
||||
tmp_buf += 4;
|
||||
@@ -282,12 +282,12 @@ static int bflb_i2c_read_bytes(struct bflb_device_s *dev, uint8_t *data, uint32_
|
||||
}
|
||||
|
||||
if (len > 0) {
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_RX_FIFO_CNT_MASK) == 0) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while ((getreg32(reg_base + I2C_FIFO_CONFIG_1_OFFSET) & I2C_RX_FIFO_CNT_MASK) == 0) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
temp = getreg32(reg_base + I2C_FIFO_RDATA_OFFSET);
|
||||
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
@@ -295,12 +295,12 @@ static int bflb_i2c_read_bytes(struct bflb_device_s *dev, uint8_t *data, uint32_
|
||||
}
|
||||
}
|
||||
|
||||
start_time = bflb_mtimer_get_time_ms();
|
||||
while (bflb_i2c_isbusy(dev) || !bflb_i2c_isend(dev)) {
|
||||
if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
// start_time = bflb_mtimer_get_time_ms();
|
||||
// while (bflb_i2c_isbusy(dev) || !bflb_i2c_isend(dev)) {
|
||||
// if ((bflb_mtimer_get_time_ms() - start_time) > 100) {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// }
|
||||
bflb_i2c_disable(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -1111,6 +1111,7 @@ menu "General Drivers Configuration"
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
select RT_USING_SPI
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
||||
if BSP_USING_SPI
|
||||
|
||||
@@ -43,7 +43,7 @@ if GetDepend('BSP_USING_ON_CHIP_FLASH'):
|
||||
if GetDepend('BSP_USING_SDH'):
|
||||
src += ['drv_sdh.c']
|
||||
|
||||
if GetDepend('RT_USING_DFS'):
|
||||
if GetDepend('BSP_USING_SDH'):
|
||||
src += ['port/mnt.c']
|
||||
|
||||
group = DefineGroup('rt_drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
@@ -358,7 +358,7 @@
|
||||
#define I2C3_GPIO_SCL GPIO_PIN_44
|
||||
#endif
|
||||
|
||||
#ifdef I2C3_SDA_USING_GPIO26
|
||||
#ifdef I2C3_SDA_USING_GPIO1
|
||||
#define I2C3_GPIO_SDA GPIO_PIN_1
|
||||
#elif defined(I2C3_SDA_USING_GPIO3)
|
||||
#define I2C3_GPIO_SDA GPIO_PIN_3
|
||||
|
||||
@@ -554,6 +554,12 @@ int rt_hw_spi_init(void)
|
||||
dev_spi.dma_rx = bflb_device_get_by_name(BSP_SPI_RX_DMA_CHANNEL);
|
||||
#endif
|
||||
|
||||
#else
|
||||
bflb_gpio_init(gpio, SPI_SCK_PIN, GPIO_FUNC_SPI1 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
|
||||
bflb_gpio_init(gpio, SPI_MISO_PIN, GPIO_FUNC_SPI1 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
|
||||
bflb_gpio_init(gpio, SPI_MOSI_PIN, GPIO_FUNC_SPI1 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
|
||||
|
||||
dev_spi.spi = bflb_device_get_by_name("spi1");
|
||||
#endif /* BL808_CORE_D0 */
|
||||
|
||||
dev_spi.spi_bus.parent.user_data = (void *)&dev_spi;
|
||||
|
||||
@@ -13,6 +13,7 @@
|
||||
#include <rthw.h>
|
||||
#include "bflb_spi.h"
|
||||
#include "bflb_dma.h"
|
||||
#include "bflb_gpio.h"
|
||||
|
||||
#ifndef __DRV_SPI_H_
|
||||
#define __DRV_SPI_H_
|
||||
|
||||
Reference in new issue
Block a user