rzn2l-rsk support studio

This commit is contained in:
kurisaw
2024-12-04 10:11:04 +08:00
committed by Rbb666
parent 3f1a62cfe3
commit 2c3ee65d7f
18 changed files with 1252 additions and 1464 deletions
File diff suppressed because one or more lines are too long
+28
View File
@@ -0,0 +1,28 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>hh</name>
<comment />
<projects>
</projects>
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eclipse.preferences.version=1
toolchain.path.1287942917=${toolchain_install_path}/ARM/GNU_Tools_for_ARM_Embedded_Processors/10.2.1/bin
@@ -0,0 +1,14 @@
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@@ -0,0 +1,2 @@
eclipse.preferences.version=1
temp.toolchain.exec.path=D\:\\manufacture_apps\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\ARM\\GNU_Tools_for_ARM_Embedded_Processors\\10.2.1/bin
@@ -0,0 +1,3 @@
content-types/enabled=true
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
eclipse.preferences.version=1
@@ -0,0 +1,19 @@
#RT-Thread Studio Project Configuration
#Thu Nov 28 18:09:09 CST 2024
cfg_version=v3.0
board_name=rzn2l_rsk
example_name=
hardware_adapter=J-Link
board_base_nano_proj=false
project_type=rt-thread
chip_name=R9A07G084
selected_rtt_version=latest
bsp_version=1.0.0
os_branch=master
project_base_rtt_bsp=true
output_project_path=D\:\\manufacture_apps\\RT-ThreadStudio\\repo\\Local\\Board_Support_Packages\\Renesas\\EtherKit\\1.0.0\\projects
is_base_example_project=false
is_use_scons_build=true
project_name=etherkit_blink_led
os_version=latest
bsp_path=
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@@ -1,24 +1,26 @@
#Sat Sep 14 16:03:03 CST 2024
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp_xspi0_boot.icf
#Wed Nov 27 16:37:16 CST 2024
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#rzn2l_rsk\#\#xspi0_x1_boot\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#Core\#\#\#\#5.7.0+renesas.1.fsp.2.0.0/all=1441545198,rzn/arm/CMSIS_5/LICENSE.txt|4247764709,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_gcc.h|1135074086,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/core_cr52.h|510668081,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_iccarm.h|4245531541,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_compiler.h|1887099957,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_cp15.h|3334069041,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_version.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#R9A07G084M04GBG\#\#2.0.0/all=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#rzn2l_rsk\#\#xspi0_x1_boot\#\#2.0.0/all=907937621,script/fsp_xspi0_boot.icf|3822962514,rzn/board/rzn2l_rsk/board_leds.c|358444977,rzn/board/rzn2l_rsk/board_init.c|2067006575,rzn/board/rzn2l_rsk/board.h|736691883,rzn/board/rzn2l_rsk/board_ethernet_phy.h|1631979823,rzn/board/rzn2l_rsk/board_leds.h|1430483072,rzn/board/rzn2l_rsk/board_init.h
com.renesas.cdt.ddsc.contentgen.options/options/suppresswarningspaths=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.86814920=false
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#2.0.0/all=908052335,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3563504244,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|870156648,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.c|368480523,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.c|3243637314,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1280798555,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|3352808441,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/R9A07G084.h|1310386533,rzn/fsp/src/bsp/mcu/all/bsp_io.h|3643995939,rzn/fsp/src/bsp/mcu/all/bsp_cache.h|1033616941,rzn/fsp/src/bsp/mcu/all/bsp_register_protection.h|1572168446,rzn/fsp/src/bsp/mcu/all/bsp_io.c|3001342594,rzn/fsp/src/bsp/mcu/all/bsp_common.h|263477342,rzn/fsp/src/bsp/mcu/all/bsp_reset.h|2534029381,rzn/fsp/src/bsp/mcu/all/bsp_module_stop.h|4193244082,rzn/fsp/src/bsp/mcu/all/bsp_irq.h|2136575248,rzn/fsp/src/bsp/mcu/all/bsp_tfu.h|2170977041,rzn/fsp/src/bsp/mcu/all/bsp_delay.c|526389185,rzn/fsp/src/bsp/mcu/all/bsp_compiler_support.h|8162287,rzn/fsp/src/bsp/mcu/all/bsp_clocks.h|3045644015,rzn/fsp/src/bsp/mcu/all/bsp_common.c|1908923075,rzn/fsp/src/bsp/mcu/all/bsp_clocks.c|1289851302,rzn/fsp/src/bsp/mcu/all/bsp_irq.c|358242822,rzn/fsp/src/bsp/mcu/all/bsp_sbrk.c|2321472163,rzn/fsp/src/bsp/mcu/all/bsp_cache.c|225356254,rzn/fsp/src/bsp/mcu/all/bsp_exceptions.h|2518644892,rzn/fsp/src/bsp/mcu/all/bsp_register_protection.c|392613868,rzn/fsp/src/bsp/mcu/all/bsp_reset.c|2238656401,rzn/fsp/src/bsp/mcu/all/bsp_mcu_api.h|1611830052,rzn/fsp/src/bsp/mcu/all/bsp_delay.h|2060190483,rzn/fsp/src/bsp/mcu/all/cr/bsp_cache_core.h|1543064539,rzn/fsp/src/bsp/mcu/all/cr/bsp_delay_core.h|3717942516,rzn/fsp/src/bsp/mcu/all/cr/bsp_cache_core.c|3396795463,rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.c|2195931215,rzn/fsp/src/bsp/mcu/all/cr/bsp_delay_core.c|1126344352,rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.h|1926319940,rzn/fsp/inc/fsp_features.h|2508067197,rzn/fsp/inc/fsp_version.h|3571247719,rzn/fsp/inc/fsp_common_api.h|3347087544,rzn/fsp/inc/instances/r_ioport.h|1765016794,rzn/fsp/inc/api/bsp_api.h|250199021,rzn/fsp/inc/api/r_ioport_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#R9A07G084M04GBG\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#fsp\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.project.standalone.projectgenerationoptions/isCpp=false
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#all\#\#Memory\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#all\#\#Memory\#\#\#\#2.0.0/all=
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#Core\#\#\#\#5.7.0+renesas.1.fsp.2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_rtc\#\#\#\#2.0.0/all=3551601681,rzn/fsp/src/r_rtc/r_rtc.c|3948337697,rzn/fsp/inc/instances/r_rtc.h|3795688877,rzn/fsp/inc/api/r_rtc_api.h
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp_xspi0_boot.icf
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#Core\#\#\#\#5.7.0+renesas.1.fsp.2.0.0/all=1441545198,rzn/arm/CMSIS_5/LICENSE.txt|4247764709,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_gcc.h|1135074086,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/core_cr52.h|510668081,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_iccarm.h|4245531541,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_compiler.h|1887099957,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_cp15.h|3334069041,rzn/arm/CMSIS_5/CMSIS/Core_R/Include/cmsis_version.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#R9A07G084M04GBG\#\#2.0.0/all=
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#R9A07G084M04GBG\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#2.0.0/all=2921827146,rzn/fsp/src/r_sci_uart/r_sci_uart.c|4093801030,rzn/fsp/inc/instances/r_sci_uart.h|1119704027,rzn/fsp/inc/api/r_uart_api.h|3586794436,rzn/fsp/inc/api/r_transfer_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#\#\#2.0.0/all=3243637314,rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_rtc\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#device\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#rzn2l\#\#fsp\#\#\#\#2.0.0/all=2989202485,rzn/fsp/src/bsp/mcu/rzn2l/bsp_loader_param.c|1967641730,rzn/fsp/src/bsp/mcu/rzn2l/bsp_feature.h|1508541487,rzn/fsp/src/bsp/mcu/rzn2l/bsp_elc.h|1088535767,rzn/fsp/src/bsp/mcu/rzn2l/bsp_irq_sense.c|1458388275,rzn/fsp/src/bsp/mcu/rzn2l/bsp_override.h|617637586,rzn/fsp/src/bsp/mcu/rzn2l/bsp_mcu_info.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#2.0.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#2.0.0/all=615913359,rzn/fsp/src/r_ioport/r_ioport.c|3347087544,rzn/fsp/inc/instances/r_ioport.h|250199021,rzn/fsp/inc/api/r_ioport_api.h
+1 -2
View File
@@ -17,8 +17,7 @@ elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
if GetOption('target') != 'mdk5':
CPPPATH = [cwd]
src = Glob('./src/*.c')
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
for d in list:
path = os.path.join(cwd, d)
+4 -3
View File
@@ -19,7 +19,7 @@ extern "C" {
#include <cp15.h>
#include <hal_data.h>
#define RZ_SRAM_SIZE 512 /* The SRAM size of the chip needs to be modified */
#define RZ_SRAM_SIZE 1536 /* The SRAM size of the chip needs to be modified */
#define RZ_SRAM_END (0x10000000 + RZ_SRAM_SIZE * 1024 - 1)
#ifdef __ARMCC_VERSION
@@ -29,7 +29,8 @@ extern int Image$$RAM_END$$ZI$$Base;
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
#define HEAP_BEGIN (0x10000000)
extern int __bss_end__;
#define HEAP_BEGIN ((void *)&__bss_end__)
#endif
#define HEAP_END RZ_SRAM_END
@@ -37,7 +38,7 @@ extern int Image$$RAM_END$$ZI$$Base;
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define MAX_HANDLERS (512)
#define MAX_HANDLERS BSP_VECTOR_TABLE_MAX_ENTRIES
#define GIC_IRQ_START 0
#define GIC_ACK_INTID_MASK (0x000003FFU)
/* number of interrupts on board */
+6 -7
View File
@@ -12,13 +12,12 @@ if rtconfig.PLATFORM in ['iccarm']:
Return('group')
elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
if GetOption('target') != 'mdk5':
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
src += Glob(cwd + '/fsp/src/bsp/mcu/all/cr/*.c')
src += Glob(cwd + '/fsp/src/bsp/mcu/r*/*.c')
src += Glob(cwd + '/fsp/src/r_*/*.c')
src += Glob(cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/*.c')
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
src += Glob('./fsp/src/bsp/mcu/all/*.c')
src += Glob('./fsp/src/bsp/mcu/all/cr/*.c')
src += Glob('./fsp/src/bsp/mcu/r*/*.c')
src += Glob('./fsp/src/bsp/cmsis/Device/RENESAS/Source/*.c')
src += Glob('./fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/*.c')
src += Glob('./fsp/src/r_*/*.c')
CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core_R/Include',
cwd + '/fsp/inc',
cwd + '/fsp/inc/api',
File diff suppressed because it is too large Load Diff
+73 -23
View File
@@ -1,12 +1,47 @@
/*
Linker File for Renesas RZ/N2L FSP
*/
INCLUDE memory_regions.ld
/* The memory information for each device is done in memory regions file.
* The starting address and length of memory not defined in memory regions file are defined as 0. */
/* generated memory regions file - do not edit */
ATCM_START = 0x00000000;
ATCM_LENGTH = 0x20000;
BTCM_START = 0x00100000;
BTCM_LENGTH = 0x20000;
SYSTEM_RAM_START = 0x10000000;
SYSTEM_RAM_LENGTH = 0x180000;
SYSTEM_RAM_MIRROR_START = 0x30000000;
SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
CS0_SPACE_MIRROR_START = 0x50000000;
CS0_SPACE_MIRROR_LENGTH = 0x4000000;
CS2_SPACE_MIRROR_START = 0x54000000;
CS2_SPACE_MIRROR_LENGTH = 0x4000000;
CS3_SPACE_MIRROR_START = 0x58000000;
CS3_SPACE_MIRROR_LENGTH = 0x4000000;
CS5_SPACE_MIRROR_START = 0x5C000000;
CS5_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI0_CS0_SPACE_START = 0x60000000;
xSPI0_CS0_SPACE_LENGTH = 0x4000000;
xSPI0_CS1_SPACE_START = 0x64000000;
xSPI0_CS1_SPACE_LENGTH = 0x4000000;
xSPI1_CS0_SPACE_START = 0x68000000;
xSPI1_CS0_SPACE_LENGTH = 0x4000000;
CS0_SPACE_START = 0x70000000;
CS0_SPACE_LENGTH = 0x4000000;
CS2_SPACE_START = 0x74000000;
CS2_SPACE_LENGTH = 0x4000000;
CS3_SPACE_START = 0x78000000;
CS3_SPACE_LENGTH = 0x4000000;
CS5_SPACE_START = 0x7C000000;
CS5_SPACE_LENGTH = 0x4000000;
ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
@@ -51,13 +86,13 @@ CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
LOADER_TEXT_ADDRESS = 0x00102000;
INTVEC_ADDRESS = 0x00000000;
TEXT_ADDRESS = 0x00000100;
INTVEC_ADDRESS = 0x10000000;
TEXT_ADDRESS = 0x10020000;
NONCACHE_BUFFER_OFFSET = 0x00020000;
DMAC_LINK_MODE_OFFSET = 0x00044000;
DATA_NONCACHE_OFFSET = 0x00048000;
RAM_START = ATCM_PRV_START;
RAM_LENGTH = ATCM_PRV_LENGTH;
RAM_START = SYSTEM_RAM_PRV_START;
RAM_LENGTH = SYSTEM_RAM_PRV_LENGTH;
LOADER_START = BTCM_PRV_START;
LOADER_LENGTH = BTCM_PRV_LENGTH;
@@ -205,22 +240,37 @@ SECTIONS
*(.dtors)
_dtor_end = .;
/* section information for utest */
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
KEEP(*(FalPartTable))
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
/* new GCC version uses .init_array */
PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
KEEP(*(FalPartTable))
KEEP(*(.eh_frame*))
} > RAM
@@ -310,7 +360,7 @@ SECTIONS
/* Place the STD heap here. */
KEEP(*(.heap))
__HeapLimit = .;
} > ATCM
} > RAM
.thread_stack (NOLOAD):
{
. = ALIGN(8);
File diff suppressed because it is too large Load Diff
@@ -1,38 +0,0 @@
/* generated memory regions file - do not edit */
ATCM_START = 0x00000000;
ATCM_LENGTH = 0x20000;
BTCM_START = 0x00100000;
BTCM_LENGTH = 0x20000;
SYSTEM_RAM_START = 0x10000000;
SYSTEM_RAM_LENGTH = 0x180000;
SYSTEM_RAM_MIRROR_START = 0x30000000;
SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
CS0_SPACE_MIRROR_START = 0x50000000;
CS0_SPACE_MIRROR_LENGTH = 0x4000000;
CS2_SPACE_MIRROR_START = 0x54000000;
CS2_SPACE_MIRROR_LENGTH = 0x4000000;
CS3_SPACE_MIRROR_START = 0x58000000;
CS3_SPACE_MIRROR_LENGTH = 0x4000000;
CS5_SPACE_MIRROR_START = 0x5C000000;
CS5_SPACE_MIRROR_LENGTH = 0x4000000;
xSPI0_CS0_SPACE_START = 0x60000000;
xSPI0_CS0_SPACE_LENGTH = 0x4000000;
xSPI0_CS1_SPACE_START = 0x64000000;
xSPI0_CS1_SPACE_LENGTH = 0x4000000;
xSPI1_CS0_SPACE_START = 0x68000000;
xSPI1_CS0_SPACE_LENGTH = 0x4000000;
CS0_SPACE_START = 0x70000000;
CS0_SPACE_LENGTH = 0x4000000;
CS2_SPACE_START = 0x74000000;
CS2_SPACE_LENGTH = 0x4000000;
CS3_SPACE_START = 0x78000000;
CS3_SPACE_LENGTH = 0x4000000;
CS5_SPACE_START = 0x7C000000;
CS5_SPACE_LENGTH = 0x4000000;
-1
View File
@@ -8,7 +8,6 @@
* 2024-03-01 Wangyuqiang first version
*/
#include "rtconfig.h"
.syntax unified
.text