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Merge pull request #4404 from KyleChenjh/lts-v3.1.x

Browse Source 
[Update] Sync from v4.0.3
This commit is contained in:
Bernard Xiong
2021-03-02 15:00:43 +08:00
committed by GitHub
parent 5f17cf9204 19871ac32e
commit 2c12493ff3
710 changed files with 3471 additions and 9263 deletions
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144
.github/workflows/action.yml vendored Normal file
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@@ -0,0 +1,144 @@
name: RT-Thread
# Controls when the action will run. Triggers the workflow on push or pull request
# events but only for the lts-v3.1.x branch
on:
# Runs at 16:00 UTC (BeiJing 00:00) on the 1st of every month
schedule:
- cron: '0 16 1 * *'
push:
branches:
- lts-v3.1.x
paths-ignore:
- documentation/**
- '**/README.md'
- '**/README_zh.md'
pull_request:
branches:
- lts-v3.1.x
paths-ignore:
- documentation/**
- '**/README.md'
- '**/README_zh.md'
jobs:
build:
runs-on: ubuntu-latest
name: ${{ matrix.legs.RTT_BSP }}
strategy:
fail-fast: false
matrix:
legs:
- {RTT_BSP: "CME_M7", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "apollo2", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "asm9260t", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "allwinner_tina", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "efm32", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "gd32303e-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "gd32450z-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "gkipc", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "imx6sx/cortex-a9", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "imxrt/imxrt1052-atk-commander", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "imxrt/imxrt1052-fire-pro", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "imxrt/imxrt1052-nxp-evk", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lm3s8962", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lm4f232", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc43xx/M4", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc178x", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc408x", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc2148", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc2478", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc5410x", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "lpc54114-lite", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "ls1bdev", RTT_TOOL_CHAIN: "sourcery-mips"}
- {RTT_BSP: "ls1cdev", RTT_TOOL_CHAIN: "sourcery-mips"}
- {RTT_BSP: "mb9bf500r", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "mb9bf506r", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "mb9bf618s", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "mb9bf568r", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "qemu-vexpress-a9", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "qemu-vexpress-gemini", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f072-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f091-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-atk-nano", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-atk-warshipv3", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-dofly-lyc8", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-dofly-M3S", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-fire-arbitrary", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-hw100k-ibox", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-mini-system", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f103-yf-ufun", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f107-uc-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f407-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f411-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f427-robomaster-a", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f429-armfly-v6", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f429-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f429-fire-challenger", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f429-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f446-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f469-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f746-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-fire-challenger", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32f767-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32g071-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32g431-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32h743-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32h743-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l432-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l475-atk-pandora", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l475-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l476-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32/stm32l496-ali-developer", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "stm32f20x", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "zynq7000", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "fh8620", RTT_TOOL_CHAIN: "sourcery-arm"}
steps:
- uses: actions/checkout@v2
- name: Set up Python
uses: actions/setup-python@master
with:
python-version: 3.8
- name: Install Tools
shell: bash
run: |
sudo apt-get update
sudo apt-get -qq install gcc-multilib libsdl-dev scons
echo "RTT_ROOT=${{ github.workspace }}" >> $GITHUB_ENV
echo "RTT_CC=gcc" >> $GITHUB_ENV
- name: Install Arm ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-arm' && success() }}
shell: bash
run: |
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/arm-2017q2-v6/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2
sudo tar xjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 -C /opt
/opt/gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc --version
echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-6-2017-q2-update/bin" >> $GITHUB_ENV
- name: Install Mips ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-mips' && success() }}
shell: bash
run: |
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.1/mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2
sudo tar xjf mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 -C /opt
/opt/mips-2016.05/bin/mips-sde-elf-gcc --version
echo "RTT_EXEC_PATH=/opt/mips-2016.05/bin" >> $GITHUB_ENV
- name: Bsp Scons Compile
if: ${{ success() }}
shell: bash
env:
RTT_BSP: ${{ matrix.legs.RTT_BSP }}
RTT_TOOL_CHAIN: ${{ matrix.legs.RTT_TOOL_CHAIN }}
run: |
scons -C bsp/$RTT_BSP

80
ChangeLog.md
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@@ -1,3 +1,83 @@
# RT-Thread v3.1.5 Change Log
Change log since v3.1.4
## Kernel
* Fix the issue when block = NULL in rt_mp_free;
* Fix the software issue when the system timer thread is pending
* Fix the timer/software timer handling issue if the timeout function starts/stops/deletes this timer.
* Fix an issue with rt_timer_start being broken and destroying the timer list
* Fix bug of rt_memheap_detach
* Fix the bug that the linked list is still mounted when the single timer is not modified
* Fix the delay_until issue
* Add mb mq value overflow-check code
* Fix the rt_event_recv function, if the event met without blocking, assigning thread->event_set/event_info will goes well
* Add the definition of the maximum value of ipc type
* Fix the delay_until issue
* fixed __rt_ffs bug on account of armclang LTO.
* fixed rt_timer_list_next_timeout multi-task safe
* fix the software issue when the system timer thread pending.
* Fix the timer/software timer handling issue if the timeout function starts/stops/deletes this timer.
* The cleanup operation is executed before the current thread exits
* Modify cleanup to resolve the issue of unable to free memory and communication between threads
* Fix double release for thread
* Fix thread control bug about `RT_THREAD_CTRL_CLOSE` command
* Fix the issue of critical protection when `rt_thread_delete` change the status of thread;
* Fix bug in rt_realloc of mem.c, which may cause memory leak
* Use object_find to implement thread_find/device_find
## Components
* Change rt_data_queue_peak to rt_data_queue_peek.
* Add rt_data_queue_deinit and fix bug of dataqueue
* Solve the issue that the do_pollfd function processing the underlying network device returns error -1
* Fix the issue that when the network card device calls to close dhcp, the bottom layer no need to call the dhcp_stop function to close dhcp
* Modify the spelling error of the macro definition, modify the printing error when printing the IMEI number
* Fix the issue that the server closed the connection when web socket requests the data that comes back from the server, and the socket status is incorrectly judged at that point
* Fix the issue of incorrect sal_getaddrinfo release when sal socket supports multiple network cards
* Adjust where the AT socket callback function
* Fix at_client, avoid creating the same client repeatedly and prevent working exceptions and memory leaks.
* Fix the bug that rx_notice out of sync when the data is received after last rt_device_read() is zero
* Change the header file included in some libc files from <rtthread.h> to <rtconfig.h> to narrow the scope of inclusion to prevent recursive compilation
* [jffs2] modify the error check of rt_event_recv()
* [audio] Fix compile warning, undefine var, and fixed re-include of audio
* [serial] Fix the crash caused when the serial port receiving buffer is full and ULOG_USING_ISR_LOG is not turned on
* [spi] Fix "response+1" causing hard fault of unaligned access to SPI memory of STM32 HAL library
* [hwtimer] When getting the timer count, prevent overflow update due to the interruption
* [dirver/i2c] i2c driver supports bus lock, STOP control
* [usb] Fix bug in device descriptor that MAC OS enumeration failed
* Fix the bug that USB cannot recognize composite device normally
* Fix USB host core bugs
* Limit >4 USB ports hubs
* Double free intf
* dname buffer size is too small
* Reset child pointer after detaching instance
## BSP and CPU porting
* Add license info and code cleanup for vexpress-a9 BSP
* Fix spelling mistakes of code
* [allwinner_tina]Fix spi driver bug
* Optimize BSP dist handle process
* fixed a bug that caused system crash by changing the run_mode in low power mode
* drv_flash_f7.c supports single bank mode
* Optimize the pin-index algorithm for stm32
* Fix the clock configuration issue of STM32 hardware timer
* Adjust the interrupt priority configuration of some peripherals of the STM32 series BSP
* Fix stm32 f1 series rtc bug
* Fix PWM timer init about pwm
## Tools
* Fixed python 2.x `cmp`
* Rename GCC_VERSION to GCC_VERSION_STR
* Optimize project group sort by name
* Improve the logic of generating `rtconfig.h` files in scons with command `scons --menuconfig`
* Fixed an issue that *.s src files couldn't be compiled
* Fixed c99/siginfo_t issue caused by gcc_version
# RT-Thread v3.1.4 Change Log
Change log since v3.1.3

1
bsp/allwinner_tina/drivers/drv_gpio.c
View File

@@ -538,6 +538,7 @@ static const struct rt_pin_ops ops =
pin_attach_irq,
pin_detach_irq,
pin_irq_enable,
RT_NULL,
};
#endif

4
bsp/allwinner_tina/drivers/drv_uart.c
View File

@@ -120,8 +120,8 @@ int rt_hw_uart_init(void)
uart->irqno = UART1_INTERRUPT; // IRQ_UART1;
uart->gpio_rx_port = GPIO_PORT_A;
uart->gpio_tx_port = GPIO_PORT_A;
uart->gpio_rx_pin = GPIO_PIN_3;
uart->gpio_tx_pin = GPIO_PIN_2;
uart->gpio_rx_pin = GPIO_PIN_2;
uart->gpio_tx_pin = GPIO_PIN_3;
uart->gpio_rx_fun = IO_FUN_4;
uart->gpio_tx_fun = IO_FUN_4;

2
bsp/allwinner_tina/drivers/spi/drv_spi.c
View File

@@ -483,7 +483,7 @@ static rt_err_t configure(struct rt_spi_device *device,
SPI_SetFirstTransmitBit(spi, SPI_TCTRL_FBS_LSB);
}
switch (configuration->mode)
switch (configuration->mode & RT_SPI_MODE_3)
{
case RT_SPI_MODE_0:
SPI_SetSclkMode(spi, SPI_SCLK_Mode0);

2
bsp/amebaz/libraries/Kconfig
View File

@@ -1,7 +1,7 @@
menu "External Libraries"
config RT_USING_SMARTCONFIG_LIB
bool "Using RT-Thrad SmartConfig Library"
bool "Using RT-Thread SmartConfig Library"
default n
endmenu

1
bsp/apollo2/board/gpio.c
View File

@@ -212,6 +212,7 @@ const static struct rt_pin_ops am_pin_ops =
am_pin_attach_irq,
am_pin_dettach_irq,
am_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)

4
bsp/beaglebone/drivers/gpio.c
View File

@@ -84,6 +84,10 @@ static struct rt_pin_ops am33xx_pin_ops =
am33xx_pin_mode,
am33xx_pin_write,
am33xx_pin_read,
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
};
int rt_hw_gpio_init(void)

2
bsp/efm32/copy_this_file_shell.c
View File

@@ -88,7 +88,7 @@ int isprint(unsigned char ch)
#if defined(RT_USING_DFS) && defined(DFS_USING_WORKDIR)
#include <dfs_posix.h>
const char* finsh_get_prompt()
const char* finsh_get_prompt(void)
{
#define _PROMPT "finsh "
static char finsh_prompt[RT_CONSOLEBUF_SIZE + 1] = {_PROMPT};

1
bsp/efm32/rtconfig.h
View File

@@ -213,6 +213,7 @@
/* SECTION: Runtime library */
// #define RT_USING_NOLIBC
// #define RT_USING_NEWLIB
#define RT_LIBC_USING_TIME
/* SECTION: Console options */
#define RT_USING_CONSOLE

7
bsp/fh8620/drivers/pwm.c
View File

@@ -29,6 +29,7 @@
#include "interrupt.h"
#include "board_info.h"
#include "inc/fh_driverlib.h"
#include <rtthread.h>
#include <rtdevice.h>
#ifdef FH_PWM_DEBUG
#define PRINT_PWM_DBG(fmt, args...) \
@@ -185,12 +186,12 @@ int fh_pwm_probe(void *priv_data)
PWM_Enable(pwm_obj, RT_FALSE);
pwm_dev = rt_malloc(sizeof(struct rt_device));
rt_memset(pwm_dev, 0, sizeof(struct rt_device));
pwm_dev = rt_calloc(1,sizeof(struct rt_device));
if (pwm_dev == RT_NULL)
{
rt_kprintf("ERROR: %s rt_device malloc failed\n", __func__);
rt_kprintf("ERROR: %s rt_device calloc failed\n", __func__);
return -RT_ENOMEM;
}
pwm_dev->user_data = &pwm_drv;

1
bsp/gd32303e-eval/drivers/drv_gpio.c
View File

@@ -497,6 +497,7 @@ const static struct rt_pin_ops _gd32_pin_ops =
gd32_pin_attach_irq,
gd32_pin_detach_irq,
gd32_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)

5
bsp/gd32450z-eval/drivers/drv_enet.c
View File

@@ -652,7 +652,10 @@ int rt_hw_gd32_eth_init(void)
/* init tx buffer free semaphore */
rt_sem_init(&gd32_emac_device0.tx_buf_free, "tx_buf0", EMAC_TXBUFNB, RT_IPC_FLAG_FIFO);
eth_device_init(&(gd32_emac_device0.parent), "e0");
/* change device link status */
eth_device_linkchange(&(gd32_emac_device0.parent), RT_TRUE);
return 0;
}
INIT_DEVICE_EXPORT(rt_hw_gd32_eth_init);

2
bsp/gd32450z-eval/drivers/drv_spi.c
View File

@@ -130,7 +130,7 @@ static rt_err_t configure(struct rt_spi_device* device,
}
} /* baudrate */
switch(configuration->mode)
switch(configuration->mode & RT_SPI_MODE_3)
{
case RT_SPI_MODE_0:
spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE;

2
bsp/gd32450z-eval/rtconfig.h
View File

@@ -39,7 +39,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40002
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/hifive1/drivers/interrupt.c
View File

@@ -93,7 +93,7 @@ void rt_hw_interrupt_init(void)
rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
{
return (rt_uint32_t)PLIC_claim_interrupt(&g_plic);;
return (rt_uint32_t)PLIC_claim_interrupt(&g_plic);
}
void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)

2
bsp/imx6sx/cortex-a9/rtconfig.h
View File

@@ -39,7 +39,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40002
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/audio/src/snd_card.c
View File

@@ -125,7 +125,7 @@ static int32_t snd_card_config(void *priv, audio_dev_para_p para)
return -2;
}
//Set the parameters for codec according para
//if audio controller is mater, the codec should be slave.
//if audio controller is master, the codec should be slave.
if (AUDIO_BUS_MODE_MASTER == para->bus_mode)
para->bus_mode = AUDIO_BUS_MODE_SLAVE;
else if (AUDIO_BUS_MODE_SLAVE == para->bus_mode)

2
bsp/imx6ul/rtconfig.h
View File

@@ -63,7 +63,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x40002
#define RT_VER_NUM 0x30105
#define ARCH_ARM
/* RT_USING_CPU_FFS is not set */
#define ARCH_ARM_CORTEX_A

2
bsp/imxrt/imxrt1052-atk-commander/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/imxrt/imxrt1052-fire-pro/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/imxrt/imxrt1052-nxp-evk/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/imxrt/imxrt1064-nxp-evk/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

6
bsp/imxrt/libraries/drivers/SConscript
View File

@@ -1,8 +1,10 @@
from building import *
cwd = GetCurrentDir()
src = []
cwd = []
CPPDEFINES = []
cwd = GetCurrentDir()
if GetDepend('BSP_USING_GPIO'):
src += ['drv_gpio.c']

6
bsp/imxrt/libraries/drivers/drv_can.h
View File

@@ -8,9 +8,9 @@
* 2019-06-28 misonyo the first version.
*/
#ifndef DRV_SPI_H__
#define DRV_SPI_H__
#ifndef DRV_CAN_H__
#define DRV_CAN_H__
int rt_hw_can_init(void);
#endif /* DRV_SPI_H__ */
#endif /* DRV_CAN_H__ */

6
bsp/imxrt/libraries/drivers/drv_gpio.c
View File

@@ -559,6 +559,9 @@ static rt_err_t imxrt_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt
case PIN_IRQ_MODE_LOW_LEVEL:
int_mode = kGPIO_IntLowLevel;
break;
default:
int_mode = kGPIO_IntRisingEdge;
break;
}
irq_index = (port << 1) + (pin_num >> 4);
GPIO_PinSetInterruptConfig(mask_tab[port].gpio, pin_num, int_mode);
@@ -584,7 +587,8 @@ const static struct rt_pin_ops imxrt_pin_ops =
imxrt_pin_read,
imxrt_pin_attach_irq,
imxrt_pin_detach_irq,
imxrt_pin_irq_enable
imxrt_pin_irq_enable,
RT_NULL,
};
int rt_hw_pin_init(void)

2
bsp/imxrt/libraries/templates/imxrt1050xxx/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/imxrt/libraries/templates/imxrt1064xxx/rtconfig.h
View File

@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

12
bsp/lpc176x/drivers/sd.c
View File

@@ -32,7 +32,7 @@ static uint8_t LPC17xx_SD_SendCmd(uint8_t cmd, uint32_t arg);
static bool LPC17xx_SD_ReadSector(uint32_t sector, uint8_t *buff, uint32_t count);
static bool LPC17xx_SD_ReadDataBlock(uint8_t *buff, uint32_t cnt);
static bool LPC17xx_SD_WriteSector(uint32_t sector, const uint8_t *buff, uint32_t count);
static bool LPC17xx_SD_WirteDataBlock(const uint8_t *buff, uint8_t token);
static bool LPC17xx_SD_WriteDataBlock(const uint8_t *buff, uint8_t token);
static bool LPC17xx_SD_ReadCfg(SDCFG *cfg);
static bool LPC17xx_SD_WaitForReady(void);
@@ -155,7 +155,7 @@ static bool LPC17xx_SD_Init(void)
Send a Command to Flash card and get a Response
cmd: cmd index
arg: argument for the cmd
return the received response of the commond
return the received response of the command
*****************************************************************************/
static uint8_t LPC17xx_SD_SendCmd(uint8_t cmd, uint32_t arg)
{
@@ -279,7 +279,7 @@ static bool LPC17xx_SD_WriteSector(uint32_t sector, const uint8_t *buff, uint32_
if (count == 1) /* Single block write */
{
if ((LPC17xx_SD_SendCmd(WRITE_BLOCK, sector) == 0)
&& LPC17xx_SD_WirteDataBlock(buff, TOKEN_SINGLE_BLOCK))
&& LPC17xx_SD_WriteDataBlock(buff, TOKEN_SINGLE_BLOCK))
count = 0;
}
else /* Multiple block write */
@@ -289,12 +289,12 @@ static bool LPC17xx_SD_WriteSector(uint32_t sector, const uint8_t *buff, uint32_
{
do
{
if (!LPC17xx_SD_WirteDataBlock(buff, TOKEN_MULTI_BLOCK)) break;
if (!LPC17xx_SD_WriteDataBlock(buff, TOKEN_MULTI_BLOCK)) break;
buff += 512;
}
while (--count);
#if 1
if (!LPC17xx_SD_WirteDataBlock(0, TOKEN_STOP_TRAN)) /* STOP_TRAN token */
if (!LPC17xx_SD_WriteDataBlock(0, TOKEN_STOP_TRAN)) /* STOP_TRAN token */
count = 1;
#else
LPC17xx_SPI_SendByte(TOKEN_STOP_TRAN);
@@ -312,7 +312,7 @@ static bool LPC17xx_SD_WriteSector(uint32_t sector, const uint8_t *buff, uint32_
0xFC -> multi block
0xFD -> Stop
*****************************************************************************/
static bool LPC17xx_SD_WirteDataBlock(const uint8_t *buff, uint8_t token)
static bool LPC17xx_SD_WriteDataBlock(const uint8_t *buff, uint8_t token)
{
uint8_t resp, i;

4
bsp/lpc408x/rtconfig.h
View File

@@ -40,8 +40,9 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x30105
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
@@ -109,6 +110,7 @@
/* POSIX layer and C standard library */
#define RT_LIBC_USING_TIME
/* Network */

5
bsp/lpc43xx/M0/applications/vbus_hw.h
View File

@@ -7,6 +7,9 @@
* 2015-01-07 Grissiom init commit
*/
#ifndef __VBUS_HW_H__
#define __VBUS_HW_H__
#include <rtthread.h>
#include <board.h>
@@ -32,3 +35,5 @@ rt_inline void rt_vbus_smp_mb(void)
{
__DSB();
}
#endif /* __VBUS_HW_H__ */

5
bsp/lpc43xx/M4/applications/vbus_hw.h
View File

@@ -7,6 +7,9 @@
* 2015-01-07 Grissiom init commit
*/
#ifndef __VBUS_HW_H__
#define __VBUS_HW_H__
#include <rtthread.h>
#include <board.h>
@@ -32,3 +35,5 @@ rt_inline void rt_vbus_smp_mb(void)
{
__DSB();
}
#endif /* __VBUS_HW_H__ */

2
bsp/lpc54114-lite/rtconfig.h
View File

@@ -39,7 +39,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40000
#define RT_VER_NUM 0x30105
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4

2
bsp/lpc54608-LPCXpresso/rtconfig.h
View File

@@ -43,7 +43,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40002
#define RT_VER_NUM 0x30105
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M

2
bsp/nrf52832/rtconfig.h
View File

@@ -41,7 +41,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/nuvoton_m05x/rtconfig.h
View File

@@ -38,7 +38,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

2
bsp/nuvoton_m487/rtconfig.h
View File

@@ -37,7 +37,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

4
bsp/qemu-vexpress-a9/applications/SConscript
View File

@@ -1,10 +1,8 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd, str(Dir('#'))]
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)

10
bsp/qemu-vexpress-a9/applications/lcd_init.c
View File

@@ -1,3 +1,13 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020/12/31 Bernard Add license info
*/
#include <rtthread.h>
#if defined(RT_USING_RTGUI) || defined(PKG_USING_GUIENGINE)

10
bsp/qemu-vexpress-a9/applications/main.c
View File

@@ -1,3 +1,13 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020/12/31 Bernard Add license info
*/
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>

10
bsp/qemu-vexpress-a9/applications/mnt.c
View File

@@ -1,3 +1,13 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020/12/31 Bernard Add license info
*/
#include <rtthread.h>
#ifdef RT_USING_DFS

18
bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c
View File

@@ -1,21 +1,7 @@
/*
* File : drv_ac97.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes

18
bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h
View File

@@ -1,21 +1,7 @@
/*
* File : drv_ac97.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes

96
bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c
View File

@@ -1,21 +1,7 @@
/*
* File : drv_pl041.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -36,7 +22,7 @@
#include <rtdbg.h>
#define FRAME_PERIOD_US (50)
#define PL041_CHANNLE_NUM (4)
#define PL041_CHANNEL_NUM (4)
#define PL041_READ(_a) (*(volatile rt_uint32_t *)(_a))
#define PL041_WRITE(_a, _v) (*(volatile rt_uint32_t *)(_a) = (_v))
@@ -47,7 +33,7 @@ struct pl041_irq_def
void *user_data;
};
static struct pl041_irq_def irq_tbl[PL041_CHANNLE_NUM];
static struct pl041_irq_def irq_tbl[PL041_CHANNEL_NUM];
static void aaci_pl041_delay(rt_uint32_t us)
{
@@ -169,13 +155,13 @@ rt_uint16_t aaci_ac97_read(rt_uint16_t reg)
return v;
}
int aaci_pl041_channle_disable(int channle)
int aaci_pl041_channel_disable(int channel)
{
rt_uint32_t v;
void *p_rx, *p_tx;
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channle * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channle * 0x14);
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channel * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channel * 0x14);
v = PL041_READ(p_rx);
v &= ~AACI_CR_EN;
PL041_WRITE(p_rx, v);
@@ -185,13 +171,13 @@ int aaci_pl041_channle_disable(int channle)
return 0;
}
int aaci_pl041_channle_enable(int channle)
int aaci_pl041_channel_enable(int channel)
{
rt_uint32_t v;
void *p_rx, *p_tx;
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channle * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channle * 0x14);
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channel * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channel * 0x14);
v = PL041_READ(p_rx);
v |= AACI_CR_EN;
PL041_WRITE(p_rx, v);
@@ -201,13 +187,13 @@ int aaci_pl041_channle_enable(int channle)
return 0;
}
int aaci_pl041_channle_read(int channle, rt_uint16_t *buff, int count)
int aaci_pl041_channel_read(int channel, rt_uint16_t *buff, int count)
{
void *p_data, *p_status;
int i = 0;
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channle * 0x14);
p_data = (void *)((rt_uint32_t)(&(PL041->dr1[0])) + channle * 0x20);
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channel * 0x14);
p_data = (void *)((rt_uint32_t)(&(PL041->dr1[0])) + channel * 0x20);
for (i = 0; (!(PL041_READ(p_status) & AACI_SR_RXFE)) && (i < count); i++)
{
buff[i] = (rt_uint16_t)PL041_READ(p_data);
@@ -215,13 +201,13 @@ int aaci_pl041_channle_read(int channle, rt_uint16_t *buff, int count)
return i;
}
int aaci_pl041_channle_write(int channle, rt_uint16_t *buff, int count)
int aaci_pl041_channel_write(int channel, rt_uint16_t *buff, int count)
{
void *p_data, *p_status;
int i = 0;
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channle * 0x14);
p_data = (void *)((rt_uint32_t)(&(PL041->dr1[0])) + channle * 0x20);
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channel * 0x14);
p_data = (void *)((rt_uint32_t)(&(PL041->dr1[0])) + channel * 0x20);
for (i = 0; (!(PL041_READ(p_status) & AACI_SR_TXFF)) && (i < count); i++)
{
PL041_WRITE(p_data, buff[i]);
@@ -229,13 +215,13 @@ int aaci_pl041_channle_write(int channle, rt_uint16_t *buff, int count)
return i;
}
int aaci_pl041_channle_cfg(int channle, pl041_cfg_t cgf)
int aaci_pl041_channel_cfg(int channel, pl041_cfg_t cgf)
{
rt_uint32_t v;
void *p_rx, *p_tx;
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channle * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channle * 0x14);
p_rx = (void *)((rt_uint32_t)(&PL041->rxcr1) + channel * 0x14);
p_tx = (void *)((rt_uint32_t)(&PL041->txcr1) + channel * 0x14);
v = AACI_CR_FEN | AACI_CR_SZ16 | cgf->itype;
PL041_WRITE(p_rx, v);
v = AACI_CR_FEN | AACI_CR_SZ16 | cgf->otype;
@@ -247,86 +233,86 @@ int aaci_pl041_channle_cfg(int channle, pl041_cfg_t cgf)
return 0;
}
void aaci_pl041_irq_enable(int channle, rt_uint32_t vector)
void aaci_pl041_irq_enable(int channel, rt_uint32_t vector)
{
rt_uint32_t v;
void *p_irq;
vector &= vector & 0x7f;
p_irq = (void *)((rt_uint32_t)(&PL041->iie1) + channle * 0x14);
p_irq = (void *)((rt_uint32_t)(&PL041->iie1) + channel * 0x14);
v = PL041_READ(p_irq);
v |= vector;
PL041_WRITE(p_irq, v);
}
void aaci_pl041_irq_disable(int channle, rt_uint32_t vector)
void aaci_pl041_irq_disable(int channel, rt_uint32_t vector)
{
rt_uint32_t v;
void *p_irq;
vector &= vector & 0x7f;
p_irq = (void *)((rt_uint32_t)(&PL041->iie1) + channle * 0x14);
p_irq = (void *)((rt_uint32_t)(&PL041->iie1) + channel * 0x14);
v = PL041_READ(p_irq);
v &= ~vector;
PL041_WRITE(p_irq, v);
}
rt_err_t aaci_pl041_irq_register(int channle, pl041_irq_fun_t fun, void *user_data)
rt_err_t aaci_pl041_irq_register(int channel, pl041_irq_fun_t fun, void *user_data)
{
if (channle < 0 || channle >= PL041_CHANNLE_NUM)
if (channel < 0 || channel >= PL041_CHANNEL_NUM)
{
LOG_E("%s channle:%d err.", __FUNCTION__, channle);
LOG_E("%s channel:%d err.", __FUNCTION__, channel);
return -RT_ERROR;
}
irq_tbl[channle].fun = fun;
irq_tbl[channle].user_data = user_data;
irq_tbl[channel].fun = fun;
irq_tbl[channel].user_data = user_data;
return RT_EOK;
}
rt_err_t aaci_pl041_irq_unregister(int channle)
rt_err_t aaci_pl041_irq_unregister(int channel)
{
if (channle < 0 || channle >= PL041_CHANNLE_NUM)
if (channel < 0 || channel >= PL041_CHANNEL_NUM)
{
LOG_E("%s channle:%d err.", __FUNCTION__, channle);
LOG_E("%s channel:%d err.", __FUNCTION__, channel);
return -RT_ERROR;
}
irq_tbl[channle].fun = RT_NULL;
irq_tbl[channle].user_data = RT_NULL;
irq_tbl[channel].fun = RT_NULL;
irq_tbl[channel].user_data = RT_NULL;
return RT_EOK;
}
static void aaci_pl041_irq_handle(int irqno, void *param)
{
rt_uint32_t mask, channle, m;
rt_uint32_t mask, channel, m;
struct pl041_irq_def *_irq = param;
void *p_status;
mask = PL041_READ(&PL041->allints);
PL041_WRITE(&PL041->intclr, mask);
for (channle = 0; (channle < PL041_CHANNLE_NUM) && (mask); channle++)
for (channel = 0; (channel < PL041_CHANNEL_NUM) && (mask); channel++)
{
mask = mask >> 7;
m = mask & 0x7f;
if (m & AACI_ISR_ORINTR)
{
LOG_W("RX overrun on chan %d", channle);
LOG_W("RX overrun on chan %d", channel);
}
if (m & AACI_ISR_RXTOINTR)
{
LOG_W("RX timeout on chan %d", channle);
LOG_W("RX timeout on chan %d", channel);
}
if (mask & AACI_ISR_URINTR)
{
LOG_W("TX underrun on chan %d", channle);
LOG_W("TX underrun on chan %d", channel);
}
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channle * 0x14);
if (_irq[channle].fun != RT_NULL)
p_status = (void *)((rt_uint32_t)(&PL041->sr1) + channel * 0x14);
if (_irq[channel].fun != RT_NULL)
{
_irq[channle].fun(PL041_READ(p_status), _irq[channle].user_data);
_irq[channel].fun(PL041_READ(p_status), _irq[channel].user_data);
}
}
}

44
bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h
View File

@@ -1,21 +1,7 @@
/*
* File : drv_pl041.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -158,10 +144,10 @@
#define MAINFR_TXB (1 << 1) /* transmit busy */
#define MAINFR_RXB (1 << 0) /* receive busy */
#define PL041_CHANNLE_LEFT_DAC (0x1 << 3)
#define PL041_CHANNLE_RIGHT_DAC (0x1 << 3)
#define PL041_CHANNLE_LEFT_ADC (0x1 << 3)
#define PL041_CHANNLE_RIGHT_ADC (0x1 << 3)
#define PL041_CHANNEL_LEFT_DAC (0x1 << 3)
#define PL041_CHANNEL_RIGHT_DAC (0x1 << 3)
#define PL041_CHANNEL_LEFT_ADC (0x1 << 3)
#define PL041_CHANNEL_RIGHT_ADC (0x1 << 3)
struct reg_pl041
{
@@ -225,13 +211,13 @@ typedef void (*pl041_irq_fun_t)(rt_uint32_t status, void * user_data);
rt_err_t aaci_pl041_init(void);
void aaci_ac97_write(rt_uint16_t reg, rt_uint16_t val);
rt_uint16_t aaci_ac97_read(rt_uint16_t reg);
int aaci_pl041_channle_cfg(int channle, pl041_cfg_t cfg);
int aaci_pl041_channle_write(int channle, rt_uint16_t *buff, int count);
int aaci_pl041_channle_read(int channle, rt_uint16_t *buff, int count);
int aaci_pl041_channle_enable(int channle);
int aaci_pl041_channle_disable(int channle);
rt_err_t aaci_pl041_irq_register(int channle, pl041_irq_fun_t fun, void *user_data);
rt_err_t aaci_pl041_irq_unregister(int channle);
void aaci_pl041_irq_disable(int channle, rt_uint32_t vector);
void aaci_pl041_irq_enable(int channle, rt_uint32_t vector);
int aaci_pl041_channel_cfg(int channel, pl041_cfg_t cfg);
int aaci_pl041_channel_write(int channel, rt_uint16_t *buff, int count);
int aaci_pl041_channel_read(int channel, rt_uint16_t *buff, int count);
int aaci_pl041_channel_enable(int channel);
int aaci_pl041_channel_disable(int channel);
rt_err_t aaci_pl041_irq_register(int channel, pl041_irq_fun_t fun, void *user_data);
rt_err_t aaci_pl041_irq_unregister(int channel);
void aaci_pl041_irq_disable(int channel, rt_uint32_t vector);
void aaci_pl041_irq_enable(int channel, rt_uint32_t vector);
#endif

12
bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c
View File

@@ -227,13 +227,13 @@ static rt_err_t sound_init(struct rt_audio_device *audio)
aaci_pl041_init();
_cfg.itype = PL041_CHANNLE_LEFT_ADC | PL041_CHANNLE_RIGHT_ADC;
_cfg.otype = PL041_CHANNLE_LEFT_DAC | PL041_CHANNLE_RIGHT_DAC;
_cfg.itype = PL041_CHANNEL_LEFT_ADC | PL041_CHANNEL_RIGHT_ADC;
_cfg.otype = PL041_CHANNEL_LEFT_DAC | PL041_CHANNEL_RIGHT_DAC;
_cfg.vol = snd_dev->volume;
_cfg.rate = snd_dev->replay_config.samplerate;
ac97_reset();
aaci_pl041_channle_cfg(0, &_cfg);
aaci_pl041_channel_cfg(0, &_cfg);
aaci_pl041_irq_register(0, rt_hw_aaci_isr, RT_NULL);
return result;
@@ -246,7 +246,7 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
if (stream == AUDIO_STREAM_REPLAY)
{
LOG_D("open sound device");
aaci_pl041_channle_enable(0);
aaci_pl041_channel_enable(0);
aaci_pl041_irq_enable(0, AACI_IE_UR | AACI_IE_TX | AACI_IE_TXC);
}
@@ -263,7 +263,7 @@ static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
rt_thread_mdelay(100);
/* disable irq and channels 0 */
aaci_pl041_irq_disable(0, AACI_IE_UR | AACI_IE_TX | AACI_IE_TXC);
aaci_pl041_channle_disable(0);
aaci_pl041_channel_disable(0);
LOG_D("close sound device");
}
@@ -295,7 +295,7 @@ static rt_size_t sound_transmit(struct rt_audio_device *audio, const void *write
RT_ASSERT(audio != RT_NULL);
/* write data to channel_0 fifo */
aaci_pl041_channle_write(0, (rt_uint16_t *)writeBuf, size >> 1);
aaci_pl041_channel_write(0, (rt_uint16_t *)writeBuf, size >> 1);
return size;
}

2
bsp/qemu-vexpress-a9/rtconfig.h
View File

@@ -47,7 +47,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
#define ARCH_ARM
#define ARCH_ARM_CORTEX_A
#define ARCH_ARM_CORTEX_A9

2
bsp/simulator/SConstruct
View File

@@ -95,7 +95,7 @@ if GetDepend('RT_USING_MODULE'):
dest='def',
action='store_true',
default=False,
help='create rthread.def of rtthread.dll on windows')
help='create rtthread.def of rtthread.dll on windows')
if GetOption('def'):
if rtconfig.PLATFORM == 'mingw':
env['LINKFLAGS'] = rtconfig.DEFFILE_LFLAGS

2
bsp/simulator/rtconfig.h
View File

@@ -39,7 +39,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "console"
#define RT_VER_NUM 0x30104
#define RT_VER_NUM 0x30105
/* RT-Thread Components */

8
bsp/stm32/libraries/HAL_Drivers/SConscript
View File

@@ -55,6 +55,9 @@ if GetDepend('BSP_USING_LCD_MIPI'):
if GetDepend('BSP_USING_ONCHIP_RTC'):
src += ['drv_rtc.c']
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32G0']):
src += ['drv_flash/drv_flash_g0.c']
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32F0']):
src += ['drv_flash/drv_flash_f0.c']
@@ -73,6 +76,8 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32F7']):
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32L4']):
src += ['drv_flash/drv_flash_l4.c']
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32H7']):
src += ['drv_flash/drv_flash_h7.c']
if GetDepend('RT_USING_HWCRYPTO'):
src += ['drv_crypto.c']
@@ -88,6 +93,9 @@ if GetDepend(['BSP_USING_USBD']):
if GetDepend(['BSP_USING_PULSE_ENCODER']):
src += ['drv_pulse_encoder.c']
if GetDepend(['BSP_USING_USBH']):
src += ['drv_usbh.c']
src += ['drv_common.c']
path = [cwd]

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