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[rtc] use gmtime_r to replace gmtime (#6012)

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* [rtc] use gmtime_r to replace gmtime
This commit is contained in:
Man, Jianting (Meco)
2022-06-22 01:41:06 -04:00
committed by GitHub
parent 4f1f8566f4
commit 2c10d5ad01
56 changed files with 2873 additions and 2907 deletions
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bsp/acm32/acm32f0x0-nucleo/drivers/drv_rtc.c
+10 -10
View File
@@ -49,21 +49,21 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
{
RTC_TimeTypeDef RTC_TimeStruct = {0};
RTC_DateTypeDef RTC_DateStruct = {0};
struct tm *p_tm;
struct tm now;
p_tm = gmtime(&time_stamp);
if (p_tm->tm_year < 100)
gmtime_r(&time_stamp, &now);
if (now.tm_year < 100)
{
return -RT_ERROR;
}
RTC_TimeStruct.u8_Seconds = dec2hex(p_tm->tm_sec);
RTC_TimeStruct.u8_Minutes = dec2hex(p_tm->tm_min);
RTC_TimeStruct.u8_Hours = dec2hex(p_tm->tm_hour);
RTC_DateStruct.u8_Date = dec2hex(p_tm->tm_mday);
RTC_DateStruct.u8_Month = dec2hex(p_tm->tm_mon + 1);
RTC_DateStruct.u8_Year = dec2hex(p_tm->tm_year - 100);
RTC_DateStruct.u8_WeekDay = dec2hex(p_tm->tm_wday) + 1;
RTC_TimeStruct.u8_Seconds = dec2hex(now.tm_sec);
RTC_TimeStruct.u8_Minutes = dec2hex(now.tm_min);
RTC_TimeStruct.u8_Hours = dec2hex(now.tm_hour);
RTC_DateStruct.u8_Date = dec2hex(now.tm_mday);
RTC_DateStruct.u8_Month = dec2hex(now.tm_mon + 1);
RTC_DateStruct.u8_Year = dec2hex(now.tm_year - 100);
RTC_DateStruct.u8_WeekDay = dec2hex(now.tm_wday) + 1;
HAL_RTC_SetTime(&RTC_TimeStruct);
HAL_RTC_SetDate(&RTC_DateStruct);
bsp/apollo2/board/rtc.c
+9 -9
View File
@@ -38,7 +38,7 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
{
time_t *time;
struct tm time_temp;
struct tm* time_new;
struct tm time_new;
am_hal_rtc_time_t hal_time;
RT_ASSERT(dev != RT_NULL);
@@ -71,16 +71,16 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
case RT_DEVICE_CTRL_RTC_SET_TIME:
time = (time_t *)args;
time_new = gmtime(time);
gmtime_r(time, &time_new);
hal_time.ui32Hour = time_new->tm_hour;
hal_time.ui32Minute = time_new->tm_min;
hal_time.ui32Second = time_new->tm_sec;
hal_time.ui32Hour = time_new.tm_hour;
hal_time.ui32Minute = time_new.tm_min;
hal_time.ui32Second = time_new.tm_sec;
hal_time.ui32Hundredths = 00;
hal_time.ui32Weekday = time_new->tm_wday;
hal_time.ui32DayOfMonth = time_new->tm_mday;
hal_time.ui32Month = time_new->tm_mon + 1;
hal_time.ui32Year = time_new->tm_year + 1900 - 2000;
hal_time.ui32Weekday = time_new.tm_wday;
hal_time.ui32DayOfMonth = time_new.tm_mday;
hal_time.ui32Month = time_new.tm_mon + 1;
hal_time.ui32Year = time_new.tm_year + 1900 - 2000;
hal_time.ui32Century = 0;
am_hal_rtc_time_set(&hal_time);
bsp/at32/libraries/rt_drivers/drv_rtc.c
+5 -5
View File
@@ -49,22 +49,22 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
{
#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
defined (SOC_SERIES_AT32F415)
struct tm *p_tm;
struct tm now;
p_tm = gmtime(&time_stamp);
if (p_tm->tm_year < 100)
gmtime_r(&time_stamp, &now);
if (now.tm_year < 100)
{
return -RT_ERROR;
}
/* set time */
if(ertc_time_set(p_tm->tm_hour, p_tm->tm_min, p_tm->tm_sec, ERTC_AM) != SUCCESS)
if(ertc_time_set(now.tm_hour, now.tm_min, now.tm_sec, ERTC_AM) != SUCCESS)
{
return -RT_ERROR;
}
/* set date */
if(ertc_date_set(p_tm->tm_year - 100, p_tm->tm_mon + 1, p_tm->tm_mday, p_tm->tm_wday + 1) != SUCCESS)
if(ertc_date_set(now.tm_year - 100, now.tm_mon + 1, now.tm_mday, now.tm_wday + 1) != SUCCESS)
{
return -RT_ERROR;
}
bsp/essemi/es32f0654/drivers/drv_rtc.c
+1 -11
View File
@@ -55,9 +55,7 @@ static void __rtc_init(rtc_init_t *init)
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
struct tm time_temp;
struct tm *pNow;
rtc_date_t date;
rtc_time_t time;
@@ -76,15 +74,7 @@ static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
rt_enter_critical();
/* converts calendar time time into local time. */
pNow = gmtime((const time_t *)args);
/* copy the statically located variable */
memcpy(&time_temp, pNow, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
gmtime_r((const time_t *)args, &time_temp);
time.hour = time_temp.tm_hour;
time.minute = time_temp.tm_min;
time.second = time_temp.tm_sec;
bsp/essemi/es32f369x/drivers/drv_rtc.c
+1 -11
View File
@@ -54,9 +54,7 @@ static void __rtc_init(rtc_init_t *init)
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
struct tm time_temp;
struct tm *pNow;
rtc_date_t date;
rtc_time_t time;
@@ -75,15 +73,7 @@ static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
rt_enter_critical();
/* converts calendar time time into local time. */
pNow = gmtime((const time_t *)args);
/* copy the statically located variable */
memcpy(&time_temp, pNow, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
gmtime_r((const time_t *)args, &time_temp);
time.hour = time_temp.tm_hour;
time.minute = time_temp.tm_min;
time.second = time_temp.tm_sec;
bsp/imxrt/libraries/drivers/drv_rtc.c
+8 -8
View File
@@ -45,18 +45,18 @@ static time_t get_timestamp(void)
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
struct tm now;
snvs_hp_rtc_datetime_t rtcDate = {0};
p_tm = gmtime(&timestamp);
gmtime_r(&timestamp, &now);
rtcDate.second = p_tm->tm_sec ;
rtcDate.minute = p_tm->tm_min ;
rtcDate.hour = p_tm->tm_hour;
rtcDate.second = now.tm_sec ;
rtcDate.minute = now.tm_min ;
rtcDate.hour = now.tm_hour;
rtcDate.day = p_tm->tm_mday;
rtcDate.month = p_tm->tm_mon + 1;
rtcDate.year = p_tm->tm_year + 1900;
rtcDate.day = now.tm_mday;
rtcDate.month = now.tm_mon + 1;
rtcDate.year = now.tm_year + 1900;
if (SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate) != kStatus_Success)
{
bsp/loongson/ls1bdev/drivers/drv_uart.c
+14 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -181,19 +181,19 @@ void rt_hw_uart_init(void)
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART5
uart = &uart5;
serial5.ops = &ls1b_uart_ops;
serial5.config = config;
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial5, "UART5");
/* register UART5 device */
rt_hw_serial_register(&serial5,
"uart5",
//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
uart = &uart5;
serial5.ops = &ls1b_uart_ops;
serial5.config = config;
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial5, "UART5");
/* register UART5 device */
rt_hw_serial_register(&serial5,
"uart5",
//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART5 */
bsp/loongson/ls1cdev/drivers/display_controller.c
+17 -17
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,7 +7,7 @@
* Date Author Notes
* 2011-08-09 lgnq first version for LS1B DC
* 2015-07-06 chinesebear modified for loongson 1c
* 2018-01-06 sundm75 modified for smartloong
* 2018-01-06 sundm75 modified for smartloong
*/
#include <rtthread.h>
@@ -78,13 +78,13 @@ int caclulate_freq(rt_uint32_t XIN, rt_uint32_t PCLK)
pix_div = (pix_div>>24)&0xff;
rt_kprintf("old pll_clk=%d, pix_div=%d\n", pll_clk, pix_div);
divider_int = pll_clk/(1000000) *PCLK/1000;
divider_int = pll_clk/(1000000) *PCLK/1000;
if(divider_int%1000>=500)
divider_int = divider_int/1000+1;
else
divider_int = divider_int/1000;
rt_kprintf("divider_int = %d\n", divider_int);
/* check whether divisor is too small. */
if (divider_int < 1) {
rt_kprintf("Warning: clock source is too slow.Try smaller resolution\n");
@@ -102,9 +102,9 @@ int caclulate_freq(rt_uint32_t XIN, rt_uint32_t PCLK)
regval &= ~0x80000030; //PIX_DIV_VALID PIX_SEL 置0
regval &= ~(0x3f<<24); //PIX_DIV 清零
regval |= divider_int << 24;
PLL_DIV_PARAM = regval;
PLL_DIV_PARAM = regval;
regval |= 0x80000030; //PIX_DIV_VALID PIX_SEL 置1
PLL_DIV_PARAM = regval;
PLL_DIV_PARAM = regval;
}
rt_kprintf("new PLL_FREQ=0x%x, PLL_DIV_PARAM=0x%x\n", PLL_FREQ, PLL_DIV_PARAM);
rt_thread_delay(10);
@@ -115,11 +115,11 @@ static rt_err_t rt_dc_init(rt_device_t dev)
{
int i, out, mode=-1;
int val;
rt_kprintf("PWM initied\n");
/* Set the back light PWM. */
pwminit();
for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)
{
if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)
@@ -140,7 +140,7 @@ static rt_err_t rt_dc_init(rt_device_t dev)
DC_FB_CONFIG = 0x0;
DC_FB_CONFIG = 0x3; // // framebuffer configuration RGB565
DC_DITHER_CONFIG = 0x0; //颜色抖动配置寄存器
DC_DITHER_TABLE_LOW = 0x0; //颜色抖动查找表低位寄存器
DC_DITHER_TABLE_LOW = 0x0; //颜色抖动查找表低位寄存器
DC_DITHER_TABLE_HIGH = 0x0; //颜色抖动查找表高位寄存器
DC_PANEL_CONFIG = 0x80001311; //液晶面板配置寄存器
DC_PANEL_TIMING = 0x0;
@@ -165,10 +165,10 @@ static rt_err_t rt_dc_init(rt_device_t dev)
#elif defined(CONFIG_VIDEO_12BPP)
DC_FB_CONFIG = 0x00100101;
DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
#else
#else
DC_FB_CONFIG = 0x00100104;
DC_FB_BUFFER_STRIDE = (FB_XSIZE*4+255)&(~255);
#endif
#endif
return RT_EOK;
}
@@ -200,7 +200,7 @@ static rt_err_t rt_dc_control(rt_device_t dev, int cmd, void *args)
break;
case RTGRAPHIC_CTRL_POWEROFF:
break;
case RTGRAPHIC_CTRL_GET_INFO:
case RTGRAPHIC_CTRL_GET_INFO:
rt_memcpy(args, &_dc_info, sizeof(_dc_info));
break;
case RTGRAPHIC_CTRL_SET_MODE:
@@ -213,7 +213,7 @@ static rt_err_t rt_dc_control(rt_device_t dev, int cmd, void *args)
void rt_hw_dc_init(void)
{
rt_device_t dc = rt_malloc(sizeof(struct rt_device));
if (dc == RT_NULL)
if (dc == RT_NULL)
{
rt_kprintf("dc == RT_NULL\n");
return; /* no memory yet */
@@ -232,10 +232,10 @@ void rt_hw_dc_init(void)
dc->close = RT_NULL;
dc->control = rt_dc_control;
dc->user_data = (void*)&_dc_info;
/* register Display Controller device to RT-Thread */
rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);
rt_device_init(dc);
}
@@ -250,7 +250,7 @@ int rtgui_lcd_init(void)
pin_set_purpose(76, PIN_PURPOSE_OTHER);
pin_set_remap(76, PIN_REMAP_DEFAULT);
/* init Display Controller */
rt_hw_dc_init();
@@ -259,7 +259,7 @@ int rtgui_lcd_init(void)
/* set Display Controller device as rtgui graphic driver */
rtgui_graphic_set_device(dc);
return 0;
}
bsp/loongson/ls1cdev/drivers/display_controller.h
+23 -23
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,9 +7,9 @@
* Date Author Notes
* 2011-08-08 lgnq first version for LS1B
* 2015-07-06 chinesebear modified for loongson 1c
* 2018-01-06 sundm75 modified for smartloong
* 2018-01-06 sundm75 modified for smartloong
*/
#ifndef __DISPLAY_CONTROLLER_H__
#define __DISPLAY_CONTROLLER_H__
@@ -19,31 +19,31 @@
#define DC_BASE 0xBC301240 //Display Controller
/* Frame Buffer registers */
#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
#define DC_VSYNC __REG32(DC_BASE + 0x260)
#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
#define DC_VSYNC __REG32(DC_BASE + 0x260)
#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
/* Display Controller driver for 1024x768 16bit */
#define FB_XSIZE 480
#define FB_YSIZE 272
#define FB_XSIZE 480
#define FB_YSIZE 272
#define CONFIG_VIDEO_16BPP
#define OSC 24000000 /* Hz */
#define OSC 24000000 /* Hz */
#define K1BASE 0xA0000000
#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
#define HW_FB_ADDR KSEG1(_rt_framebuffer)
#define K1BASE 0xA0000000
#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
#define HW_FB_ADDR KSEG1(_rt_framebuffer)
struct vga_struct
{
bsp/loongson/ls1cdev/drivers/drv_can.c
+44 -44
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -40,7 +40,7 @@ static rt_err_t bxmodifyfilter(struct ls1c_bxcan *pbxcan, struct rt_can_filter_i
rt_int32_t hdr, fbase, foff;
CAN_TypeDef* CANx;
CANx = pbxcan->reg;
/*pitem->mode 1-掩码模式; 0- 滤波器模式 SJA1000中使用以下方式*/
/*SJA1000中AFM 1-单滤波器模式; 0- 双滤波器模式 */
@@ -72,7 +72,7 @@ static rt_err_t bxmodifyfilter(struct ls1c_bxcan *pbxcan, struct rt_can_filter_i
}
CAN_FilterInitTypeDef CAN_FilterInitStruct;
unsigned char ide, rtr, id , idmask, mode;
unsigned char ide, rtr, id , idmask, mode;
ide = (unsigned char) pitem->ide;
rtr = (unsigned char) pitem->rtr;
id = pitem->id;
@@ -84,7 +84,7 @@ static rt_err_t bxmodifyfilter(struct ls1c_bxcan *pbxcan, struct rt_can_filter_i
CAN_FilterInitStruct.IDMASK = idmask;
CAN_FilterInitStruct.MODE = mode;
CAN_FilterInit(CANx, &CAN_FilterInitStruct);
return RT_EOK;
}
@@ -109,15 +109,15 @@ static rt_err_t setfilter(struct ls1c_bxcan *pbxcan, struct rt_can_filter_config
static void bxcan0_filter_init(struct rt_can_device *can)
{
struct ls1c_bxcan *pbxcan;
pbxcan = (struct ls1c_bxcan *) can->parent.user_data;
pbxcan = (struct ls1c_bxcan *) can->parent.user_data;
}
static void bxcan1_filter_init(struct rt_can_device *can)
{
struct ls1c_bxcan *pbxcan;
pbxcan = (struct ls1c_bxcan *) can->parent.user_data;
pbxcan = (struct ls1c_bxcan *) can->parent.user_data;
}
static void bxcan_init(CAN_TypeDef *pcan, rt_uint32_t baud, rt_uint32_t mode)
@@ -161,7 +161,7 @@ static void bxcan_init(CAN_TypeDef *pcan, rt_uint32_t baud, rt_uint32_t mode)
break;
case RT_CAN_MODE_LOOPBACK:
CAN_InitStructure.CAN_Mode = CAN_Mode_STM;
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
CAN_InitStructure.CAN_Mode = CAN_Mode_STM|CAN_Mode_LOM;
@@ -171,37 +171,37 @@ static void bxcan_init(CAN_TypeDef *pcan, rt_uint32_t baud, rt_uint32_t mode)
switch (bps)
{
case LS1C_CAN1MBaud:
case LS1C_CAN1MBaud:
CAN_InitStructure.CAN_Prescaler = 9;
CAN_InitStructure.CAN_BS1 = CAN_BS1_4tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN800kBaud:
case LS1C_CAN800kBaud:
CAN_InitStructure.CAN_Prescaler = 8;
CAN_InitStructure.CAN_BS1 = CAN_BS1_7tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN500kBaud:
case LS1C_CAN500kBaud:
CAN_InitStructure.CAN_Prescaler = 9;
CAN_InitStructure.CAN_BS1 = CAN_BS1_11tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN250kBaud:
case LS1C_CAN250kBaud:
CAN_InitStructure.CAN_Prescaler = 36;
CAN_InitStructure.CAN_BS1 = CAN_BS1_4tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN125kBaud:
case LS1C_CAN125kBaud:
CAN_InitStructure.CAN_Prescaler = 36;
CAN_InitStructure.CAN_BS1 = CAN_BS1_11tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN100kBaud:
case LS1C_CAN100kBaud:
CAN_InitStructure.CAN_Prescaler = 63;
CAN_InitStructure.CAN_BS1 = CAN_BS1_7tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_2tq;
break;
case LS1C_CAN50kBaud:
case LS1C_CAN50kBaud:
CAN_InitStructure.CAN_Prescaler = 63;
CAN_InitStructure.CAN_BS1 = CAN_BS1_16tq;
CAN_InitStructure.CAN_BS2 = CAN_BS2_3tq;
@@ -244,14 +244,14 @@ static rt_err_t configure(struct rt_can_device *can, struct can_configure *cfg)
if (pbxcan == CAN0)
{
#ifdef USING_BXCAN0
bxcan0_hw_init();
bxcan0_hw_init();
bxcan_init(pbxcan, cfg->baud_rate, cfg->mode);
#endif
}
else if (pbxcan == CAN1)
{
#ifdef USING_BXCAN1
bxcan1_hw_init();
bxcan1_hw_init();
bxcan_init(pbxcan, cfg->baud_rate, cfg->mode);
#endif
}
@@ -328,7 +328,7 @@ static rt_err_t control(struct rt_can_device *can, int cmd, void *arg)
}
break;
case RT_CAN_CMD_GET_STATUS:
{
{
rt_uint32_t errtype;
errtype = pbxcan->reg->RXERR;
@@ -380,7 +380,7 @@ static int recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
pbxcan = ((struct ls1c_bxcan *) can->parent.user_data)->reg;
pmsg->ide = (rt_uint32_t) RxMessage.IDE;
pmsg->ide = (rt_uint32_t) RxMessage.IDE;
if(RxMessage.IDE == 1)
pmsg->id = RxMessage.ExtId;
else
@@ -405,37 +405,37 @@ static const struct rt_can_ops canops =
#ifdef USING_BXCAN0
struct rt_can_device bxcan0;
void ls1c_can0_irqhandler(int irq, void *param)
{
void ls1c_can0_irqhandler(int irq, void *param)
{
CAN_TypeDef* CANx;
unsigned char status;
CANx = CAN0;
/*读寄存器清除中断*/
status = CANx->IR;
/*接收中断*/
if (( status & CAN_IR_RI) == CAN_IR_RI)
if (( status & CAN_IR_RI) == CAN_IR_RI)
{
/*清除RI 中断*/
CAN_Receive(CANx, &RxMessage);
CANx->CMR |= CAN_CMR_RRB;
CANx->CMR |= CAN_CMR_CDO;
CANx->CMR |= CAN_CMR_RRB;
CANx->CMR |= CAN_CMR_CDO;
rt_hw_can_isr(&bxcan0, RT_CAN_EVENT_RX_IND);
rt_kprintf("\r\nCan0 int RX happened!\r\n");
}
/*发送中断*/
else if (( status & CAN_IR_TI) == CAN_IR_TI)
else if (( status & CAN_IR_TI) == CAN_IR_TI)
{
rt_hw_can_isr(&bxcan0, RT_CAN_EVENT_TX_DONE | 0 << 8);
rt_kprintf("\r\nCan0 int TX happened!\r\n");
}
/*数据溢出中断*/
else if (( status & CAN_IR_DOI) == CAN_IR_DOI)
else if (( status & CAN_IR_DOI) == CAN_IR_DOI)
{
rt_hw_can_isr(&bxcan0, RT_CAN_EVENT_RXOF_IND);
rt_kprintf("\r\nCan0 int RX OF happened!\r\n");
}
}
}
static struct ls1c_bxcan bxcan0data =
{
.reg = CAN0,
@@ -445,37 +445,37 @@ static struct ls1c_bxcan bxcan0data =
#ifdef USING_BXCAN1
struct rt_can_device bxcan1;
void ls1c_can1_irqhandler(int irq, void *param)
{
void ls1c_can1_irqhandler(int irq, void *param)
{
CAN_TypeDef* CANx;
unsigned char status;
CANx = CAN1;
/*读寄存器清除中断*/
status = CANx->IR;
/*接收中断*/
if (( status & CAN_IR_RI) == CAN_IR_RI)
if (( status & CAN_IR_RI) == CAN_IR_RI)
{
/*清除RI 中断*/
CAN_Receive(CANx, &RxMessage);
CANx->CMR |= CAN_CMR_RRB;
CANx->CMR |= CAN_CMR_CDO;
CANx->CMR |= CAN_CMR_RRB;
CANx->CMR |= CAN_CMR_CDO;
rt_hw_can_isr(&bxcan1, RT_CAN_EVENT_RX_IND);
rt_kprintf("\r\nCan1 int RX happened!\r\n");
}
/*发送中断*/
else if (( status & CAN_IR_TI) == CAN_IR_TI)
else if (( status & CAN_IR_TI) == CAN_IR_TI)
{
rt_hw_can_isr(&bxcan1, RT_CAN_EVENT_TX_DONE | 0 << 8);
rt_kprintf("\r\nCan1 int TX happened!\r\n");
}
/*数据溢出中断*/
else if (( status & CAN_IR_DOI) == CAN_IR_DOI)
else if (( status & CAN_IR_DOI) == CAN_IR_DOI)
{
rt_hw_can_isr(&bxcan1, RT_CAN_EVENT_RXOF_IND);
rt_kprintf("\r\nCan1 int RX OF happened!\r\n");
}
}
}
static struct ls1c_bxcan bxcan1data =
{
.reg = CAN1,
@@ -499,9 +499,9 @@ int ls1c_bxcan_init(void)
#endif
rt_hw_can_register(&bxcan0, "bxcan0", &canops, &bxcan0data);
rt_kprintf("\r\ncan0 register! \r\n");
rt_hw_interrupt_install(LS1C_CAN0_IRQ,( rt_isr_handler_t)bxcan0data.irq , RT_NULL, "can0");
rt_hw_interrupt_umask(LS1C_CAN0_IRQ);
rt_hw_interrupt_install(LS1C_CAN0_IRQ,( rt_isr_handler_t)bxcan0data.irq , RT_NULL, "can0");
rt_hw_interrupt_umask(LS1C_CAN0_IRQ);
#endif
#ifdef USING_BXCAN1
bxcan1.config.baud_rate = CAN250kBaud;
@@ -515,9 +515,9 @@ int ls1c_bxcan_init(void)
#endif
rt_hw_can_register(&bxcan1, "bxcan1", &canops, &bxcan1data);
rt_kprintf("\r\ncan1 register! \r\n");
rt_hw_interrupt_install(LS1C_CAN1_IRQ,( rt_isr_handler_t)bxcan1data.irq , RT_NULL, "can1");
rt_hw_interrupt_umask(LS1C_CAN1_IRQ);
rt_hw_interrupt_install(LS1C_CAN1_IRQ,( rt_isr_handler_t)bxcan1data.irq , RT_NULL, "can1");
rt_hw_interrupt_umask(LS1C_CAN1_IRQ);
#endif
return RT_EOK;
}
bsp/loongson/ls1cdev/drivers/drv_gpio.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -90,7 +90,7 @@ rt_err_t ls1c_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
break;
}
gpio_set_irq_type(gpio, type);
rt_sprintf(irq_name, "PIN_%d", gpio);
rt_hw_interrupt_install(LS1C_GPIO_TO_IRQ(gpio), (rt_isr_handler_t)hdr, args, irq_name);
bsp/loongson/ls1cdev/drivers/drv_pwm.c
+11 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -59,17 +59,17 @@ static rt_err_t get(struct rt_device_pwm *device, struct rt_pwm_configuration *c
{
rt_err_t result = RT_EOK;
struct rt_ls1c_pwm *ls1c_pwm_device = (struct rt_ls1c_pwm *)device;
if (configuration->channel > (PWM_CHANNEL_MAX - 1))
{
result = -RT_EIO;
goto _exit;
}
configuration->period = ls1c_pwm_device->period[configuration->channel];
configuration->pulse = ls1c_pwm_device->pulse[configuration->channel];
rt_kprintf("drv_pwm.c get channel %d: period: %d, pulse: %d\n", configuration->channel, configuration->period, configuration->pulse);
_exit:
return result;
}
@@ -84,7 +84,7 @@ static rt_err_t control(struct rt_device_pwm *device, int cmd, void *arg)
if (cmd == PWM_CMD_ENABLE)
{
rt_kprintf("PWM_CMD_ENABLE\n");
pwm_info_t pwm_info;
switch ( configuration->channel)
{
@@ -107,9 +107,9 @@ static rt_err_t control(struct rt_device_pwm *device, int cmd, void *arg)
default:
break;
}
pwm_info.mode = PWM_MODE_NORMAL;
pwm_info.duty = ( (float)configuration->pulse ) / ((float)configuration->period );
pwm_info.period_ns = configuration->period;
pwm_info.mode = PWM_MODE_NORMAL;
pwm_info.duty = ( (float)configuration->pulse ) / ((float)configuration->period );
pwm_info.period_ns = configuration->period;
pwm_init(&pwm_info);
pwm_enable(&pwm_info);
}
@@ -138,9 +138,9 @@ static rt_err_t control(struct rt_device_pwm *device, int cmd, void *arg)
default:
break;
}
pwm_info.mode = PWM_MODE_NORMAL;
pwm_info.duty = ( (float)configuration->pulse ) / ((float)configuration->period );
pwm_info.period_ns = configuration->period;
pwm_info.mode = PWM_MODE_NORMAL;
pwm_info.duty = ( (float)configuration->pulse ) / ((float)configuration->period );
pwm_info.period_ns = configuration->period;
pwm_init(&pwm_info);
pwm_disable(&pwm_info);
}
bsp/loongson/ls1cdev/drivers/drv_rtc.c
+33 -33
View File
@@ -1,10 +1,10 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2018-05-05 sundm75 first version
*/
@@ -21,56 +21,56 @@
#if defined(RT_USING_RTC)
#ifdef RT_RTC_DEBUG
#define rtc_debug(format,args...) rt_kprintf(format, ##args)
#define rtc_debug(format,args...) rt_kprintf(format, ##args)
#else
#define rtc_debug(format,args...)
#endif
static struct rt_device rtc;
RTC_TypeDef * RTC_Handler;
RTC_TypeDef * RTC_Handler;
static time_t get_timestamp(void)
static time_t get_timestamp(void)
{
struct tm tm_new = {0};
RTC_TimeTypeDef rtcDate;
RTC_GetTime(RTC_Handler, &rtcDate);
tm_new.tm_sec = rtcDate.Seconds;
tm_new.tm_min = rtcDate.Minutes;
struct tm tm_new = {0};
RTC_TimeTypeDef rtcDate;
RTC_GetTime(RTC_Handler, &rtcDate);
tm_new.tm_sec = rtcDate.Seconds;
tm_new.tm_min = rtcDate.Minutes;
tm_new.tm_hour = rtcDate.Hours;
tm_new.tm_mday = rtcDate.Date;
tm_new.tm_mon = rtcDate.Month- 1;
tm_new.tm_year = rtcDate.Year + 2000 - 1900;
tm_new.tm_mday = rtcDate.Date;
tm_new.tm_mon = rtcDate.Month- 1;
tm_new.tm_year = rtcDate.Year + 2000 - 1900;
return timegm(&tm_new);
}
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
RTC_TimeTypeDef rtcDate;
p_tm = gmtime(&timestamp);
rtcDate.Seconds= p_tm->tm_sec ;
rtcDate.Minutes= p_tm->tm_min ;
rtcDate.Hours= p_tm->tm_hour;
struct tm now;
RTC_TimeTypeDef rtcDate;
rtcDate.Date= p_tm->tm_mday;
rtcDate.Month= p_tm->tm_mon + 1;
rtcDate.Year= p_tm->tm_year + 1900 - 2000;
RTC_SetTime(RTC_Handler, &rtcDate);
gmtime_r(&timestamp, &now);
rtcDate.Seconds= now.tm_sec ;
rtcDate.Minutes= now.tm_min ;
rtcDate.Hours= now.tm_hour;
rtcDate.Date= now.tm_mday;
rtcDate.Month= now.tm_mon + 1;
rtcDate.Year= now.tm_year + 1900 - 2000;
RTC_SetTime(RTC_Handler, &rtcDate);
rt_kprintf("\r\nrtcDate is %d.%d.%d - %d:%d:%d",rtcDate.Year, rtcDate.Month, rtcDate.Date, rtcDate.Hours, rtcDate.Minutes, rtcDate.Seconds);
return RT_EOK;
}
rt_uint8_t RTC_Init(void)
{
RTC_Handler = RTC;
{
RTC_Handler = RTC;
return 0;
}
@@ -90,7 +90,7 @@ static rt_size_t rt_rtc_read(
void* buffer,
rt_size_t size)
{
return 0;
}
@@ -109,7 +109,7 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
switch (cmd)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
*(rt_uint32_t *)args = get_timestamp();
rtc_debug("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
break;
bsp/loongson/ls1cdev/drivers/drv_rtc.h
+5 -5
View File
@@ -1,18 +1,18 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2018-05-05 sundm75 first version
*/
#ifndef __DRV_RTC_H__
#define __DRV_RTC_H__
#include <rtthread.h>
#include <rtdevice.h>
#include <rtthread.h>
#include <rtdevice.h>
int rt_hw_rtc_init(void);
bsp/loongson/ls1cdev/drivers/drv_spi.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -32,7 +32,7 @@ struct ls1c_spi_cs
* 初始化并注册龙芯1c的spi总线
* @SPI SPI总线，比如LS1C_SPI_0， LS1C_SPI_1
* @spi_bus_name 总线名字
* @ret
* @ret
*/
rt_err_t ls1c_spi_bus_register(rt_uint8_t SPI, const char *spi_bus_name);
bsp/loongson/ls1cdev/drivers/drv_touch.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -9,7 +9,7 @@
* 2018-10-29 XY
* 2019-04-11 sundm75 modify for ls1c300 & RTGUI
*/
#include "drv_touch.h"
#define TOUCH_I2C_NAME "i2c1"
bsp/loongson/ls1cdev/drivers/drv_touch.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -8,7 +8,7 @@
* 2018-02-08 Zhangyihong the first version
* 2018-10-29 XY
*/
#ifndef __DRV_TOUCH_H__
#define __DRV_TOUCH_H__
bsp/loongson/ls1cdev/drivers/drv_wdt.c
+6 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -161,15 +161,15 @@ static rt_err_t watchdog_ctrl(rt_watchdog_t *wdt, int cmd, void *arg)
return RT_EOK;
}
struct rt_watchdog_ops watchdog_ops =
struct rt_watchdog_ops watchdog_ops =
{
.init = &watchdog_init,
.init = &watchdog_init,
.control = &watchdog_ctrl,
};
int wdt_exit(void *priv_data)
{
return 0;
int wdt_exit(void *priv_data)
{
return 0;
}
int rt_hw_wdt_init(void)
bsp/loongson/ls1cdev/drivers/hw_i2c.c
+16 -16
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -10,7 +10,7 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "ls1c_i2c.h"
#include "ls1c_i2c.h"
#include "../libraries/ls1c_pin.h"
#ifdef RT_USING_I2C
@@ -26,30 +26,30 @@ rt_size_t rt_i2c_master_xfer(struct rt_i2c_bus_device *bus,
rt_uint32_t num)
{
struct ls1c_i2c_bus * i2c_bus = (struct ls1c_i2c_bus *)bus;
ls1c_i2c_info_t i2c_info;
ls1c_i2c_info_t i2c_info;
struct rt_i2c_msg *msg;
int i;
rt_int32_t ret = RT_EOK;
i2c_info.clock = 50000; // 50kb/s
i2c_info.clock = 50000; // 50kb/s
i2c_info.I2Cx = i2c_bus->u32Module;
i2c_init(&i2c_info);
for (i = 0; i < num; i++)
{
msg = &msgs[i];
if (msg->flags == RT_I2C_RD)
{
i2c_send_start_and_addr(&i2c_info, msg->addr, LS1C_I2C_DIRECTION_READ);
i2c_receive_ack(&i2c_info);
i2c_receive_data(&i2c_info, (rt_uint8_t *)msg->buf, msg->len);
i2c_send_stop(&i2c_info);
i2c_send_start_and_addr(&i2c_info, msg->addr, LS1C_I2C_DIRECTION_READ);
i2c_receive_ack(&i2c_info);
i2c_receive_data(&i2c_info, (rt_uint8_t *)msg->buf, msg->len);
i2c_send_stop(&i2c_info);
}
else if(msg->flags == RT_I2C_WR)
{
i2c_send_start_and_addr(&i2c_info, msg->addr, LS1C_I2C_DIRECTION_WRITE);
i2c_receive_ack(&i2c_info);
i2c_send_data(&i2c_info, (rt_uint8_t *)msg->buf, msg->len);
i2c_send_stop(&i2c_info);
i2c_send_start_and_addr(&i2c_info, msg->addr, LS1C_I2C_DIRECTION_WRITE);
i2c_receive_ack(&i2c_info);
i2c_send_data(&i2c_info, (rt_uint8_t *)msg->buf, msg->len);
i2c_send_stop(&i2c_info);
}
ret++;
}
@@ -85,7 +85,7 @@ static const struct rt_i2c_bus_device_ops ls1c_i2c_ops =
#ifdef RT_USING_I2C0
static struct ls1c_i2c_bus ls1c_i2c_bus_0 =
static struct ls1c_i2c_bus ls1c_i2c_bus_0 =
{
{1},
LS1C_I2C_0,
@@ -93,7 +93,7 @@ static struct ls1c_i2c_bus ls1c_i2c_bus_0 =
#endif
#ifdef RT_USING_I2C1
static struct ls1c_i2c_bus ls1c_i2c_bus_1 =
static struct ls1c_i2c_bus ls1c_i2c_bus_1 =
{
{1},
LS1C_I2C_1,
@@ -101,7 +101,7 @@ static struct ls1c_i2c_bus ls1c_i2c_bus_1 =
#endif
#ifdef RT_USING_I2C2
static struct ls1c_i2c_bus ls1c_i2c_bus_2 =
static struct ls1c_i2c_bus ls1c_i2c_bus_2 =
{
{1},
LS1C_I2C_2,
bsp/loongson/ls1cdev/drivers/hw_i2c.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,4 +15,4 @@
int rt_i2c_init(void);
#endif
#endif
bsp/loongson/ls1cdev/drivers/net/mii.c
+93 -93
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,123 +14,123 @@
static inline unsigned int mii_nway_result (unsigned int negotiated)
{
unsigned int ret;
unsigned int ret;
if (negotiated & LPA_100FULL)
ret = LPA_100FULL;
else if (negotiated & LPA_100BASE4)
ret = LPA_100BASE4;
else if (negotiated & LPA_100HALF)
ret = LPA_100HALF;
else if (negotiated & LPA_10FULL)
ret = LPA_10FULL;
else
ret = LPA_10HALF;
if (negotiated & LPA_100FULL)
ret = LPA_100FULL;
else if (negotiated & LPA_100BASE4)
ret = LPA_100BASE4;
else if (negotiated & LPA_100HALF)
ret = LPA_100HALF;
else if (negotiated & LPA_10FULL)
ret = LPA_10FULL;
else
ret = LPA_10HALF;
return ret;
return ret;
}
static int mii_check_gmii_support(struct mii_if_info *mii)
{
int reg;
int reg;
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (reg & BMSR_ESTATEN) {
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_ESTATUS);
if (reg & (ESTATUS_1000_TFULL | ESTATUS_1000_THALF))
return 1;
}
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (reg & BMSR_ESTATEN) {
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_ESTATUS);
if (reg & (ESTATUS_1000_TFULL | ESTATUS_1000_THALF))
return 1;
}
return 0;
return 0;
}
static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
{
struct synopGMACNetworkAdapter * dev = mii->dev;
u32 advert, bmcr, lpa, nego;
u32 advert2 = 0, bmcr2 = 0, lpa2 = 0;
struct synopGMACNetworkAdapter * dev = mii->dev;
u32 advert, bmcr, lpa, nego;
u32 advert2 = 0, bmcr2 = 0, lpa2 = 0;
ecmd->supported =
(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
if (mii->supports_gmii)
ecmd->supported |= SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full;
ecmd->supported =
(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
if (mii->supports_gmii)
ecmd->supported |= SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full;
/* only supports twisted-pair */
ecmd->port = PORT_MII;
/* only supports twisted-pair */
ecmd->port = PORT_MII;
/* only supports internal transceiver */
ecmd->transceiver = XCVR_INTERNAL;
/* only supports internal transceiver */
ecmd->transceiver = XCVR_INTERNAL;
/* this isn't fully supported at higher layers */
ecmd->phy_address = mii->phy_id;
/* this isn't fully supported at higher layers */
ecmd->phy_address = mii->phy_id;
ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
if (mii->supports_gmii)
advert2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
if (mii->supports_gmii)
advert2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
if (advert & ADVERTISE_10HALF)
ecmd->advertising |= ADVERTISED_10baseT_Half;
if (advert & ADVERTISE_10FULL)
ecmd->advertising |= ADVERTISED_10baseT_Full;
if (advert & ADVERTISE_100HALF)
ecmd->advertising |= ADVERTISED_100baseT_Half;
if (advert & ADVERTISE_100FULL)
ecmd->advertising |= ADVERTISED_100baseT_Full;
if (advert2 & ADVERTISE_1000HALF)
ecmd->advertising |= ADVERTISED_1000baseT_Half;
if (advert2 & ADVERTISE_1000FULL)
ecmd->advertising |= ADVERTISED_1000baseT_Full;
if (advert & ADVERTISE_10HALF)
ecmd->advertising |= ADVERTISED_10baseT_Half;
if (advert & ADVERTISE_10FULL)
ecmd->advertising |= ADVERTISED_10baseT_Full;
if (advert & ADVERTISE_100HALF)
ecmd->advertising |= ADVERTISED_100baseT_Half;
if (advert & ADVERTISE_100FULL)
ecmd->advertising |= ADVERTISED_100baseT_Full;
if (advert2 & ADVERTISE_1000HALF)
ecmd->advertising |= ADVERTISED_1000baseT_Half;
if (advert2 & ADVERTISE_1000FULL)
ecmd->advertising |= ADVERTISED_1000baseT_Full;
bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA);
if (mii->supports_gmii) {
bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
}
if (bmcr & BMCR_ANENABLE) {
ecmd->advertising |= ADVERTISED_Autoneg;
ecmd->autoneg = AUTONEG_ENABLE;
nego = mii_nway_result(advert & lpa);
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
ecmd->speed = SPEED_1000;
else if (nego == LPA_100FULL || nego == LPA_100HALF)
ecmd->speed = SPEED_100;
else
ecmd->speed = SPEED_10;
if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
nego == LPA_10FULL) {
ecmd->duplex = DUPLEX_FULL;
mii->full_duplex = 1;
} else {
ecmd->duplex = DUPLEX_HALF;
mii->full_duplex = 0;
}
} else {
ecmd->autoneg = AUTONEG_DISABLE;
bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA);
if (mii->supports_gmii) {
bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
}
if (bmcr & BMCR_ANENABLE) {
ecmd->advertising |= ADVERTISED_Autoneg;
ecmd->autoneg = AUTONEG_ENABLE;
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
nego = mii_nway_result(advert & lpa);
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
ecmd->speed = SPEED_1000;
else if (nego == LPA_100FULL || nego == LPA_100HALF)
ecmd->speed = SPEED_100;
else
ecmd->speed = SPEED_10;
if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
nego == LPA_10FULL) {
ecmd->duplex = DUPLEX_FULL;
mii->full_duplex = 1;
} else {
ecmd->duplex = DUPLEX_HALF;
mii->full_duplex = 0;
}
} else {
ecmd->autoneg = AUTONEG_DISABLE;
/* ignore maxtxpkt, maxrxpkt for now */
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
return 0;
/* ignore maxtxpkt, maxrxpkt for now */
return 0;
}
static int mii_link_ok (struct mii_if_info *mii)
{
/* first, a dummy read, needed to latch some MII phys */
mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR) & BMSR_LSTATUS)
return 1;
return 0;
/* first, a dummy read, needed to latch some MII phys */
mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR) & BMSR_LSTATUS)
return 1;
return 0;
}
bsp/loongson/ls1cdev/drivers/net/mii.h
+75 -75
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -24,7 +24,7 @@
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
@@ -39,7 +39,7 @@
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
@@ -58,9 +58,9 @@
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
@@ -87,26 +87,26 @@
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Indicates what features are advertised by the interface. */
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
@@ -126,8 +126,8 @@
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
@@ -137,8 +137,8 @@
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
@@ -154,78 +154,78 @@
#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
/* Which connector port. */
#define PORT_TP 0x00
#define PORT_AUI 0x01
#define PORT_MII 0x02
#define PORT_MII 0x02
#define PORT_FIBRE 0x03
#define PORT_BNC 0x04
/* Which transceiver to use. */
#define XCVR_INTERNAL 0x00
#define XCVR_EXTERNAL 0x01
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY3 0x04
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
struct ethtool_cmd {
u32 cmd;
u32 supported; /* Features this interface supports */
u32 advertising; /* Features this interface advertises */
u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
u8 duplex; /* Duplex, half or full */
u8 port; /* Which connector port */
u8 phy_address;
u8 transceiver; /* Which transceiver to use */
u8 autoneg; /* Enable or disable autonegotiation */
u32 maxtxpkt; /* Tx pkts before generating tx int */
u32 maxrxpkt; /* Rx pkts before generating rx int */
u32 reserved[4];
u32 cmd;
u32 supported; /* Features this interface supports */
u32 advertising; /* Features this interface advertises */
u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
u8 duplex; /* Duplex, half or full */
u8 port; /* Which connector port */
u8 phy_address;
u8 transceiver; /* Which transceiver to use */
u8 autoneg; /* Enable or disable autonegotiation */
u32 maxtxpkt; /* Tx pkts before generating tx int */
u32 maxrxpkt; /* Rx pkts before generating rx int */
u32 reserved[4];
};
struct mii_if_info {
int phy_id;
int advertising;
int phy_id_mask;
int reg_num_mask;
int phy_id;
int advertising;
int phy_id_mask;
int reg_num_mask;
unsigned int full_duplex : 1; /* is full duplex? */
unsigned int force_media : 1; /* is autoneg. disabled? */
unsigned int supports_gmii : 1; /* are GMII registers supported? */
unsigned int full_duplex : 1; /* is full duplex? */
unsigned int force_media : 1; /* is autoneg. disabled? */
unsigned int supports_gmii : 1; /* are GMII registers supported? */
struct synopGMACNetworkAdapter *dev;
int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location);
void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val);
struct synopGMACNetworkAdapter *dev;
int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location);
void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val);
};
#endif
bsp/loongson/ls1cdev/drivers/net/synopGMAC.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -579,7 +579,7 @@ struct pbuf *rt_eth_rx(rt_device_t device)
if (synopGMAC_is_rx_desc_valid(status) || SYNOP_PHY_LOOPBACK)
{
dma_addr1 = plat_dma_map_single(gmacdev, (void *)data1, RX_BUF_SIZE);
len = synopGMAC_get_rx_desc_frame_length(status)-4; //Not interested in Ethernet CRC bytes
len = synopGMAC_get_rx_desc_frame_length(status)-4; //Not interested in Ethernet CRC bytes
pbuf = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
rt_memcpy(pbuf->payload, (char *)data1, len);
bsp/loongson/ls1cdev/drivers/net/synopGMAC.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -20,4 +20,4 @@
int rt_hw_eth_init(void);
#endif /*__SYNOPGMAC__H*/
#endif /*__SYNOPGMAC__H*/
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Dev.c
+1220 -1220
View File
File diff suppressed because it is too large Load Diff
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Dev.h
+635 -635
View File
File diff suppressed because it is too large Load Diff
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Host.h
+28 -28
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -21,35 +21,35 @@
struct net_device_stats
{
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_bytes; /* total bytes received */
unsigned long tx_bytes; /* total bytes transmitted */
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_bytes; /* total bytes received */
unsigned long tx_bytes; /* total bytes transmitted */
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buff overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buff overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
};
bsp/loongson/ls1cdev/drivers/net/synopGMAC_debug.h
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,8 +14,8 @@
//#define GMAC_DEBUG
#include <rtthread.h>
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#else
#define DEBUG_MES(...)
#endif
bsp/loongson/ls1cdev/drivers/net/synopGMAC_network_interface.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -8,7 +8,7 @@
* 2017-08-24 chinesebear first version
*/
#ifndef SYNOP_GMAC_NETWORK_INTERFACE_H
#define SYNOP_GMAC_NETWORK_INTERFACE_H 1
bsp/loongson/ls1cdev/drivers/net/synopGMAC_plat.c
+47 -47
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -8,7 +8,7 @@
* 2017-08-24 chinesebear first version
*/
#include "synopGMAC_plat.h"
#include "synopGMAC_Dev.h"
#include <rthw.h>
@@ -16,58 +16,58 @@
extern void flush_cache(unsigned long start_addr, unsigned long size);
dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va,u32 size)
{
return VA_TO_PA (va);
//return UNCACHED_TO_PHYS(va);
return VA_TO_PA (va);
//return UNCACHED_TO_PHYS(va);
}
/**
* This is a wrapper function for Memory allocation routine. In linux Kernel
* This is a wrapper function for Memory allocation routine. In linux Kernel
* it it kmalloc function
* @param[in] bytes in bytes to allocate
*/
void *plat_alloc_memory(u32 bytes)
void *plat_alloc_memory(u32 bytes)
{
//return (void*)malloc((size_t)bytes, M_DEVBUF, M_DONTWAIT);
void *buf = (void*)rt_malloc((u32)bytes);
void *buf = (void*)rt_malloc((u32)bytes);
flush_cache((unsigned long)buf, bytes);
return buf;
flush_cache((unsigned long)buf, bytes);
return buf;
}
/**
* This is a wrapper function for consistent dma-able Memory allocation routine.
* This is a wrapper function for consistent dma-able Memory allocation routine.
* In linux Kernel, it depends on pci dev structure
* @param[in] bytes in bytes to allocate
*/
//void *plat_alloc_consistent_dmaable_memory(struct synopGMACdevice *dev, u32 size, u32 *addr)
void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr)
//void *plat_alloc_consistent_dmaable_memory(struct synopGMACdevice *dev, u32 size, u32 *addr)
void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr)
{
void *buf;
buf = (void*)rt_malloc((u32)(size+16));
//CPU_IOFlushDCache( buf,size, SYNC_W);
unsigned long i = (unsigned long)buf;
// rt_kprintf("size = %d\n", size);
// rt_kprintf("bufaddr = %p\n", buf);
// rt_kprintf("i%%16 == %d\n", i%16);
if(i%16 == 8){
i += 8;
}
else if(i%16 == 4){
i += 12;
}
else if(i%16 == 12){
i += 4;
}
void *buf;
buf = (void*)rt_malloc((u32)(size+16));
//CPU_IOFlushDCache( buf,size, SYNC_W);
unsigned long i = (unsigned long)buf;
// rt_kprintf("size = %d\n", size);
// rt_kprintf("bufaddr = %p\n", buf);
// rt_kprintf("i%%16 == %d\n", i%16);
if(i%16 == 8){
i += 8;
}
else if(i%16 == 4){
i += 12;
}
else if(i%16 == 12){
i += 4;
}
flush_cache(i, size);
*addr =gmac_dmamap(i, size);
buf = (unsigned char *)CACHED_TO_UNCACHED(i);
// rt_kprintf("bufaddr = %p\n", buf);
return buf;
flush_cache(i, size);
*addr =gmac_dmamap(i, size);
buf = (unsigned char *)CACHED_TO_UNCACHED(i);
// rt_kprintf("bufaddr = %p\n", buf);
return buf;
}
@@ -78,46 +78,46 @@ void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u3
*/
//void plat_free_consistent_dmaable_memory(void * addr)
void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void * addr,u32 dma_addr)
//void plat_free_consistent_dmaable_memory(void * addr)
void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void * addr,u32 dma_addr)
{
rt_free((void*)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
rt_free((void*)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
return;
}
/**
* This is a wrapper function for Memory free routine. In linux Kernel
* This is a wrapper function for Memory free routine. In linux Kernel
* it it kfree function
* @param[in] buffer pointer to be freed
*/
void plat_free_memory(void *buffer)
void plat_free_memory(void *buffer)
{
rt_free(buffer);
return ;
rt_free(buffer);
return ;
}
dma_addr_t plat_dma_map_single(void *hwdev, void *ptr,
u32 size)
u32 size)
{
unsigned long addr = (unsigned long) ptr;
unsigned long addr = (unsigned long) ptr;
//CPU_IOFlushDCache(addr,size, direction);
flush_cache(addr, size);
flush_cache(addr, size);
return gmac_dmamap(addr, size);
}
/**
* This is a wrapper function for platform dependent delay
* Take care while passing the argument to this function
* This is a wrapper function for platform dependent delay
* Take care while passing the argument to this function
* @param[in] buffer pointer to be freed
*/
void plat_delay(u32 delay)
{
while (delay--);
return;
while (delay--);
return;
}
bsp/loongson/ls1cdev/drivers/net/synopGMAC_plat.h
+49 -49
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -8,12 +8,12 @@
* 2017-08-24 chinesebear first version
*/
#ifndef SYNOP_GMAC_PLAT_H
#define SYNOP_GMAC_PLAT_H 1
/* sw
/* sw
#include <linux/kernel.h>
#include <asm/io.h>
#include <linux/gfp.h>
@@ -26,7 +26,7 @@
//#include "GMAC_Pmon.h"
//#include "synopGMAC_Host.h"
#include <rtthread.h>
//sw: copy the type define into here
//sw: copy the type define into here
#define IOCTL_READ_REGISTER SIOCDEVPRIVATE+1
#define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
#define IOCTL_READ_IPSTRUCT SIOCDEVPRIVATE+3
@@ -58,18 +58,18 @@ typedef int bool;
#define VA_TO_PA(x) UNCACHED_TO_PHYS(x)
/* sw
#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
/* sw
#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#ifdef DEBUG
#undef TR
# define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#else
# define TR(fmt, args...) // not debugging: nothing
# define TR(fmt, args...) // not debugging: nothing
#endif
*/
/*
#define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
*/
/*
@@ -77,21 +77,21 @@ typedef int bool;
#undef TR
# define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#else
//# define TR(fmt, args...) // not debugging: nothing
#define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
//# define TR(fmt, args...) // not debugging: nothing
#define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#endif
*/
//sw: nothing to display
#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
//#define TR rt_kprintf
//typedef int bool;
enum synopGMAC_boolean
{
{
false = 0,
true = 1
true = 1
};
@@ -102,9 +102,9 @@ enum synopGMAC_boolean
*
*/
#define LE32_TO_CPU __le32_to_cpu
#define BE32_TO_CPU __be32_to_cpu
#define CPU_TO_LE32 __cpu_to_le32
#define LE32_TO_CPU __le32_to_cpu
#define BE32_TO_CPU __be32_to_cpu
#define CPU_TO_LE32 __cpu_to_le32
/* Error Codes */
#define ESYNOPGMACNOERR 0
@@ -114,15 +114,15 @@ enum synopGMAC_boolean
struct Network_interface_data
{
u32 unit;
u32 addr;
u32 data;
u32 unit;
u32 addr;
u32 data;
};
/**
* These are the wrapper function prototypes for OS/platform related routines
*/
*/
void * plat_alloc_memory(u32 );
void plat_free_memory(void *);
@@ -135,10 +135,10 @@ void plat_delay(u32);
/**
* The Low level function to read register contents from Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* \return Returns the register contents
* \return Returns the register contents
*/
static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset)
{
@@ -158,43 +158,43 @@ static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset)
/**
* The Low level function to write to a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Data to be written
* \return void
* @param[in] Data to be written
* \return void
*/
static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData )
{
u32 addr;
addr = RegBase + (u32)RegOffset;
addr = RegBase + (u32)RegOffset;
// rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#if SYNOP_REG_DEBUG
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#endif
*(volatile u32 *)addr = RegData;
*(volatile u32 *)addr = RegData;
if(addr == 0xbfe1100c)
DEBUG_MES("regdata = %08x\n", RegData);
if(addr == 0xbfe1100c)
DEBUG_MES("regdata = %08x\n", RegData);
return;
}
/**
* The Low level function to set bits of a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to set bits to logical 1
* \return void
* @param[in] Bit mask to set bits to logical 1
* \return void
*/
static void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos)
{
//u64 addr = (u64)RegBase + (u64)RegOffset;
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data |= BitPos;
data |= BitPos;
synopGMACWriteReg(RegBase, RegOffset, data);
// writel(data,(void *)addr);
#if SYNOP_REG_DEBUG
@@ -206,17 +206,17 @@ static void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos)
/**
* The Low level function to clear bits of a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to clear bits to logical 0
* \return void
* @param[in] Bit mask to clear bits to logical 0
* \return void
*/
static void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos)
{
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data &= (~BitPos);
data &= (~BitPos);
synopGMACWriteReg(RegBase, RegOffset, data);
#if SYNOP_REG_DEBUG
TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
@@ -226,21 +226,21 @@ static void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos)
/**
* The Low level function to Check the setting of the bits.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to set bits to logical 1
* @param[in] Bit mask to set bits to logical 1
* \return returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
*
*
*/
static bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos)
{
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data &= BitPos;
data &= BitPos;
if(data) return true;
else return false;
else return false;
}
bsp/loongson/ls1cdev/drivers/net/synopGMAC_types.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -22,4 +22,4 @@ typedef signed int s32;
typedef u32 dma_addr_t;
#endif /*__TYPES__H*/
#endif /*__TYPES__H*/
bsp/loongson/ls1cdev/drivers/selfboot.h
+81 -81
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -12,52 +12,52 @@
#define __RT_LS1C_SELFBOOT_H
/* SDRAM PARAM macro */
#define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
#define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
/* SDRAM ROW */
#define ROW_1K 0x7
#define ROW_2K 0x0
#define ROW_4K 0x1
#define ROW_8K 0x2
#define ROW_16K 0x3
#define ROW_1K 0x7
#define ROW_2K 0x0
#define ROW_4K 0x1
#define ROW_8K 0x2
#define ROW_16K 0x3
/* SDRAM COL */
#define COL_256 0x7
#define COL_512 0x0
#define COL_1K 0x1
#define COL_2K 0x2
#define COL_4K 0x3
#define COL_256 0x7
#define COL_512 0x0
#define COL_1K 0x1
#define COL_2K 0x2
#define COL_4K 0x3
/* SDRAM WIDTH */
#define WIDTH_8 0x0
#define WIDTH_16 0x1
#define WIDTH_32 0x2
#define WIDTH_8 0x0
#define WIDTH_16 0x1
#define WIDTH_32 0x2
#define TRCD 3
#define TCL 3
#define TRP 3
#define TRFC 8
#define TRAS 6
#define TREF 0x818
#define TWR 2
#define TRCD 3
#define TCL 3
#define TRP 3
#define TRFC 8
#define TRAS 6
#define TREF 0x818
#define TWR 2
#define DEF_SEL 0x1
#define DEF_SEL_N 0x0
#define HANG_UP 0x1
#define HANG_UP_N 0x0
#define CFG_VALID 0x1
#define DEF_SEL 0x1
#define DEF_SEL_N 0x0
#define HANG_UP 0x1
#define HANG_UP_N 0x0
#define CFG_VALID 0x1
#include "board.h"
#define SD_PARA0 (0x7f<<25 | \
(TRAS << 21) | \
(TRFC << 17) | (TRP << 14) | (TCL << 11) | \
(TRCD << 8) | (SDRAM_WIDTH << 6) | (SDRAM_COL << 3) | \
SDRAM_ROW)
#define SD_PARA0 (0x7f<<25 | \
(TRAS << 21) | \
(TRFC << 17) | (TRP << 14) | (TCL << 11) | \
(TRCD << 8) | (SDRAM_WIDTH << 6) | (SDRAM_COL << 3) | \
SDRAM_ROW)
#define SD_PARA1 ((HANG_UP_N << 8) | (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1 ((HANG_UP_N << 8) | (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1_EN ((CFG_VALID << 9) | (HANG_UP_N << 8) | \
(DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1_EN ((CFG_VALID << 9) | (HANG_UP_N << 8) | \
(DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define LS1C_CBUS_FIRST1 0xBFE011C4
#define LS1C_UART2_BASE 0xBFE48000
@@ -76,62 +76,62 @@
#define LS1C_UART_MSB_OFFSET (1)
/* interrupt enable register */
#define IER_IRxE 0x1
#define IER_ITxE 0x2
#define IER_ILE 0x4
#define IER_IME 0x8
#define IER_IRxE 0x1
#define IER_ITxE 0x2
#define IER_ILE 0x4
#define IER_IME 0x8
/* interrupt identification register */
#define IIR_IMASK 0xf /* mask */
#define IIR_RXTOUT 0xc /* receive timeout */
#define IIR_RLS 0x6 /* receive line status */
#define IIR_RXRDY 0x4 /* receive ready */
#define IIR_TXRDY 0x2 /* transmit ready */
#define IIR_NOPEND 0x1 /* nothing */
#define IIR_MLSC 0x0 /* modem status */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
#define IIR_IMASK 0xf /* mask */
#define IIR_RXTOUT 0xc /* receive timeout */
#define IIR_RLS 0x6 /* receive line status */
#define IIR_RXRDY 0x4 /* receive ready */
#define IIR_TXRDY 0x2 /* transmit ready */
#define IIR_NOPEND 0x1 /* nothing */
#define IIR_MLSC 0x0 /* modem status */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
/* fifo control register */
#define FIFO_ENABLE 0x01 /* enable fifo */
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
#define FIFO_ENABLE 0x01 /* enable fifo */
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
/* character format control register */
#define CFCR_DLAB 0x80 /* divisor latch */
#define CFCR_SBREAK 0x40 /* send break */
#define CFCR_PZERO 0x30 /* zero parity */
#define CFCR_PONE 0x20 /* one parity */
#define CFCR_PEVEN 0x10 /* even parity */
#define CFCR_PODD 0x00 /* odd parity */
#define CFCR_PENAB 0x08 /* parity enable */
#define CFCR_STOPB 0x04 /* 2 stop bits */
#define CFCR_8BITS 0x03 /* 8 data bits */
#define CFCR_7BITS 0x02 /* 7 data bits */
#define CFCR_6BITS 0x01 /* 6 data bits */
#define CFCR_5BITS 0x00 /* 5 data bits */
#define CFCR_DLAB 0x80 /* divisor latch */
#define CFCR_SBREAK 0x40 /* send break */
#define CFCR_PZERO 0x30 /* zero parity */
#define CFCR_PONE 0x20 /* one parity */
#define CFCR_PEVEN 0x10 /* even parity */
#define CFCR_PODD 0x00 /* odd parity */
#define CFCR_PENAB 0x08 /* parity enable */
#define CFCR_STOPB 0x04 /* 2 stop bits */
#define CFCR_8BITS 0x03 /* 8 data bits */
#define CFCR_7BITS 0x02 /* 7 data bits */
#define CFCR_6BITS 0x01 /* 6 data bits */
#define CFCR_5BITS 0x00 /* 5 data bits */
/* modem control register */
#define MCR_LOOPBACK 0x10 /* loopback */
#define MCR_IENABLE 0x08 /* output 2 = int enable */
#define MCR_DRS 0x04 /* output 1 = xxx */
#define MCR_RTS 0x02 /* enable RTS */
#define MCR_DTR 0x01 /* enable DTR */
#define MCR_LOOPBACK 0x10 /* loopback */
#define MCR_IENABLE 0x08 /* output 2 = int enable */
#define MCR_DRS 0x04 /* output 1 = xxx */
#define MCR_RTS 0x02 /* enable RTS */
#define MCR_DTR 0x01 /* enable DTR */
/* line status register */
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
#define LSR_TSRE 0x40 /* transmitter empty */
#define LSR_TXRDY 0x20 /* transmitter ready */
#define LSR_BI 0x10 /* break detected */
#define LSR_FE 0x08 /* framing error */
#define LSR_PE 0x04 /* parity error */
#define LSR_OE 0x02 /* overrun error */
#define LSR_RXRDY 0x01 /* receiver ready */
#define LSR_RCV_MASK 0x1f
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
#define LSR_TSRE 0x40 /* transmitter empty */
#define LSR_TXRDY 0x20 /* transmitter ready */
#define LSR_BI 0x10 /* break detected */
#define LSR_FE 0x08 /* framing error */
#define LSR_PE 0x04 /* parity error */
#define LSR_OE 0x02 /* overrun error */
#define LSR_RXRDY 0x01 /* receiver ready */
#define LSR_RCV_MASK 0x1f
/* External clock frequency */
bsp/loongson/ls1cdev/drivers/touch.c
+46 -46
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,13 +7,13 @@
* Date Author Notes
* 2017-12-30 Sundm75 first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <stdbool.h>
#include <drivers/spi.h>
#include "ls1c.h"
#include "ls1c_gpio.h"
#include "ls1c_gpio.h"
#include "ls1c_spi.h"
#include "drv_spi.h"
#include "touch.h"
@@ -44,7 +44,7 @@ TOUCH INT: 84
*/
#define IS_TOUCH_UP() gpio_get(TOUCH_INT_PIN)
#define led_gpio 52 // led1指示
#define led_gpio 52 // led1指示
#define DUMMY 0x00
@@ -88,12 +88,12 @@ s A2-A0 MODE SER/DFR PD1-PD0
#if defined(_ILI_HORIZONTAL_DIRECTION_)
#define MIN_X_DEFAULT 2047
#define MAX_X_DEFAULT 47
#define MIN_Y_DEFAULT 102
#define MAX_Y_DEFAULT 1939
#define MIN_Y_DEFAULT 102
#define MAX_Y_DEFAULT 1939
#else
#define MIN_X_DEFAULT 47
#define MAX_X_DEFAULT 2047
#define MIN_Y_DEFAULT 1939
#define MIN_Y_DEFAULT 1939
#define MAX_Y_DEFAULT 102
#endif
@@ -105,29 +105,29 @@ s A2-A0 MODE SER/DFR PD1-PD0
/*宏定义 */
#define TOUCH_SPI_X SPI1
#define TOUCH_INT_PIN 84
#define TOUCH_CS_PIN 49
#define TOUCH_SPI_X SPI1
#define TOUCH_INT_PIN 84
#define TOUCH_CS_PIN 49
#define TOUCH_SCK_PIN 46
#define TOUCH_MISO_PIN 47
#define TOUCH_MOSI_PIN 48
#define TOUCH_MOSI_PIN 48
/*创建结构体将需要用到的东西进行打包*/
struct rtgui_touch_device
struct rtgui_touch_device
{
struct rt_device parent; /* 用于注册设备*/
rt_uint16_t x, y; /* 记录读取到的位置值 */
rt_uint16_t x, y; /* 记录读取到的位置值 */
rt_bool_t calibrating; /* 触摸校准标志 */
rt_touch_calibration_func_t calibration_func;/* 触摸函数 函数指针 */
rt_bool_t calibrating; /* 触摸校准标志 */
rt_touch_calibration_func_t calibration_func;/* 触摸函数 函数指针 */
rt_uint16_t min_x, max_x; /* 校准后 X 方向最小 最大值 */
rt_uint16_t min_x, max_x; /* 校准后 X 方向最小 最大值 */
rt_uint16_t min_y, max_y; /* 校准后 Y 方向最小 最大值 */
struct rt_spi_device * spi_device; /* SPI 设备 用于通信 */
struct rt_event event; /* 事件同步，用于“笔中断” */
struct rt_spi_device * spi_device; /* SPI 设备 用于通信 */
struct rt_event event; /* 事件同步，用于“笔中断” */
};
static struct rtgui_touch_device *touch = RT_NULL;
@@ -255,14 +255,14 @@ static void rtgui_touch_calculate(void)
rt_uint32_t total_x = 0;
rt_uint32_t total_y = 0;
for(k=0; k<2; k++)
{
{
// sorting the ADC value
for(i=0; i<SAMP_CNT-1; i++)
{
min=i;
for (j=i+1; j<SAMP_CNT; j++)
{
if (tmpxy[k][min] > tmpxy[k][j])
if (tmpxy[k][min] > tmpxy[k][j])
min=j;
}
temp = tmpxy[k][i];
@@ -329,11 +329,11 @@ void ls1c_touch_irqhandler(void) /* TouchScreen */
{
if(gpio_get(TOUCH_INT_PIN)==0)
{
/* 触摸屏按下后操作 */
/* 触摸屏按下后操作 */
if (gpio_level_low == gpio_get(led_gpio))
gpio_set(led_gpio, gpio_level_high);
gpio_set(led_gpio, gpio_level_high);
else
gpio_set(led_gpio, gpio_level_low);
gpio_set(led_gpio, gpio_level_low);
touch_int_cmd(RT_FALSE);
rt_event_send(&touch->event, 1);
}
@@ -341,19 +341,19 @@ void ls1c_touch_irqhandler(void) /* TouchScreen */
/*管脚初始化，配置中断打开SPI1 CS0 设备*/
rt_inline void touch_init(void)
{
{
unsigned int touch_int_gpio = TOUCH_INT_PIN; // 触摸屏中断
int touch_irq = LS1C_GPIO_TO_IRQ(touch_int_gpio);
// 初始化按键中断
gpio_set_irq_type(touch_int_gpio, IRQ_TYPE_EDGE_FALLING);
rt_hw_interrupt_install(touch_irq, ls1c_touch_irqhandler, RT_NULL, "touch");
rt_hw_interrupt_umask(touch_irq);
gpio_init(touch_int_gpio, gpio_mode_input);
// 初始化led
gpio_init(led_gpio, gpio_mode_output);
gpio_set(led_gpio, gpio_level_high);
int touch_irq = LS1C_GPIO_TO_IRQ(touch_int_gpio);
// 初始化按键中断
gpio_set_irq_type(touch_int_gpio, IRQ_TYPE_EDGE_FALLING);
rt_hw_interrupt_install(touch_irq, ls1c_touch_irqhandler, RT_NULL, "touch");
rt_hw_interrupt_umask(touch_irq);
gpio_init(touch_int_gpio, gpio_mode_input);
// 初始化led
gpio_init(led_gpio, gpio_mode_output);
gpio_set(led_gpio, gpio_level_high);
}
@@ -363,7 +363,7 @@ static rt_err_t rtgui_touch_init (rt_device_t dev)
rt_uint8_t send;
rt_uint8_t recv_buffer[2];
struct rtgui_touch_device * touch_device = (struct rtgui_touch_device *)dev;
touch_init();
rt_kprintf("touch_init ...\n");
send = START | DIFFERENTIAL | POWER_MODE0;
@@ -440,18 +440,18 @@ static void touch_thread_entry(void *parameter)
emouse.x = touch->x;
emouse.y = touch->y;
if(touch_down != RT_TRUE)
{
if(touch_down != RT_TRUE)
{
touch_int_cmd(RT_TRUE);
break;
}
}
if ((touch->calibrating == RT_TRUE) && (touch->calibration_func != RT_NULL))
{
/* 触摸校准处理 */
/* callback function */
touch->calibration_func(emouse.x, emouse.y);
}
else
{
@@ -482,7 +482,7 @@ static void touch_thread_entry(void *parameter)
/* calculation */
rtgui_touch_calculate();
/* send mouse event */
emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
emouse.parent.sender = RT_NULL;
@@ -532,7 +532,7 @@ static void touch_thread_entry(void *parameter)
rt_err_t rtgui_touch_hw_init(const char * spi_device_name)
{
rt_uint32_t arg[2];
rt_uint32_t arg[2];
struct rt_device * spi_device;
struct rt_thread * touch_thread;
rt_err_t err;
@@ -550,12 +550,12 @@ rt_err_t rtgui_touch_hw_init(const char * spi_device_name)
rt_kprintf("Open spi1 failed %08X, exit thread....\n", err);
return;
}
/* config spi */
{
struct rt_spi_configuration cfg;
cfg.data_width = 8;
cfg.mode = RT_SPI_MODE_0;
cfg.mode = RT_SPI_MODE_0;
cfg.max_hz = 200 * 1000; /* 200K */
rt_spi_configure((struct rt_spi_device *)spi_device, &cfg);
}
@@ -573,7 +573,7 @@ rt_err_t rtgui_touch_hw_init(const char * spi_device_name)
touch->min_x = MIN_X_DEFAULT;
touch->max_x = MAX_X_DEFAULT;
touch->min_y = MIN_Y_DEFAULT;
touch->min_y = MIN_Y_DEFAULT;
touch->max_y = MAX_Y_DEFAULT;
/* init device structure */
@@ -584,7 +584,7 @@ rt_err_t rtgui_touch_hw_init(const char * spi_device_name)
/* register touch device to RT-Thread */
rt_device_register(&(touch->parent), "touch", RT_DEVICE_FLAG_RDWR);
touch_thread = rt_thread_create("touch_thread",
touch_thread_entry, RT_NULL,
bsp/loongson/ls1cdev/drivers/touch.h
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -10,20 +10,20 @@
#ifndef __TOUCH_H__
#define __TOUCH_H__
#define RT_TOUCH_NORMAL 0
#define RT_TOUCH_CALIBRATION_DATA 1
#define RT_TOUCH_CALIBRATION 2
#define RT_TOUCH_NORMAL 0
#define RT_TOUCH_CALIBRATION_DATA 1
#define RT_TOUCH_CALIBRATION 2
//#define SAVE_CALIBRATION
rt_uint16_t touch_read_x(void);
rt_uint16_t touch_read_y(void);
void touch_config(void);
rt_err_t rtgui_touch_hw_init(const char * spi_device_name);
#endif
bsp/loongson/ls2kdev/drivers/drv_rtc.c
+1 -1
View File
@@ -128,7 +128,6 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
hw_rtc = dev->user_data;
t = (time_t *)args;
time = *gmtime(t);
rtctm.sys_toyread0 = hw_rtc->sys_toyread0;
rtctm.sys_toyread1 = hw_rtc->sys_toyread1;
@@ -141,6 +140,7 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
*t = timegm(&tmptime);
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
gmtime_r(t, &time);
tmptime.tm_hour = time.tm_hour;
tmptime.tm_min = time.tm_min;
tmptime.tm_sec = time.tm_sec;
bsp/loongson/ls2kdev/drivers/drv_uart.c
+10 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -18,15 +18,15 @@
#include "drv_uart.h"
#define TRUE 1
#define FALSE 0
const struct serial_configure config_uart0 = {
BAUD_RATE_115200, /* 921600 bits/s */
DATA_BITS_8, /* 8 databits */
STOP_BITS_1, /* 1 stopbit */
PARITY_NONE, /* No parity */
BIT_ORDER_LSB, /* LSB first sent */
NRZ_NORMAL, /* Normal mode */
RT_SERIAL_RB_BUFSZ, /* Buffer size */
0
const struct serial_configure config_uart0 = {
BAUD_RATE_115200, /* 921600 bits/s */
DATA_BITS_8, /* 8 databits */
STOP_BITS_1, /* 1 stopbit */
PARITY_NONE, /* No parity */
BIT_ORDER_LSB, /* LSB first sent */
NRZ_NORMAL, /* Normal mode */
RT_SERIAL_RB_BUFSZ, /* Buffer size */
0
};
struct rt_uart_ls2k
{
bsp/loongson/ls2kdev/drivers/ls2k1000.h
+1 -1
View File
@@ -38,7 +38,7 @@
#define PM1_STS HWREG32(PM1_BASE)
#define PM1_EN HWREG32(PM1_BASE + 0x04)
#define PM1_CNT HWREG32(PM1_BASE + 0x08)
/*
* Watch Dog Configuration Registers
*/
bsp/loongson/ls2kdev/drivers/net/mii.h
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -172,15 +172,15 @@
/* Which connector port. */
#define PORT_TP 0x00
#define PORT_AUI 0x01
#define PORT_MII 0x02
#define PORT_MII 0x02
#define PORT_FIBRE 0x03
#define PORT_BNC 0x04
/* Which transceiver to use. */
#define XCVR_INTERNAL 0x00
#define XCVR_EXTERNAL 0x01
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY3 0x04
#define AUTONEG_DISABLE 0x00
bsp/loongson/ls2kdev/drivers/net/synopGMAC_Dev.h
+207 -207
View File
File diff suppressed because it is too large Load Diff
bsp/loongson/ls2kdev/drivers/net/synopGMAC_Host.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -42,7 +42,7 @@ struct net_device_stats
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
bsp/loongson/ls2kdev/drivers/net/synopGMAC_debug.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -13,7 +13,7 @@
//#define GMAC_DEBUG
#include <rtthread.h>
#ifdef GMAC_DEBUG
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#else
#define DEBUG_MES(...)
bsp/loongson/ls2kdev/drivers/net/synopGMAC_plat.h
+35 -35
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -57,17 +57,17 @@ typedef int bool;
#define VA_TO_PA(x) CACHED_TO_PHYS(x)
/* sw
#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#ifdef DEBUG
#undef TR
# define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#else
# define TR(fmt, args...) // not debugging: nothing
# define TR(fmt, args...) // not debugging: nothing
#endif
*/
/*
#define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
*/
/*
@@ -75,20 +75,20 @@ typedef int bool;
#undef TR
# define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#else
//# define TR(fmt, args...) // not debugging: nothing
#define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
//# define TR(fmt, args...) // not debugging: nothing
#define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
#endif
*/
//sw: nothing to display
#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
//typedef int bool;
enum synopGMAC_boolean
{
{
false = 0,
true = 1
true = 1
};
#define DEFAULT_DELAY_VARIABLE 10
@@ -117,7 +117,7 @@ struct Network_interface_data
/**
* These are the wrapper function prototypes for OS/platform related routines
*/
*/
void * plat_alloc_memory(u32 );
void plat_free_memory(void *);
@@ -128,10 +128,10 @@ void plat_delay(u32);
/**
* The Low level function to read register contents from Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* \return Returns the register contents
* \return Returns the register contents
*/
static u32 synopGMACReadReg(u64 RegBase, u32 RegOffset)
{
@@ -151,11 +151,11 @@ static u32 synopGMACReadReg(u64 RegBase, u32 RegOffset)
/**
* The Low level function to write to a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Data to be written
* \return void
* @param[in] Data to be written
* \return void
*/
static void synopGMACWriteReg(u64 RegBase, u32 RegOffset, u32 RegData )
{
@@ -173,18 +173,18 @@ static void synopGMACWriteReg(u64 RegBase, u32 RegOffset, u32 RegData )
/**
* The Low level function to set bits of a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to set bits to logical 1
* \return void
* @param[in] Bit mask to set bits to logical 1
* \return void
*/
static void synopGMACSetBits(u64 RegBase, u32 RegOffset, u32 BitPos)
{
//u64 addr = (u64)RegBase + (u64)RegOffset;
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data |= BitPos;
data |= BitPos;
synopGMACWriteReg(RegBase, RegOffset, data);
// writel(data,(void *)addr);
#if SYNOP_REG_DEBUG
@@ -196,17 +196,17 @@ static void synopGMACSetBits(u64 RegBase, u32 RegOffset, u32 BitPos)
/**
* The Low level function to clear bits of a register in Hardware.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to clear bits to logical 0
* \return void
* @param[in] Bit mask to clear bits to logical 0
* \return void
*/
static void synopGMACClearBits(u64 RegBase, u32 RegOffset, u32 BitPos)
{
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data &= (~BitPos);
data &= (~BitPos);
synopGMACWriteReg(RegBase, RegOffset, data);
#if SYNOP_REG_DEBUG
TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
@@ -216,24 +216,24 @@ static void synopGMACClearBits(u64 RegBase, u32 RegOffset, u32 BitPos)
/**
* The Low level function to Check the setting of the bits.
*
* @param[in] pointer to the base of register map
*
* @param[in] pointer to the base of register map
* @param[in] Offset from the base
* @param[in] Bit mask to set bits to logical 1
* @param[in] Bit mask to set bits to logical 1
* \return returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
*
*
*/
static bool synopGMACCheckBits(u64 RegBase, u32 RegOffset, u32 BitPos)
{
u32 data;
data = synopGMACReadReg(RegBase, RegOffset);
data &= BitPos;
data &= BitPos;
if(data)
if(data)
{
return true;
}
else
else
{
return false;
}
bsp/lpc55sxx/Libraries/drivers/drv_rtc.c
+8 -8
View File
@@ -43,18 +43,18 @@ static time_t get_timestamp(void)
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
struct tm now;
rtc_datetime_t rtcDate;
p_tm = gmtime(&timestamp);
gmtime_r(&timestamp, &now);
rtcDate.second = p_tm->tm_sec ;
rtcDate.minute = p_tm->tm_min ;
rtcDate.hour = p_tm->tm_hour;
rtcDate.second = now.tm_sec ;
rtcDate.minute = now.tm_min ;
rtcDate.hour = now.tm_hour;
rtcDate.day = p_tm->tm_mday;
rtcDate.month = p_tm->tm_mon + 1;
rtcDate.year = p_tm->tm_year + 1900;
rtcDate.day = now.tm_mday;
rtcDate.month = now.tm_mon + 1;
rtcDate.year = now.tm_year + 1900;
/* RTC time counter has to be stopped before setting the date & time in the TSR register */
RTC_StopTimer(RTC);
bsp/nuvoton/libraries/m031/rtt_port/drv_rtc.c
+8 -8
View File
@@ -200,7 +200,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@@ -236,13 +236,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;
bsp/nuvoton/libraries/m2354/rtt_port/drv_rtc.c
+8 -8
View File
@@ -203,7 +203,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@@ -239,13 +239,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
+8 -8
View File
@@ -202,7 +202,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@@ -238,13 +238,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;
bsp/nuvoton/libraries/n9h30/rtt_port/drv_rtc.c
+9 -9
View File
@@ -221,7 +221,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time = {0};
@@ -261,14 +261,14 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32cMonth = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32cDay = tm_in->tm_mday;
hw_time.u32cHour = tm_in->tm_hour;
hw_time.u32cMinute = tm_in->tm_min;
hw_time.u32cSecond = tm_in->tm_sec;
hw_time.u32cDayOfWeek = tm_in->tm_wday;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32cMonth = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32cDay = tm_in.tm_mday;
hw_time.u32cHour = tm_in.tm_hour;
hw_time.u32cMinute = tm_in.tm_min;
hw_time.u32cSecond = tm_in.tm_sec;
hw_time.u32cDayOfWeek = tm_in.tm_wday;
hw_time.u8cClockDisplay = RTC_CLOCK_24;
hw_time.u8cAmPm = 0;
bsp/nuvoton/libraries/nuc980/rtt_port/drv_rtc.c
+8 -8
View File
@@ -203,7 +203,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@@ -239,13 +239,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;
bsp/raspberry-pi/raspi3-32/driver/drv_rtc.c
+9 -9
View File
@@ -193,16 +193,16 @@ static time_t raspi_get_timestamp(void)
static int raspi_set_timestamp(time_t timestamp)
{
struct tm *tblock;
tblock = gmtime(&timestamp);
struct tm tblock;
gmtime_r(&timestamp, &tblock);
buf[0] = 0;
buf[1] = tblock->tm_sec;
buf[2] = tblock->tm_min;
buf[3] = tblock->tm_hour;
buf[4] = tblock->tm_wday;
buf[5] = tblock->tm_mday;
buf[6] = tblock->tm_mon;
buf[7] = tblock->tm_year;
buf[1] = tblock.tm_sec;
buf[2] = tblock.tm_min;
buf[3] = tblock.tm_hour;
buf[4] = tblock.tm_wday;
buf[5] = tblock.tm_mday;
buf[6] = tblock.tm_mon;
buf[7] = tblock.tm_year;
i2c_write(buf, 8);

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