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Merge pull request #5499 from mysterywolf/dfs_posix

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guo authored and GitHub committed 2022-01-12 10:22:33 +08:00
2 parents 0f77fab0a1 b2b3fa6e27
commit 2644e75bcd
17 files changed
+221 -221
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bsp/CME_M7/drivers/app_phy.c
+60 -60
View File
@@ -1,22 +1,22 @@
#include <stdio.h>
#include "app_phy.h"
#define PHY_BASE_ADDR 0x7
#define PHY_BASE_ADDR 0x7
#define PHY_REG_CONTROL 0x0
#define PHY_REG_STATUS 0x1
#define PHY_REG_ANE 0x6
#define PHY_REG_SPEC_STATUS 0x11
#define PHY_REG_EXTEND_STATUS 0x1B
#define PHY_REG_EXTEND_STATUS 0x1B
#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */
#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */
#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */
#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */
#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */
#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */
#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */
#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */
#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */
#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */
#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */
#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */
#define PHY_BIT_SPEED 0xC000 /*!< specific status reg : speed */
#define PHY_BIT_DUPLEX 0x2000 /*!< specific status reg : duplex */
@@ -25,24 +25,24 @@
#define PHY_BIT_AUTO_MEDIA_REG_DISABLE 0x0200 /*!< extended status reg : auto media register select disable */
void phy_Reset() {
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
while (1) {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
break;
}
}
while (1) {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
break;
}
}
}
void phy_AutoMediaSelect() {
uint32_t data;
uint32_t data;
// auto media and auto media register selection
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
// auto media and auto media register selection
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
}
void phy_AutoNeg()
@@ -65,61 +65,61 @@ void phy_AutoNeg()
}
BOOL phy_IsLink() {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE;
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE;
}
BOOL phy_PartnerCanAutoNeg() {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE);
return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE;
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE);
return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE;
}
uint32_t phy_GetSpeed() {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
return ((ret & PHY_BIT_SPEED) >> 14);
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
return ((ret & PHY_BIT_SPEED) >> 14);
}
uint32_t phy_GetDuplex() {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
return ((ret & PHY_BIT_DUPLEX) >> 13);
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
return ((ret & PHY_BIT_DUPLEX) >> 13);
}
BOOL phy_Init() {
phy_AutoMediaSelect();
phy_AutoNeg();
phy_AutoMediaSelect();
phy_AutoNeg();
if (!phy_PartnerCanAutoNeg()) {
printf("Warning:: PHY's partner can't do auto-negotiation\n");
}
if (!phy_PartnerCanAutoNeg()) {
printf("Warning:: PHY's partner can't do auto-negotiation\n");
}
if (!phy_IsLink()) {
printf("link is down\n");
return FALSE;
}
if (!phy_IsLink()) {
printf("link is down\n");
return FALSE;
}
{
uint32_t speed = phy_GetSpeed();
if (speed == PHY_SPEED_10) {
speed = 10;
} else if (speed == PHY_SPEED_100) {
speed = 100;
} else if (speed == PHY_SPEED_1000) {
speed = 1000;
}
{
uint32_t speed = phy_GetSpeed();
if (speed == PHY_SPEED_10) {
speed = 10;
} else if (speed == PHY_SPEED_100) {
speed = 100;
} else if (speed == PHY_SPEED_1000) {
speed = 1000;
}
printf("PHY runs in %dM speed %s duplex\n",
speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full");
}
printf("PHY runs in %dM speed %s duplex\n",
speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full");
}
// After auto-negcioation, Mawell PHY need some
// time to initial itself.
// So we have to delay some time since different
// connection way, such as direct wire, hub, switch.
// If not to delay, the first several sent frame
// may be lost.
// Please according to actual environment to tune
// this delay.
udelay(200000);
// After auto-negcioation, Mawell PHY need some
// time to initial itself.
// So we have to delay some time since different
// connection way, such as direct wire, hub, switch.
// If not to delay, the first several sent frame
// may be lost.
// Please according to actual environment to tune
// this delay.
udelay(200000);
return TRUE;
return TRUE;
}
bsp/CME_M7/drivers/app_phy.h
+8 -8
View File
@@ -7,13 +7,13 @@
#include "cmem7_includes.h"
#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */
#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */
#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */
#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */
#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */
#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */
#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */
#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */
#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */
#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */
void phy_Reset(void);
void phy_AutoNeg(void);
BOOL phy_IsLink(void);
@@ -26,7 +26,7 @@ BOOL phy_Init(void);
}
#endif
#endif
#endif
bsp/CME_M7/drivers/emac.c
+4 -4
View File
@@ -1,7 +1,7 @@
/*
* File : emac.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2014, RT-Thread Develop Team
* COPYRIGHT (C) 2006-2021, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -38,7 +38,7 @@ struct rt_cme_eth
struct eth_device parent;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
uint32_t ETH_Speed;
uint32_t ETH_Mode;
@@ -95,8 +95,8 @@ uint32_t txTotalMemory = 0x2000;
BOOL isRxNoBuf = FALSE;
#define ETH_MAX_PACKET_SIZE 1520 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
struct eth_rx_buffer
{
bsp/CME_M7/drivers/uart.c
+23 -23
View File
@@ -32,23 +32,23 @@ static struct rt_serial_device serial2;
static rt_err_t CME_M7_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct CME_M7_uart* uart;
UART_InitTypeDef init;
UART_InitTypeDef init;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct CME_M7_uart *)serial->parent.user_data;
init.UART_BaudRate = cfg->baud_rate;
init.UART_StopBits = UART_StopBits_1;
init.UART_BaudRate = cfg->baud_rate;
init.UART_StopBits = UART_StopBits_1;
init.UART_Parity = UART_Parity_None;
init.UART_LoopBack = FALSE;
init.UART_RxEn = TRUE;
init.UART_CtsEn = FALSE;
init.UART_LoopBack = FALSE;
init.UART_RxEn = TRUE;
init.UART_CtsEn = FALSE;
UART_Init(uart->uart_device, &init);
uart->uart_device->RX_RESET = 1;
UART_Enable(uart->uart_device, TRUE);
UART_Enable(uart->uart_device, TRUE);
uart->uart_device->RX_RESET = 0;
return RT_EOK;
@@ -67,24 +67,24 @@ static rt_err_t CME_M7_control(struct rt_serial_device *serial, int cmd, void *a
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE;
NVIC_Init(&NVIC_InitStructure);
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE);
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE);
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE;
NVIC_Init(&NVIC_InitStructure);
UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty);
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE);
UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty);
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE);
break;
}
@@ -132,8 +132,8 @@ static const struct rt_uart_ops CME_M7_uart_ops =
int rt_hw_uart_init(void)
{
struct CME_M7_uart* uart;
struct rt_serial_device *serial;
struct CME_M7_uart* uart;
struct rt_serial_device *serial;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART0
@@ -143,7 +143,7 @@ int rt_hw_uart_init(void)
serial->ops = &CME_M7_uart_ops;
serial->config = config;
/* register UART device */
/* register UART device */
rt_hw_serial_register(serial,
"uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
@@ -157,14 +157,14 @@ int rt_hw_uart_init(void)
serial->ops = &CME_M7_uart_ops;
serial->config = config;
/* register UART device */
/* register UART device */
rt_hw_serial_register(serial,
"uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART2 */
return RT_EOK;
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
bsp/efm32/application.c
+111 -111
View File
File diff suppressed because it is too large. Load diff
bsp/ra6m4-cpk/drivers/drv_gpio.h
+1 -1
View File
@@ -39,4 +39,4 @@ int rt_hw_pin_init(void);
}
#endif
#endif /* __DRV_GPIO_H__ */
#endif /* __DRV_GPIO_H__ */
bsp/ra6m4-cpk/drivers/drv_rtc.c
+1 -1
View File
@@ -223,4 +223,4 @@ static int rt_hw_rtc_init(void)
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
#endif
#endif
bsp/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/bsp_cfg.h
+1 -1
View File
@@ -34,7 +34,7 @@
#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
#endif
#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0)
#endif
bsp/ra6m4-cpk/ra_gen/vector_data.c
+1 -1
View File
@@ -18,4 +18,4 @@
[3] = BSP_PRV_IELS_ENUM(EVENT_SCI7_ERI), /* SCI7 ERI (Receive error) */
[4] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ0), /* ICU IRQ0 (External pin interrupt 0) */
};
#endif
#endif
bsp/ra6m4-cpk/ra_gen/vector_data.h
+1 -1
View File
@@ -36,4 +36,4 @@
SCI7_ERI_IRQn = 3, /* SCI7 ERI (Receive error) */
ICU_IRQ0_IRQn = 4, /* ICU IRQ0 (External pin interrupt 0) */
} IRQn_Type;
#endif /* VECTOR_DATA_H */
#endif /* VECTOR_DATA_H */
bsp/ra6m4-cpk/src/hal_entry.c
+1 -1
View File
@@ -14,7 +14,7 @@
#include <rtdevice.h>
#define LED3_PIN BSP_IO_PORT_01_PIN_06
#define USER_INPUT "P105"
#define USER_INPUT "P105"
void hal_entry(void)
{
bsp/zynqmp-r5-axu4ev/drivers/board.h
+1 -1
View File
@@ -15,4 +15,4 @@ extern int __bss_end;
void rt_hw_board_init();
#endif
#endif
bsp/zynqmp-r5-axu4ev/drivers/drv_eth.c
+1 -1
View File
@@ -344,4 +344,4 @@ static int rt_hw_zynqmp_eth_init(void)
return state;
}
INIT_DEVICE_EXPORT(rt_hw_zynqmp_eth_init);
INIT_DEVICE_EXPORT(rt_hw_zynqmp_eth_init);
bsp/zynqmp-r5-axu4ev/drivers/drv_sdcard.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -469,4 +469,4 @@ static int rh_hw_emmc_init(void)
return -RT_ERROR;
}
INIT_DEVICE_EXPORT(rh_hw_emmc_init);
#endif
#endif
bsp/zynqmp-r5-axu4ev/drivers/drv_timer.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -62,4 +62,4 @@ static int rt_hw_timer_init(void)
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_timer_init);
INIT_BOARD_EXPORT(rt_hw_timer_init);
bsp/zynqmp-r5-axu4ev/drivers/drv_timer.h
+1 -1
View File
@@ -45,4 +45,4 @@ extern "C" {
}
#endif
#endif
#endif
bsp/zynqmp-r5-axu4ev/drivers/drv_uart.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -315,4 +315,4 @@ int rt_hw_uart_init(void)
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
INIT_BOARD_EXPORT(rt_hw_uart_init);