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使用 AStyle.exe 统一代码格式

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Aligagago
2022-07-25 10:21:18 +08:00
committed by guo
parent 1b55a1dedd
commit 250b3cbc16
675 changed files with 3780 additions and 265326 deletions
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6
bsp/apm32/apm32f103xe-minibroard/board/SConscript
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@@ -15,13 +15,13 @@ path = [cwd]
startup_path_prefix = SDK_LIB
if rtconfig.CROSS_TOOL == 'keil':
if rtconfig.PLATFORM in ['armcc', 'armclang']:
src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/arm/startup_apm32f10x_hd.s']
if rtconfig.CROSS_TOOL == 'iar':
if rtconfig.PLATFORM in ['iccarm']:
src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/iar/startup_apm32f10x_hd.s']
if rtconfig.CROSS_TOOL == 'gcc':
if rtconfig.PLATFORM in ['gcc']:
src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/gcc/startup_apm32f10x_hd.s']
# You can select chips from the list above

742
bsp/apm32/apm32f103xe-minibroard/project.uvoptx
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195
bsp/apm32/apm32f103xe-minibroard/project.uvprojx
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8
bsp/apm32/apm32f407ig-minibroard/board/board.c
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@@ -23,14 +23,14 @@ void apm32_usart_init(void)
GPIO_ConfigStruct.otype = GPIO_OTYPE_PP;
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
GPIO_ConfigPinAF(GPIOA,GPIO_PIN_SOURCE_9,GPIO_AF_USART1);
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_9, GPIO_AF_USART1);
GPIO_ConfigStruct.mode = GPIO_MODE_IN;
GPIO_ConfigStruct.pin = GPIO_PIN_10;
GPIO_ConfigStruct.pupd = GPIO_PUPD_UP;
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
GPIO_ConfigPinAF(GPIOA,GPIO_PIN_SOURCE_10,GPIO_AF_USART1);
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_10, GPIO_AF_USART1);
#endif
#ifdef BSP_USING_UART2
@@ -42,13 +42,13 @@ void apm32_usart_init(void)
GPIO_ConfigStruct.otype = GPIO_OTYPE_PP;
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
GPIO_ConfigPinAF(GPIOA,GPIO_PIN_SOURCE_2,GPIO_AF_USART2);
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_2, GPIO_AF_USART2);
GPIO_ConfigStruct.mode = GPIO_MODE_IN;
GPIO_ConfigStruct.pin = GPIO_PIN_3;
GPIO_ConfigStruct.pupd = GPIO_PUPD_UP;
GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
GPIO_Config(GPIOA, &GPIO_ConfigStruct);
GPIO_ConfigPinAF(GPIOA,GPIO_PIN_SOURCE_3,GPIO_AF_USART2);
GPIO_ConfigPinAF(GPIOA, GPIO_PIN_SOURCE_3, GPIO_AF_USART2);
#endif
}

738
bsp/apm32/apm32f407ig-minibroard/project.uvoptx
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193
bsp/apm32/apm32f407ig-minibroard/project.uvprojx
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File diff suppressed because it is too large Load Diff

114
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_adc.c
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@@ -47,14 +47,14 @@
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_Reset(ADC_T* adc)
void ADC_Reset(ADC_T *adc)
{
if(adc == ADC1)
if (adc == ADC1)
{
RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_ADC1);
RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_ADC1);
}
else if(adc == ADC2)
else if (adc == ADC2)
{
RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_ADC2);
RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_ADC2);
@@ -77,7 +77,7 @@ void ADC_Reset(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_Config(ADC_T* adc, ADC_Config_T* adcConfig)
void ADC_Config(ADC_T *adc, ADC_Config_T *adcConfig)
{
uint32_t reg;
@@ -107,7 +107,7 @@ void ADC_Config(ADC_T* adc, ADC_Config_T* adcConfig)
*
* @retval None
*/
void ADC_ConfigStructInit(ADC_Config_T* adcConfig)
void ADC_ConfigStructInit(ADC_Config_T *adcConfig)
{
adcConfig->mode = ADC_MODE_INDEPENDENT;
adcConfig->scanConvMode = DISABLE;
@@ -126,7 +126,7 @@ void ADC_ConfigStructInit(ADC_Config_T* adcConfig)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_Enable(ADC_T* adc)
void ADC_Enable(ADC_T *adc)
{
adc->CTRL2_B.ADCEN = BIT_SET;
}
@@ -140,7 +140,7 @@ void ADC_Enable(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_Disable(ADC_T* adc)
void ADC_Disable(ADC_T *adc)
{
adc->CTRL2_B.ADCEN = BIT_RESET;
}
@@ -154,7 +154,7 @@ void ADC_Disable(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableDMA(ADC_T* adc)
void ADC_EnableDMA(ADC_T *adc)
{
adc->CTRL2_B.DMAEN = BIT_SET;
}
@@ -168,7 +168,7 @@ void ADC_EnableDMA(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableDMA(ADC_T* adc)
void ADC_DisableDMA(ADC_T *adc)
{
adc->CTRL2_B.DMAEN = BIT_RESET;
}
@@ -182,7 +182,7 @@ void ADC_DisableDMA(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ResetCalibration(ADC_T* adc)
void ADC_ResetCalibration(ADC_T *adc)
{
adc->CTRL2_B.CALRST = BIT_SET;
}
@@ -196,7 +196,7 @@ void ADC_ResetCalibration(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadResetCalibrationStatus(ADC_T* adc)
uint8_t ADC_ReadResetCalibrationStatus(ADC_T *adc)
{
uint8_t ret;
ret = (adc->CTRL2_B.CALRST) ? BIT_SET : BIT_RESET;
@@ -212,7 +212,7 @@ uint8_t ADC_ReadResetCalibrationStatus(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_StartCalibration(ADC_T* adc)
void ADC_StartCalibration(ADC_T *adc)
{
adc->CTRL2_B.CAL = BIT_SET;
}
@@ -226,7 +226,7 @@ void ADC_StartCalibration(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadCalibrationStartFlag(ADC_T* adc)
uint8_t ADC_ReadCalibrationStartFlag(ADC_T *adc)
{
uint8_t ret;
ret = (adc->CTRL2_B.CAL) ? BIT_SET : BIT_RESET;
@@ -242,7 +242,7 @@ uint8_t ADC_ReadCalibrationStartFlag(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableSoftwareStartConv(ADC_T* adc)
void ADC_EnableSoftwareStartConv(ADC_T *adc)
{
adc->CTRL2 |= 0x00500000;
}
@@ -256,7 +256,7 @@ void ADC_EnableSoftwareStartConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableSoftwareStartConv(ADC_T* adc)
void ADC_DisableSoftwareStartConv(ADC_T *adc)
{
adc->CTRL2 &= 0xFFAFFFFF;
}
@@ -270,7 +270,7 @@ void ADC_DisableSoftwareStartConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T* adc)
uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T *adc)
{
uint8_t ret;
ret = (adc->CTRL2_B.REGSWSC) ? BIT_SET : BIT_RESET;
@@ -289,7 +289,7 @@ uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigDiscMode(ADC_T* adc, uint8_t number)
void ADC_ConfigDiscMode(ADC_T *adc, uint8_t number)
{
adc->CTRL1_B.DISCNUMCFG |= number - 1;
}
@@ -303,7 +303,7 @@ void ADC_ConfigDiscMode(ADC_T* adc, uint8_t number)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableDiscMode(ADC_T* adc)
void ADC_EnableDiscMode(ADC_T *adc)
{
adc->CTRL1_B.REGDISCEN = BIT_SET;
}
@@ -317,7 +317,7 @@ void ADC_EnableDiscMode(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableDiscMode(ADC_T* adc)
void ADC_DisableDiscMode(ADC_T *adc)
{
adc->CTRL1_B.REGDISCEN = BIT_RESET;
}
@@ -366,11 +366,11 @@ void ADC_DisableDiscMode(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel,uint8_t rank, uint8_t sampleTime)
void ADC_ConfigRegularChannel(ADC_T *adc, uint8_t channel, uint8_t rank, uint8_t sampleTime)
{
uint32_t temp1 = 0;
uint32_t temp2 = 0;
if(channel > ADC_CHANNEL_9)
if (channel > ADC_CHANNEL_9)
{
temp1 = adc->SMPTIM1;
temp2 = SMPCYCCFG_SET_SMPTIM1 << (3 * (channel - 10));
@@ -389,7 +389,7 @@ void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel,uint8_t rank, uint8_t
adc->SMPTIM2 = temp1;
}
if(rank < 7)
if (rank < 7)
{
temp1 = adc->REGSEQ3;
temp2 = REGSEQC_SET_REGSEQ3 << (5 * (rank - 1));
@@ -398,7 +398,7 @@ void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel,uint8_t rank, uint8_t
temp1 |= temp2;
adc->REGSEQ3 = temp1;
}
else if(rank < 13)
else if (rank < 13)
{
temp1 = adc->REGSEQ2;
temp2 = REGSEQC_SET_REGSEQ2 << (5 * (rank - 7));
@@ -427,7 +427,7 @@ void ADC_ConfigRegularChannel(ADC_T* adc, uint8_t channel,uint8_t rank, uint8_t
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableExternalTrigConv(ADC_T* adc)
void ADC_EnableExternalTrigConv(ADC_T *adc)
{
adc->CTRL2_B.REGEXTTRGEN = BIT_SET;
}
@@ -441,7 +441,7 @@ void ADC_EnableExternalTrigConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableExternalTrigConv(ADC_T* adc)
void ADC_DisableExternalTrigConv(ADC_T *adc)
{
adc->CTRL2_B.REGEXTTRGEN = BIT_RESET;
}
@@ -455,7 +455,7 @@ void ADC_DisableExternalTrigConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint16_t ADC_ReadConversionValue(ADC_T* adc)
uint16_t ADC_ReadConversionValue(ADC_T *adc)
{
return (uint16_t) adc->REGDATA;
}
@@ -469,7 +469,7 @@ uint16_t ADC_ReadConversionValue(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint32_t ADC_ReadDualModeConversionValue(ADC_T* adc)
uint32_t ADC_ReadDualModeConversionValue(ADC_T *adc)
{
return (*(__IOM uint32_t *) RDG_ADDRESS);
}
@@ -483,7 +483,7 @@ uint32_t ADC_ReadDualModeConversionValue(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableAutoInjectedConv(ADC_T* adc)
void ADC_EnableAutoInjectedConv(ADC_T *adc)
{
adc->CTRL1_B.INJGACEN = BIT_SET;
}
@@ -497,7 +497,7 @@ void ADC_EnableAutoInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableAutoInjectedConv(ADC_T* adc)
void ADC_DisableAutoInjectedConv(ADC_T *adc)
{
adc->CTRL1_B.INJGACEN = BIT_RESET;
}
@@ -511,7 +511,7 @@ void ADC_DisableAutoInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableInjectedDiscMode(ADC_T* adc)
void ADC_EnableInjectedDiscMode(ADC_T *adc)
{
adc->CTRL1_B.INJDISCEN = BIT_SET;
}
@@ -525,7 +525,7 @@ void ADC_EnableInjectedDiscMode(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableInjectedDiscMode(ADC_T* adc)
void ADC_DisableInjectedDiscMode(ADC_T *adc)
{
adc->CTRL1_B.INJDISCEN = BIT_RESET;
}
@@ -558,7 +558,7 @@ void ADC_DisableInjectedDiscMode(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigExternalTrigInjectedConv(ADC_T* adc, ADC_EXT_TRIG_INJEC_CONV_T extTrigInjecConv)
void ADC_ConfigExternalTrigInjectedConv(ADC_T *adc, ADC_EXT_TRIG_INJEC_CONV_T extTrigInjecConv)
{
adc->CTRL2_B.INJGEXTTRGSEL = RESET;
adc->CTRL2_B.INJGEXTTRGSEL |= extTrigInjecConv;
@@ -573,7 +573,7 @@ void ADC_ConfigExternalTrigInjectedConv(ADC_T* adc, ADC_EXT_TRIG_INJEC_CONV_T ex
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableExternalTrigInjectedConv(ADC_T* adc)
void ADC_EnableExternalTrigInjectedConv(ADC_T *adc)
{
adc->CTRL2_B.INJEXTTRGEN = BIT_SET;
}
@@ -587,7 +587,7 @@ void ADC_EnableExternalTrigInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableExternalTrigInjectedConv(ADC_T* adc)
void ADC_DisableExternalTrigInjectedConv(ADC_T *adc)
{
adc->CTRL2_B.INJEXTTRGEN = BIT_RESET;
}
@@ -601,7 +601,7 @@ void ADC_DisableExternalTrigInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableSoftwareStartInjectedConv(ADC_T* adc)
void ADC_EnableSoftwareStartInjectedConv(ADC_T *adc)
{
adc->CTRL2_B.INJEXTTRGEN = BIT_SET;
adc->CTRL2_B.INJSWSC = BIT_SET;
@@ -616,7 +616,7 @@ void ADC_EnableSoftwareStartInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableSoftwareStartInjectedConv(ADC_T* adc)
void ADC_DisableSoftwareStartInjectedConv(ADC_T *adc)
{
adc->CTRL2_B.INJEXTTRGEN = BIT_RESET;
adc->CTRL2_B.INJSWSC = BIT_RESET;
@@ -631,7 +631,7 @@ void ADC_DisableSoftwareStartInjectedConv(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T* adc)
uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T *adc)
{
uint8_t ret;
ret = (adc->CTRL2_B.INJSWSC) ? BIT_SET : BIT_RESET;
@@ -682,7 +682,7 @@ uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_t sampleTime)
void ADC_ConfigInjectedChannel(ADC_T *adc, uint8_t channel, uint8_t rank, uint8_t sampleTime)
{
uint32_t temp1 = 0;
uint32_t temp2 = 0;
@@ -690,9 +690,9 @@ void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_
if (channel > ADC_CHANNEL_9)
{
temp1 = adc->SMPTIM1;
temp2 = SMPCYCCFG_SET_SMPTIM1 << (3*(channel - 10));
temp2 = SMPCYCCFG_SET_SMPTIM1 << (3 * (channel - 10));
temp1 &= ~temp2;
temp2 = (uint32_t)sampleTime << (3*(channel - 10));
temp2 = (uint32_t)sampleTime << (3 * (channel - 10));
temp1 |= temp2;
adc->SMPTIM1 = temp1;
}
@@ -706,7 +706,7 @@ void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_
adc->SMPTIM2 = temp1;
}
temp1 = adc->INJSEQ;
temp3 = (temp1 & INJSEQ_SET_INJSEQLEN)>> 20;
temp3 = (temp1 & INJSEQ_SET_INJSEQLEN) >> 20;
temp2 = INJSEQ_SET_INJSEQC << (5 * (uint8_t)((rank + 3) - (temp3 + 1)));
temp1 &= ~temp2;
temp2 = (uint32_t)channel << (5 * (uint8_t)((rank + 3) - (temp3 + 1)));
@@ -726,7 +726,7 @@ void ADC_ConfigInjectedChannel(ADC_T* adc, uint8_t channel, uint8_t rank, uint8_
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigInjectedSequencerLength(ADC_T* adc, uint8_t length)
void ADC_ConfigInjectedSequencerLength(ADC_T *adc, uint8_t length)
{
adc->INJSEQ_B.INJSEQLEN = RESET;
adc->INJSEQ_B.INJSEQLEN |= length - 1;
@@ -751,7 +751,7 @@ void ADC_ConfigInjectedSequencerLength(ADC_T* adc, uint8_t length)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigInjectedOffset(ADC_T* adc, ADC_INJEC_CHANNEL_T channel, uint16_t offSet)
void ADC_ConfigInjectedOffset(ADC_T *adc, ADC_INJEC_CHANNEL_T channel, uint16_t offSet)
{
__IOM uint32_t tmp = 0;
@@ -777,14 +777,14 @@ void ADC_ConfigInjectedOffset(ADC_T* adc, ADC_INJEC_CHANNEL_T channel, uint16_t
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint16_t ADC_ReadInjectedConversionValue(ADC_T* adc, ADC_INJEC_CHANNEL_T channel)
uint16_t ADC_ReadInjectedConversionValue(ADC_T *adc, ADC_INJEC_CHANNEL_T channel)
{
__IOM uint32_t temp = 0;
temp = (uint32_t)adc;
temp += channel + INJDATA_OFFSET;
return (uint16_t) (*(__IOM uint32_t*) temp);
return (uint16_t)(*(__IOM uint32_t *) temp);
}
/*!
@@ -806,7 +806,7 @@ uint16_t ADC_ReadInjectedConversionValue(ADC_T* adc, ADC_INJEC_CHANNEL_T channel
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableAnalogWatchdog(ADC_T* adc, uint32_t analogWatchdog)
void ADC_EnableAnalogWatchdog(ADC_T *adc, uint32_t analogWatchdog)
{
adc->CTRL1 &= 0xFF3FFDFF;
adc->CTRL1 |= analogWatchdog;
@@ -821,7 +821,7 @@ void ADC_EnableAnalogWatchdog(ADC_T* adc, uint32_t analogWatchdog)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableAnalogWatchdog(ADC_T* adc)
void ADC_DisableAnalogWatchdog(ADC_T *adc)
{
adc->CTRL1 &= 0xFF3FFDFF;
}
@@ -841,7 +841,7 @@ void ADC_DisableAnalogWatchdog(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigAnalogWatchdogThresholds(ADC_T* adc, uint16_t highThreshold, uint16_t lowThreshold)
void ADC_ConfigAnalogWatchdogThresholds(ADC_T *adc, uint16_t highThreshold, uint16_t lowThreshold)
{
adc->AWDHT = highThreshold;
adc->AWDLT = lowThreshold;
@@ -877,7 +877,7 @@ void ADC_ConfigAnalogWatchdogThresholds(ADC_T* adc, uint16_t highThreshold, uint
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ConfigAnalogWatchdogSingleChannel(ADC_T* adc, uint8_t channel)
void ADC_ConfigAnalogWatchdogSingleChannel(ADC_T *adc, uint8_t channel)
{
adc->CTRL1_B.AWDCHSEL = BIT_RESET;
adc->CTRL1 |= channel;
@@ -892,7 +892,7 @@ void ADC_ConfigAnalogWatchdogSingleChannel(ADC_T* adc, uint8_t channel)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableTempSensorVrefint(ADC_T* adc)
void ADC_EnableTempSensorVrefint(ADC_T *adc)
{
adc->CTRL2_B.TSVREFEN = BIT_SET;
}
@@ -906,7 +906,7 @@ void ADC_EnableTempSensorVrefint(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableTempSensorVrefint(ADC_T* adc)
void ADC_DisableTempSensorVrefint(ADC_T *adc)
{
adc->CTRL2_B.TSVREFEN = BIT_RESET;
}
@@ -926,7 +926,7 @@ void ADC_DisableTempSensorVrefint(ADC_T* adc)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_EnableInterrupt(ADC_T* adc, uint16_t interrupt)
void ADC_EnableInterrupt(ADC_T *adc, uint16_t interrupt)
{
uint8_t mask;
@@ -949,7 +949,7 @@ void ADC_EnableInterrupt(ADC_T* adc, uint16_t interrupt)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_DisableInterrupt(ADC_T* adc, uint16_t interrupt)
void ADC_DisableInterrupt(ADC_T *adc, uint16_t interrupt)
{
uint8_t mask;
@@ -974,7 +974,7 @@ void ADC_DisableInterrupt(ADC_T* adc, uint16_t interrupt)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadStatusFlag(ADC_T* adc, ADC_FLAG_T flag)
uint8_t ADC_ReadStatusFlag(ADC_T *adc, ADC_FLAG_T flag)
{
return (adc->STS & flag) ? SET : RESET;
}
@@ -996,7 +996,7 @@ uint8_t ADC_ReadStatusFlag(ADC_T* adc, ADC_FLAG_T flag)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ClearStatusFlag(ADC_T* adc, uint8_t flag)
void ADC_ClearStatusFlag(ADC_T *adc, uint8_t flag)
{
adc->STS = ~(uint32_t)flag;
}
@@ -1016,7 +1016,7 @@ void ADC_ClearStatusFlag(ADC_T* adc, uint8_t flag)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T flag)
uint8_t ADC_ReadIntFlag(ADC_T *adc, ADC_INT_T flag)
{
uint8_t bitStatus = RESET;
uint32_t itmask = 0;
@@ -1051,7 +1051,7 @@ uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T flag)
*
* @note adc can be ADC1, ADC2 or ADC3.
*/
void ADC_ClearIntFlag(ADC_T* adc, uint16_t flag)
void ADC_ClearIntFlag(ADC_T *adc, uint16_t flag)
{
uint8_t mask = 0;

11
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_bakpr.c
View File

@@ -128,16 +128,19 @@ void BAKPR_DisableInterrupt(void)
*/
void BAKPR_ConfigRTCOutput(BAKPR_RTC_OUTPUT_SOURCE_T soure)
{
if(soure == BAKPR_RTC_OUTPUT_SOURCE_NONE)
if (soure == BAKPR_RTC_OUTPUT_SOURCE_NONE)
{
BAKPR->CLKCAL = RESET;
} else if(soure == BAKPR_RTC_OUTPUT_SOURCE_CALIBRATION_CLOCK)
}
else if (soure == BAKPR_RTC_OUTPUT_SOURCE_CALIBRATION_CLOCK)
{
BAKPR->CLKCAL_B.CALCOEN = BIT_SET;
} else if(soure == BAKPR_RTC_OUTPUT_SOURCE_ALARM)
}
else if (soure == BAKPR_RTC_OUTPUT_SOURCE_ALARM)
{
BAKPR->CLKCAL_B.ASPOEN = BIT_SET;
} else if(soure == BAKPR_RTC_OUTPUT_SOURCE_SECOND)
}
else if (soure == BAKPR_RTC_OUTPUT_SOURCE_SECOND)
{
BAKPR->CLKCAL_B.ASPOSEL = BIT_SET;
}

200
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_can.c
View File

File diff suppressed because it is too large Load Diff

2
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_crc.c
View File

@@ -75,7 +75,7 @@ uint32_t CRC_CalculateCRC(uint32_t data)
*/
uint32_t CRC_CalculateBlockCRC(uint32_t *buf, uint32_t bufLen)
{
while(bufLen--)
while (bufLen--)
{
CRC->DATA = *buf++;
}

6
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_dac.c
View File

@@ -63,7 +63,7 @@ void DAC_Reset(void)
*
* @retval None
*/
void DAC_Config(uint32_t channel, DAC_Config_T* dacConfig)
void DAC_Config(uint32_t channel, DAC_Config_T *dacConfig)
{
uint32_t tmp1 = 0, tmp2 = 0;
@@ -88,7 +88,7 @@ void DAC_Config(uint32_t channel, DAC_Config_T* dacConfig)
*
* @retval None
*/
void DAC_ConfigStructInit(DAC_Config_T* dacConfig)
void DAC_ConfigStructInit(DAC_Config_T *dacConfig)
{
/** Initialize the DAC_Trigger member */
dacConfig->trigger = DAC_TRIGGER_NONE;
@@ -403,7 +403,7 @@ uint16_t DAC_ReadDataOutputValue(DAC_CHANNEL_T channel)
tmp += 0x0000002C + ((uint32_t)channel >> 2);
/** Returns the DAC channel data output register value */
return (uint16_t) (*(__IO uint32_t*) tmp);
return (uint16_t)(*(__IO uint32_t *) tmp);
}
/**@} end of group DAC_Fuctions*/

4
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_dbgmcu.c
View File

@@ -46,7 +46,7 @@
*/
uint32_t DBGMCU_ReadDEVID(void)
{
return(DBGMCU->IDCODE_B.EQR);
return (DBGMCU->IDCODE_B.EQR);
}
/*!
@@ -58,7 +58,7 @@ uint32_t DBGMCU_ReadDEVID(void)
*/
uint32_t DBGMCU_ReadREVID(void)
{
return(DBGMCU->IDCODE_B.WVR);
return (DBGMCU->IDCODE_B.WVR);
}
/*!

65
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_dma.c
View File

@@ -54,51 +54,51 @@ void DMA_Reset(DMA_Channel_T *channel)
channel->CHMADDR = 0;
channel->CHPADDR = 0;
if(channel == DMA1_Channel1)
if (channel == DMA1_Channel1)
{
DMA1->INTFCLR |= 0xFFFFFFF0;
}
else if(channel == DMA1_Channel2)
else if (channel == DMA1_Channel2)
{
DMA1->INTFCLR |= 0xFFFFFF0F;
}
else if(channel == DMA1_Channel3)
else if (channel == DMA1_Channel3)
{
DMA1->INTFCLR |= 0xFFFFF0FF;
}
else if(channel == DMA1_Channel4)
else if (channel == DMA1_Channel4)
{
DMA1->INTFCLR |= 0xFFFF0FFF;
}
else if(channel == DMA1_Channel5)
else if (channel == DMA1_Channel5)
{
DMA1->INTFCLR |= 0xFFF0FFFF;
}
else if(channel == DMA1_Channel6)
else if (channel == DMA1_Channel6)
{
DMA1->INTFCLR |= 0xFF0FFFFF;
}
else if(channel == DMA1_Channel7)
else if (channel == DMA1_Channel7)
{
DMA1->INTFCLR |= 0xF0FFFFFF;
}
else if(channel == DMA2_Channel1)
else if (channel == DMA2_Channel1)
{
DMA2->INTFCLR |= 0xFFFFFFF0;
}
else if(channel == DMA2_Channel2)
else if (channel == DMA2_Channel2)
{
DMA2->INTFCLR |= 0xFFFFFF0F;
}
else if(channel == DMA2_Channel3)
else if (channel == DMA2_Channel3)
{
DMA2->INTFCLR |= 0xFFFFF0FF;
}
else if(channel == DMA2_Channel4)
else if (channel == DMA2_Channel4)
{
DMA2->INTFCLR |= 0xFFFF0FFF;
}
else if(channel == DMA2_Channel5)
else if (channel == DMA2_Channel5)
{
DMA2->INTFCLR |= 0xFFF0FFFF;
}
@@ -115,7 +115,7 @@ void DMA_Reset(DMA_Channel_T *channel)
*
* @note DMA2 Channel only for APM32 High density devices.
*/
void DMA_Config(DMA_Channel_T* channel, DMA_Config_T* dmaConfig)
void DMA_Config(DMA_Channel_T *channel, DMA_Config_T *dmaConfig)
{
channel->CHCFG_B.DIRCFG = dmaConfig->dir;
channel->CHCFG_B.CIRMODE = dmaConfig->loopMode;
@@ -138,7 +138,7 @@ void DMA_Config(DMA_Channel_T* channel, DMA_Config_T* dmaConfig)
*
* @retval None
*/
void DMA_ConfigStructInit( DMA_Config_T* dmaConfig)
void DMA_ConfigStructInit(DMA_Config_T *dmaConfig)
{
dmaConfig->peripheralBaseAddr = 0;
dmaConfig->memoryBaseAddr = 0;
@@ -312,22 +312,24 @@ void DMA_DisableInterrupt(DMA_Channel_T *channel, uint32_t interrupt)
*/
uint8_t DMA_ReadStatusFlag(DMA_FLAG_T flag)
{
if((flag & 0x10000000) != RESET )
if ((flag & 0x10000000) != RESET)
{
if((DMA2->INTSTS & flag ) != RESET )
if ((DMA2->INTSTS & flag) != RESET)
{
return SET ;
} else
}
else
{
return RESET ;
}
}
else
{
if((DMA1->INTSTS & flag ) != RESET )
if ((DMA1->INTSTS & flag) != RESET)
{
return SET ;
} else
}
else
{
return RESET ;
}
@@ -395,10 +397,11 @@ uint8_t DMA_ReadStatusFlag(DMA_FLAG_T flag)
*/
void DMA_ClearStatusFlag(uint32_t flag)
{
if((flag & 0x10000000) != RESET)
if ((flag & 0x10000000) != RESET)
{
DMA2->INTFCLR = flag;
} else
}
else
{
DMA1->INTFCLR = flag;
}
@@ -465,21 +468,24 @@ void DMA_ClearStatusFlag(uint32_t flag)
*/
uint8_t DMA_ReadIntFlag(DMA_INT_FLAG_T flag)
{
if((flag & 0x10000000) != RESET )
if ((flag & 0x10000000) != RESET)
{
if((DMA2->INTSTS & flag ) != RESET )
if ((DMA2->INTSTS & flag) != RESET)
{
return SET ;
} else
}
else
{
return RESET ;
}
} else
}
else
{
if((DMA1->INTSTS & flag ) != RESET )
if ((DMA1->INTSTS & flag) != RESET)
{
return SET ;
} else
}
else
{
return RESET ;
}
@@ -546,10 +552,11 @@ uint8_t DMA_ReadIntFlag(DMA_INT_FLAG_T flag)
*/
void DMA_ClearIntFlag(uint32_t flag)
{
if((flag & 0x10000000) != RESET)
if ((flag & 0x10000000) != RESET)
{
DMA2->INTFCLR = flag;
} else
}
else
{
DMA1->INTFCLR = flag;
}

12
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_dmc.c
View File

@@ -45,10 +45,10 @@
*
* @retval None
*/
void DMC_Config(DMC_Config_T * dmcConfig)
void DMC_Config(DMC_Config_T *dmcConfig)
{
DMC->SW_B.MCSW = 1;
while(!DMC->CTRL1_B.INIT);
while (!DMC->CTRL1_B.INIT);
DMC->CFG_B.BAWCFG = dmcConfig->bankWidth;
DMC->CFG_B.RAWCFG = dmcConfig->rowWidth;
@@ -60,7 +60,7 @@ void DMC_Config(DMC_Config_T * dmcConfig)
DMC_ConfigTiming(&dmcConfig->timing);
DMC->CTRL1_B.MODESET = 1;
while(!DMC->CTRL1_B.MODESET);
while (!DMC->CTRL1_B.MODESET);
DMC->CTRL2_B.RDDEN = 1;
DMC->CTRL2_B.RDDCFG = 7;
@@ -73,7 +73,7 @@ void DMC_Config(DMC_Config_T * dmcConfig)
*
* @retval None
*/
void DMC_ConfigStructInit(DMC_Config_T * dmcConfig)
void DMC_ConfigStructInit(DMC_Config_T *dmcConfig)
{
dmcConfig->bankWidth = DMC_BANK_WIDTH_2;
dmcConfig->clkPhase = DMC_CLK_PHASE_REVERSE;
@@ -91,7 +91,7 @@ void DMC_ConfigStructInit(DMC_Config_T * dmcConfig)
*
* @retval None
*/
void DMC_ConfigTiming(DMC_TimingConfig_T * timingConfig)
void DMC_ConfigTiming(DMC_TimingConfig_T *timingConfig)
{
DMC->TIM0_B.RASMINTSEL = timingConfig->tRAS;
DMC->TIM0_B.DTIMSEL = timingConfig->tRCD;
@@ -116,7 +116,7 @@ void DMC_ConfigTiming(DMC_TimingConfig_T * timingConfig)
*
* @retval None
*/
void DMC_ConfigTimingStructInit(DMC_TimingConfig_T * timingConfig)
void DMC_ConfigTimingStructInit(DMC_TimingConfig_T *timingConfig)
{
timingConfig->latencyCAS = DMC_CAS_LATENCY_3;
timingConfig->tARP = DMC_AUTO_REFRESH_10;

10
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_eint.c
View File

@@ -60,12 +60,12 @@ void EINT_Reset(void)
*
* @retval None
*/
void EINT_Config(EINT_Config_T* eintConfig)
void EINT_Config(EINT_Config_T *eintConfig)
{
uint32_t temp = 0;
temp = (uint32_t)EINT_BASE;
if(eintConfig->lineCmd != DISABLE)
if (eintConfig->lineCmd != DISABLE)
{
EINT->IMASK &= ~eintConfig->line;
EINT->EMASK &= ~eintConfig->line;
@@ -104,7 +104,7 @@ void EINT_Config(EINT_Config_T* eintConfig)
*
* @retval None
*/
void EINT_ConfigStructInit(EINT_Config_T* eintConfig)
void EINT_ConfigStructInit(EINT_Config_T *eintConfig)
{
eintConfig->line = EINT_LINENONE;
eintConfig->mode = EINT_MODE_INTERRUPT;
@@ -137,7 +137,7 @@ uint8_t EINT_ReadStatusFlag(EINT_LINE_T line)
{
uint8_t status = RESET;
if((EINT->IPEND & line) != (uint32_t)RESET)
if ((EINT->IPEND & line) != (uint32_t)RESET)
{
status = SET;
}
@@ -176,7 +176,7 @@ uint8_t EINT_ReadIntFlag(EINT_LINE_T line)
enablestatus = EINT->IMASK & line;
if((EINT->IPEND & line) != ((uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
if ((EINT->IPEND & line) != ((uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
{
status = SET;
}

82
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_emmc.c
View File

@@ -53,7 +53,7 @@
void EMMC_ResetNORSRAM(EMMC_BANK1_NORSRAM_T bank)
{
/** EMMC_BANK1_NORSRAM_1 */
if(bank == EMMC_BANK1_NORSRAM_1)
if (bank == EMMC_BANK1_NORSRAM_1)
{
EMMC_Bank1->SNCTRL_T[bank] = 0x000030DB;
}
@@ -78,7 +78,7 @@ void EMMC_ResetNORSRAM(EMMC_BANK1_NORSRAM_T bank)
*/
void EMMC_ResetNAND(EMMC_BANK_NAND_T bank)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
/** Set the EMMC_Bank2 registers to their reset values */
EMMC_Bank2->CTRL2 = 0x00000018;
@@ -121,7 +121,7 @@ void EMMC_ResetPCCard(void)
*
* @retval None
*/
void EMMC_ConfigNORSRAM(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
void EMMC_ConfigNORSRAM(EMMC_NORSRAMConfig_T *emmcNORSRAMConfig)
{
/** Bank1 NOR/SRAM control register configuration */
EMMC_Bank1->SNCTRL_T[emmcNORSRAMConfig->bank] =
@@ -138,7 +138,7 @@ void EMMC_ConfigNORSRAM(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
emmcNORSRAMConfig->extendedMode |
emmcNORSRAMConfig->writeBurst;
if(emmcNORSRAMConfig->memoryType == EMMC_MEMORY_TYPE_NOR)
if (emmcNORSRAMConfig->memoryType == EMMC_MEMORY_TYPE_NOR)
{
EMMC_Bank1->SNCTRL_T[emmcNORSRAMConfig->bank] |= 0x00000040;
}
@@ -154,7 +154,7 @@ void EMMC_ConfigNORSRAM(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
emmcNORSRAMConfig->readWriteTimingStruct->accessMode;
/** Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */
if(emmcNORSRAMConfig->extendedMode == EMMC_EXTENDEN_MODE_ENABLE)
if (emmcNORSRAMConfig->extendedMode == EMMC_EXTENDEN_MODE_ENABLE)
{
EMMC_Bank1E->WRTTIM[emmcNORSRAMConfig->bank] =
(uint32_t)emmcNORSRAMConfig->writeTimingStruct->addressSetupTime |
@@ -177,7 +177,7 @@ void EMMC_ConfigNORSRAM(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
*
* @retval None
*/
void EMMC_ConfigNAND(EMMC_NANDConfig_T* emmcNANDConfig)
void EMMC_ConfigNAND(EMMC_NANDConfig_T *emmcNANDConfig)
{
uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000;
@@ -201,7 +201,7 @@ void EMMC_ConfigNAND(EMMC_NANDConfig_T* emmcNANDConfig)
(emmcNANDConfig->attributeSpaceTimingStruct->holdSetupTime << 16) |
(emmcNANDConfig->attributeSpaceTimingStruct->HiZSetupTime << 24);
if(emmcNANDConfig->bank == EMMC_BANK2_NAND)
if (emmcNANDConfig->bank == EMMC_BANK2_NAND)
{
/** EMMC_BANK2_NAND registers configuration */
EMMC_Bank2->CTRL2 = tmppcr;
@@ -225,30 +225,30 @@ void EMMC_ConfigNAND(EMMC_NANDConfig_T* emmcNANDConfig)
*
* @retval None
*/
void EMMC_ConfigPCCard(EMMC_PCCARDConfig_T* emmcPCCardConfig)
void EMMC_ConfigPCCard(EMMC_PCCARDConfig_T *emmcPCCardConfig)
{
/** Set the PCR4 register value according to EMMC_PCCARDInitStruct parameters */
EMMC_Bank4->CTRL4 = (uint32_t)emmcPCCardConfig->waitFeature | EMMC_MEMORY_DATA_WIDTH_16BIT |
(emmcPCCardConfig->TCLRSetupTime << 9) |
(emmcPCCardConfig->TARSetupTime << 13);
(emmcPCCardConfig->TCLRSetupTime << 9) |
(emmcPCCardConfig->TARSetupTime << 13);
/** Set PMEM4 register value according to EMMC_CommonSpaceTimingStructure parameters */
EMMC_Bank4->CMSTIM4 = (uint32_t)emmcPCCardConfig->commonSpaceTimingStruct->setupTime |
(emmcPCCardConfig->commonSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->commonSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->commonSpaceTimingStruct->HiZSetupTime << 24);
(emmcPCCardConfig->commonSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->commonSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->commonSpaceTimingStruct->HiZSetupTime << 24);
/** Set PATT4 register value according to EMMC_AttributeSpaceTimingStructure parameters */
EMMC_Bank4->AMSTIM4 = (uint32_t)emmcPCCardConfig->attributeSpaceTimingStruct->setupTime |
(emmcPCCardConfig->attributeSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->attributeSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->attributeSpaceTimingStruct->HiZSetupTime << 24);
(emmcPCCardConfig->attributeSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->attributeSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->attributeSpaceTimingStruct->HiZSetupTime << 24);
/** Set PIO4 register value according to EMMC_IOSpaceTimingStructure parameters */
EMMC_Bank4->IOSTIM4 = (uint32_t)emmcPCCardConfig->IOSpaceTimingStruct->setupTime |
(emmcPCCardConfig->IOSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->IOSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->IOSpaceTimingStruct->HiZSetupTime << 24);
(emmcPCCardConfig->IOSpaceTimingStruct->waitSetupTime << 8) |
(emmcPCCardConfig->IOSpaceTimingStruct->holdSetupTime << 16) |
(emmcPCCardConfig->IOSpaceTimingStruct->HiZSetupTime << 24);
}
/*!
@@ -258,7 +258,7 @@ void EMMC_ConfigPCCard(EMMC_PCCARDConfig_T* emmcPCCardConfig)
*
* @retval None
*/
void EMMC_ConfigNORSRAMStructInit(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
void EMMC_ConfigNORSRAMStructInit(EMMC_NORSRAMConfig_T *emmcNORSRAMConfig)
{
/** Reset NOR/SRAM Init structure parameters values */
emmcNORSRAMConfig->bank = EMMC_BANK1_NORSRAM_1;
@@ -298,7 +298,7 @@ void EMMC_ConfigNORSRAMStructInit(EMMC_NORSRAMConfig_T* emmcNORSRAMConfig)
*
* @retval None
*/
void EMMC_ConfigNANDStructInit(EMMC_NANDConfig_T* emmcNANDConfig)
void EMMC_ConfigNANDStructInit(EMMC_NANDConfig_T *emmcNANDConfig)
{
/** Reset NAND Init structure parameters values */
emmcNANDConfig->bank = EMMC_BANK2_NAND;
@@ -325,7 +325,7 @@ void EMMC_ConfigNANDStructInit(EMMC_NANDConfig_T* emmcNANDConfig)
*
* @retval None
*/
void EMMC_ConfigPCCardStructInit(EMMC_PCCARDConfig_T* emmcPCCardConfig)
void EMMC_ConfigPCCardStructInit(EMMC_PCCARDConfig_T *emmcPCCardConfig)
{
/** Reset PCCARD Init structure parameters values */
emmcPCCardConfig->waitFeature = EMMC_WAIT_FEATURE_DISABLE;
@@ -391,7 +391,7 @@ void EMMC_DisableNORSRAM(EMMC_BANK1_NORSRAM_T bank)
*/
void EMMC_EnableNAND(EMMC_BANK_NAND_T bank)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->CTRL2_B.MBKEN = BIT_SET;
}
@@ -413,7 +413,7 @@ void EMMC_EnableNAND(EMMC_BANK_NAND_T bank)
*/
void EMMC_DisableNAND(EMMC_BANK_NAND_T bank)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->CTRL2_B.MBKEN = BIT_RESET;
}
@@ -459,7 +459,7 @@ void EMMC_DisablePCCARD(void)
*/
void EMMC_EnableNANDECC(EMMC_BANK_NAND_T bank)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->CTRL2 |= 0x00000040;
}
@@ -482,7 +482,7 @@ void EMMC_EnableNANDECC(EMMC_BANK_NAND_T bank)
*/
void EMMC_DisableNANDECC(EMMC_BANK_NAND_T bank)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->CTRL2 &= 0x000FFFBF;
}
@@ -506,7 +506,7 @@ uint32_t EMMC_ReadECC(EMMC_BANK_NAND_T bank)
{
uint32_t eccval = 0x00000000;
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
eccval = EMMC_Bank2->ECCRS2;
}
@@ -536,11 +536,11 @@ uint32_t EMMC_ReadECC(EMMC_BANK_NAND_T bank)
*/
void EMMC_EnableInterrupt(EMMC_BANK_NAND_T bank, uint32_t interrupt)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->STSINT2 |= interrupt;
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
EMMC_Bank3->STSINT3 |= interrupt;
}
@@ -569,11 +569,11 @@ void EMMC_EnableInterrupt(EMMC_BANK_NAND_T bank, uint32_t interrupt)
*/
void EMMC_DisableInterrupt(EMMC_BANK_NAND_T bank, uint32_t interrupt)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->STSINT2 &= ~interrupt;
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
EMMC_Bank3->STSINT3 &= ~interrupt;
}
@@ -606,11 +606,11 @@ uint8_t EMMC_ReadStatusFlag(EMMC_BANK_NAND_T bank, EMMC_FLAG_T flag)
{
uint32_t tmpsr = 0x00000000;
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
tmpsr = EMMC_Bank2->STSINT2;
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
tmpsr = EMMC_Bank3->STSINT3;
}
@@ -619,7 +619,7 @@ uint8_t EMMC_ReadStatusFlag(EMMC_BANK_NAND_T bank, EMMC_FLAG_T flag)
tmpsr = EMMC_Bank4->STSINT4;
}
/** Get the flag status */
if((tmpsr & flag) != RESET)
if ((tmpsr & flag) != RESET)
{
return SET;
}
@@ -648,11 +648,11 @@ uint8_t EMMC_ReadStatusFlag(EMMC_BANK_NAND_T bank, EMMC_FLAG_T flag)
*/
void EMMC_ClearStatusFlag(EMMC_BANK_NAND_T bank, uint32_t flag)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->STSINT2 &= ~flag;
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
EMMC_Bank3->STSINT3 &= ~flag;
}
@@ -683,11 +683,11 @@ uint8_t EMMC_ReadIntFlag(EMMC_BANK_NAND_T bank, EMMC_INT_T flag)
{
uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0;
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
tmpsr = EMMC_Bank2->STSINT2;
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
tmpsr = EMMC_Bank3->STSINT3;
}
@@ -699,7 +699,7 @@ uint8_t EMMC_ReadIntFlag(EMMC_BANK_NAND_T bank, EMMC_INT_T flag)
itstatus = tmpsr & flag;
itenable = tmpsr & (flag >> 3);
if((itstatus != RESET) && (itenable != RESET))
if ((itstatus != RESET) && (itenable != RESET))
{
return SET;
}
@@ -728,11 +728,11 @@ uint8_t EMMC_ReadIntFlag(EMMC_BANK_NAND_T bank, EMMC_INT_T flag)
*/
void EMMC_ClearIntFlag(EMMC_BANK_NAND_T bank, uint32_t flag)
{
if(bank == EMMC_BANK2_NAND)
if (bank == EMMC_BANK2_NAND)
{
EMMC_Bank2->STSINT2 &= ~(flag >> 3);
}
else if(bank == EMMC_BANK3_NAND)
else if (bank == EMMC_BANK3_NAND)
{
EMMC_Bank3->STSINT3 &= ~(flag >> 3);
}

104
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_fmc.c
View File

@@ -140,7 +140,7 @@ FMC_STATUS_T FMC_ErasePage(uint32_t pageAddr)
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.PAGEERA = BIT_SET;
FMC->ADDR = pageAddr;
@@ -168,7 +168,7 @@ FMC_STATUS_T FMC_EraseAllPage(void)
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.MASSERA = BIT_SET;
FMC->CTRL2_B.STA = BIT_SET;
@@ -195,12 +195,12 @@ FMC_STATUS_T FMC_EraseOptionBytes(void)
uint16_t rdtemp = 0x00A5;
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
if(FMC_GetReadProtectionStatus() != RESET)
if (FMC_GetReadProtectionStatus() != RESET)
{
rdtemp = 0x00;
}
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->OBKEY = 0x45670123;
FMC->OBKEY = 0xCDEF89AB;
@@ -210,18 +210,18 @@ FMC_STATUS_T FMC_EraseOptionBytes(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.OBE = BIT_RESET;
FMC->CTRL2_B.OBP = BIT_SET;
OB->RDP = rdtemp;
status = FMC_WaitForLastOperation(0x000B0000);
if(status != FMC_STATUS_TIMEOUT)
if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
}
else if(status != FMC_STATUS_TIMEOUT)
else if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
@@ -247,13 +247,13 @@ FMC_STATUS_T FMC_ProgramWord(uint32_t address, uint32_t data)
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
__IOM uint32_t temp = 0;
#ifdef APM32F10X_HD
__set_PRIMASK(1);
#endif
#ifdef APM32F10X_HD
__set_PRIMASK(1);
#endif
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.PG = BIT_SET;
@@ -261,11 +261,11 @@ FMC_STATUS_T FMC_ProgramWord(uint32_t address, uint32_t data)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
temp = address + 2;
*(__IOM uint16_t*) temp = data >> 16;
*(__IOM uint16_t *) temp = data >> 16;
status = FMC_WaitForLastOperation(0x000B0000);
FMC->CTRL2_B.PG = BIT_RESET;
@@ -276,9 +276,9 @@ FMC_STATUS_T FMC_ProgramWord(uint32_t address, uint32_t data)
}
}
#ifdef APM32F10X_HD
__set_PRIMASK(0);
#endif
#ifdef APM32F10X_HD
__set_PRIMASK(0);
#endif
return status;
}
@@ -300,13 +300,13 @@ FMC_STATUS_T FMC_ProgramHalfWord(uint32_t address, uint16_t data)
{
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
#ifdef APM32F10X_HD
__set_PRIMASK(1);
#endif
#ifdef APM32F10X_HD
__set_PRIMASK(1);
#endif
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.PG = BIT_SET;
*(__IOM uint16_t *)address = data;
@@ -314,9 +314,9 @@ FMC_STATUS_T FMC_ProgramHalfWord(uint32_t address, uint16_t data)
FMC->CTRL2_B.PG = BIT_RESET;
}
#ifdef APM32F10X_HD
__set_PRIMASK(0);
#endif
#ifdef APM32F10X_HD
__set_PRIMASK(0);
#endif
return status;
}
@@ -340,7 +340,7 @@ FMC_STATUS_T FMC_ProgramOptionByteData(uint32_t address, uint8_t data)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->OBKEY = 0x45670123;
FMC->OBKEY = 0xCDEF89AB;
@@ -348,7 +348,7 @@ FMC_STATUS_T FMC_ProgramOptionByteData(uint32_t address, uint8_t data)
FMC->CTRL2_B.OBP = BIT_SET;
*(__IOM uint16_t *)address = data;
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_TIMEOUT)
if (status == FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
@@ -388,34 +388,34 @@ FMC_STATUS_T FMC_EnableWriteProtection(uint32_t page)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->OBKEY = 0x45670123;
FMC->OBKEY = 0xCDEF89AB;
FMC->CTRL2_B.OBP = BIT_SET;
if(WPP0_Data != 0xFF)
if (WPP0_Data != 0xFF)
{
OB->WRP0 = WPP0_Data;
status = FMC_WaitForLastOperation(0x000B0000);
}
if((status == FMC_STATUS_COMPLETE) && (WPP1_Data != 0xFF))
if ((status == FMC_STATUS_COMPLETE) && (WPP1_Data != 0xFF))
{
OB->WRP1 = WPP1_Data;
status = FMC_WaitForLastOperation(0x000B0000);
}
if((status == FMC_STATUS_COMPLETE) && (WPP2_Data != 0xFF))
if ((status == FMC_STATUS_COMPLETE) && (WPP2_Data != 0xFF))
{
OB->WRP2 = WPP2_Data;
status = FMC_WaitForLastOperation(0x000B0000);
}
if((status == FMC_STATUS_COMPLETE) && (WPP3_Data != 0xFF))
if ((status == FMC_STATUS_COMPLETE) && (WPP3_Data != 0xFF))
{
OB->WRP3 = WPP3_Data;
status = FMC_WaitForLastOperation(0x000B0000);
}
if(status != FMC_STATUS_TIMEOUT)
if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
@@ -440,7 +440,7 @@ FMC_STATUS_T FMC_EnableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->OBKEY = 0x45670123;
FMC->OBKEY = 0xCDEF89AB;
@@ -450,7 +450,7 @@ FMC_STATUS_T FMC_EnableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.OBE = BIT_RESET;
FMC->CTRL2_B.OBP = BIT_SET;
@@ -458,12 +458,12 @@ FMC_STATUS_T FMC_EnableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status != FMC_STATUS_TIMEOUT)
if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
}
else if(status != FMC_STATUS_TIMEOUT)
else if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBE = BIT_RESET;
}
@@ -488,7 +488,7 @@ FMC_STATUS_T FMC_DisableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->OBKEY = 0x45670123;
FMC->OBKEY = 0xCDEF89AB;
@@ -497,7 +497,7 @@ FMC_STATUS_T FMC_DisableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.OBE = BIT_RESET;
FMC->CTRL2_B.OBP = BIT_SET;
@@ -505,12 +505,12 @@ FMC_STATUS_T FMC_DisableReadOutProtection(void)
status = FMC_WaitForLastOperation(0x000B0000);
if(status != FMC_STATUS_TIMEOUT)
if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
}
else if(status != FMC_STATUS_TIMEOUT)
else if (status != FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBE = BIT_RESET;
}
@@ -529,7 +529,7 @@ FMC_STATUS_T FMC_DisableReadOutProtection(void)
* @arg FMC_STATUS_COMPLETE
* @arg FMC_STATUS_TIMEOUT
*/
FMC_STATUS_T FMC_ConfigUserOptionByte(FMC_UserConfig_T* userConfig)
FMC_STATUS_T FMC_ConfigUserOptionByte(FMC_UserConfig_T *userConfig)
{
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
@@ -538,14 +538,14 @@ FMC_STATUS_T FMC_ConfigUserOptionByte(FMC_UserConfig_T* userConfig)
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_COMPLETE)
if (status == FMC_STATUS_COMPLETE)
{
FMC->CTRL2_B.OBP = BIT_SET;
OB->USER = (uint32_t)userConfig->iwdtSet | \
(uint32_t)userConfig->stopSet | \
(uint32_t)userConfig->stdbySet | 0xF8;
status = FMC_WaitForLastOperation(0x000B0000);
if(status == FMC_STATUS_TIMEOUT)
if (status == FMC_STATUS_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
@@ -588,7 +588,7 @@ uint8_t FMC_GetReadProtectionStatus(void)
{
uint8_t flagstatus = RESET;
if(FMC->OBCS_B.READPROT != RESET)
if (FMC->OBCS_B.READPROT != RESET)
{
flagstatus = SET;
}
@@ -623,7 +623,7 @@ uint8_t FMC_ReadPrefetchBufferStatus(void)
*/
void FMC_EnableInterrupt(FMC_INT_T interrupt)
{
if(interrupt == FMC_INT_ERR)
if (interrupt == FMC_INT_ERR)
{
FMC->CTRL2_B.ERRIE = ENABLE;
}
@@ -645,7 +645,7 @@ void FMC_EnableInterrupt(FMC_INT_T interrupt)
*/
void FMC_DisableInterrupt(FMC_INT_T interrupt)
{
if(interrupt == FMC_INT_ERR)
if (interrupt == FMC_INT_ERR)
{
FMC->CTRL2_B.ERRIE = DISABLE;
}
@@ -670,11 +670,11 @@ void FMC_DisableInterrupt(FMC_INT_T interrupt)
*/
uint8_t FMC_ReadStatusFlag(FMC_FLAG_T flag)
{
if(flag == FMC_FLAG_OBE)
if (flag == FMC_FLAG_OBE)
{
return FMC->OBCS_B.OBE;
}
else if((FMC->STS & flag ) != RESET)
else if ((FMC->STS & flag) != RESET)
{
return SET;
}
@@ -713,15 +713,15 @@ FMC_STATUS_T FMC_ReadStatus(void)
{
FMC_STATUS_T status = FMC_STATUS_COMPLETE;
if(FMC->STS_B.BUSYF == BIT_SET)
if (FMC->STS_B.BUSYF == BIT_SET)
{
status = FMC_STATUS_BUSY;
}
else if(FMC->STS_B.PEF == BIT_SET)
else if (FMC->STS_B.PEF == BIT_SET)
{
status = FMC_STATUS_ERROR_PG;
}
else if(FMC->STS_B.WPEF == BIT_SET)
else if (FMC->STS_B.WPEF == BIT_SET)
{
status = FMC_STATUS_ERROR_WRP;
}
@@ -751,12 +751,12 @@ FMC_STATUS_T FMC_WaitForLastOperation(uint32_t timeOut)
status = FMC_ReadStatus();
/** Wait for a Flash operation to complete or a TIMEOUT to occur */
while((status == FMC_STATUS_BUSY) && (timeOut !=0))
while ((status == FMC_STATUS_BUSY) && (timeOut != 0))
{
status = FMC_ReadStatus();
timeOut--;
}
if(timeOut == 0x00)
if (timeOut == 0x00)
{
status = FMC_STATUS_TIMEOUT;
}

34
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_gpio.c
View File

@@ -46,7 +46,7 @@
*
* @retval None
*/
void GPIO_Reset(GPIO_T* port)
void GPIO_Reset(GPIO_T *port)
{
RCM_APB2_PERIPH_T APB2Periph;
@@ -106,7 +106,7 @@ void GPIO_AFIOReset(void)
*
* @retval None
*/
void GPIO_Config(GPIO_T* port, GPIO_Config_T* gpioConfig)
void GPIO_Config(GPIO_T *port, GPIO_Config_T *gpioConfig)
{
uint8_t i;
uint32_t mode;
@@ -181,7 +181,7 @@ void GPIO_Config(GPIO_T* port, GPIO_Config_T* gpioConfig)
*
* @retval None
*/
void GPIO_ConfigStructInit(GPIO_Config_T* gpioConfig)
void GPIO_ConfigStructInit(GPIO_Config_T *gpioConfig)
{
gpioConfig->pin = GPIO_PIN_ALL;
gpioConfig->speed = GPIO_SPEED_20MHz;
@@ -199,7 +199,7 @@ void GPIO_ConfigStructInit(GPIO_Config_T* gpioConfig)
*
* @retval The input port pin value
*/
uint8_t GPIO_ReadInputBit(GPIO_T* port, uint16_t pin)
uint8_t GPIO_ReadInputBit(GPIO_T *port, uint16_t pin)
{
uint8_t ret;
@@ -216,7 +216,7 @@ uint8_t GPIO_ReadInputBit(GPIO_T* port, uint16_t pin)
*
* @retval GPIO input data port value
*/
uint16_t GPIO_ReadInputPort(GPIO_T* port)
uint16_t GPIO_ReadInputPort(GPIO_T *port)
{
return ((uint16_t)port->IDATA);
}
@@ -232,7 +232,7 @@ uint16_t GPIO_ReadInputPort(GPIO_T* port)
*
* @retval The output port pin value
*/
uint8_t GPIO_ReadOutputBit(GPIO_T* port, uint16_t pin)
uint8_t GPIO_ReadOutputBit(GPIO_T *port, uint16_t pin)
{
uint8_t ret;
@@ -250,7 +250,7 @@ uint8_t GPIO_ReadOutputBit(GPIO_T* port, uint16_t pin)
*
* @retval output data port value
*/
uint16_t GPIO_ReadOutputPort(GPIO_T* port)
uint16_t GPIO_ReadOutputPort(GPIO_T *port)
{
return ((uint16_t)port->ODATA);
}
@@ -266,7 +266,7 @@ uint16_t GPIO_ReadOutputPort(GPIO_T* port)
*
* @retval None
*/
void GPIO_SetBit(GPIO_T* port, uint16_t pin)
void GPIO_SetBit(GPIO_T *port, uint16_t pin)
{
port->BSC = (uint32_t)pin;
}
@@ -282,7 +282,7 @@ void GPIO_SetBit(GPIO_T* port, uint16_t pin)
*
* @retval None
*/
void GPIO_ResetBit(GPIO_T* port, uint16_t pin)
void GPIO_ResetBit(GPIO_T *port, uint16_t pin)
{
port->BC = (uint32_t)pin;
}
@@ -304,7 +304,7 @@ void GPIO_ResetBit(GPIO_T* port, uint16_t pin)
*
* @retval None
*/
void GPIO_WriteBitValue(GPIO_T* port, uint16_t pin, uint8_t bitVal)
void GPIO_WriteBitValue(GPIO_T *port, uint16_t pin, uint8_t bitVal)
{
if (bitVal != BIT_RESET)
{
@@ -326,7 +326,7 @@ void GPIO_WriteBitValue(GPIO_T* port, uint16_t pin, uint8_t bitVal)
*
* @retval None
*/
void GPIO_WriteOutputPort(GPIO_T* port, uint16_t portValue)
void GPIO_WriteOutputPort(GPIO_T *port, uint16_t portValue)
{
port->ODATA = (uint32_t)portValue;
}
@@ -342,7 +342,7 @@ void GPIO_WriteOutputPort(GPIO_T* port, uint16_t portValue)
*
* @retval None
*/
void GPIO_ConfigPinLock(GPIO_T* port, uint16_t pin)
void GPIO_ConfigPinLock(GPIO_T *port, uint16_t pin)
{
uint32_t val = 0x00010000;
@@ -471,7 +471,7 @@ void GPIO_ConfigPinRemap(GPIO_REMAP_T remap)
regVal = AFIO->REMAP1;
}
if(remap >> 8 == 0x18)
if (remap >> 8 == 0x18)
{
regVal &= 0xF0FFFFFF;
AFIO->REMAP1 &= 0xF0FFFFFF;
@@ -514,28 +514,28 @@ void GPIO_ConfigEINTLine(GPIO_PORT_SOURCE_T portSource, GPIO_PIN_SOURCE_T pinSou
if (pinSource <= GPIO_PIN_SOURCE_3)
{
shift = pinSource << 2;
AFIO->EINTSEL1 &= (uint32_t )~(0x0f << shift);
AFIO->EINTSEL1 &= (uint32_t)~(0x0f << shift);
AFIO->EINTSEL1 |= portSource << shift;
}
else if (pinSource <= GPIO_PIN_SOURCE_7)
{
shift = (pinSource - GPIO_PIN_SOURCE_4) << 2;
AFIO->EINTSEL2 &= (uint32_t )~(0x0f << shift);
AFIO->EINTSEL2 &= (uint32_t)~(0x0f << shift);
AFIO->EINTSEL2 |= portSource << shift;
}
else if (pinSource <= GPIO_PIN_SOURCE_11)
{
shift = (pinSource - GPIO_PIN_SOURCE_8) << 2;
AFIO->EINTSEL3 &= (uint32_t )~(0x0f << shift);
AFIO->EINTSEL3 &= (uint32_t)~(0x0f << shift);
AFIO->EINTSEL3 |= portSource << shift;
}
else if (pinSource <= GPIO_PIN_SOURCE_15)
{
shift = (pinSource - GPIO_PIN_SOURCE_12) << 2;
AFIO->EINTSEL4 &= (uint32_t )~(0x0f << shift);
AFIO->EINTSEL4 &= (uint32_t)~(0x0f << shift);
AFIO->EINTSEL4 |= portSource << shift;
}
}

120
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_i2c.c
View File

@@ -45,9 +45,9 @@
*
* @retval None
*/
void I2C_Reset(I2C_T* i2c)
void I2C_Reset(I2C_T *i2c)
{
if(i2c == I2C1)
if (i2c == I2C1)
{
RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_I2C1);
RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_I2C1);
@@ -68,7 +68,7 @@ void I2C_Reset(I2C_T* i2c)
*
* @retval None
*/
void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig)
void I2C_Config(I2C_T *i2c, I2C_Config_T *i2cConfig)
{
uint16_t tmpreg = 0, freqrange = 0;
uint32_t PCLK1 = 8000000, PCLK2 = 0;
@@ -79,15 +79,15 @@ void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig)
/** I2C CTRL2 Configuration */
RCM_ReadPCLKFreq(&PCLK1, &PCLK2);
freqrange = PCLK1 / 1000000;
i2c->CTRL2_B.CLKFCFG= freqrange;
i2c->CTRL2_B.CLKFCFG = freqrange;
/** I2C CLKCTRL Configuration */
i2c->CTRL1_B.I2CEN = BIT_RESET;
if(i2cConfig->clockSpeed <= 100000)
if (i2cConfig->clockSpeed <= 100000)
{
result = (PCLK1 / (i2cConfig->clockSpeed << 1));
if(result < 0x04)
if (result < 0x04)
{
result = 0x04;
}
@@ -97,7 +97,7 @@ void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig)
/** Configure speed in fast mode */
else
{
if(i2cConfig->dutyCycle == I2C_DUTYCYCLE_2)
if (i2cConfig->dutyCycle == I2C_DUTYCYCLE_2)
{
result = (PCLK1 / (i2cConfig->clockSpeed * 3));
}
@@ -107,7 +107,7 @@ void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig)
result |= I2C_DUTYCYCLE_16_9;
}
if((result & 0x0FFF) == 0)
if ((result & 0x0FFF) == 0)
{
result |= 0x0001;
}
@@ -136,7 +136,7 @@ void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig)
*
* @retval None
*/
void I2C_ConfigStructInit(I2C_Config_T* i2cConfig)
void I2C_ConfigStructInit(I2C_Config_T *i2cConfig)
{
i2cConfig->clockSpeed = 5000;
i2cConfig->mode = I2C_MODE_I2C;
@@ -153,7 +153,7 @@ void I2C_ConfigStructInit(I2C_Config_T* i2cConfig)
*
* @retval None
*/
void I2C_Enable(I2C_T* i2c)
void I2C_Enable(I2C_T *i2c)
{
i2c->CTRL1_B.I2CEN = ENABLE;
}
@@ -165,7 +165,7 @@ void I2C_Enable(I2C_T* i2c)
*
* @retval None
*/
void I2C_Disable(I2C_T* i2c)
void I2C_Disable(I2C_T *i2c)
{
i2c->CTRL1_B.I2CEN = DISABLE;
}
@@ -177,7 +177,7 @@ void I2C_Disable(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableGenerateStart(I2C_T* i2c)
void I2C_EnableGenerateStart(I2C_T *i2c)
{
i2c->CTRL1_B.START = BIT_SET;
}
@@ -189,7 +189,7 @@ void I2C_EnableGenerateStart(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableGenerateStart(I2C_T* i2c)
void I2C_DisableGenerateStart(I2C_T *i2c)
{
i2c->CTRL1_B.START = BIT_RESET;
}
@@ -201,7 +201,7 @@ void I2C_DisableGenerateStart(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableGenerateStop(I2C_T* i2c)
void I2C_EnableGenerateStop(I2C_T *i2c)
{
i2c->CTRL1_B.STOP = BIT_SET;
}
@@ -213,7 +213,7 @@ void I2C_EnableGenerateStop(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableGenerateStop(I2C_T* i2c)
void I2C_DisableGenerateStop(I2C_T *i2c)
{
i2c->CTRL1_B.STOP = BIT_RESET;
}
@@ -225,7 +225,7 @@ void I2C_DisableGenerateStop(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableAcknowledge(I2C_T* i2c)
void I2C_EnableAcknowledge(I2C_T *i2c)
{
i2c->CTRL1_B.ACKEN = ENABLE;
}
@@ -237,7 +237,7 @@ void I2C_EnableAcknowledge(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableAcknowledge(I2C_T* i2c)
void I2C_DisableAcknowledge(I2C_T *i2c)
{
i2c->CTRL1_B.ACKEN = DISABLE;
}
@@ -251,7 +251,7 @@ void I2C_DisableAcknowledge(I2C_T* i2c)
*
* @retval None
*/
void I2C_ConfigOwnAddress2(I2C_T* i2c, uint8_t address)
void I2C_ConfigOwnAddress2(I2C_T *i2c, uint8_t address)
{
i2c->SADDR2_B.ADDR2 = address;
}
@@ -263,7 +263,7 @@ void I2C_ConfigOwnAddress2(I2C_T* i2c, uint8_t address)
*
* @retval None
*/
void I2C_EnableDualAddress(I2C_T* i2c)
void I2C_EnableDualAddress(I2C_T *i2c)
{
i2c->SADDR2_B.ADDRNUM = ENABLE;
}
@@ -275,7 +275,7 @@ void I2C_EnableDualAddress(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableDualAddress(I2C_T* i2c)
void I2C_DisableDualAddress(I2C_T *i2c)
{
i2c->SADDR2_B.ADDRNUM = DISABLE;
}
@@ -287,7 +287,7 @@ void I2C_DisableDualAddress(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableGeneralCall(I2C_T* i2c)
void I2C_EnableGeneralCall(I2C_T *i2c)
{
i2c->CTRL1_B.SRBEN = ENABLE;
}
@@ -299,7 +299,7 @@ void I2C_EnableGeneralCall(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableGeneralCall(I2C_T* i2c)
void I2C_DisableGeneralCall(I2C_T *i2c)
{
i2c->CTRL1_B.SRBEN = DISABLE;
}
@@ -313,7 +313,7 @@ void I2C_DisableGeneralCall(I2C_T* i2c)
*
* @retval None
*/
void I2C_TxData(I2C_T* i2c, uint8_t data)
void I2C_TxData(I2C_T *i2c, uint8_t data)
{
i2c->DATA_B.DATA = data;
}
@@ -325,7 +325,7 @@ void I2C_TxData(I2C_T* i2c, uint8_t data)
*
* @retval received data
*/
uint8_t I2C_RxData(I2C_T* i2c)
uint8_t I2C_RxData(I2C_T *i2c)
{
return i2c->DATA_B.DATA;
}
@@ -343,9 +343,9 @@ uint8_t I2C_RxData(I2C_T* i2c)
* @arg I2C_DIRECTION_RX: Receiver mode
* @retval None
*/
void I2C_Tx7BitAddress(I2C_T* i2c, uint8_t address, I2C_DIRECTION_T direction)
void I2C_Tx7BitAddress(I2C_T *i2c, uint8_t address, I2C_DIRECTION_T direction)
{
if(direction != I2C_DIRECTION_TX)
if (direction != I2C_DIRECTION_TX)
{
i2c->DATA_B.DATA = address | 0x0001;
}
@@ -375,7 +375,7 @@ void I2C_Tx7BitAddress(I2C_T* i2c, uint8_t address, I2C_DIRECTION_T direction)
*
* @retval The value of the read register
*/
uint16_t I2C_ReadRegister(I2C_T* i2c, I2C_REGISTER_T i2cRegister)
uint16_t I2C_ReadRegister(I2C_T *i2c, I2C_REGISTER_T i2cRegister)
{
switch (i2cRegister)
{
@@ -411,7 +411,7 @@ uint16_t I2C_ReadRegister(I2C_T* i2c, I2C_REGISTER_T i2cRegister)
*
* @retval None
*/
void I2C_EnableSoftwareReset(I2C_T* i2c)
void I2C_EnableSoftwareReset(I2C_T *i2c)
{
i2c->CTRL1_B.SWRST = ENABLE;
}
@@ -423,7 +423,7 @@ void I2C_EnableSoftwareReset(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableSoftwareReset(I2C_T* i2c)
void I2C_DisableSoftwareReset(I2C_T *i2c)
{
i2c->CTRL1_B.SWRST = DISABLE;
}
@@ -437,9 +437,9 @@ void I2C_DisableSoftwareReset(I2C_T* i2c)
*
* @retval None
*/
void I2C_ConfigNACKPosition(I2C_T* i2c, I2C_NACK_POSITION_T NACKPosition)
void I2C_ConfigNACKPosition(I2C_T *i2c, I2C_NACK_POSITION_T NACKPosition)
{
if(NACKPosition == I2C_NACK_POSITION_NEXT)
if (NACKPosition == I2C_NACK_POSITION_NEXT)
{
i2c->CTRL1_B.ACKPOS = BIT_SET;
}
@@ -460,9 +460,9 @@ void I2C_ConfigNACKPosition(I2C_T* i2c, I2C_NACK_POSITION_T NACKPosition)
* @arg I2C_SMBUSALER_HIGH: SMBus Alert pin high
* @retval None
*/
void I2C_ConfigSMBusAlert(I2C_T* i2c, I2C_SMBUSALER_T SMBusState)
void I2C_ConfigSMBusAlert(I2C_T *i2c, I2C_SMBUSALER_T SMBusState)
{
if(SMBusState == I2C_SMBUSALER_LOW)
if (SMBusState == I2C_SMBUSALER_LOW)
{
i2c->CTRL1_B.ALERTEN = BIT_SET;
}
@@ -479,7 +479,7 @@ void I2C_ConfigSMBusAlert(I2C_T* i2c, I2C_SMBUSALER_T SMBusState)
*
* @retval None
*/
void I2C_EnablePECTransmit(I2C_T* i2c)
void I2C_EnablePECTransmit(I2C_T *i2c)
{
i2c->CTRL1_B.PEC = BIT_SET;
}
@@ -491,7 +491,7 @@ void I2C_EnablePECTransmit(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisablePECTransmit(I2C_T* i2c)
void I2C_DisablePECTransmit(I2C_T *i2c)
{
i2c->CTRL1_B.PEC = BIT_RESET;
}
@@ -507,9 +507,9 @@ void I2C_DisablePECTransmit(I2C_T* i2c)
* @arg I2C_PEC_POSITION_CURRENT: indicates that current byte is PEC
* @retval None
*/
void I2C_ConfigPECPosition(I2C_T* i2c, I2C_PEC_POSITION_T PECPosition)
void I2C_ConfigPECPosition(I2C_T *i2c, I2C_PEC_POSITION_T PECPosition)
{
if(PECPosition == I2C_PEC_POSITION_NEXT)
if (PECPosition == I2C_PEC_POSITION_NEXT)
{
i2c->CTRL1_B.ACKPOS = BIT_SET;
}
@@ -526,7 +526,7 @@ void I2C_ConfigPECPosition(I2C_T* i2c, I2C_PEC_POSITION_T PECPosition)
*
* @retval None
*/
void I2C_EnablePEC(I2C_T* i2c)
void I2C_EnablePEC(I2C_T *i2c)
{
i2c->CTRL1_B.PECEN = BIT_SET;
}
@@ -538,7 +538,7 @@ void I2C_EnablePEC(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisablePEC(I2C_T* i2c)
void I2C_DisablePEC(I2C_T *i2c)
{
i2c->CTRL1_B.PECEN = BIT_RESET;
}
@@ -550,7 +550,7 @@ void I2C_DisablePEC(I2C_T* i2c)
*
* @retval value of PEC
*/
uint8_t I2C_ReadPEC(I2C_T* i2c)
uint8_t I2C_ReadPEC(I2C_T *i2c)
{
return i2c->STS2_B.PECVALUE;
}
@@ -562,7 +562,7 @@ uint8_t I2C_ReadPEC(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableARP(I2C_T* i2c)
void I2C_EnableARP(I2C_T *i2c)
{
i2c->CTRL1_B.ARPEN = BIT_SET;
}
@@ -574,7 +574,7 @@ void I2C_EnableARP(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableARP(I2C_T* i2c)
void I2C_DisableARP(I2C_T *i2c)
{
i2c->CTRL1_B.ARPEN = BIT_RESET;
}
@@ -586,7 +586,7 @@ void I2C_DisableARP(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableStretchClock(I2C_T* i2c)
void I2C_EnableStretchClock(I2C_T *i2c)
{
i2c->CTRL1_B.CLKSTRETCHD = BIT_RESET;
}
@@ -598,7 +598,7 @@ void I2C_EnableStretchClock(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableStretchClock(I2C_T* i2c)
void I2C_DisableStretchClock(I2C_T *i2c)
{
i2c->CTRL1_B.CLKSTRETCHD = BIT_SET;
}
@@ -614,9 +614,9 @@ void I2C_DisableStretchClock(I2C_T* i2c)
* @arg I2C_DUTYCYCLE_2: I2C fast mode Tlow/Thigh = 2
* @retval None
*/
void I2C_ConfigFastModeDutyCycle(I2C_T* i2c, I2C_DUTYCYCLE_T dutyCycle)
void I2C_ConfigFastModeDutyCycle(I2C_T *i2c, I2C_DUTYCYCLE_T dutyCycle)
{
if(dutyCycle == I2C_DUTYCYCLE_16_9)
if (dutyCycle == I2C_DUTYCYCLE_16_9)
{
i2c->CLKCTRL_B.FDUTYCFG = BIT_SET;
}
@@ -633,7 +633,7 @@ void I2C_ConfigFastModeDutyCycle(I2C_T* i2c, I2C_DUTYCYCLE_T dutyCycle)
*
* @retval None
*/
void I2C_EnableDMA(I2C_T* i2c)
void I2C_EnableDMA(I2C_T *i2c)
{
i2c->CTRL2_B.DMAEN = ENABLE;
}
@@ -645,7 +645,7 @@ void I2C_EnableDMA(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableDMA(I2C_T* i2c)
void I2C_DisableDMA(I2C_T *i2c)
{
i2c->CTRL2_B.DMAEN = DISABLE;
}
@@ -657,7 +657,7 @@ void I2C_DisableDMA(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableDMALastTransfer(I2C_T* i2c)
void I2C_EnableDMALastTransfer(I2C_T *i2c)
{
i2c->CTRL2_B.LTCFG = BIT_SET;
}
@@ -669,7 +669,7 @@ void I2C_EnableDMALastTransfer(I2C_T* i2c)
*
* @retval None
*/
void I2C_DisableDMALastTransfer(I2C_T* i2c)
void I2C_DisableDMALastTransfer(I2C_T *i2c)
{
i2c->CTRL2_B.LTCFG = BIT_RESET;
}
@@ -687,7 +687,7 @@ void I2C_DisableDMALastTransfer(I2C_T* i2c)
*
* @retval None
*/
void I2C_EnableInterrupt(I2C_T* i2c, uint16_t interrupt)
void I2C_EnableInterrupt(I2C_T *i2c, uint16_t interrupt)
{
i2c->CTRL2 |= interrupt;
}
@@ -705,7 +705,7 @@ void I2C_EnableInterrupt(I2C_T* i2c, uint16_t interrupt)
*
* @retval None
*/
void I2C_DisableInterrupt(I2C_T* i2c, uint16_t interrupt)
void I2C_DisableInterrupt(I2C_T *i2c, uint16_t interrupt)
{
i2c->CTRL2 &= ~interrupt;
}
@@ -736,7 +736,7 @@ void I2C_DisableInterrupt(I2C_T* i2c, uint16_t interrupt)
*
* @retval Status: SUCCESS or ERROR
*/
uint8_t I2C_ReadEventStatus(I2C_T* i2c, I2C_EVENT_T i2cEvent)
uint8_t I2C_ReadEventStatus(I2C_T *i2c, I2C_EVENT_T i2cEvent)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
@@ -747,7 +747,7 @@ uint8_t I2C_ReadEventStatus(I2C_T* i2c, I2C_EVENT_T i2cEvent)
lastevent = (flag1 | flag2) & 0x00FFFFFF;
if((lastevent & i2cEvent) == i2cEvent)
if ((lastevent & i2cEvent) == i2cEvent)
{
return SUCCESS;
}
@@ -761,7 +761,7 @@ uint8_t I2C_ReadEventStatus(I2C_T* i2c, I2C_EVENT_T i2cEvent)
*
* @retval The last event
*/
uint32_t I2C_ReadLastEvent(I2C_T* i2c)
uint32_t I2C_ReadLastEvent(I2C_T *i2c)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
@@ -806,7 +806,7 @@ uint32_t I2C_ReadLastEvent(I2C_T* i2c)
*
* @retval Status: flag SET or RESET
*/
uint8_t I2C_ReadStatusFlag(I2C_T* i2c, I2C_FLAG_T flag)
uint8_t I2C_ReadStatusFlag(I2C_T *i2c, I2C_FLAG_T flag)
{
uint8_t status = 0;
@@ -914,7 +914,7 @@ uint8_t I2C_ReadStatusFlag(I2C_T* i2c, I2C_FLAG_T flag)
* a read operation to I2C_STS1 register (I2C_ReadStatusFlag())
* followed by a write operation to I2C_DATA register (I2C_TxData()).
*/
void I2C_ClearStatusFlag(I2C_T* i2c, I2C_FLAG_T flag)
void I2C_ClearStatusFlag(I2C_T *i2c, I2C_FLAG_T flag)
{
switch (flag)
{
@@ -968,13 +968,13 @@ void I2C_ClearStatusFlag(I2C_T* i2c, I2C_FLAG_T flag)
*
* @retval Status: flag SET or RESET
*/
uint8_t I2C_ReadIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag)
uint8_t I2C_ReadIntFlag(I2C_T *i2c, I2C_INT_FLAG_T flag)
{
uint32_t enablestatus = 0;
enablestatus = ((flag & 0x07000000) >> 16) & (i2c->CTRL2);
flag &= 0x00FFFFFF;
if(((i2c->STS1 & flag) != RESET) && enablestatus)
if (((i2c->STS1 & flag) != RESET) && enablestatus)
{
return SET;
}
@@ -1014,7 +1014,7 @@ uint8_t I2C_ReadIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag)
* a read operation to I2C_STS1 register (I2C_ReadIntFlag())
* followed by a write operation to I2C_DATA register (I2C_TxData()).
*/
void I2C_ClearIntFlag(I2C_T* i2c, uint32_t flag)
void I2C_ClearIntFlag(I2C_T *i2c, uint32_t flag)
{
i2c->STS1 = (uint16_t)~(flag & 0x00FFFFFF);
}

2
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_iwdt.c
View File

@@ -132,7 +132,7 @@ uint8_t IWDT_ReadStatusFlag(uint16_t flag)
{
uint8_t bitStatus = RESET;
if((IWDT->STS & flag) != (uint32_t)RESET)
if ((IWDT->STS & flag) != (uint32_t)RESET)
{
bitStatus = SET;
}

100
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_misc.c
View File

@@ -62,7 +62,7 @@
*/
void NVIC_ConfigPriorityGroup(NVIC_PRIORITY_GROUP_T priorityGroup)
{
SCB->AIRCR = AIRCR_VECTKEY_MASK | priorityGroup;
SCB->AIRCR = AIRCR_VECTKEY_MASK | priorityGroup;
}
/*!
@@ -79,53 +79,53 @@ void NVIC_ConfigPriorityGroup(NVIC_PRIORITY_GROUP_T priorityGroup)
*/
void NVIC_EnableIRQRequest(IRQn_Type irq, uint8_t preemptionPriority, uint8_t subPriority)
{
uint32_t tempPriority, tempPrePri, tempSubPri;
uint32_t priorityGrp;
uint32_t tempPriority, tempPrePri, tempSubPri;
uint32_t priorityGrp;
/** Get priority group */
priorityGrp = (SCB->AIRCR) & (uint32_t)0x700U;
/** Get priority group */
priorityGrp = (SCB->AIRCR) & (uint32_t)0x700U;
/** get pre-emption priority and subpriority */
switch(priorityGrp)
{
case NVIC_PRIORITY_GROUP_0:
tempPrePri = 0;
tempSubPri = 4;
break;
/** get pre-emption priority and subpriority */
switch (priorityGrp)
{
case NVIC_PRIORITY_GROUP_0:
tempPrePri = 0;
tempSubPri = 4;
break;
case NVIC_PRIORITY_GROUP_1:
tempPrePri = 1;
tempSubPri = 3;
break;
case NVIC_PRIORITY_GROUP_1:
tempPrePri = 1;
tempSubPri = 3;
break;
case NVIC_PRIORITY_GROUP_2:
tempPrePri = 2;
tempSubPri = 2;
break;
case NVIC_PRIORITY_GROUP_2:
tempPrePri = 2;
tempSubPri = 2;
break;
case NVIC_PRIORITY_GROUP_3:
tempPrePri = 3;
tempSubPri = 1;
break;
case NVIC_PRIORITY_GROUP_3:
tempPrePri = 3;
tempSubPri = 1;
break;
case NVIC_PRIORITY_GROUP_4:
tempPrePri = 4;
tempSubPri = 0;
break;
case NVIC_PRIORITY_GROUP_4:
tempPrePri = 4;
tempSubPri = 0;
break;
default:
NVIC_ConfigPriorityGroup(NVIC_PRIORITY_GROUP_0);
tempPrePri = 0;
tempSubPri = 4;
break;
}
default:
NVIC_ConfigPriorityGroup(NVIC_PRIORITY_GROUP_0);
tempPrePri = 0;
tempSubPri = 4;
break;
}
tempPrePri = 4 - tempPrePri;
tempSubPri = 4 - tempSubPri;
tempPriority = preemptionPriority << tempPrePri;
tempPriority |= subPriority & (0x0f >> tempSubPri);
tempPriority <<= 4;
NVIC->IP[irq] = (uint8_t)tempPriority;
tempPrePri = 4 - tempPrePri;
tempSubPri = 4 - tempSubPri;
tempPriority = preemptionPriority << tempPrePri;
tempPriority |= subPriority & (0x0f >> tempSubPri);
tempPriority <<= 4;
NVIC->IP[irq] = (uint8_t)tempPriority;
/** enable the selected IRQ */
NVIC->ISER[irq >> 0x05U] = (uint32_t)0x01U << (irq & (uint8_t)0x1FU);
@@ -174,7 +174,7 @@ void NVIC_ConfigVectorTable(NVIC_VECT_TAB_T vectTab, uint32_t offset)
*/
void NVIC_SetSystemLowPower(NVIC_LOWPOWER_T lowPowerMode)
{
SCB->SCR |= lowPowerMode;
SCB->SCR |= lowPowerMode;
}
/*!
@@ -190,7 +190,7 @@ void NVIC_SetSystemLowPower(NVIC_LOWPOWER_T lowPowerMode)
*/
void NVIC_ResetystemLowPower(NVIC_LOWPOWER_T lowPowerMode)
{
SCB->SCR &= (uint32_t)(~(uint32_t)lowPowerMode);
SCB->SCR &= (uint32_t)(~(uint32_t)lowPowerMode);
}
/*!
@@ -205,14 +205,14 @@ void NVIC_ResetystemLowPower(NVIC_LOWPOWER_T lowPowerMode)
*/
void SysTick_ConfigCLKSource(SYSTICK_CLK_SOURCE_T clkSource)
{
if (clkSource == SYSTICK_CLK_SOURCE_HCLK)
{
SysTick->CTRL |= (uint32_t)BIT2;
}
else
{
SysTick->CTRL &= (uint32_t)(~BIT2);
}
if (clkSource == SYSTICK_CLK_SOURCE_HCLK)
{
SysTick->CTRL |= (uint32_t)BIT2;
}
else
{
SysTick->CTRL &= (uint32_t)(~BIT2);
}
}
/**@} end of group MISC_Fuctions*/

16
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_pmu.c
View File

@@ -171,9 +171,9 @@ void PMU_EnterSTOPMode(PMU_REGULATOR_T regulator, PMU_STOP_ENTRY_T entry)
/** Set LPDSCFG bit according to regulator value */
PMU->CTRL_B.LPDSCFG = regulator;
/** Set Cortex System Control Register */
SCB->SCR |= (uint32_t )0x04;
SCB->SCR |= (uint32_t)0x04;
/** Select STOP mode entry*/
if(entry == PMU_STOP_ENTRY_WFI)
if (entry == PMU_STOP_ENTRY_WFI)
{
/** Request Wait For Interrupt */
__WFI();
@@ -202,7 +202,7 @@ void PMU_EnterSTANDBYMode(void)
/** Select STANDBY mode */
PMU->CTRL_B.PDDSCFG = BIT_SET;
/** Set Cortex System Control Register */
SCB->SCR |= (uint32_t )0x04;
SCB->SCR |= (uint32_t)0x04;
#if defined ( __CC_ARM )
__force_stores();
#endif
@@ -226,15 +226,15 @@ uint8_t PMU_ReadStatusFlag(PMU_FLAG_T flag)
{
uint8_t BitStatus = BIT_RESET;
if(flag == PMU_FLAG_WUE)
if (flag == PMU_FLAG_WUE)
{
BitStatus = PMU->CSTS_B.WUEFLG;
}
else if(flag == PMU_FLAG_SB)
else if (flag == PMU_FLAG_SB)
{
BitStatus = PMU->CSTS_B.SBFLG;
}
else if(flag == PMU_FLAG_PVDO)
else if (flag == PMU_FLAG_PVDO)
{
BitStatus = PMU->CSTS_B.PVDOFLG;
}
@@ -253,11 +253,11 @@ uint8_t PMU_ReadStatusFlag(PMU_FLAG_T flag)
*/
void PMU_ClearStatusFlag(PMU_FLAG_T flag)
{
if(flag == PMU_FLAG_WUE)
if (flag == PMU_FLAG_WUE)
{
PMU->CTRL_B.WUFLGCLR = BIT_SET;
}
else if(flag == PMU_FLAG_SB)
else if (flag == PMU_FLAG_SB)
{
PMU->CTRL_B.SBFLGCLR = BIT_SET;
}

10
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_qspi.c
View File

@@ -73,7 +73,7 @@ void QSPI_Reset(void)
*
* @retval None
*/
void QSPI_Config(QSPI_Config_T * qspiConfig)
void QSPI_Config(QSPI_Config_T *qspiConfig)
{
QSPI->CTRL1_B.CPHA = qspiConfig->clockPhase;
QSPI->CTRL1_B.CPOL = qspiConfig->clockPolarity;
@@ -585,19 +585,19 @@ void QSPI_ClearIntFlag(uint32_t flag)
{
volatile uint32_t dummy = 0;
if(flag & QSPI_INT_FLAG_TFO)
if (flag & QSPI_INT_FLAG_TFO)
{
dummy = QSPI->TFOIC;
}
else if(flag & QSPI_INT_FLAG_RFO)
else if (flag & QSPI_INT_FLAG_RFO)
{
dummy = QSPI->RFOIC;
}
else if(flag & QSPI_INT_FLAG_RFU)
else if (flag & QSPI_INT_FLAG_RFU)
{
dummy = QSPI->RFUIC;
}
else if(flag & QSPI_INT_FLAG_MST)
else if (flag & QSPI_INT_FLAG_MST)
{
dummy = QSPI->MIC;
}

86
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_rcm.c
View File

@@ -490,43 +490,43 @@ uint32_t RCM_ReadSYSCLKFreq(void)
switch (sysClock)
{
/** sys clock is HSI */
case RCM_SYSCLK_SEL_HSI:
sysClock = HSI_VALUE;
break;
/** sys clock is HSI */
case RCM_SYSCLK_SEL_HSI:
sysClock = HSI_VALUE;
break;
/** sys clock is HSE */
case RCM_SYSCLK_SEL_HSE:
sysClock = HSE_VALUE;
break;
/** sys clock is HSE */
case RCM_SYSCLK_SEL_HSE:
sysClock = HSE_VALUE;
break;
/** sys clock is PLL */
case RCM_SYSCLK_SEL_PLL:
pllMull = RCM->CFG_B.PLLMULCFG + 2;
pllSource = RCM->CFG_B.PLLSRCSEL;
/** sys clock is PLL */
case RCM_SYSCLK_SEL_PLL:
pllMull = RCM->CFG_B.PLLMULCFG + 2;
pllSource = RCM->CFG_B.PLLSRCSEL;
/** PLL entry clock source is HSE */
if (pllSource == BIT_SET)
/** PLL entry clock source is HSE */
if (pllSource == BIT_SET)
{
sysClock = HSE_VALUE * pllMull;
/** HSE clock divided by 2 */
if (pllSource == RCM->CFG_B.PLLHSEPSC)
{
sysClock = HSE_VALUE * pllMull;
/** HSE clock divided by 2 */
if (pllSource == RCM->CFG_B.PLLHSEPSC)
{
sysClock >>= 1;
}
}
/** PLL entry clock source is HSI/2 */
else
{
sysClock = (HSI_VALUE >> 1) * pllMull;
sysClock >>= 1;
}
}
/** PLL entry clock source is HSI/2 */
else
{
sysClock = (HSI_VALUE >> 1) * pllMull;
}
break;
break;
default:
sysClock = HSI_VALUE;
break;
default:
sysClock = HSI_VALUE;
break;
}
return sysClock;
@@ -561,7 +561,7 @@ uint32_t RCM_ReadHCLKFreq(void)
*
* @retval None
*/
void RCM_ReadPCLKFreq(uint32_t* PCLK1, uint32_t* PCLK2)
void RCM_ReadPCLKFreq(uint32_t *PCLK1, uint32_t *PCLK2)
{
uint32_t hclk, divider;
uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
@@ -992,20 +992,20 @@ uint8_t RCM_ReadStatusFlag(RCM_FLAG_T flag)
switch (reg)
{
case 0:
reg = RCM->CTRL;
break;
case 0:
reg = RCM->CTRL;
break;
case 1:
reg = RCM->BDCTRL;
break;
case 1:
reg = RCM->BDCTRL;
break;
case 2:
reg = RCM->CSTS;
break;
case 2:
reg = RCM->CSTS;
break;
default:
break;
default:
break;
}
if (reg & bit)
@@ -1048,7 +1048,7 @@ void RCM_ClearStatusFlag(void)
*/
uint8_t RCM_ReadIntFlag(RCM_INT_T flag)
{
return (RCM->INT& flag) ? SET : RESET;
return (RCM->INT &flag) ? SET : RESET;
}
/*!

8
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_rtc.c
View File

@@ -144,7 +144,7 @@ uint32_t RTC_ReadDivider(void)
*/
void RTC_WaitForLastTask(void)
{
while(RTC->CSTS_B.OCFLG == BIT_RESET)
while (RTC->CSTS_B.OCFLG == BIT_RESET)
{
}
}
@@ -159,7 +159,7 @@ void RTC_WaitForLastTask(void)
void RTC_WaitForSynchro(void)
{
RTC->CSTS_B.RSYNCFLG = BIT_RESET;
while(RTC->CSTS_B.RSYNCFLG == BIT_RESET);
while (RTC->CSTS_B.RSYNCFLG == BIT_RESET);
}
/*!
@@ -189,7 +189,7 @@ void RTC_EnableInterrupt(uint16_t interrupt)
*/
void RTC_DisableInterrupt(uint16_t interrupt)
{
RTC->CTRL &= (uint32_t )~interrupt;
RTC->CTRL &= (uint32_t)~interrupt;
}
/*!
@@ -207,7 +207,7 @@ void RTC_DisableInterrupt(uint16_t interrupt)
*/
uint8_t RTC_ReadStatusFlag(RTC_FLAG_T flag)
{
return (RTC->CSTS & flag) ? SET : RESET;
return (RTC->CSTS & flag) ? SET : RESET;
}
/*!

42
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_sci2c.c
View File

@@ -47,7 +47,7 @@
*/
void SCI2C_Reset(SCI2C_T *i2c)
{
if(i2c == I2C3)
if (i2c == I2C3)
{
RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_I2C1);
RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_I2C1);
@@ -78,7 +78,7 @@ void SCI2C_Config(SCI2C_T *i2c, SCI2C_Config_T *sci2cConfig)
i2c->CTRL2_B.I2CEN = BIT_RESET;
if(sci2cConfig->mode == SCI2C_MODE_MASTER)
if (sci2cConfig->mode == SCI2C_MODE_MASTER)
{
i2c->CTRL1_B.MST = BIT_SET;
i2c->CTRL1_B.SLADIS = BIT_SET;
@@ -98,17 +98,17 @@ void SCI2C_Config(SCI2C_T *i2c, SCI2C_Config_T *sci2cConfig)
i2c->CTRL1_B.SAM = sci2cConfig->addrMode;
i2c->SLAADDR = sci2cConfig->slaveAddr;
if(sci2cConfig->speed == SCI2C_SPEED_STANDARD)
if (sci2cConfig->speed == SCI2C_SPEED_STANDARD)
{
i2c->SSCLC = sci2cConfig->clkLowPeriod;
i2c->SSCHC = sci2cConfig->clkHighPeriod;
}
else if(sci2cConfig->speed == SCI2C_SPEED_FAST)
else if (sci2cConfig->speed == SCI2C_SPEED_FAST)
{
i2c->FSCLC = sci2cConfig->clkLowPeriod;
i2c->FSCHC = sci2cConfig->clkHighPeriod;
}
else if(sci2cConfig->speed == SCI2C_SPEED_HIGH)
else if (sci2cConfig->speed == SCI2C_SPEED_HIGH)
{
i2c->HSCLC = sci2cConfig->clkLowPeriod;
i2c->HSCHC = sci2cConfig->clkHighPeriod;
@@ -159,7 +159,7 @@ uint8_t SCI2C_ReadStatusFlag(SCI2C_T *i2c, SCI2C_FLAG_T flag)
{
uint8_t ret = RESET;
if(flag & BIT8)
if (flag & BIT8)
{
ret = i2c->STS2 & flag ? SET : RESET;
}
@@ -228,47 +228,47 @@ void SCI2C_ClearIntFlag(SCI2C_T *i2c, SCI2C_INT_T flag)
{
volatile uint32_t dummy = 0;
if(flag == SCI2C_INT_ALL)
if (flag == SCI2C_INT_ALL)
{
dummy = i2c->INTCLR;
}
else if(flag == SCI2C_INT_RFU)
else if (flag == SCI2C_INT_RFU)
{
dummy = i2c->RFUIC;
}
else if(flag == SCI2C_INT_RFO)
else if (flag == SCI2C_INT_RFO)
{
dummy = i2c->RFOIC;
}
else if(flag == SCI2C_INT_TFO)
else if (flag == SCI2C_INT_TFO)
{
dummy = i2c->TFOIC;
}
else if(flag == SCI2C_INT_RR)
else if (flag == SCI2C_INT_RR)
{
dummy = i2c->RRIC;
}
else if(flag == SCI2C_INT_TA)
else if (flag == SCI2C_INT_TA)
{
dummy = i2c->TAIC;
}
else if(flag == SCI2C_INT_RD)
else if (flag == SCI2C_INT_RD)
{
dummy = i2c->RDIC;
}
else if(flag == SCI2C_INT_ACT)
else if (flag == SCI2C_INT_ACT)
{
dummy = i2c->AIC;
}
else if(flag == SCI2C_INT_STPD)
else if (flag == SCI2C_INT_STPD)
{
dummy = i2c->STPDIC;
}
else if(flag == SCI2C_INT_STAD)
else if (flag == SCI2C_INT_STAD)
{
dummy = i2c->STADIC;
}
else if(flag == SCI2C_INT_GC)
else if (flag == SCI2C_INT_GC)
{
dummy = i2c->GCIC;
}
@@ -731,17 +731,17 @@ void SCI2C_BlockTxCmd(SCI2C_T *i2c, uint8_t enable)
*/
void SCI2C_ConfigClkPeriod(SCI2C_T *i2c, SCI2C_SPEED_T speed, uint16_t highPeriod, uint16_t lowPeriod)
{
if(speed == SCI2C_SPEED_STANDARD)
if (speed == SCI2C_SPEED_STANDARD)
{
i2c->SSCLC = lowPeriod;
i2c->SSCHC = highPeriod;
}
else if(speed == SCI2C_SPEED_FAST)
else if (speed == SCI2C_SPEED_FAST)
{
i2c->FSCLC = lowPeriod;
i2c->FSCHC = highPeriod;
}
else if(speed == SCI2C_SPEED_HIGH)
else if (speed == SCI2C_SPEED_HIGH)
{
i2c->HSCLC = lowPeriod;
i2c->HSCHC = highPeriod;
@@ -895,7 +895,7 @@ void SCI2C_ConfigDMARxDataLevel(SCI2C_T *i2c, uint8_t cnt)
*/
void SCI2C_ConfigSpikeSuppressionLimit(SCI2C_T *i2c, SCI2C_SPEED_T speed, uint8_t limit)
{
if(speed == SCI2C_SPEED_HIGH)
if (speed == SCI2C_SPEED_HIGH)
{
i2c->HSSSL = limit;
}

62
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_sdio.c
View File

@@ -65,7 +65,7 @@ void SDIO_Reset(void)
*
* @retval None
*/
void SDIO_Config(SDIO_Config_T* sdioConfig)
void SDIO_Config(SDIO_Config_T *sdioConfig)
{
uint32_t tmp = 0;
@@ -73,7 +73,7 @@ void SDIO_Config(SDIO_Config_T* sdioConfig)
tmp &= 0xFFFF8100;
tmp |= (sdioConfig->clockDiv | sdioConfig->clockPowerSave | sdioConfig->clockBypass | sdioConfig->busWide |
sdioConfig->clockEdge | sdioConfig->hardwareFlowControl);
sdioConfig->clockEdge | sdioConfig->hardwareFlowControl);
SDIO->CLKCTRL = tmp;
}
@@ -85,14 +85,14 @@ void SDIO_Config(SDIO_Config_T* sdioConfig)
*
* @retval None
*/
void SDIO_ConfigStructInit(SDIO_Config_T* sdioConfig)
void SDIO_ConfigStructInit(SDIO_Config_T *sdioConfig)
{
sdioConfig->clockDiv = 0x00;
sdioConfig->clockEdge = SDIO_CLOCK_EDGE_RISING;
sdioConfig->clockBypass = SDIO_CLOCK_BYPASS_DISABLE;
sdioConfig->clockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
sdioConfig->busWide = SDIO_BUS_WIDE_1B;
sdioConfig->hardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
sdioConfig->clockDiv = 0x00;
sdioConfig->clockEdge = SDIO_CLOCK_EDGE_RISING;
sdioConfig->clockBypass = SDIO_CLOCK_BYPASS_DISABLE;
sdioConfig->clockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
sdioConfig->busWide = SDIO_BUS_WIDE_1B;
sdioConfig->hardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
}
/*!
@@ -188,7 +188,7 @@ void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig)
tmpreg = SDIO->CMD;
tmpreg &= 0xFFFFF800;
tmpreg |= (uint32_t)cmdConfig->cmdIndex | cmdConfig->response
| cmdConfig->wait | cmdConfig->CPSM;
| cmdConfig->wait | cmdConfig->CPSM;
SDIO->CMD = tmpreg;
}
@@ -200,13 +200,13 @@ void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig)
* @retval None
*
*/
void SDIO_TxCommandStructInit(SDIO_CmdConfig_T* cmdConfig)
void SDIO_TxCommandStructInit(SDIO_CmdConfig_T *cmdConfig)
{
cmdConfig->argument = 0x00;
cmdConfig->cmdIndex = 0x00;
cmdConfig->response = SDIO_RESPONSE_NO;
cmdConfig->wait = SDIO_WAIT_NO;
cmdConfig->CPSM = SDIO_CPSM_DISABLE;
cmdConfig->argument = 0x00;
cmdConfig->cmdIndex = 0x00;
cmdConfig->response = SDIO_RESPONSE_NO;
cmdConfig->wait = SDIO_WAIT_NO;
cmdConfig->CPSM = SDIO_CPSM_DISABLE;
}
/*!
@@ -236,11 +236,11 @@ uint8_t SDIO_ReadCommandResponse(void)
*/
uint32_t SDIO_ReadResponse(SDIO_RES_T res)
{
__IO uint32_t tmp = 0;
__IO uint32_t tmp = 0;
tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res;
tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res;
return (*(__IO uint32_t *) tmp);
return (*(__IO uint32_t *) tmp);
}
/*!
@@ -250,7 +250,7 @@ uint32_t SDIO_ReadResponse(SDIO_RES_T res)
*
* @retval None
*/
void SDIO_ConfigData(SDIO_DataConfig_T* dataConfig)
void SDIO_ConfigData(SDIO_DataConfig_T *dataConfig)
{
uint32_t tmpreg = 0;
@@ -263,7 +263,7 @@ void SDIO_ConfigData(SDIO_DataConfig_T* dataConfig)
tmpreg &= 0xFFFFFF08;
tmpreg |= (uint32_t)dataConfig->dataBlockSize | dataConfig->transferDir
| dataConfig->transferMode | dataConfig->DPSM;
| dataConfig->transferMode | dataConfig->DPSM;
SDIO->DCTRL = tmpreg;
}
@@ -275,14 +275,14 @@ void SDIO_ConfigData(SDIO_DataConfig_T* dataConfig)
*
* @retval None
*/
void SDIO_ConfigDataStructInit(SDIO_DataConfig_T* dataConfig)
void SDIO_ConfigDataStructInit(SDIO_DataConfig_T *dataConfig)
{
dataConfig->dataTimeOut = 0xFFFFFFFF;
dataConfig->dataLength = 0x00;
dataConfig->dataBlockSize = SDIO_DATA_BLOCKSIZE_1B;
dataConfig->transferDir = SDIO_TRANSFER_DIR_TO_CARD;
dataConfig->transferMode = SDIO_TRANSFER_MODE_BLOCK;
dataConfig->DPSM = SDIO_DPSM_DISABLE;
dataConfig->dataTimeOut = 0xFFFFFFFF;
dataConfig->dataLength = 0x00;
dataConfig->dataBlockSize = SDIO_DATA_BLOCKSIZE_1B;
dataConfig->transferDir = SDIO_TRANSFER_DIR_TO_CARD;
dataConfig->transferMode = SDIO_TRANSFER_MODE_BLOCK;
dataConfig->DPSM = SDIO_DPSM_DISABLE;
}
/*!
@@ -394,7 +394,7 @@ void SDIO_DisableStartReadWait(void)
*/
void SDIO_ConfigSDIOReadWaitMode(SDIO_READ_WAIT_MODE_T readWaitMode)
{
*(__IO uint32_t *) DCTRL_RDWAIT_BB = readWaitMode;
*(__IO uint32_t *) DCTRL_RDWAIT_BB = readWaitMode;
}
/*!
* @brief Enables SDIO SD I/O Mode Operation
@@ -405,7 +405,7 @@ void SDIO_ConfigSDIOReadWaitMode(SDIO_READ_WAIT_MODE_T readWaitMode)
*/
void SDIO_EnableSDIO(void)
{
*(__IO uint32_t *) DCTRL_SDIOF_BB = (uint32_t)SET;
*(__IO uint32_t *) DCTRL_SDIOF_BB = (uint32_t)SET;
}
/*!
@@ -417,7 +417,7 @@ void SDIO_EnableSDIO(void)
*/
void SDIO_DisableSDIO(void)
{
*(__IO uint32_t *) DCTRL_SDIOF_BB = (uint32_t)RESET;
*(__IO uint32_t *) DCTRL_SDIOF_BB = (uint32_t)RESET;
}
/*!

96
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_spi.c
View File

@@ -45,19 +45,19 @@
*
* @retval None
*/
void SPI_I2S_Reset(SPI_T* spi)
void SPI_I2S_Reset(SPI_T *spi)
{
if(spi == SPI1)
if (spi == SPI1)
{
RCM_EnableAPB2PeriphReset(RCM_APB2_PERIPH_SPI1);
RCM_DisableAPB2PeriphReset(RCM_APB2_PERIPH_SPI1);
}
else if(spi == SPI2)
else if (spi == SPI2)
{
RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_SPI2);
RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_SPI2);
}
else if(spi == SPI3)
else if (spi == SPI3)
{
RCM_EnableAPB1PeriphReset(RCM_APB1_PERIPH_SPI3);
RCM_DisableAPB1PeriphReset(RCM_APB1_PERIPH_SPI3);
@@ -73,13 +73,13 @@ void SPI_I2S_Reset(SPI_T* spi)
*
* @retval None
*/
void SPI_Config(SPI_T* spi, SPI_Config_T* spiConfig)
void SPI_Config(SPI_T *spi, SPI_Config_T *spiConfig)
{
spi->CTRL1 &= 0x3040;
spi->CTRL1 |= (uint16_t)((uint32_t)spiConfig->direction | spiConfig->mode |
spiConfig->length | spiConfig->polarity |
spiConfig->phase | spiConfig->nss |
spiConfig->baudrateDiv | spiConfig->firstBit);
spiConfig->length | spiConfig->polarity |
spiConfig->phase | spiConfig->nss |
spiConfig->baudrateDiv | spiConfig->firstBit);
spi->CRCPOLY = spiConfig->crcPolynomial;
}
@@ -92,7 +92,7 @@ void SPI_Config(SPI_T* spi, SPI_Config_T* spiConfig)
*
* @retval None
*/
void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig)
void I2S_Config(SPI_T *spi, I2S_Config_T *i2sConfig)
{
uint16_t i2sDiv = 2, i2sOdd = 0, packetSize = 1;
uint32_t tmp = 0;
@@ -102,14 +102,14 @@ void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig)
spi->I2SCFG &= 0xF040;
spi->I2SPSC = 0x0002;
if(i2sConfig->audioDiv == I2S_AUDIO_DIV_DEFAULT)
if (i2sConfig->audioDiv == I2S_AUDIO_DIV_DEFAULT)
{
spi->I2SPSC_B.ODDPSC = 0;
spi->I2SPSC_B.I2SPSC = 2;
}
else
{
if(i2sConfig->length == I2S_DATA_LENGHT_16B)
if (i2sConfig->length == I2S_DATA_LENGHT_16B)
{
packetSize = 1;
}
@@ -120,13 +120,13 @@ void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig)
sysClock = RCM_ReadSYSCLKFreq();
if(i2sConfig->MCLKOutput == I2S_MCLK_OUTPUT_ENABLE)
if (i2sConfig->MCLKOutput == I2S_MCLK_OUTPUT_ENABLE)
{
tmp = (uint16_t)(((((sysClock / 256) * 10) / i2sConfig ->audioDiv)) + 5);
}
else
{
tmp = (uint16_t)(((((sysClock / (32 * packetSize)) *10 ) / i2sConfig ->audioDiv )) + 5);
tmp = (uint16_t)(((((sysClock / (32 * packetSize)) * 10) / i2sConfig ->audioDiv)) + 5);
}
tmp = tmp / 10;
@@ -160,7 +160,7 @@ void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig)
*
* @retval None
*/
void SPI_ConfigStructInit(SPI_Config_T* spiConfig)
void SPI_ConfigStructInit(SPI_Config_T *spiConfig)
{
spiConfig->direction = SPI_DIRECTION_2LINES_FULLDUPLEX;
spiConfig->mode = SPI_MODE_SLAVE;
@@ -180,7 +180,7 @@ void SPI_ConfigStructInit(SPI_Config_T* spiConfig)
*
* @retval None
*/
void I2S_ConfigStructInit(I2S_Config_T* i2sConfig)
void I2S_ConfigStructInit(I2S_Config_T *i2sConfig)
{
i2sConfig->mode = I2S_MODE_SLAVE_TX;
i2sConfig->standard = I2S_STANDARD_PHILLIPS;
@@ -196,7 +196,7 @@ void I2S_ConfigStructInit(I2S_Config_T* i2sConfig)
*
* @retval None
*/
void SPI_Enable(SPI_T* spi)
void SPI_Enable(SPI_T *spi)
{
spi->CTRL1_B.SPIEN = BIT_SET;
}
@@ -208,7 +208,7 @@ void SPI_Enable(SPI_T* spi)
*
* @retval None
*/
void SPI_Disable(SPI_T* spi)
void SPI_Disable(SPI_T *spi)
{
spi->CTRL1_B.SPIEN = BIT_RESET;
}
@@ -220,7 +220,7 @@ void SPI_Disable(SPI_T* spi)
*
* @retval None
*/
void I2S_Enable(SPI_T* spi)
void I2S_Enable(SPI_T *spi)
{
spi->I2SCFG_B.I2SEN = BIT_SET;
}
@@ -232,7 +232,7 @@ void I2S_Enable(SPI_T* spi)
*
* @retval None
*/
void I2S_Disable(SPI_T* spi)
void I2S_Disable(SPI_T *spi)
{
spi->I2SCFG_B.I2SEN = BIT_RESET;
}
@@ -248,9 +248,9 @@ void I2S_Disable(SPI_T* spi)
* @arg SPI_I2S_DMA_REQ_RX: Rx buffer DMA transfer request
* @retval None
*/
void SPI_I2S_EnableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq)
void SPI_I2S_EnableDMA(SPI_T *spi, SPI_I2S_DMA_REQ_T dmaReq)
{
if(dmaReq == SPI_I2S_DMA_REQ_TX)
if (dmaReq == SPI_I2S_DMA_REQ_TX)
{
spi->CTRL2_B.TXDEN = ENABLE;
}
@@ -271,9 +271,9 @@ void SPI_I2S_EnableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq)
* @arg SPI_I2S_DMA_REQ_RX: Rx buffer DMA transfer request
* @retval None
*/
void SPI_I2S_DisableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq)
void SPI_I2S_DisableDMA(SPI_T *spi, SPI_I2S_DMA_REQ_T dmaReq)
{
if(dmaReq == SPI_I2S_DMA_REQ_TX)
if (dmaReq == SPI_I2S_DMA_REQ_TX)
{
spi->CTRL2_B.TXDEN = DISABLE;
}
@@ -292,7 +292,7 @@ void SPI_I2S_DisableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq)
*
* @retval None
*/
void SPI_I2S_TxData(SPI_T* spi, uint16_t data)
void SPI_I2S_TxData(SPI_T *spi, uint16_t data)
{
spi->DATA = data;
}
@@ -306,7 +306,7 @@ void SPI_I2S_TxData(SPI_T* spi, uint16_t data)
*
* @retval None
*/
uint16_t SPI_I2S_RxData(SPI_T* spi)
uint16_t SPI_I2S_RxData(SPI_T *spi)
{
return spi->DATA;
}
@@ -318,7 +318,7 @@ uint16_t SPI_I2S_RxData(SPI_T* spi)
*
* @retval None
*/
void SPI_SetSoftwareNSS(SPI_T* spi)
void SPI_SetSoftwareNSS(SPI_T *spi)
{
spi->CTRL1_B.ISSEL = BIT_SET;
}
@@ -330,7 +330,7 @@ void SPI_SetSoftwareNSS(SPI_T* spi)
*
* @retval None
*/
void SPI_ResetSoftwareNSS(SPI_T* spi)
void SPI_ResetSoftwareNSS(SPI_T *spi)
{
spi->CTRL1_B.ISSEL = BIT_RESET;
}
@@ -342,7 +342,7 @@ void SPI_ResetSoftwareNSS(SPI_T* spi)
*
* @retval None
*/
void SPI_EnableSSOutput(SPI_T* spi)
void SPI_EnableSSOutput(SPI_T *spi)
{
spi->CTRL2_B.SSOEN = BIT_SET;
}
@@ -354,7 +354,7 @@ void SPI_EnableSSOutput(SPI_T* spi)
*
* @retval None
*/
void SPI_DisableSSOutput(SPI_T* spi)
void SPI_DisableSSOutput(SPI_T *spi)
{
spi->CTRL2_B.SSOEN = BIT_RESET;
}
@@ -371,7 +371,7 @@ void SPI_DisableSSOutput(SPI_T* spi)
*
* @retval None
*/
void SPI_ConfigDataSize(SPI_T* spi, SPI_DATA_LENGTH_T length)
void SPI_ConfigDataSize(SPI_T *spi, SPI_DATA_LENGTH_T length)
{
spi->CTRL1_B.DFLSEL = BIT_RESET;
spi->CTRL1 |= length;
@@ -384,7 +384,7 @@ void SPI_ConfigDataSize(SPI_T* spi, SPI_DATA_LENGTH_T length)
*
* @retval None
*/
void SPI_TxCRC(SPI_T* spi)
void SPI_TxCRC(SPI_T *spi)
{
spi->CTRL1_B.CRCNXT = BIT_SET;
}
@@ -396,7 +396,7 @@ void SPI_TxCRC(SPI_T* spi)
*
* @retval None
*/
void SPI_EnableCRC(SPI_T* spi)
void SPI_EnableCRC(SPI_T *spi)
{
spi->CTRL1_B.CRCEN = BIT_SET;
}
@@ -407,7 +407,7 @@ void SPI_EnableCRC(SPI_T* spi)
* @param spi: The SPIx can be 1,2,3
*
*/
void SPI_DisableCRC(SPI_T* spi)
void SPI_DisableCRC(SPI_T *spi)
{
spi->CTRL1_B.CRCEN = BIT_RESET;
}
@@ -419,7 +419,7 @@ void SPI_DisableCRC(SPI_T* spi)
*
* @retval The SPI transmit CRC register value
*/
uint16_t SPI_ReadTxCRC(SPI_T* spi)
uint16_t SPI_ReadTxCRC(SPI_T *spi)
{
return spi->TXCRC_B.TXCRC;
}
@@ -431,7 +431,7 @@ uint16_t SPI_ReadTxCRC(SPI_T* spi)
*
* @retval The SPI receive CRC register value
*/
uint16_t SPI_ReadRxCRC(SPI_T* spi)
uint16_t SPI_ReadRxCRC(SPI_T *spi)
{
return spi->RXCRC_B.RXCRC;
}
@@ -443,7 +443,7 @@ uint16_t SPI_ReadRxCRC(SPI_T* spi)
*
* @retval The SPI CRC Polynomial register value
*/
uint16_t SPI_ReadCRCPolynomial(SPI_T* spi)
uint16_t SPI_ReadCRCPolynomial(SPI_T *spi)
{
return spi->CRCPOLY_B.CRCPOLY;
}
@@ -459,9 +459,9 @@ uint16_t SPI_ReadCRCPolynomial(SPI_T* spi)
* @arg SPI_DIRECTION_TX: Selects Tx transmission direction
* @retval None
*/
void SPI_ConfigBiDirectionalLine(SPI_T* spi, SPI_DIRECTION_SELECT_T direction)
void SPI_ConfigBiDirectionalLine(SPI_T *spi, SPI_DIRECTION_SELECT_T direction)
{
if(direction == SPI_DIRECTION_TX)
if (direction == SPI_DIRECTION_TX)
{
spi->CTRL1 |= SPI_DIRECTION_TX;
}
@@ -483,9 +483,9 @@ void SPI_ConfigBiDirectionalLine(SPI_T* spi, SPI_DIRECTION_SELECT_T direction)
* @arg SPI_I2S_INT_ERR: Error interrupt
* @retval None
*/
void SPI_I2S_EnableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt)
void SPI_I2S_EnableInterrupt(SPI_T *spi, SPI_I2S_INT_T interrupt)
{
spi->CTRL2 |= (interrupt >> 8);
spi->CTRL2 |= (interrupt >> 8);
}
/*!
@@ -500,9 +500,9 @@ void SPI_I2S_EnableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt)
* @arg SPI_I2S_INT_ERR: Error interrupt
* @retval None
*/
void SPI_I2S_DisableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt)
void SPI_I2S_DisableInterrupt(SPI_T *spi, SPI_I2S_INT_T interrupt)
{
spi->CTRL2 &= ~(interrupt >> 8);
spi->CTRL2 &= ~(interrupt >> 8);
}
/*!
@@ -523,9 +523,9 @@ void SPI_I2S_DisableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt)
*
* @retval SET or RESET
*/
uint8_t SPI_I2S_ReadStatusFlag(SPI_T* spi, SPI_FLAG_T flag)
uint8_t SPI_I2S_ReadStatusFlag(SPI_T *spi, SPI_FLAG_T flag)
{
if((spi->STS & flag) != RESET)
if ((spi->STS & flag) != RESET)
{
return SET;
}
@@ -553,7 +553,7 @@ uint8_t SPI_I2S_ReadStatusFlag(SPI_T* spi, SPI_FLAG_T flag)
* a read/write operation to SPI_STS register (SPI_I2S_ReadStatusFlag())
* followed by a write operation to SPI_CTRL1 register (SPI_Enable()).
*/
void SPI_I2S_ClearStatusFlag(SPI_T* spi, SPI_FLAG_T flag)
void SPI_I2S_ClearStatusFlag(SPI_T *spi, SPI_FLAG_T flag)
{
spi->STS_B.CRCEFLG = BIT_RESET;
}
@@ -574,12 +574,12 @@ void SPI_I2S_ClearStatusFlag(SPI_T* spi, SPI_FLAG_T flag)
*
* @retval SET or RESET
*/
uint8_t SPI_I2S_ReadIntFlag(SPI_T* spi, SPI_I2S_INT_T flag)
uint8_t SPI_I2S_ReadIntFlag(SPI_T *spi, SPI_I2S_INT_T flag)
{
uint32_t intEnable;
uint32_t intStatus;
intEnable = (uint32_t)(spi->CTRL2 & (flag>>8));
intEnable = (uint32_t)(spi->CTRL2 & (flag >> 8));
intStatus = (uint32_t)(spi->STS & flag);
if (intEnable && intStatus)
@@ -608,7 +608,7 @@ uint8_t SPI_I2S_ReadIntFlag(SPI_T* spi, SPI_I2S_INT_T flag)
* a read/write operation to SPI_STS register (SPI_I2S_ReadIntFlag())
* followed by a write operation to SPI_CTRL1 register (SPI_Enable()).
*/
void SPI_I2S_ClearIntFlag(SPI_T* spi, SPI_I2S_INT_T flag)
void SPI_I2S_ClearIntFlag(SPI_T *spi, SPI_I2S_INT_T flag)
{
spi->STS_B.CRCEFLG = BIT_RESET;
}

242
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_tmr.c
View File

File diff suppressed because it is too large Load Diff

80
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_usart.c
View File

@@ -47,7 +47,7 @@
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_Reset(USART_T* usart)
void USART_Reset(USART_T *usart)
{
if (USART1 == usart)
{
@@ -87,7 +87,7 @@ void USART_Reset(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_Config(USART_T* uart, USART_Config_T* usartConfig)
void USART_Config(USART_T *uart, USART_Config_T *usartConfig)
{
uint32_t temp, fCLK, intDiv, fractionalDiv;
@@ -132,7 +132,7 @@ void USART_Config(USART_T* uart, USART_Config_T* usartConfig)
*
* @retval None
*/
void USART_ConfigStructInit(USART_Config_T* usartConfig)
void USART_ConfigStructInit(USART_Config_T *usartConfig)
{
usartConfig->baudRate = 9600;
usartConfig->wordLength = USART_WORD_LEN_8B;
@@ -153,7 +153,7 @@ void USART_ConfigStructInit(USART_Config_T* usartConfig)
*
* @note The usart can be USART1, USART2, USART3
*/
void USART_ConfigClock(USART_T* usart, USART_ClockConfig_T* clockConfig)
void USART_ConfigClock(USART_T *usart, USART_ClockConfig_T *clockConfig)
{
usart->CTRL2_B.CLKEN = clockConfig->clock;
usart->CTRL2_B.CPHA = clockConfig->phase;
@@ -169,7 +169,7 @@ void USART_ConfigClock(USART_T* usart, USART_ClockConfig_T* clockConfig)
* @retval None
*
*/
void USART_ConfigClockStructInit(USART_ClockConfig_T* clockConfig)
void USART_ConfigClockStructInit(USART_ClockConfig_T *clockConfig)
{
clockConfig->clock = USART_CLKEN_DISABLE;
clockConfig->phase = USART_CLKPHA_1EDGE;
@@ -186,7 +186,7 @@ void USART_ConfigClockStructInit(USART_ClockConfig_T* clockConfig)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_Enable(USART_T* usart)
void USART_Enable(USART_T *usart)
{
usart->CTRL1_B.UEN = BIT_SET;
}
@@ -200,7 +200,7 @@ void USART_Enable(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_Disable(USART_T* usart)
void USART_Disable(USART_T *usart)
{
usart->CTRL1_B.UEN = BIT_RESET;
}
@@ -220,7 +220,7 @@ void USART_Disable(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableDMA(USART_T* usart, USART_DMA_T dmaReq)
void USART_EnableDMA(USART_T *usart, USART_DMA_T dmaReq)
{
usart->CTRL3 |= dmaReq;
}
@@ -240,7 +240,7 @@ void USART_EnableDMA(USART_T* usart, USART_DMA_T dmaReq)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableDMA(USART_T* usart, USART_DMA_T dmaReq)
void USART_DisableDMA(USART_T *usart, USART_DMA_T dmaReq)
{
usart->CTRL3 &= (uint32_t)~dmaReq;
}
@@ -256,7 +256,7 @@ void USART_DisableDMA(USART_T* usart, USART_DMA_T dmaReq)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_Address(USART_T* usart, uint8_t address)
void USART_Address(USART_T *usart, uint8_t address)
{
usart->CTRL2_B.ADDR = address;
}
@@ -275,7 +275,7 @@ void USART_Address(USART_T* usart, uint8_t address)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_ConfigWakeUp(USART_T* usart, USART_WAKEUP_T wakeup)
void USART_ConfigWakeUp(USART_T *usart, USART_WAKEUP_T wakeup)
{
usart->CTRL1_B.WUPMCFG = wakeup;
}
@@ -289,7 +289,7 @@ void USART_ConfigWakeUp(USART_T* usart, USART_WAKEUP_T wakeup)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableMuteMode(USART_T* usart)
void USART_EnableMuteMode(USART_T *usart)
{
usart->CTRL1_B.RXMUTEEN = BIT_SET;
}
@@ -303,7 +303,7 @@ void USART_EnableMuteMode(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableMuteMode(USART_T* usart)
void USART_DisableMuteMode(USART_T *usart)
{
usart->CTRL1_B.RXMUTEEN = BIT_RESET;
}
@@ -322,7 +322,7 @@ void USART_DisableMuteMode(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_ConfigLINBreakDetectLength(USART_T* usart, USART_LBDL_T length)
void USART_ConfigLINBreakDetectLength(USART_T *usart, USART_LBDL_T length)
{
usart->CTRL2_B.LBDLCFG = length;
}
@@ -336,7 +336,7 @@ void USART_ConfigLINBreakDetectLength(USART_T* usart, USART_LBDL_T length)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableLIN(USART_T* usart)
void USART_EnableLIN(USART_T *usart)
{
usart->CTRL2_B.LINMEN = BIT_SET;
}
@@ -350,7 +350,7 @@ void USART_EnableLIN(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableLIN(USART_T* usart)
void USART_DisableLIN(USART_T *usart)
{
usart->CTRL2_B.LINMEN = BIT_RESET;
}
@@ -364,7 +364,7 @@ void USART_DisableLIN(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableTx(USART_T* usart)
void USART_EnableTx(USART_T *usart)
{
usart->CTRL1_B.TXEN = BIT_SET;
}
@@ -378,7 +378,7 @@ void USART_EnableTx(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableTx(USART_T* usart)
void USART_DisableTx(USART_T *usart)
{
usart->CTRL1_B.TXEN = BIT_RESET;
}
@@ -392,7 +392,7 @@ void USART_DisableTx(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableRx(USART_T* usart)
void USART_EnableRx(USART_T *usart)
{
usart->CTRL1_B.RXEN = BIT_SET;
}
@@ -406,7 +406,7 @@ void USART_EnableRx(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableRx(USART_T* usart)
void USART_DisableRx(USART_T *usart)
{
usart->CTRL1_B.RXEN = BIT_RESET;
}
@@ -422,7 +422,7 @@ void USART_DisableRx(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_TxData(USART_T* usart, uint16_t data)
void USART_TxData(USART_T *usart, uint16_t data)
{
usart->DATA_B.DATA = data;
}
@@ -436,7 +436,7 @@ void USART_TxData(USART_T* usart, uint16_t data)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
uint16_t USART_RxData(USART_T* usart)
uint16_t USART_RxData(USART_T *usart)
{
return (uint16_t)(usart->DATA_B.DATA);
}
@@ -450,7 +450,7 @@ uint16_t USART_RxData(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_TxBreak(USART_T* usart)
void USART_TxBreak(USART_T *usart)
{
usart->CTRL1_B.TXBF = BIT_SET;
}
@@ -466,7 +466,7 @@ void USART_TxBreak(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3
*/
void USART_ConfigGuardTime(USART_T* usart, uint8_t guardTime)
void USART_ConfigGuardTime(USART_T *usart, uint8_t guardTime)
{
usart->GTPSC_B.GRDT = guardTime;
}
@@ -482,7 +482,7 @@ void USART_ConfigGuardTime(USART_T* usart, uint8_t guardTime)
*
* @note The usart can be USART1, USART2, USART3
*/
void USART_ConfigPrescaler(USART_T* usart, uint8_t div)
void USART_ConfigPrescaler(USART_T *usart, uint8_t div)
{
usart->GTPSC_B.PSC = div;
}
@@ -496,7 +496,7 @@ void USART_ConfigPrescaler(USART_T* usart, uint8_t div)
*
* @note The Smart Card mode is not available for UART4 and UART5
*/
void USART_EnableSmartCard(USART_T* usart)
void USART_EnableSmartCard(USART_T *usart)
{
usart->CTRL3_B.SCEN = BIT_SET;
}
@@ -510,7 +510,7 @@ void USART_EnableSmartCard(USART_T* usart)
*
* @note The Smart Card mode is not available for UART4 and UART5
*/
void USART_DisableSmartCard(USART_T* usart)
void USART_DisableSmartCard(USART_T *usart)
{
usart->CTRL3_B.SCEN = BIT_RESET;
}
@@ -524,7 +524,7 @@ void USART_DisableSmartCard(USART_T* usart)
*
* @note The Smart Card mode is not available for UART4 and UART5
*/
void USART_EnableSmartCardNACK(USART_T* usart)
void USART_EnableSmartCardNACK(USART_T *usart)
{
usart->CTRL3_B.SCNACKEN = BIT_SET;
}
@@ -538,7 +538,7 @@ void USART_EnableSmartCardNACK(USART_T* usart)
*
* @note The Smart Card mode is not available for UART4 and UART5
*/
void USART_DisableSmartCardNACK(USART_T* usart)
void USART_DisableSmartCardNACK(USART_T *usart)
{
usart->CTRL3_B.SCNACKEN = BIT_RESET;
}
@@ -552,7 +552,7 @@ void USART_DisableSmartCardNACK(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableHalfDuplex(USART_T* usart)
void USART_EnableHalfDuplex(USART_T *usart)
{
usart->CTRL3_B.HDEN = BIT_SET;
}
@@ -566,7 +566,7 @@ void USART_EnableHalfDuplex(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableHalfDuplex(USART_T* usart)
void USART_DisableHalfDuplex(USART_T *usart)
{
usart->CTRL3_B.HDEN = BIT_RESET;
}
@@ -584,7 +584,7 @@ void USART_DisableHalfDuplex(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_ConfigIrDA(USART_T* usart, USART_IRDALP_T IrDAMode)
void USART_ConfigIrDA(USART_T *usart, USART_IRDALP_T IrDAMode)
{
usart->CTRL3_B.IRLPEN = IrDAMode;
}
@@ -598,7 +598,7 @@ void USART_ConfigIrDA(USART_T* usart, USART_IRDALP_T IrDAMode)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableIrDA(USART_T* usart)
void USART_EnableIrDA(USART_T *usart)
{
usart->CTRL3_B.IREN = BIT_SET;
}
@@ -612,7 +612,7 @@ void USART_EnableIrDA(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableIrDA(USART_T* usart)
void USART_DisableIrDA(USART_T *usart)
{
usart->CTRL3_B.IREN = BIT_RESET;
}
@@ -637,7 +637,7 @@ void USART_DisableIrDA(USART_T* usart)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_EnableInterrupt(USART_T* usart, USART_INT_T interrupt)
void USART_EnableInterrupt(USART_T *usart, USART_INT_T interrupt)
{
uint32_t temp;
@@ -679,7 +679,7 @@ void USART_EnableInterrupt(USART_T* usart, USART_INT_T interrupt)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_DisableInterrupt(USART_T* usart, USART_INT_T interrupt)
void USART_DisableInterrupt(USART_T *usart, USART_INT_T interrupt)
{
uint32_t temp;
@@ -723,7 +723,7 @@ void USART_DisableInterrupt(USART_T* usart, USART_INT_T interrupt)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
uint8_t USART_ReadStatusFlag(USART_T* usart, USART_FLAG_T flag)
uint8_t USART_ReadStatusFlag(USART_T *usart, USART_FLAG_T flag)
{
return (usart->STS & flag) ? SET : RESET;
}
@@ -744,7 +744,7 @@ uint8_t USART_ReadStatusFlag(USART_T* usart, USART_FLAG_T flag)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_ClearStatusFlag(USART_T* usart, USART_FLAG_T flag)
void USART_ClearStatusFlag(USART_T *usart, USART_FLAG_T flag)
{
usart->STS &= (uint32_t)~flag;
}
@@ -771,7 +771,7 @@ void USART_ClearStatusFlag(USART_T* usart, USART_FLAG_T flag)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
uint8_t USART_ReadIntFlag(USART_T* usart, USART_INT_T flag)
uint8_t USART_ReadIntFlag(USART_T *usart, USART_INT_T flag)
{
uint32_t itFlag, srFlag;
@@ -816,7 +816,7 @@ uint8_t USART_ReadIntFlag(USART_T* usart, USART_INT_T flag)
*
* @note The usart can be USART1, USART2, USART3, UART4 and UART5
*/
void USART_ClearIntFlag(USART_T* usart, USART_INT_T flag)
void USART_ClearIntFlag(USART_T *usart, USART_INT_T flag)
{
uint32_t srFlag;

2
bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/apm32f10x_wwdt.c
View File

@@ -139,7 +139,7 @@ void WWDT_Enable(uint8_t counter)
*/
uint8_t WWDT_ReadFlag(void)
{
return (uint8_t) (WWDT->STS);
return (uint8_t)(WWDT->STS);
}
/*!

198
bsp/apm32/libraries/APM32F10x_Library/Device/Geehy/APM32F10x/Source/system_apm32f10x.c
View File

@@ -43,38 +43,38 @@
#define VECT_TAB_OFFSET 0x00
#ifdef SYSTEM_CLOCK_HSE
uint32_t SystemCoreClock = SYSTEM_CLOCK_HSE;
uint32_t SystemCoreClock = SYSTEM_CLOCK_HSE;
#elif defined SYSTEM_CLOCK_24MHz
uint32_t SystemCoreClock = SYSTEM_CLOCK_24MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_24MHz;
#elif defined SYSTEM_CLOCK_36MHz
uint32_t SystemCoreClock = SYSTEM_CLOCK_36MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_36MHz;
#elif defined SYSTEM_CLOCK_48MHz
uint32_t SystemCoreClock = SYSTEM_CLOCK_48MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_48MHz;
#elif defined SYSTEM_CLOCK_56MHz
uint32_t SystemCoreClock = SYSTEM_CLOCK_56MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_56MHz;
#elif defined SYSTEM_CLOCK_72MHz
uint32_t SystemCoreClock = SYSTEM_CLOCK_72MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_72MHz;
#else
uint32_t SystemCoreClock = SYSTEM_CLOCK_96MHz;
uint32_t SystemCoreClock = SYSTEM_CLOCK_96MHz;
#endif
static void SystemClockConfig(void);
#ifdef SYSTEM_CLOCK_HSE
static void SystemClockHSE(void);
static void SystemClockHSE(void);
#elif defined SYSTEM_CLOCK_24MHz
static void SystemClock24M(void);
static void SystemClock24M(void);
#elif defined SYSTEM_CLOCK_36MHz
static void SystemClock36M(void);
static void SystemClock36M(void);
#elif defined SYSTEM_CLOCK_48MHz
static void SystemClock48M(void);
static void SystemClock48M(void);
#elif defined SYSTEM_CLOCK_56MHz
static void SystemClock56M(void);
static void SystemClock56M(void);
#elif defined SYSTEM_CLOCK_72MHz
static void SystemClock72M(void);
static void SystemClock72M(void);
#elif defined SYSTEM_CLOCK_96MHz
static void SystemClock96M(void);
static void SystemClock96M(void);
#endif
/*!
@@ -85,7 +85,7 @@ static void SystemClock96M(void);
* @retval None
*
*/
void SystemInit (void)
void SystemInit(void)
{
/** Set HSIEN bit */
RCM->CTRL_B.HSIEN = BIT_SET;
@@ -118,50 +118,50 @@ void SystemInit (void)
* @retval None
*
*/
void SystemCoreClockUpdate (void)
void SystemCoreClockUpdate(void)
{
uint32_t sysClock, pllMull, pllSource, Prescaler;
uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
sysClock = RCM->CFG_B.SCLKSELSTS;
switch(sysClock)
switch (sysClock)
{
/** sys clock is HSI */
case 0:
SystemCoreClock = HSI_VALUE;
/** sys clock is HSI */
case 0:
SystemCoreClock = HSI_VALUE;
break;
/** sys clock is HSE */
case 1:
SystemCoreClock = HSE_VALUE;
/** sys clock is HSE */
case 1:
SystemCoreClock = HSE_VALUE;
break;
/** sys clock is PLL */
case 2:
pllMull = RCM->CFG_B.PLLMULCFG + 2;
pllSource = RCM->CFG_B.PLLSRCSEL;
/** sys clock is PLL */
case 2:
pllMull = RCM->CFG_B.PLLMULCFG + 2;
pllSource = RCM->CFG_B.PLLSRCSEL;
/** PLL entry clock source is HSE */
if(pllSource == BIT_SET)
/** PLL entry clock source is HSE */
if (pllSource == BIT_SET)
{
SystemCoreClock = HSE_VALUE * pllMull;
/** HSE clock divided by 2 */
if (pllSource == RCM->CFG_B.PLLHSEPSC)
{
SystemCoreClock = HSE_VALUE * pllMull;
/** HSE clock divided by 2 */
if(pllSource == RCM->CFG_B.PLLHSEPSC)
{
SystemCoreClock >>= 1;
}
SystemCoreClock >>= 1;
}
/** PLL entry clock source is HSI/2 */
else
{
SystemCoreClock = (HSI_VALUE >> 1) * pllMull;
}
break;
}
/** PLL entry clock source is HSI/2 */
else
{
SystemCoreClock = (HSI_VALUE >> 1) * pllMull;
}
break;
default:
SystemCoreClock = HSI_VALUE;
default:
SystemCoreClock = HSI_VALUE;
break;
}
@@ -209,17 +209,17 @@ static void SystemClockHSE(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -227,9 +227,9 @@ static void SystemClockHSE(void)
FMC->CTRL1_B.WS = 0;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK */
RCM->CFG_B.APB1PSC = 0;
@@ -237,7 +237,7 @@ static void SystemClockHSE(void)
RCM->CFG_B.SCLKSEL = 1;
/** Wait till HSE is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x01);
while (RCM->CFG_B.SCLKSELSTS != 0x01);
}
}
@@ -255,17 +255,17 @@ static void SystemClock24M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -273,9 +273,9 @@ static void SystemClock24M(void)
FMC->CTRL1_B.WS = 0;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK */
RCM->CFG_B.APB1PSC = 0;
@@ -287,12 +287,12 @@ static void SystemClock24M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
@@ -309,17 +309,17 @@ static void SystemClock36M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -327,9 +327,9 @@ static void SystemClock36M(void)
FMC->CTRL1_B.WS = 1;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK */
RCM->CFG_B.APB1PSC = 0;
@@ -341,12 +341,12 @@ static void SystemClock36M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS != 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
@@ -363,17 +363,17 @@ static void SystemClock48M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -381,9 +381,9 @@ static void SystemClock48M(void)
FMC->CTRL1_B.WS = 1;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK / 2 */
RCM->CFG_B.APB1PSC = 4;
@@ -394,12 +394,12 @@ static void SystemClock48M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
@@ -416,17 +416,17 @@ static void SystemClock56M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -434,9 +434,9 @@ static void SystemClock56M(void)
FMC->CTRL1_B.WS = 2;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK / 2 */
RCM->CFG_B.APB1PSC = 4;
@@ -447,12 +447,12 @@ static void SystemClock56M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
@@ -469,17 +469,17 @@ static void SystemClock72M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -487,9 +487,9 @@ static void SystemClock72M(void)
FMC->CTRL1_B.WS = 2;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK / 2 */
RCM->CFG_B.APB1PSC = 4;
@@ -500,12 +500,12 @@ static void SystemClock72M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
@@ -523,17 +523,17 @@ static void SystemClock96M(void)
{
__IO uint32_t i;
RCM->CTRL_B.HSEEN= BIT_SET;
RCM->CTRL_B.HSEEN = BIT_SET;
for(i = 0; i < HSE_STARTUP_TIMEOUT; i++)
for (i = 0; i < HSE_STARTUP_TIMEOUT; i++)
{
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
break;
}
}
if(RCM->CTRL_B.HSERDYFLG)
if (RCM->CTRL_B.HSERDYFLG)
{
/** Enable Prefetch Buffer */
FMC->CTRL1_B.PBEN = BIT_SET;
@@ -541,9 +541,9 @@ static void SystemClock96M(void)
FMC->CTRL1_B.WS = 3;
/** HCLK = SYSCLK */
RCM->CFG_B.AHBPSC= 0X00;
RCM->CFG_B.AHBPSC = 0X00;
/** PCLK2 = HCLK */
RCM->CFG_B.APB2PSC= 0;
RCM->CFG_B.APB2PSC = 0;
/** PCLK1 = HCLK / 2 */
RCM->CFG_B.APB1PSC = 4;
@@ -554,12 +554,12 @@ static void SystemClock96M(void)
/** Enable PLL */
RCM->CTRL_B.PLLEN = 1;
/** Wait PLL Ready */
while(RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
while (RCM->CTRL_B.PLLRDYFLG == BIT_RESET);
/** Select PLL as system clock source */
RCM->CFG_B.SCLKSEL = 2;
/** Wait till PLL is used as system clock source */
while(RCM->CFG_B.SCLKSELSTS!= 0x02);
while (RCM->CFG_B.SCLKSELSTS != 0x02);
}
}
#endif

33
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/CDC/inc/usbd_class_cdc.h
View File

@@ -1,33 +0,0 @@
/*!
* @file usbd_class_cdc.h
*
* @brief CDC Class handler file head file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef __CDC_CLASS_
#define __CDC_CLASS_
#include "usbd_core.h"
void USBD_ClassHandler(USBD_DevReqData_T* reqData);
#endif

71
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/CDC/src/usbd_class_cdc.c
View File

@@ -1,71 +0,0 @@
/*!
* @file usbd_class_cdc.c
*
* @brief CDC Class handler file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_class_cdc.h"
static uint8_t cmdBuf[8] = {0};
/*!
* @brief USB CDC Class request handler
*
* @param reqData : point to USBD_DevReqData_T structure
*
* @retval None
*/
void USBD_ClassHandler(USBD_DevReqData_T* reqData)
{
uint16_t length = ((uint16_t)reqData->byte.wLength[1] << 8) | \
reqData->byte.wLength[0] ;
if (!length)
{
if (!reqData->byte.bmRequestType.bit.dir)
{
USBD_CtrlTxStatus();
}
else
{
USBD_CtrlRxStatus();
}
}
else
{
switch (reqData->byte.bRequest)
{
case 0x20:
USBD_CtrlOutData(cmdBuf, length);
break;
case 0x21:
USBD_CtrlInData(cmdBuf, length);
break;
case 0x22:
USBD_CtrlOutData(cmdBuf, length);
break;
default:
break;
}
}
}

37
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/HID/inc/usbd_class_hid.h
View File

@@ -1,37 +0,0 @@
/*!
* @file usbd_class_hid.h
*
* @brief HID Class handler file head file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_core.h"
#define HID_CLASS_REQ_SET_PROTOCOL 0x0B
#define HID_CLASS_REQ_GET_PROTOCOL 0x03
#define HID_CLASS_REQ_SET_IDLE 0x0A
#define HID_CLASS_REQ_GET_IDLE 0x02
#define HID_CLASS_REQ_SET_REPORT 0x09
#define HID_CLASS_REQ_GET_REPORT 0x01
void USBD_ClassHandler(USBD_DevReqData_T* reqData);

63
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/HID/src/usbd_class_hid.c
View File

@@ -1,63 +0,0 @@
/*!
* @file usbd_class_hid.c
*
* @brief HID Class handler file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_class_hid.h"
static uint8_t s_hidIdleState;
static uint8_t s_hidProtocol;
/*!
* @brief USB HID Class request handler
*
* @param reqData : point to USBD_DevReqData_T structure
*
* @retval None
*/
void USBD_ClassHandler(USBD_DevReqData_T* reqData)
{
switch (reqData->byte.bRequest)
{
case HID_CLASS_REQ_SET_IDLE:
s_hidIdleState = reqData->byte.wValue[1];
USBD_CtrlInData(NULL, 0);
break;
case HID_CLASS_REQ_GET_IDLE:
USBD_CtrlInData(&s_hidIdleState, 1);
break;
case HID_CLASS_REQ_SET_PROTOCOL:
s_hidProtocol = reqData->byte.wValue[0];
USBD_CtrlInData(NULL, 0);
break;
case HID_CLASS_REQ_GET_PROTOCOL:
USBD_CtrlInData(&s_hidProtocol, 1);
break;
default:
break;
}
}

37
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/inc/usbd_class_msc.h
View File

@@ -1,37 +0,0 @@
/*!
* @file usbd_class_msc.h
*
* @brief MSC Class handler file head file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef __USBD_CLASS_MSC
#define __USBD_CLASS_MSC
#include "usbd_core.h"
#define BOT_GET_MAX_LUN 0xFE
#define BOT_RESET 0xFF
void USBD_MSC_ClassHandler(USBD_DevReqData_T* reqData);
#endif

106
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/inc/usbd_msc_bot.h
View File

@@ -1,106 +0,0 @@
/*!
* @file usbd_msc_bot.h
*
* @brief MSC BOT protocol core functions
*
* @version V1.0.0
*
* @date 2021-12-25
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_core.h"
#ifndef __USBD_MSC_BOT_H
#define __USBD_MSC_BOT_H
#define MSC_BOT_CBW_SIGNATURE (uint32_t)(0x43425355)
#define MSC_BOT_CBW_LENGTH 31
#define MSC_BOT_CSW_SIGNATURE (uint32_t)(0x53425355)
#define MSC_BOT_CSW_LENGTH 13
typedef enum
{
BOT_STATE_IDLE, //!< Idle state
BOT_STATE_DATA_OUT, //!< Data Out state
BOT_STATE_DATA_IN, //!< Data In state
BOT_STATE_LAST_DATA_IN, //!< Last Data In Last
BOT_STATE_SEND_DATA //!< Send Immediate data
} BOT_STATE_T;
typedef enum
{
BOT_STATUS_NORMAL,
BOT_STATUS_RECOVERY,
BOT_STATUS_ERROR
} BOT_STATUS_T;
typedef enum
{
BOT_CSW_STATUS_CMD_OK,
BOT_CSW_STATUS_CMD_FAIL,
BOT_CSW_STATUS_PHASE_ERROR
} BOT_CSW_STATUS_T;
/**
* @brief Command Block Wrapper
*/
typedef struct
{
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataXferLen;
uint8_t bmFlags;
uint8_t bLUN;
uint8_t bCBLen;
uint8_t CB[16];
} BOT_CBW_T;
/**
* @brief Command Status Wrapper
*/
typedef struct
{
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataResidue;
uint8_t bStatus;
} BOT_CSW_T;
typedef struct
{
uint8_t state;
uint8_t status;
uint16_t dataLen;
BOT_CBW_T CBW;
BOT_CSW_T CSW;
uint8_t data[MSC_MEDIA_PACKET];
} BOT_Info_T;
extern BOT_Info_T g_BOTInfo;
void USBD_MSC_BOT_Reset(void);
void USBD_MSC_BOT_Init(void);
void USBD_MSC_BOT_OutData(uint8_t ep);
void USBD_MSC_BOT_InData(uint8_t ep);
void USBD_MSC_BOT_TxCSW(uint8_t cswStatus);
void USBD_MSC_BOT_Stall(void);
void USBD_MSV_BOT_ClearFeatureHandler(void);
#endif

131
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/inc/usbd_msc_scsi.h
View File

@@ -1,131 +0,0 @@
/*!
* @file usbd_msc_scsi.h
*
* @brief MSC scsi
*
* @version V1.0.0
*
* @date 2021-12-25
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_core.h"
#ifndef __USBD_MSC_SCSI_H_
#define __USBD_MSC_SCSI_H_
/**
* @brief SCSI function status
*/
enum
{
SCSI_OK,
SCSI_FAIL
};
/**
* @brief SCSI Sense Key
*/
typedef enum
{
SCSI_SKEY_NO_SENSE,
SCSI_SKEY_RECOVERED_ERROR,
SCSI_SKEY_NOT_READY,
SCSI_SKEY_MEDIUM_ERROR,
SCSI_SKEY_HARDWARE_ERROR,
SCSI_SKEY_ILLEGAL_REQUEST,
SCSI_SKEY_UNIT_ATTENTION,
SCSI_SKEY_DATA_PROTECT,
SCSI_SKEY_BLANK_CHECK,
SCSI_SKEY_VENDOR_SPECIFIC,
SCSI_SKEY_COPY_ABORTED,
SCSI_SKEY_ABORTED_COMMAND,
SCSI_SKEY_VOLUME_OVERFLOW = 13,
SCSI_SKEY_MISCOMPARE = 14
} SCSI_SKEY_T;
/**
* @brief SCSI Sense
*/
typedef struct {
uint8_t sensekey;
uint8_t ASC;
uint8_t ASCQ;
} SCSI_Sense_T;
#define SCSI_SENSE_LIST_NUMBER 4
#define SCSI_INQUIRY_LENGTH 36
/** SCSI Commands */
#define SCSI_CMD_FORMAT_UNIT ((uint8_t)0x04)
#define SCSI_CMD_INQUIRY ((uint8_t)0x12)
#define SCSI_CMD_MODE_SELECT_6 ((uint8_t)0x15)
#define SCSI_CMD_MODE_SELECT_10 ((uint8_t)0x55)
#define SCSI_CMD_MODE_SENSE_6 ((uint8_t)0x1A)
#define SCSI_CMD_MODE_SENSE_10 ((uint8_t)0x5A)
#define SCSI_CMD_ALLOW_MEDIUM_REMOVAL ((uint8_t)0x1E)
#define SCSI_CMD_READ_6 ((uint8_t)0x08)
#define SCSI_CMD_READ_10 ((uint8_t)0x28)
#define SCSI_CMD_READ_12 ((uint8_t)0xA8)
#define SCSI_CMD_READ_16 ((uint8_t)0x88)
#define SCSI_CMD_READ_CAPACITY_10 ((uint8_t)0x25)
#define SCSI_CMD_READ_CAPACITY_16 ((uint8_t)0x9E)
#define SCSI_CMD_REQUEST_SENSE ((uint8_t)0x03)
#define SCSI_CMD_START_STOP_UNIT ((uint8_t)0x1B)
#define SCSI_CMD_TEST_UNIT_READY ((uint8_t)0x00)
#define SCSI_CMD_WRITE6 ((uint8_t)0x0A)
#define SCSI_CMD_WRITE10 ((uint8_t)0x2A)
#define SCSI_CMD_WRITE12 ((uint8_t)0xAA)
#define SCSI_CMD_WRITE16 ((uint8_t)0x8A)
#define SCSI_CMD_VERIFY_10 ((uint8_t)0x2F)
#define SCSI_CMD_VERIFY_12 ((uint8_t)0xAF)
#define SCSI_CMD_VERIFY_16 ((uint8_t)0x8F)
#define SCSI_CMD_SEND_DIAGNOSTIC ((uint8_t)0x1D)
#define SCSI_CMD_READ_FORMAT_CAPACITIES ((uint8_t)0x23)
#define SCSI_ASC_INVALID_CDB 0x20
#define SCSI_ASC_INVALID_FIELED_IN_COMMAND 0x24
#define SCSI_ASC_PARAMETER_LIST_LENGTH_ERROR 0x1A
#define SCSI_ASC_INVALID_FIELD_IN_PARAMETER_LIST 0x26
#define SCSI_ASC_ADDRESS_OUT_OF_RANGE 0x21
#define SCSI_ASC_MEDIUM_NOT_PRESENT 0x3A
#define SCSI_ASC_MEDIUM_HAVE_CHANGED 0x28
#define SCSI_ASC_WRITE_PROTECTED 0x27
#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
#define SCSI_ASC_WRITE_FAULT 0x03
#define SCSI_READ_FORMAT_CAPACITY_DATA_LEN 0x0C
#define SCSI_READ_CAPACITY10_DATA_LEN 0x08
#define SCSI_MODE_SENSE10_DATA_LEN 0x08
#define SCSI_MODE_SENSE6_DATA_LEN 0x04
#define SCSI_REQUEST_SENSE_DATA_LEN 0x12
#define SCSI_STANDARD_INQUIRY_DATA_LEN 0x24
#define SCSI_BLKVFY 0x04
extern SCSI_Sense_T g_scsiSense[SCSI_SENSE_LIST_NUMBER];
extern uint8_t g_senseTxCnt;
extern uint8_t g_sensePutCnt;
uint8_t SCSI_CmdHandler(uint8_t lun, uint8_t *cmd);
void SCSI_PutSenseCode(uint8_t lun, uint8_t sKey, uint8_t ASC, uint8_t ASCQ);
#endif

79
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/src/usbd_class_msc.c
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@@ -1,79 +0,0 @@
/*!
* @file usbd_class_msc.c
*
* @brief MSC Class file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_class_msc.h"
#include "usbd_msc_bot.h"
static uint8_t s_mscMaxLen = 0;
/*!
* @brief USB MSC Class request handler
*
* @param reqData : point to USBD_DevReqData_T structure
*
* @retval None
*/
void USBD_MSC_ClassHandler(USBD_DevReqData_T* reqData)
{
uint16_t wValue = ((uint16_t)reqData->byte.wValue[1] << 8) | \
reqData->byte.wValue[0];
uint16_t wLength = ((uint16_t)reqData->byte.wLength[1] << 8) | \
reqData->byte.wLength[0];
switch (reqData->byte.bRequest)
{
case BOT_GET_MAX_LUN :
if ((wValue == 0) && (wLength == 1) && \
(reqData->byte.bmRequestType.bit.dir == 1))
{
s_mscMaxLen = STORAGE_MAX_LUN - 1;
USBD_CtrlInData(&s_mscMaxLen, 1);
}
else
{
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
}
break;
case BOT_RESET :
if ((wValue == 0) && (wLength == 0) && \
(reqData->byte.bmRequestType.bit.dir == 0))
{
USBD_CtrlInData(NULL, 0);
/** Reset */
USBD_MSC_BOT_Reset();
}
else
{
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
}
break;
default:
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
break;
}
}

242
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/src/usbd_msc_bot.c
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@@ -1,242 +0,0 @@
/*!
* @file usbd_msv_bot.c
*
* @brief MSC BOT protocol core functions
*
* @version V1.0.0
*
* @date 2021-12-25
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_msc_bot.h"
#include "usbd_core.h"
#include "usbd_storage_disk.h"
#include "usbd_msc_scsi.h"
BOT_Info_T g_BOTInfo;
static void USBD_MSC_BOT_DecodeCBW(void);
static void USBD_MSC_BOT_TxData(uint8_t *txBuf, uint16_t len);
static void USBD_MSC_BOT_Stall(void);
/*!
* @brief BOT Process Reset.
*
* @param None
*
* @retval None
*/
void USBD_MSC_BOT_Reset(void)
{
g_BOTInfo.state = BOT_STATE_IDLE;
g_BOTInfo.status = BOT_STATUS_RECOVERY;
USBD_RxData(MSC_OUT_EP & 0x7f, (uint8_t *)&g_BOTInfo.CBW, MSC_BOT_CBW_LENGTH);
}
/*!
* @brief BOT Process initialization.
*
* @param None
*
* @retval None
*/
void USBD_MSC_BOT_Init(void)
{
g_BOTInfo.state = BOT_STATE_IDLE;
g_BOTInfo.status = BOT_STATUS_NORMAL;
g_storageCallBack.Init(0);
USBD_RxData(MSC_OUT_EP & 0x7f, (uint8_t *)&g_BOTInfo.CBW, MSC_BOT_CBW_LENGTH);
}
/*!
* @brief Bulk OUT data handler.
*
* @param ep : OUT endpoint
*
* @retval None
*/
void USBD_MSC_BOT_OutData(uint8_t ep)
{
if (g_BOTInfo.state == BOT_STATE_IDLE)
{
USBD_MSC_BOT_DecodeCBW();
}
else if (g_BOTInfo.state == BOT_STATE_DATA_OUT)
{
if (SCSI_CmdHandler(g_BOTInfo.CBW.bLUN, g_BOTInfo.CBW.CB) != SCSI_OK)
{
USBD_MSC_BOT_TxCSW(BOT_CSW_STATUS_CMD_FAIL);
}
}
}
/*!
* @brief Bulk IN data handler.
*
* @param ep : IN endpoint
*
* @retval None
*/
void USBD_MSC_BOT_InData(uint8_t ep)
{
if (g_BOTInfo.state == BOT_STATE_DATA_IN)
{
if (SCSI_CmdHandler(g_BOTInfo.CBW.bLUN, g_BOTInfo.CBW.CB) != SCSI_OK)
{
USBD_MSC_BOT_TxCSW(BOT_CSW_STATUS_CMD_FAIL);
}
}
else if ((g_BOTInfo.state == BOT_STATE_SEND_DATA) || \
(g_BOTInfo.state == BOT_STATE_LAST_DATA_IN))
{
USBD_MSC_BOT_TxCSW(BOT_CSW_STATUS_CMD_OK);
}
}
/*!
* @brief Decode CBW.
*
* @param None
*
* @retval None
*/
static void USBD_MSC_BOT_DecodeCBW(void)
{
uint32_t xferCnt = g_usbDev.outBuf[MSC_OUT_EP & 0x7f].xferCnt;
g_BOTInfo.CSW.dTag = g_BOTInfo.CBW.dTag;
g_BOTInfo.CSW.dDataResidue = g_BOTInfo.CBW.dDataXferLen;
if ((xferCnt != MSC_BOT_CBW_LENGTH) || \
(g_BOTInfo.CBW.dSignature != MSC_BOT_CBW_SIGNATURE) || \
(g_BOTInfo.CBW.bLUN > 1) || (g_BOTInfo.CBW.bCBLen < 1) || \
(g_BOTInfo.CBW.bCBLen > 16))
{
SCSI_PutSenseCode(g_BOTInfo.CBW.bLUN, SCSI_SKEY_ILLEGAL_REQUEST,
SCSI_ASC_INVALID_CDB, 0);
g_BOTInfo.status = BOT_STATUS_ERROR;
}
else
{
if (SCSI_CmdHandler(g_BOTInfo.CBW.bLUN, g_BOTInfo.CBW.CB) != SCSI_OK)
{
USBD_MSC_BOT_Stall();
}
else if ((g_BOTInfo.state == BOT_STATE_IDLE) || \
(g_BOTInfo.state == BOT_STATE_SEND_DATA))
{
if (g_BOTInfo.dataLen)
{
USBD_MSC_BOT_TxData(g_BOTInfo.data, g_BOTInfo.dataLen);
}
else
{
USBD_MSC_BOT_TxCSW(BOT_CSW_STATUS_CMD_OK);
}
}
}
}
/*!
* @brief MSC send data.
*
* @param txBuf : buffer to send
*
* @param len : buffer length
*
* @retval None
*/
static void USBD_MSC_BOT_TxData(uint8_t *txBuf, uint16_t len)
{
len = USB_MIN(len, g_BOTInfo.CBW.dDataXferLen);
g_BOTInfo.CSW.dDataResidue -= len;
g_BOTInfo.CSW.bStatus = BOT_CSW_STATUS_CMD_OK;
g_BOTInfo.state = BOT_STATE_SEND_DATA;
USBD_TxData(MSC_IN_EP & 0x7f, txBuf, len);
}
/*!
* @brief Send CSW.
*
* @param cswStatus : status of CSW
*
* @retval None
*/
void USBD_MSC_BOT_TxCSW(uint8_t cswStatus)
{
g_BOTInfo.CSW.dSignature = MSC_BOT_CSW_SIGNATURE;
g_BOTInfo.CSW.bStatus = cswStatus;
g_BOTInfo.state = BOT_STATE_IDLE;
USBD_TxData(MSC_IN_EP & 0x7f, (uint8_t*)&g_BOTInfo.CSW,
MSC_BOT_CSW_LENGTH);
USBD_RxData(MSC_OUT_EP & 0x7f, (uint8_t*)&g_BOTInfo.CBW,
MSC_BOT_CBW_LENGTH);
}
/*!
* @brief handler clearFeature in standard request.
*
* @param None
*
* @retval None
*/
void USBD_MSV_BOT_ClearFeatureHandler(void)
{
if (g_BOTInfo.status == BOT_STATUS_ERROR)
{
USBD_SetEPTxStatus(MSC_IN_EP & 0x7f, USBD_EP_STATUS_NAK);
g_BOTInfo.status = BOT_STATUS_NORMAL;
}
else if (((g_usbDev.reqData.byte.wIndex[0] & 0x80) == 0x80) && \
g_BOTInfo.status != BOT_STATUS_RECOVERY)
{
USBD_MSC_BOT_TxCSW(BOT_CSW_STATUS_CMD_FAIL);
}
}
/*!
* @brief Stall MSC.
*
* @param None
*
* @retval None
*/
static void USBD_MSC_BOT_Stall(void)
{
if ((g_BOTInfo.CBW.bmFlags == 0) && (g_BOTInfo.CBW.dDataXferLen != 0) && \
(g_BOTInfo.status == BOT_STATUS_NORMAL))
{
USBD_SetEPRxStatus(MSC_OUT_EP & 0x7f, USBD_EP_STATUS_STALL);
}
USBD_SetEPTxStatus(MSC_IN_EP & 0x7f, USBD_EP_STATUS_STALL);
if (g_BOTInfo.status == BOT_STATUS_ERROR)
{
USBD_RxData(MSC_OUT_EP & 0x7f, (uint8_t *)&g_BOTInfo.CBW,
MSC_BOT_CBW_LENGTH);
}
}

701
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Class/MSC/src/usbd_msc_scsi.c
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312
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/inc/usbd_core.h
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@@ -1,312 +0,0 @@
/*!
* @file usbd_core.h
*
* @brief USB protocol core handler head file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef __USBD_CORE_H_
#define __USBD_CORE_H_
#include "drv_usb_device.h"
/** Get minimum value */
#define USB_MIN(a, b) (a >= b ? b : a)
/** Get maximum value */
#define USB_MAX(a, b) (a >= b ? a : b)
/**
* @brief USB request type
*/
enum
{
USBD_REQ_TYPE_STANDARD = 0,
USBD_REQ_TYPE_CLASS = 1,
USBD_REQ_TYPE_VENDOR = 2,
USBD_REQ_TYPE_RESERVED = 3
};
/**
* @brief USB recipient
*/
enum
{
USBD_RECIPIENT_DEVICE = 0,
USBD_RECIPIENT_INTERFACE = 1,
USBD_RECIPIENT_ENDPOINT = 2,
USBD_RECIPIENT_OTHER = 3,
};
/**
* @brief USB standard device requests
*/
enum
{
USBD_GET_STATUS = 0,
USBD_CLEAR_FEATURE = 1,
USBD_SET_FEATURE = 3,
USBD_SET_ADDRESS = 5,
USBD_GET_DESCRIPTOR = 6,
USBD_SET_DESCRIPTOR = 7,
USBD_GET_CONFIGURATION = 8,
USBD_SET_CONFIGURATION = 9,
USBD_GET_INTERFACE = 10,
USBD_SET_INTERFACE = 11,
USBD_SYNCH_FRAME = 12,
};
/**
* @brief USB descriptor types
*/
enum
{
USBD_DESC_DEVICE = 1,
USBD_DESC_CONFIGURATION = 2,
USBD_DESC_STRING = 3,
USBD_DESC_INTERFACE = 4,
USBD_DESC_ENDPOINT = 5,
USBD_DESC_DEVICE_QUALIFIER = 6,
USBD_DESC_OTHER_SPEED = 7,
USBD_INTERFACE_POWER = 8,
};
/**
* @brief USB standard feature
*/
enum
{
USBD_FEATURE_ENDPOINT_HALT = 0,
USBD_FEATURE_REMOTE_WAKEUP = 1,
USBD_FEATURE_TEST_MODE = 2
};
/**
* @brief USB internal state machine
*/
typedef enum
{
USBD_CTRL_STATE_WAIT_SETUP,
USBD_CTRL_STATE_DATA_IN,
USBD_CTRL_STATE_DATA_OUT,
USBD_CTRL_STATE_WAIT_STATUS_IN,
USBD_CTRL_STATE_WAIT_STATUS_OUT,
USBD_CTRL_STATE_STALLED,
}USBD_CTRL_STATE_T;
/**
* @brief USBD Endpoint type for USB protocol
*/
typedef enum
{
USBD_EP_TYPE_CONTROL,
USBD_EP_TYPE_ISO,
USBD_EP_TYPE_BULK,
USBD_EP_TYPE_INTERRUPT
}USBD_EP_TYPE_T;
/**
* @brief USB request type
*/
typedef union
{
uint8_t byte;
struct
{
uint8_t recipient : 5;
uint8_t type : 2;
uint8_t dir : 1;
}bit;
}USBD_REQ_TYPE_T;
/**
* @brief USB device request data
*/
typedef struct
{
union
{
uint8_t pack[8];
struct
{
USBD_REQ_TYPE_T bmRequestType;
uint8_t bRequest;
uint8_t wValue[2];
uint8_t wIndex[2];
uint8_t wLength[2];
} byte;
};
} USBD_DevReqData_T;
/**
* @brief Descriptor structure
*/
typedef struct
{
const uint8_t *pDesc;
uint8_t size;
}USBD_Descriptor_T;
/** USB standard request callback handler */
typedef void (*USBD_StdReqHandler_T)(void);
/** USB request handler */
typedef void (*USBD_ReqHandler_T)(USBD_DevReqData_T *);
/** Ctrl Tx Status handler function define */
typedef void (*USBD_CtrlTxStatusHandler_T)(void);
/** Ctrl Rx Status handler function define */
typedef void (*USBD_CtrlRxStatusHandler_T)(void);
/** Endpoint handler */
typedef void (*USBD_EPHandler_T)(uint8_t ep);
/** Reset handler */
typedef void (*USBD_ResetHandler_T)(void);
/** Interrupt handler function define */
typedef void (*USBD_InterruptHandler_T)(void);
/**
* @brief USB Class Request handler
*/
typedef struct
{
USBD_StdReqHandler_T getConfigurationHandler;
USBD_StdReqHandler_T getDescriptorHandler;
USBD_StdReqHandler_T getInterfaceHandler;
USBD_StdReqHandler_T getStatusHandler;
USBD_StdReqHandler_T setAddressHandler;
USBD_StdReqHandler_T setConfigurationHandler;
USBD_StdReqHandler_T setDescriptorHandler;
USBD_StdReqHandler_T setFeatureHandler;
USBD_StdReqHandler_T setInterfaceHandler;
USBD_StdReqHandler_T clearFeatureHandler;
} USBD_StdReqCallback_T;
/**
* @brief Control transfer buffer
*/
typedef struct
{
uint8_t *pBuf; //!< Data buffer
uint32_t bufLen; //!< Length of the data buffer
uint8_t packNum; //!< Packet number of the data
uint8_t zeroPackFill; //!< Fill a zero pack for IN transfer or not
uint16_t maxPackSize; //!< Max pack size of this endpoint
uint32_t xferCnt; //!< Data count of one pack on from tansfer
} USBD_CtrlBuf_T;
/**
* @brief USB init parameter
*/
typedef struct
{
USBD_Descriptor_T *pDeviceDesc; //!< Device descriptor pointer
USBD_Descriptor_T *pConfigurationDesc; //!< Configuration descriptor pointer
USBD_Descriptor_T *pStringDesc; //!< String descriptor pointer
USBD_Descriptor_T *pQualifierDesc; //!< Device Qualifier descriptor pointer
USBD_Descriptor_T *pHidReportDesc; //!< HID report descriptor pointer
USBD_StdReqCallback_T *pStdReqCallback;
USBD_ReqHandler_T stdReqExceptionHandler; //!< Standard request exception handler
USBD_ReqHandler_T classReqHandler; //!< Class request handler
USBD_ReqHandler_T vendorReqHandler; //!< vendor request handler
USBD_CtrlTxStatusHandler_T txStatusHandler; //!< Send IN status early handler
USBD_CtrlRxStatusHandler_T rxStatusHandler; //!< Receive OUT status early handler
USBD_EPHandler_T outEpHandler; //!< OUT EP transfer done handler except EP0
USBD_EPHandler_T inEpHandler; //!< IN EP transfer done handler except EP0
USBD_ResetHandler_T resetHandler; //!< Reset handler
USBD_InterruptHandler_T intHandler; //!< Hadler the rest of interrupt.
} USBD_InitParam_T;
/**
* @brief USB infomation
*/
typedef struct
{
USBD_CTRL_STATE_T ctrlState;
uint8_t curFeature;
uint8_t curInterface;
uint8_t curAlternateSetting;
uint8_t curConfiguration;
uint8_t configurationNum;
/** Setup request data buffer */
USBD_DevReqData_T reqData;
/** Endpoint buffer management */
USBD_CtrlBuf_T inBuf[USB_EP_MAX_NUM];
USBD_CtrlBuf_T outBuf[USB_EP_MAX_NUM];
/** Descriptor pointer */
USBD_Descriptor_T *pDeviceDesc;
USBD_Descriptor_T *pConfigurationDesc;
USBD_Descriptor_T *pStringDesc;
USBD_Descriptor_T *pQualifierDesc;
USBD_Descriptor_T *pHidReportDesc;
/** Setup request callback handler */
USBD_StdReqCallback_T *pStdReqCallback;
USBD_ReqHandler_T stdReqExceptionHandler;
USBD_ReqHandler_T classReqHandler;
USBD_ReqHandler_T vendorReqHandler;
/** Control transfer status stage handler */
USBD_CtrlTxStatusHandler_T txStatusHandler;
USBD_CtrlRxStatusHandler_T rxStatusHandler;
/** Endpoint transfer done handler */
USBD_EPHandler_T outEpHandler;
USBD_EPHandler_T inEpHandler;
USBD_ResetHandler_T resetHandler;
USBD_InterruptHandler_T intHandler;
} USBD_Info_T;
extern USBD_Info_T g_usbDev;
/** control status function */
#define USBD_CtrlTxStatus() USBD_CtrlInData(NULL, 0);
#define USBD_CtrlRxStatus() USBD_CtrlOutData(NULL, 0)
/** Handler Endpoint 0 control transfer */
void USBD_SetupProcess(void);
void USBD_CtrlInProcess(void);
void USBD_CtrlOutProcess(void);
void USBD_CtrlOutData(uint8_t *buf, uint32_t len);
void USBD_CtrlInData(uint8_t *buf, uint32_t len);
/** Handler other Endpoint data transfer */
void USBD_DataInProcess(USBD_EP_T ep);
void USBD_DataOutProcess(USBD_EP_T ep);
void USBD_TxData(uint8_t ep, uint8_t *buf, uint32_t len);
void USBD_RxData(uint8_t ep, uint8_t *buf, uint32_t len);
#endif

64
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/inc/usbd_init.h
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@@ -1,64 +0,0 @@
/*!
* @file usbd_init.h
*
* @brief USB initialization management head file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef USBD_INIT_H_
#define USBD_INIT_H_
#include "usbd_core.h"
/**
* @brief Endpoint Configuration Info
*/
typedef struct
{
USBD_EP_T epNum; //!< endpoint number
USBD_EP_TYPE_T epType; //!< endpoint type
uint8_t epKind; /**
* Which could be ENABLE or DISABLE, it is valid only for
* control and bulk Endpoint. The mean of ENABLE for them like :
* 1. Control endpoint : Only for OUT status which is zero data.
* 2. Bulk endpoint : Enable the double-buffer feature
*/
USBD_EP_STATUS_T epStatus; //!< Endpoint status
uint16_t epBufAddr; //!< buffer address for the endpoint
uint16_t maxPackSize; //!< max packet size for the endpoint
} USBD_EPConfig_T;
/** USB init */
void USBD_Init(USBD_InitParam_T *param);
void USBD_InitParamStructInit(USBD_InitParam_T *param);
/** power */
void USBD_PowerOn(void);
void USBD_PowerOff(void);
/** Endpoint init */
void USBD_OpenOutEP(USBD_EPConfig_T *epConfig);
void USBD_OpenInEP(USBD_EPConfig_T *epConfig);
void USBD_CloseOutEP(USBD_EP_T ep);
void USBD_CloseInEP(USBD_EP_T ep);
#endif

31
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/inc/usbd_interrupt.h
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@@ -1,31 +0,0 @@
/*!
* @file usbd_interrupt.h
*
* @brief USB interrupt service routine header file
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef __USBD_INTERRUPT_H_
#define __USBD_INTERRUPT_H_
#include "apm32f10x.h"
#endif

31
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/inc/usbd_stdReq.h
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@@ -1,31 +0,0 @@
/*!
* @file usbd_stdReq.h
*
* @brief USB standard request process head file
*
* @version V1.0.0
*
* @date 2021-12-30
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#ifndef __USBD_STDREQ_H_
#define __USBD_STDREQ_H_
void USBD_StandardReqeust(void);
#endif

405
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/src/usbd_core.c
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@@ -1,405 +0,0 @@
/*!
* @file usbd_core.c
*
* @brief USB protocol core handler
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_core.h"
#include "usbd_stdReq.h"
/** USB information */
USBD_Info_T g_usbDev;
/*!
* @brief Endpoint 0 Setup process
*
* @param None
*
* @retval None
*/
void USBD_SetupProcess(void)
{
uint8_t reqType;
uint8_t dataBuf[8];
USBD_DevReqData_T *pReqData = &g_usbDev.reqData;
uint16_t xferLen = USBD_ReadEPRxCnt(USBD_EP_0);
if (xferLen)
{
USBD_ReadDataFromEP(USBD_EP_0, (uint8_t *)dataBuf, xferLen);
}
else
{
return;
}
pReqData->byte.bmRequestType.byte = dataBuf[0];
pReqData->byte.bRequest = dataBuf[1];
pReqData->byte.wValue[0] = dataBuf[2];
pReqData->byte.wValue[1] = dataBuf[3];
pReqData->byte.wIndex[0] = dataBuf[4];
pReqData->byte.wIndex[1] = dataBuf[5];
pReqData->byte.wLength[0] = dataBuf[6];
pReqData->byte.wLength[1] = dataBuf[7];
reqType = pReqData->byte.bmRequestType.bit.type;
if(reqType == USBD_REQ_TYPE_STANDARD)
{
USBD_StandardReqeust();
}
else if(reqType == USBD_REQ_TYPE_CLASS)
{
if(g_usbDev.classReqHandler)
{
g_usbDev.classReqHandler(pReqData);
}
}
else if(reqType == USBD_REQ_TYPE_VENDOR)
{
if(g_usbDev.vendorReqHandler)
{
g_usbDev.vendorReqHandler(pReqData);
}
}
else
{
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
}
}
/*!
* @brief Endpoint 0 USB Control in process
*
* @param None
*
* @retval None
*/
void USBD_CtrlInProcess(void)
{
uint32_t tmp;
if(g_usbDev.ctrlState == USBD_CTRL_STATE_DATA_IN)
{
if(g_usbDev.inBuf[0].packNum)
{
tmp = USB_MIN(g_usbDev.inBuf[0].bufLen, g_usbDev.inBuf[0].maxPackSize);
USBD_WriteDataToEP(USBD_EP_0, g_usbDev.inBuf[0].pBuf, tmp);
USBD_SetEPTxCnt(USBD_EP_0, tmp);
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_VALID, USBD_EP_STATUS_NAK);
g_usbDev.inBuf[0].pBuf += tmp;
g_usbDev.inBuf[0].bufLen -= tmp;
g_usbDev.inBuf[0].packNum--;
}
else
{
if (g_usbDev.inBuf[USBD_EP_0].zeroPackFill)
{
USBD_SetEPTxCnt(USBD_EP_0, 0);
USBD_SetEPTxStatus(USBD_EP_0, USBD_EP_STATUS_VALID);
g_usbDev.inBuf[USBD_EP_0].zeroPackFill = 0;
}
else
{
if (g_usbDev.rxStatusHandler)
{
g_usbDev.rxStatusHandler();
}
g_usbDev.ctrlState = USBD_CTRL_STATE_WAIT_STATUS_OUT;
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_NAK, USBD_EP_STATUS_VALID);
}
}
}
else if(g_usbDev.ctrlState == USBD_CTRL_STATE_WAIT_STATUS_IN)
{
if(g_usbDev.reqData.byte.bRequest == USBD_SET_ADDRESS)
{
USBD_SetDeviceAddr(g_usbDev.reqData.byte.wValue[0]);
}
}
}
/*!
* @brief Endpoint 0 USB Control out process
*
* @param None
*
* @retval None
*/
void USBD_CtrlOutProcess(void)
{
uint32_t len;
if(g_usbDev.ctrlState == USBD_CTRL_STATE_DATA_OUT)
{
if(g_usbDev.outBuf[0].packNum)
{
len = USB_MIN(g_usbDev.outBuf[0].bufLen, g_usbDev.outBuf[0].maxPackSize);
USBD_ReadDataFromEP(USBD_EP_0, g_usbDev.outBuf[0].pBuf, len);
g_usbDev.outBuf[0].bufLen -= len;
g_usbDev.outBuf[0].pBuf += len;
g_usbDev.outBuf[0].packNum--;
if (g_usbDev.outBuf[0].packNum)
{
USBD_CtrlOutData(g_usbDev.outBuf[0].pBuf, g_usbDev.outBuf[0].bufLen);
}
else
{
USBD_CtrlTxStatus();
}
}
else
{
if (g_usbDev.txStatusHandler)
{
g_usbDev.txStatusHandler();
}
USBD_CtrlTxStatus();
}
}
}
/*!
* @brief Send data or status in control in transation
*
* @param buf: Buffer pointer
*
* @param len: Buffer length
*
* @retval None
*/
void USBD_CtrlInData(uint8_t *buf, uint32_t len)
{
uint16_t maxPackSize = g_usbDev.inBuf[0].maxPackSize;
uint16_t reqLen = *(uint16_t*)g_usbDev.reqData.byte.wLength;
if(len)
{
if ((len < reqLen) && ((len % maxPackSize) == 0))
{
g_usbDev.inBuf[USBD_EP_0].zeroPackFill = 1;
}
if(len >= g_usbDev.inBuf[0].maxPackSize)
{
/** Send a packet */
USBD_WriteDataToEP(USBD_EP_0, buf, g_usbDev.inBuf[0].maxPackSize);
USBD_SetEPTxCnt(USBD_EP_0, g_usbDev.inBuf[0].maxPackSize);
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_VALID, USBD_EP_STATUS_NAK);
/** deal with buffer */
g_usbDev.inBuf[0].bufLen = len - g_usbDev.inBuf[0].maxPackSize;
g_usbDev.inBuf[0].pBuf = buf + g_usbDev.inBuf[0].maxPackSize;
g_usbDev.inBuf[0].packNum = (g_usbDev.inBuf[0].bufLen + (maxPackSize - 1)) / maxPackSize;
g_usbDev.ctrlState = USBD_CTRL_STATE_DATA_IN;
}
else
{
USBD_WriteDataToEP(USBD_EP_0, buf, len);
USBD_SetEPTxCnt(USBD_EP_0, len);
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_VALID, USBD_EP_STATUS_NAK);
g_usbDev.ctrlState = g_usbDev.reqData.byte.bmRequestType.bit.dir ? \
USBD_CTRL_STATE_DATA_IN : \
USBD_CTRL_STATE_WAIT_STATUS_IN;
}
}
else
{
USBD_SetEPTxCnt(USBD_EP_0, 0);
USBD_SetEPTxStatus(USBD_EP_0, USBD_EP_STATUS_VALID);
g_usbDev.ctrlState = g_usbDev.reqData.byte.bmRequestType.bit.dir ? \
USBD_CTRL_STATE_DATA_IN : \
USBD_CTRL_STATE_WAIT_STATUS_IN;
}
}
/*!
* @brief Read data or status in control out transation
*
* @param buf: Buffer pointer
*
* @param len: Buffer length
*
* @retval None
*/
void USBD_CtrlOutData(uint8_t *buf, uint32_t len)
{
uint16_t maxPackSize = g_usbDev.outBuf[USBD_EP_0].maxPackSize;
if (len)
{
g_usbDev.outBuf[USBD_EP_0].pBuf = buf;
g_usbDev.outBuf[USBD_EP_0].bufLen = len;
g_usbDev.outBuf[USBD_EP_0].packNum = (len + (maxPackSize - 1)) / maxPackSize;
len = USB_MIN(g_usbDev.outBuf[0].bufLen, maxPackSize);
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_NAK, USBD_EP_STATUS_VALID);
g_usbDev.ctrlState = USBD_CTRL_STATE_DATA_OUT;
}
else
{
g_usbDev.ctrlState = USBD_CTRL_STATE_WAIT_STATUS_OUT;
}
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_NAK, USBD_EP_STATUS_VALID);
}
/*!
* @brief USB Data in process except endpoint 0
*
* @param ep : endpoint Number except endpoint 0
*
* @retval None
*/
void USBD_DataInProcess(USBD_EP_T ep)
{
uint16_t len;
if (g_usbDev.inBuf[ep].packNum)
{
len = g_usbDev.inBuf[ep].bufLen > g_usbDev.inBuf[ep].maxPackSize ? \
g_usbDev.inBuf[ep].maxPackSize : g_usbDev.inBuf[ep].bufLen;
USBD_WriteDataToEP(ep, g_usbDev.inBuf[ep].pBuf, len);
USBD_SetEPTxCnt(ep, len);
USBD_SetEPTxStatus(ep, USBD_EP_STATUS_VALID);
g_usbDev.inBuf[ep].pBuf += len;
g_usbDev.inBuf[ep].bufLen -= len;
g_usbDev.inBuf[ep].packNum--;
}
else
{
if(g_usbDev.inEpHandler)
{
g_usbDev.inEpHandler(ep);
}
}
}
/*!
* @brief USB Data out process except endpoint 0
*
* @param ep : endpoint Number except endpoint 0
*
* @retval None
*/
void USBD_DataOutProcess(USBD_EP_T ep)
{
if (g_usbDev.outBuf[ep].packNum)
{
g_usbDev.outBuf[ep].xferCnt = USBD_ReadEPRxCnt(ep);
if ((g_usbDev.outBuf[ep].xferCnt != 0) && (g_usbDev.outBuf[ep].pBuf != NULL))
{
USBD_ReadDataFromEP(ep, g_usbDev.outBuf[ep].pBuf, g_usbDev.outBuf[ep].xferCnt);
g_usbDev.outBuf[ep].bufLen -= g_usbDev.outBuf[ep].xferCnt;
g_usbDev.outBuf[ep].pBuf += g_usbDev.outBuf[ep].xferCnt;
g_usbDev.outBuf[ep].packNum--;
}
if (g_usbDev.outBuf[ep].packNum)
{
USBD_SetEPRxStatus(ep, USBD_EP_STATUS_VALID);
}
}
if(g_usbDev.outEpHandler && !g_usbDev.outBuf[ep].packNum)
{
g_usbDev.outEpHandler(ep);
}
}
/*!
* @brief Transfer data to host(except endpoint 0)
*
* @param ep: Endpoint number except endpoint 0
*
* @param buf: Buffer pointer
*
* @param len: Buffer length
*
* @retval None
*/
void USBD_TxData(uint8_t ep, uint8_t *buf, uint32_t len)
{
uint16_t maxPackSize = g_usbDev.inBuf[ep].maxPackSize;
if (len >= maxPackSize)
{
USBD_WriteDataToEP(ep, buf, maxPackSize);
USBD_SetEPTxCnt(ep, maxPackSize);
USBD_SetEPTxStatus(ep, USBD_EP_STATUS_VALID);
g_usbDev.inBuf[ep].pBuf = buf + maxPackSize;
g_usbDev.inBuf[ep].bufLen = len - maxPackSize;
g_usbDev.inBuf[ep].packNum =(g_usbDev.inBuf[ep].bufLen + (maxPackSize - 1)) / maxPackSize;
}
else
{
USBD_WriteDataToEP(ep, buf, len);
USBD_SetEPTxCnt(ep, len);
USBD_SetEPTxStatus(ep, USBD_EP_STATUS_VALID);
g_usbDev.inBuf[ep].packNum = 0;
g_usbDev.inBuf[ep].bufLen = 0;
}
}
/*!
* @brief Receive data from host(except endpoint 0)
*
* @param ep: Endpoint number except endpoint 0
*
* @param buf: Buffer pointer
*
* @param len: Buffer length
*
* @retval None
*/
void USBD_RxData(uint8_t ep, uint8_t *buf, uint32_t len)
{
uint16_t maxPackSize = g_usbDev.outBuf[ep].maxPackSize;
g_usbDev.outBuf[ep].pBuf = buf;
g_usbDev.outBuf[ep].bufLen = len;
g_usbDev.outBuf[ep].packNum = (len + (maxPackSize - 1)) / maxPackSize;
USBD_SetEPRxCnt(ep, USB_MIN(len, maxPackSize));
USBD_SetEPRxStatus(ep, USBD_EP_STATUS_VALID);
}

237
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/src/usbd_init.c
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@@ -1,237 +0,0 @@
/*!
* @file usbd_init.c
*
* @brief USB initialization management
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_init.h"
#include "usb_bsp.h"
static USBD_REG_EP_TYPE_T USBD_ConvertEPType(USBD_EP_TYPE_T epType);
/*!
* @brief USB initialization
*
* @param param: Initialization parameter
*
* @retval None
*/
void USBD_Init(USBD_InitParam_T *param)
{
g_usbDev.pDeviceDesc = param->pDeviceDesc;
g_usbDev.pConfigurationDesc = param->pConfigurationDesc;
g_usbDev.pStringDesc = param->pStringDesc;
g_usbDev.pQualifierDesc = param->pQualifierDesc;
g_usbDev.pHidReportDesc = param->pHidReportDesc;
g_usbDev.pStdReqCallback = param->pStdReqCallback;
g_usbDev.classReqHandler = param->classReqHandler;
g_usbDev.vendorReqHandler = param->vendorReqHandler;
g_usbDev.stdReqExceptionHandler = param->stdReqExceptionHandler;
g_usbDev.txStatusHandler = param->txStatusHandler;
g_usbDev.rxStatusHandler = param->rxStatusHandler;
g_usbDev.inEpHandler = param->inEpHandler;
g_usbDev.outEpHandler = param->outEpHandler;
g_usbDev.resetHandler = param->resetHandler;
g_usbDev.intHandler = param->intHandler;
USBD_HardWareInit();
#ifndef APM32F0xx_USB
#if USB_SELECT == USB1
USBD2_Disable();
#else
USB2_Enable();
#endif
#endif
USBD_PowerOn();
}
/*!
* @brief Init parameter in param
*
* @param param: Initialization parameter
*
* @retval None
*/
void USBD_InitParamStructInit(USBD_InitParam_T *param)
{
param->pStdReqCallback = NULL;
param->stdReqExceptionHandler = NULL;
param->classReqHandler = NULL;
param->vendorReqHandler = NULL;
param->txStatusHandler = NULL;
param->rxStatusHandler = NULL;
param->outEpHandler = NULL;
param->inEpHandler = NULL;
param->resetHandler = NULL;
param->intHandler = NULL;
}
/*!
* @brief USB Power on
*
* @param None
*
* @retval None
*/
void USBD_PowerOn(void)
{
USBD_ResetPowerDown();
USBD_SetForceReset();
USBD_ResetForceReset();
USBD_DisableInterrupt(USBD_INT_ALL);
USBD_ClearIntFlag(USBD_INT_ALL);
USBD_EnableInterrupt(USB_INT_SOURCE);
}
/*!
* @brief USB Power off
*
* @param None
*
* @retval None
*/
void USBD_PowerOff(void)
{
USBD_DisableInterrupt(USBD_INT_ALL);
USBD_ClearIntFlag(USBD_INT_ALL);
/** Power down and Force USB Reset */
USBD_SetRegCTRL(0X03);
}
/*!
* @brief Open OUT endpoint.
*
* @param epConfig: Point to USBD_EPConfig_T structure
*
* @retval None
*/
void USBD_OpenOutEP(USBD_EPConfig_T *epConfig)
{
g_usbDev.outBuf[epConfig->epNum].maxPackSize = epConfig->maxPackSize;
USBD_SetEPType(epConfig->epNum, USBD_ConvertEPType(epConfig->epType));
if (epConfig->epKind)
{
USBD_SetEPKind(epConfig->epNum);
}
else
{
USBD_ResetEPKind(epConfig->epNum);
}
USBD_SetEPRxAddr(epConfig->epNum, epConfig->epBufAddr);
USBD_SetEPRxCnt(epConfig->epNum, epConfig->maxPackSize);
USBD_SetEPRxStatus(epConfig->epNum, epConfig->epStatus);
}
/*!
* @brief Open IN endpoint.
*
* @param epConfig: Point to USBD_EPConfig_T structure
*
* @retval None
*/
void USBD_OpenInEP(USBD_EPConfig_T *epConfig)
{
g_usbDev.inBuf[epConfig->epNum].maxPackSize = epConfig->maxPackSize;
USBD_SetEPType(epConfig->epNum, USBD_ConvertEPType(epConfig->epType));
if (epConfig->epKind)
{
USBD_SetEPKind(epConfig->epNum);
}
else
{
USBD_ResetEPKind(epConfig->epNum);
}
USBD_SetEPTxAddr(epConfig->epNum, epConfig->epBufAddr);
USBD_SetEPTxStatus(epConfig->epNum, epConfig->epStatus);
}
/*!
* @brief Close OUT endpoint.
*
* @param ep: OUT endpoint Number
*
* @retval None
*/
void USBD_CloseOutEP(USBD_EP_T ep)
{
g_usbDev.outBuf[ep].maxPackSize = 0;
USBD_SetEPRxStatus(ep, USBD_EP_STATUS_DISABLE);
}
/*!
* @brief Close IN endpoint.
*
* @param ep: IN endpoint Number
*
* @retval None
*/
void USBD_CloseInEP(USBD_EP_T ep)
{
g_usbDev.inBuf[ep].maxPackSize = 0;
USBD_SetEPTxStatus(ep, USBD_EP_STATUS_DISABLE);
}
/*!
* @brief Convert endpoint Type.
*
* @param epType: endpoint type
*
* @retval Value of USBD_REG_EP_TYPE_T
*/
static USBD_REG_EP_TYPE_T USBD_ConvertEPType(USBD_EP_TYPE_T epType)
{
switch (epType)
{
case USBD_EP_TYPE_CONTROL :
return USBD_REG_EP_TYPE_CONTROL;
case USBD_EP_TYPE_ISO :
return USBD_REG_EP_TYPE_ISO;
case USBD_EP_TYPE_BULK :
return USBD_REG_EP_TYPE_BULK;
case USBD_EP_TYPE_INTERRUPT :
return USBD_REG_EP_TYPE_INTERRUPT;
default :
return USBD_REG_EP_TYPE_CONTROL;
}
}

349
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/src/usbd_interrupt.c
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@@ -1,349 +0,0 @@
/*!
* @file usbd_interrupt.c
*
* @brief USB interrupt service routine
*
* @version V1.0.0
*
* @date 2021-12-06
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_init.h"
static void USBD_LowPriorityProc(void);
static void USBD_ResetIsrHandler(void);
static void USBD_SuspendIsrHandler(void);
static void USBD_ResumeIsrHandler(void);
/*!
* @brief USB interrupt service routine
*
* @param None
*
* @retval None
*/
#ifdef APM32F0xx_USB
void USB_IRQHandler(void)
#else //!< APM32F10x_USB
#if USB_SELECT == USB1
void USBD1_LP_CAN1_RX0_IRQHandler(void)
#else
void USB2_LP_IRQHandler(void)
#endif
#endif
{
#if (USB_INT_SOURCE & USBD_INT_CTR)
if(USBD_ReadIntFlag(USBD_INT_CTR))
{
USBD_LowPriorityProc();
}
#endif
#if (USB_INT_SOURCE & USBD_INT_RST)
if(USBD_ReadIntFlag(USBD_INT_RST))
{
USBD_ClearIntFlag(USBD_INT_RST);
USBD_ResetIsrHandler();
}
#endif
#if USB_INT_SOURCE & USBD_INT_PMAOU
if(USB_ReadIntFlag(USB_INT_PMAOU))
{
USB_ClearIntFlag(USB_INT_PMAOU);
}
#endif
#if USB_INT_SOURCE & USBD_INT_ERR
if(USB_ReadIntFlag(USB_INT_ERROR))
{
USB_ClearIntFlag(USB_INT_ERROR);
}
#endif
#if USB_INT_SOURCE & USBD_INT_WKUP
if(USBD_ReadIntFlag(USBD_INT_WKUP))
{
USBD_ResumeIsrHandler();
USBD_ClearIntFlag(USBD_INT_WKUP);
}
#endif
#if USB_INT_SOURCE & USBD_INT_SUS
if(USBD_ReadIntFlag(USBD_INT_SUS))
{
USBD_SuspendIsrHandler();
USBD_ClearIntFlag(USBD_INT_SUS);
}
#endif
#if USB_INT_SOURCE & USBD_INT_SOF
if(USB_ReadIntFlag(USB_INT_SOF))
{
USB_ClearIntFlag(USB_INT_SOF);
}
#endif
#if USB_INT_SOURCE & USBD_INT_ESOF
if(USB_ReadIntFlag(USB_INT_ESOF))
{
USB_ClearIntFlag(USB_INT_ESOF);
}
#endif
}
/*!
* @brief USB low priority process
*
* @param None
*
* @retval None
*/
static void USBD_LowPriorityProc(void)
{
USBD_EP_T ep;
while(USBD_ReadIntFlag(USBD_INT_CTR))
{
ep = (USBD_EP_T)USBD_ReadEP();
/** Endpoint 0 */
if(ep == 0)
{
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_NAK, USBD_EP_STATUS_NAK);
/** Control in */
if(USBD_ReadDir() == 0)
{
USBD_ResetEPTxFlag(USBD_EP_0);
USBD_CtrlInProcess();
}
else
{
/** Setup */
if(USBD_ReadEPSetup(USBD_EP_0) == SET)
{
USBD_ResetEPRxFlag(USBD_EP_0);
USBD_SetupProcess();
}
/** Control out */
else
{
USBD_ResetEPRxFlag(USBD_EP_0);
USBD_CtrlOutProcess();
}
}
}
/** Transfer Handler Except endpoint 0 */
else
{
if (USBD_ReadEPRxFlag(ep))
{
USBD_ResetEPRxFlag(ep);
USBD_DataOutProcess(ep);
}
if (USBD_ReadEPTxFlag(ep))
{
USBD_ResetEPTxFlag(ep);
USBD_DataInProcess(ep);
}
}
}
}
/*!
* @brief USB Device Reset
*
* @param None
*
* @retval None
*/
static void USBD_ResetIsrHandler(void)
{
uint8_t i;
USBD_EPConfig_T epConfig;
g_usbDev.configurationNum = USB_CONFIGURATION_NUM;
g_usbDev.curConfiguration = 0;
g_usbDev.curInterface = 0;
g_usbDev.curAlternateSetting = 0;
g_usbDev.curFeature = 0;
g_usbDev.ctrlState = USBD_CTRL_STATE_WAIT_SETUP;
g_usbDev.inBuf[USBD_EP_0].maxPackSize = USB_EP0_PACKET_SIZE;
g_usbDev.outBuf[USBD_EP_0].maxPackSize = USB_EP0_PACKET_SIZE;
USBD_SetBufferTable(USB_BUFFER_TABLE_ADDR);
/** Endpoint 0 IN */
epConfig.epNum = USBD_EP_0;
epConfig.epType = USBD_EP_TYPE_CONTROL;
epConfig.epKind = DISABLE;
epConfig.epBufAddr = USB_EP0_TX_ADDR;
epConfig.maxPackSize = g_usbDev.inBuf[USBD_EP_0].maxPackSize;
epConfig.epStatus = USBD_EP_STATUS_NAK;
USBD_OpenInEP(&epConfig);
/** Endpoint 0 OUT */
epConfig.epBufAddr = USB_EP0_RX_ADDR;
epConfig.maxPackSize = g_usbDev.outBuf[USBD_EP_0].maxPackSize;
epConfig.epStatus = USBD_EP_STATUS_VALID;
USBD_OpenOutEP(&epConfig);
if(g_usbDev.resetHandler)
{
g_usbDev.resetHandler();
}
for(i = 0; i < USB_EP_MAX_NUM; i++)
{
USBD_SetEpAddr((USBD_EP_T)i, i);
}
USBD_SetDeviceAddr(0);
USBD_Enable();
}
/*!
* @brief USB Suspend
*
* @param None
*
* @retval None
*/
static void USBD_SuspendIsrHandler(void)
{
uint8_t i;
uint16_t bakEP[8];
#if USB_LOW_POWER_SWITCH
uint32_t bakPwrCR;
uint32_t tmp;
#endif
for(i = 0; i < 8; i++)
{
bakEP[i] = (uint16_t)USBD->EP[i].EP;
}
USBD_EnableInterrupt(USBD_INT_RST);
USBD_SetForceReset();
USBD_ResetForceReset();
while(USBD_ReadIntFlag(USBD_INT_RST) == RESET);
for(i = 0; i < 8; i++)
{
USBD->EP[i].EP = bakEP[i];
}
USBD_SetForceSuspend();
#if USB_LOW_POWER_SWITCH
USBD_SetLowerPowerMode();
bakPwrCR = PMU->CTRL;
tmp = PMU->CTRL;
tmp &= (uint32_t)0xfffffffc;
tmp |= PMU_REGULATOR_LOWPOWER;
PMU->CTRL = tmp;
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
if(USBD_ReadIntFlag(USBD_INT_WKUP) == RESET)
{
__WFI();
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
}
else
{
USBD_ClearIntFlag(USBD_INT_WKUP);
USBD_ResetForceSuspend();
PMU->CTRL = bakPwrCR;
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
}
#endif
}
/*!
* @brief Resume
*
* @param None
*
* @retval None
*/
static void USBD_ResumeIsrHandler(void)
{
#if USB_LOW_POWER_SWITCH
USBD_ResetLowerPowerMode();
#endif
SystemInit();
USBD_SetRegCTRL(USB_INT_SOURCE);
}
#ifndef APM32F0xx_USB
/*!
* @brief USB High priority process
*
* @param None
*
* @retval None
*/
static void USBD_HighPriorityProc(void)
{
USBD_EP_T ep;
while(USBD_ReadIntFlag(USBD_INT_CTR))
{
USBD_ClearIntFlag(USBD_INT_CTR);
ep = USBD_ReadEP();
if(USBD_ReadEPRxFlag(ep))
{
USBD_ResetEPRxFlag(ep);
g_usbDev.outEpHandler(ep);
}
if(USBD_ReadEPTxFlag(ep))
{
USBD_ResetEPTxFlag(ep);
g_usbDev.inEpHandler(ep);
}
}
}
#if USB_SELECT == USB1
void USBD1_HP_CAN1_TX_IRQHandler(void)
#else
void USB2_HP_IRQHandler(void)
#endif
{
USBD_HighPriorityProc();
}
#endif

369
bsp/apm32/libraries/APM32F10x_Library/USB_Device_Lib/Core_Device/Standard/src/usbd_stdReq.c
View File

@@ -1,369 +0,0 @@
/*!
* @file usbd_stdReq.c
*
* @brief USB standard request process
*
* @version V1.0.0
*
* @date 2021-12-30
*
* @attention
*
* Copyright (C) 2020-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "usbd_stdReq.h"
#include "usbd_core.h"
#include "usbd_descriptor.h"
static uint8_t USBD_StandardGetConfiguration(void);
static uint8_t USBD_StandardGetDescriptor(void);
static uint8_t USBD_StandardGetInterface(void);
static uint8_t USBD_StandardGetStatus(void);
static uint8_t USBD_StandardSetAddress(void);
static uint8_t USBD_StandardSetConfiguration(void);
static uint8_t USBD_StandardSetDescriptor(void);
static uint8_t USBD_StandardSetFeature(void);
static uint8_t USBD_StandardSetInterface(void);
static uint8_t USBD_StandardClearFeature(void);
/*!
* @brief USB request standard request
*
* @param None
*
* @retval None
*/
void USBD_StandardReqeust(void)
{
uint8_t result = 1;
uint8_t bRequest = g_usbDev.reqData.byte.bRequest;
switch(bRequest)
{
case USBD_GET_CONFIGURATION:
result = USBD_StandardGetConfiguration();
break;
case USBD_GET_DESCRIPTOR:
result = USBD_StandardGetDescriptor();
break;
case USBD_GET_INTERFACE:
result = USBD_StandardGetInterface();
break;
case USBD_GET_STATUS:
result = USBD_StandardGetStatus();
break;
case USBD_SET_ADDRESS:
result = USBD_StandardSetAddress();
break;
case USBD_SET_CONFIGURATION:
result = USBD_StandardSetConfiguration();
break;
case USBD_SET_DESCRIPTOR:
result = USBD_StandardSetDescriptor();
break;
case USBD_SET_FEATURE:
result = USBD_StandardSetFeature();
break;
case USBD_SET_INTERFACE:
result = USBD_StandardSetInterface();
break;
case USBD_CLEAR_FEATURE:
result = USBD_StandardClearFeature();
break;
default:
break;
}
if(!result)
{
if(g_usbDev.stdReqExceptionHandler != NULL)
{
g_usbDev.stdReqExceptionHandler(&g_usbDev.reqData);
}
}
}
/*!
* @brief Standard request get configuration
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardGetConfiguration(void)
{
uint8_t recipient = g_usbDev.reqData.byte.bmRequestType.bit.recipient;
if(recipient == USBD_RECIPIENT_DEVICE)
{
USBD_CtrlInData(&g_usbDev.curConfiguration, 1);
if (g_usbDev.pStdReqCallback->getConfigurationHandler)
{
g_usbDev.pStdReqCallback->getConfigurationHandler();
}
return SUCCESS;
}
return ERROR;
}
/*!
* @brief Standard request get descriptor
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardGetDescriptor(void)
{
uint8_t ret = SUCCESS;
uint32_t len = 0;
uint8_t wValue0 = g_usbDev.reqData.byte.wValue[0];
uint8_t wValue1 = g_usbDev.reqData.byte.wValue[1];
if(wValue1 == USBD_DESC_DEVICE)
{
len = USB_MIN(*(uint16_t *)g_usbDev.reqData.byte.wLength, g_usbDev.pDeviceDesc->size);
USBD_CtrlInData((uint8_t *)g_usbDev.pDeviceDesc->pDesc, len);
}
else if(wValue1 == USBD_DESC_CONFIGURATION)
{
len = USB_MIN(*(uint16_t *)g_usbDev.reqData.byte.wLength, g_usbDev.pConfigurationDesc->size);
USBD_CtrlInData((uint8_t *)g_usbDev.pConfigurationDesc->pDesc, len);
}
else if(wValue1 == USBD_DESC_STRING)
{
if (wValue0 < SRTING_DESC_NUM)
{
len = USB_MIN(*(uint16_t *)g_usbDev.reqData.byte.wLength, g_usbDev.pStringDesc[wValue0].size);
USBD_CtrlInData((uint8_t *)g_usbDev.pStringDesc[wValue0].pDesc, len);
}
else
{
ret = ERROR;
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
}
}
else
{
ret = ERROR;
USBD_SetEPTxRxStatus(USBD_EP_0, USBD_EP_STATUS_STALL, USBD_EP_STATUS_STALL);
}
return ret;
}
/*!
* @brief Standard request get interface
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardGetInterface(void)
{
return ERROR;
}
/*!
* @brief Standard request get status
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardGetStatus(void)
{
uint8_t ret = 1;
uint8_t status[2] = {0, 0};
if((g_usbDev.reqData.byte.bmRequestType.bit.recipient) == USBD_RECIPIENT_DEVICE)
{
if(g_usbDev.curFeature & (1 << 5))
{
status[0] |= 0x02;
}
if(g_usbDev.curFeature & (1 << 6))
{
status[0] |= 0x01;
}
USBD_CtrlInData(status, 2);
}
else if((g_usbDev.reqData.byte.bmRequestType.bit.recipient) == USBD_RECIPIENT_INTERFACE)
{
USBD_CtrlInData(status, 2);
}
else if((g_usbDev.reqData.byte.bmRequestType.bit.recipient) == USBD_RECIPIENT_ENDPOINT)
{
if(g_usbDev.reqData.byte.wIndex[0] & 0x80)
{
if(USBD_ReadEPTxStatus(g_usbDev.reqData.byte.wIndex[0] & 0x0f) == USBD_EP_STATUS_STALL)
{
status[0] |= 0x01;
}
}
else
{
if(USBD_ReadEPRxStatus(g_usbDev.reqData.byte.wIndex[0] & 0x0f) == USBD_EP_STATUS_STALL)
{
status[0] |= 0x01;
}
}
USBD_CtrlInData(status, 2);
}
else
{
ret = 0;
}
return ret;
}
/*!
* @brief Standard request set address
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardSetAddress(void)
{
USBD_DevReqData_T *reqData = &g_usbDev.reqData;
if((reqData->byte.wValue[0] < 127) && (reqData->byte.wValue[1] == 0) &&
(reqData->byte.bmRequestType.bit.recipient == USBD_RECIPIENT_DEVICE))
{
USBD_CtrlInData((void *)0, 0);
return 1;
}
return 0;
}
/*!
* @brief Standard request set configuration
*
* @param None
*
* @retval ERROR: 0; SUCCESS : 1
*/
static uint8_t USBD_StandardSetConfiguration(void)
{
USBD_DevReqData_T *reqData = &g_usbDev.reqData;
if((reqData->byte.wValue[0] <= g_usbDev.configurationNum) && \
(reqData->byte.bmRequestType.bit.recipient == USBD_RECIPIENT_DEVICE))
{
g_usbDev.curConfiguration = reqData->byte.wValue[0];
if (g_usbDev.pStdReqCallback->setConfigurationHandler)
{
g_usbDev.pStdReqCallback->setConfigurationHandler();
}
USBD_CtrlInData((void *)0, 0);
return 1;
}
return 0;
}
/*!
* @brief Standard request set descriptor
*
* @param None
*
* @retval 0: Failed; 1: Success
*/
static uint8_t USBD_StandardSetDescriptor(void)
{
return ERROR;
}
/*!
* @brief Standard request set feature
*
* @param None
*
* @retval 0: Failed; 1: Success
*/
static uint8_t USBD_StandardSetFeature(void)
{
uint8_t ret = 1;
return ret;
}
/*!
* @brief Standard request set interface
*
* @param None
*
* @retval 0: Failed; 1: Success
*/
static uint8_t USBD_StandardSetInterface(void)
{
return 0;
}
/*!
* @brief Standard request clear feature
*
* @param None
*
* @retval 0: Failed; 1: Success
*/
static uint8_t USBD_StandardClearFeature(void)
{
return 0;
}

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