Merge remote-tracking branch 'rtt_gitee/gitee_master'

This commit is contained in:
rtthread-bot
2021-09-23 16:24:09 +00:00
323 changed files with 159082 additions and 90 deletions
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*.idb
*.ilk
*.old
*.crf
build
Debug
documentation/html
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# files format check exclude path, please follow the instructions below to modify;
# If you need to exclude an entire folder, add the folder path in dir_path;
# If you need to exclude a file, add the path to the file in file_path.
dir_path:
- Libraries/VangoV85xx_standard_peripheral
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mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
# you can change the RTT_ROOT default: "rt-thread"
# example : default "F:/git_repositories/rt-thread"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_SERIES_V85XX
bool
default y
config SOC_V85XX
bool
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select SOC_SERIES_V85XX
default y
menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
config BSP_USING_UART0
bool "using uart0"
default n
config BSP_USING_UART1
bool "using uart1"
default n
config BSP_USING_UART2
bool "using uart2"
default y
config BSP_USING_UART3
bool "using uart3"
default n
config BSP_USING_UART4
bool "using uart4"
default n
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
if BSP_USING_ADC
config BSP_USING_ADC0
bool "using adc0"
default n
config BSP_USING_ADC1
bool "using adc1"
default n
endif
menuconfig BSP_USING_HWTIMER
bool "Enable hwtimer"
default n
select RT_USING_HWTIMER
if BSP_USING_HWTIMER
config BSP_USING_HWTIMER0
bool "using hwtimer0"
default n
config BSP_USING_HWTIMER1
bool "using hwtimer1"
default n
config BSP_USING_HWTIMER2
bool "using hwtimer2"
default n
config BSP_USING_HWTIMER3
bool "using hwtimer3"
default n
config BSP_USING_HWTIMER4
bool "using hwtimer4"
default n
config BSP_USING_HWTIMER5
bool "using hwtimer5"
default n
config BSP_USING_HWTIMER6
bool "using hwtimer6"
default n
config BSP_USING_HWTIMER7
bool "using hwtimer7"
default n
endif
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
config BSP_USING_RTC
bool "using internal rtc"
default n
select RT_USING_RTC
endmenu
@@ -0,0 +1,46 @@
/**
******************************************************************************
* @file lib_CodeRAM.h
* @author Application Team
* @version V4.4.0
* @date 2019-01-18
* @brief Codes executed in SRAM.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_CODERAM_H
#define __LIB_CODERAM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "target.h"
#ifndef __GNUC__
#ifdef __ICCARM__ /* EWARM */
#define __RAM_FUNC __ramfunc
#endif
#ifdef __CC_ARM /* MDK-ARM */
#define __RAM_FUNC __attribute__((used))
#endif
/* Exported Functions ------------------------------------------------------- */
__RAM_FUNC void PMU_EnterIdle_FlashDSTB(void);
#endif /* __GNUC__ */
#ifdef __cplusplus
}
#endif
#endif /* __LIB_CODERAM_H */
/*********************************** END OF FILE ******************************/
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/**
******************************************************************************
* @file lib_conf.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Dirver configuration.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_CONF_H
#define __LIB_CONF_H
/* ########################## Assert Selection ############################## */
//#define ASSERT_NDEBUG 1
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#include "lib_ana.h"
#include "lib_adc.h"
#include "lib_adc_tiny.h"
#include "lib_clk.h"
#include "lib_comp.h"
#include "lib_crypt.h"
#include "lib_dma.h"
#include "lib_flash.h"
#include "lib_gpio.h"
#include "lib_i2c.h"
#include "lib_iso7816.h"
#include "lib_lcd.h"
#include "lib_misc.h"
#include "lib_pmu.h"
#include "lib_pwm.h"
#include "lib_rtc.h"
#include "lib_spi.h"
#include "lib_tmr.h"
#include "lib_u32k.h"
#include "lib_uart.h"
#include "lib_version.h"
#include "lib_wdt.h"
#include "lib_LoadNVR.h"
#include "lib_CodeRAM.h"
#include "lib_cortex.h"
/* Exported macro ------------------------------------------------------------*/
#ifndef ASSERT_NDEBUG
#define assert_parameters(expr) ((expr) ? (void)0U : assert_errhandler((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_errhandler(uint8_t* file, uint32_t line);
#else
#define assert_parameters(expr) ((void)0U)
#endif /* ASSERT_NDEBUG */
#endif
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,48 @@
/**
******************************************************************************
* @file lib_Cortex.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Cortex module driver.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_CORTEX_H
#define __LIB_CORTEX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "target.h"
#define IS_CORTEX_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
#define IS_CORTEX_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x4)
/* Exported Functions ------------------------------------------------------- */
void CORTEX_SetPriority_ClearPending_EnableIRQ(IRQn_Type IRQn, uint32_t Priority);
void CORTEX_NVIC_EnableIRQ(IRQn_Type IRQn);
void CORTEX_NVIC_DisableIRQ(IRQn_Type IRQn);
uint32_t CORTEX_NVIC_GetPendingIRQ(IRQn_Type IRQn);
void CORTEX_NVIC_SetPendingIRQ(IRQn_Type IRQn);
void CORTEX_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
uint32_t CORTEX_NVIC_GetPriority(IRQn_Type IRQn);
void CORTEX_NVIC_SetPriority(IRQn_Type IRQn, uint32_t Priority);
void CORTEX_NVIC_SystemReset(void);
uint32_t CORTEX_SystemTick_Config(uint32_t TicksNum);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_CORTEX_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,41 @@
/**
******************************************************************************
* @file system_target.c
* @author Application Team
* @version V1.1.0
* @date 2019-10-28
* @brief system source file.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __SYSTEM_TARGET_H
#define __SYSTEM_TARGET_H
#ifdef __cplusplus
extern "C" {
#endif
#include "type_def.h"
#define NVR_REGINFOCOUNT1 (0x80400)
#define NVR_REGINFOBAKOFFSET (0x100)
/* ########################### System Configuration ######################### */
extern void SystemInit(void);
extern void SystemUpdate(void);
#ifdef USE_TARGET_DRIVER
#include "lib_conf.h"
#endif /* USE_TARGET_DRIVER */
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_TARGET_H */
/*********************************** END OF FILE ******************************/
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/**
******************************************************************************
* @file type_def.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Typedef file
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __TYPE_DEF_H
#define __TYPE_DEF_H
#define ENABLE 1
#define DISABLE 0
#define IS_FUNCTIONAL_STATE(__STATE__) (((__STATE__) == DISABLE) || ((__STATE__) == ENABLE))
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#if defined ( __GNUC__ )
#ifndef __weak
#define __weak __attribute__((weak))
#endif /* __weak */
#ifndef __packed
#define __packed __attribute__((__packed__))
#endif /* __packed */
#endif /* __GNUC__ */
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
#if defined (__GNUC__) /* GNU Compiler */
#ifndef __ALIGN_END
#define __ALIGN_END __attribute__ ((aligned (4)))
#endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN
#endif /* __ALIGN_BEGIN */
#else
#ifndef __ALIGN_END
#define __ALIGN_END
#endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN
#if defined (__CC_ARM) /* ARM Compiler */
#define __ALIGN_BEGIN __align(4)
#elif defined (__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN
#endif /* __CC_ARM */
#endif /* __ALIGN_BEGIN */
#endif /* __GNUC__ */
/**
* @brief __NOINLINE definition
*/
#if defined ( __CC_ARM ) || defined ( __GNUC__ )
/* ARM & GNUCompiler
----------------
*/
#define __NOINLINE __attribute__ ( (noinline) )
#elif defined ( __ICCARM__ )
/* ICCARM Compiler
---------------
*/
#define __NOINLINE _Pragma("optimize = no_inline")
#endif
#endif /* __TYPE_DEF_H */
/*********************************** END OF FILE ******************************/
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/**
******************************************************************************
* @file lib_CodeRAM.c
* @author Application Team
* @version V4.4.0
* @date 2019-01-18
* @brief Codes executed in SRAM.
******************************************************************************
* @attention
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "lib_CodeRAM.h"
#ifndef __GNUC__
/**
* @brief Flash deep standby, enter idle mode.
* @note This function is executed in RAM.
* @param None
* @retval None
*/
__RAM_FUNC void PMU_EnterIdle_FlashDSTB(void)
{
/* Flash deep standby */
FLASH->PASS = 0x55AAAA55;
FLASH->DSTB = 0xAA5555AA;
/* Enter Idle mode */
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
__WFI();
}
#endif
/*********************************** END OF FILE ******************************/
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/**
******************************************************************************
* @file lib_cortex.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Cortex module driver.
******************************************************************************
* @attention
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "lib_cortex.h"
#include "core_cm0.h"
/**
* @brief 1. Clears Pending of a device specific External Interrupt.
* 2. Sets Priority of a device specific External Interrupt.
* 3. Enables a device specific External Interrupt.
* @param IRQn: External interrupt number .
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to target.h file)
* @param Priority: The preemption priority for the IRQn channel.
* This parameter can be a value between 0 and 3.
* A lower priority value indicates a higher priority
* @retval None
*/
void CORTEX_SetPriority_ClearPending_EnableIRQ(IRQn_Type IRQn, uint32_t Priority)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
assert_parameters(IS_CORTEX_NVIC_PREEMPTION_PRIORITY(Priority));
/* Clear Pending Interrupt */
NVIC_ClearPendingIRQ(IRQn);
/* Set Interrupt Priority */
NVIC_SetPriority(IRQn, Priority);
/* Enable Interrupt in NVIC */
NVIC_EnableIRQ(IRQn);
}
/**
* @brief Enables a device specific interrupt in the NVIC interrupt controller.
* @note To configure interrupts priority correctly before calling it.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval None
*/
void CORTEX_NVIC_EnableIRQ(IRQn_Type IRQn)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt in NVIC */
NVIC_EnableIRQ(IRQn);
}
/**
* @brief Disables a device specific interrupt in the NVIC interrupt controller.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval None
*/
void CORTEX_NVIC_DisableIRQ(IRQn_Type IRQn)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
/* Disable interrupt in NVIC */
NVIC_DisableIRQ(IRQn);
}
/**
* @brief Initiates a system reset request to reset the MCU.
* @retval None
*/
void CORTEX_NVIC_SystemReset(void)
{
/* System Reset */
NVIC_SystemReset();
}
/**
* @brief Gets the Pending bit of an interrupt.
* @param IRQn: External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval 0 Interrupt status is not pending.
1 Interrupt status is pending.
*/
uint32_t CORTEX_NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
/* Get priority for Cortex-M0 system or device specific interrupts */
return NVIC_GetPendingIRQ(IRQn);
}
/**
* @brief Sets Pending bit of an external interrupt.
* @param IRQn External interrupt number
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval None
*/
void CORTEX_NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
/* Set interrupt pending */
NVIC_SetPendingIRQ(IRQn);
}
/**
* @brief Clears the pending bit of an external interrupt.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval None
*/
void CORTEX_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_DEVICE_IRQ(IRQn));
/* Clear interrupt pending */
NVIC_ClearPendingIRQ(IRQn);
}
/**
* @brief Gets the priority of an interrupt.
* @param IRQn: External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to the appropriate CMSIS device file (target.h))
* @retval Interrupt Priority. Value is aligned automatically to the implemented
* priority bits of the microcontroller.
*/
uint32_t CORTEX_NVIC_GetPriority(IRQn_Type IRQn)
{
/* Get priority for Cortex-M0 system or device specific interrupts */
return NVIC_GetPriority(IRQn);
}
/**
* @brief Sets the priority of an interrupt.
* @param IRQn: External interrupt number .
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete target Devices IRQ Channels list, please refer to target.h file)
* @param Priority: The preemption priority for the IRQn channel.
* This parameter can be a value between 0 and 3.
* A lower priority value indicates a higher priority
* @retval None
*/
void CORTEX_NVIC_SetPriority(IRQn_Type IRQn, uint32_t Priority)
{
/* Check parameters */
assert_parameters(IS_CORTEX_NVIC_PREEMPTION_PRIORITY(Priority));
/* Get priority for Cortex-M0 system or device specific interrupts */
NVIC_SetPriority(IRQn, Priority);
}
/**
* @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
* Counter is in free running mode to generate periodic interrupts.
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t CORTEX_SystemTick_Config(uint32_t TicksNum)
{
return SysTick_Config(TicksNum);
}
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,81 @@
/**
******************************************************************************
* @file system_target.c
* @author Application Team
* @version V1.1.0
* @date 2019-10-28
* @brief system source file.
******************************************************************************
* @attention
*
******************************************************************************
*/
#include "target.h"
#define NVR_REGINFOCOUNT1 (0x80400)
#define NVR_REGINFOBAKOFFSET (0x100)
/**
* @brief Setup the microcontroller system
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit(void)
{
uint32_t i,nCount,nValue,nAddress,nChecksum;
nCount = *(__IO uint32_t *)NVR_REGINFOCOUNT1;
nChecksum = nCount;
nChecksum = ~nChecksum;
if(nChecksum != *(__IO uint32_t *)(NVR_REGINFOCOUNT1+4))
{
nCount = *(__IO uint32_t *)(NVR_REGINFOCOUNT1+NVR_REGINFOBAKOFFSET);
nChecksum = nCount;
nChecksum = ~nChecksum;
if(nChecksum != *(__IO uint32_t *)(NVR_REGINFOCOUNT1+NVR_REGINFOBAKOFFSET+4))
{
while(1);
}
}
for(i=0; i<nCount; i++)
{
nAddress = *(__IO uint32_t *)(NVR_REGINFOCOUNT1+8+i*12);
nValue = *(__IO uint32_t *)(NVR_REGINFOCOUNT1+12+i*12);
nChecksum = nAddress + nValue;
nChecksum = ~nChecksum;
if(nChecksum != *(__IO uint32_t *)(NVR_REGINFOCOUNT1+16+i*12))
{
nAddress = *(__IO uint32_t *)(NVR_REGINFOCOUNT1+NVR_REGINFOBAKOFFSET+8+i*12);
nValue = *(__IO uint32_t *)(NVR_REGINFOCOUNT1+NVR_REGINFOBAKOFFSET+12+i*12);
nChecksum = nAddress + nValue;
nChecksum = ~nChecksum;
if(nChecksum != *(__IO uint32_t *)(NVR_REGINFOCOUNT1+NVR_REGINFOBAKOFFSET+16+i*12))
{
while(1);
}
}
if((nAddress>=0x40014800) && (nAddress<=0x40015000))
{
RTC_WriteRegisters(nAddress, &nValue, 1);
}
else
{
*(__IO uint32_t *)(nAddress) = nValue;
}
}
}
/**
* @brief Initializes registers.
* @param None
* @retval None
*/
void SystemUpdate(void)
{
}
/*********************************** END OF FILE ******************************/
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/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.2
* @date 19. April 2017
******************************************************************************/
/*
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif
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import rtconfig
from building import *
# get current directory
cwd = GetCurrentDir()
# The set of source files associated with this SConscript file.
src = Glob('VangoV85xx_standard_peripheral/Source/*.c')
src += [cwd + '/CMSIS/Vango/V85xx/Source/system_target.c']
src += [cwd + '/CMSIS/Vango/V85xx/Source/lib_CodeRAM.c']
src += [cwd + '/CMSIS/Vango/V85xx/Source/lib_cortex.c']
src += [cwd + '/CMSIS/Vango/V85xx/Source/lib_LoadNVR.c']
#add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += [cwd + '/CMSIS/Vango/V85xx/Source/GCC/startup_target.S']
if rtconfig.CROSS_TOOL == 'keil':
src += [cwd + '/CMSIS/Vango/V85xx/Source/Keil5/startup_target.S']
path = [
cwd + '/CMSIS/Vango/V85xx/Include',
cwd + '/CMSIS',
cwd + '/VangoV85xx_standard_peripheral/Include',]
CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'V85xx','USE_TARGET_DRIVER']
group = DefineGroup('Vango_Lib', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')
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/**
******************************************************************************
* @file lib_adc_tiny.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief ADC_TINY library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_ADC_TINY_H
#define __LIB_ADC_TINY_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t SignalSel;
uint32_t ADTREF1;
uint32_t ADTREF2;
uint32_t ADTREF3;
} TADCInitType;
//SelADT
#define ADCTINY_SIGNALSEL_IOE6 0
#define ADCTINY_SIGNALSEL_IOE7 ANA_REGF_SELADT
#define IS_ADCTINY_SELADT(__SELADT__) (((__SELADT__) == ADCTINY_SIGNALSEL_IOE6) ||\
((__SELADT__) == ADCTINY_SIGNALSEL_IOE7))
//ADTREF1
#define ADCTINY_REF1_0_9 0
#define ADCTINY_REF1_0_7 ANA_REGF_ADTREF1SEL
#define IS_ADCTINY_ADTREF1(__ADTREF1__) (((__ADTREF1__) == ADCTINY_REF1_0_9) ||\
((__ADTREF1__) == ADCTINY_REF1_0_7))
//ADTREF2
#define ADCTINY_REF2_1_8 0
#define ADCTINY_REF2_1_6 ANA_REGF_ADTREF2SEL
#define IS_ADCTINY_ADTREF2(__ADTREF2__) (((__ADTREF2__) == ADCTINY_REF2_1_8) ||\
((__ADTREF2__) == ADCTINY_REF2_1_6))
//ADTREF3
#define ADCTINY_REF3_2_7 0
#define ADCTINY_REF3_2_5 ANA_REGF_ADTREF3SEL
#define IS_ADCTINY_ADTREF3(__ADTREF3__) (((__ADTREF3__) == ADCTINY_REF3_2_7) ||\
((__ADTREF3__) == ADCTINY_REF3_2_5))
//THSel
#define ADCTINY_THSEL_0 ANA_MISC_TADCTH_0
#define ADCTINY_THSEL_1 ANA_MISC_TADCTH_1
#define ADCTINY_THSEL_2 ANA_MISC_TADCTH_2
#define ADCTINY_THSEL_3 ANA_MISC_TADCTH_3
#define IS_ADCTINY_THSEL(__THSEL__) (((__THSEL__) == ADCTINY_THSEL_0) ||\
((__THSEL__) == ADCTINY_THSEL_1) ||\
((__THSEL__) == ADCTINY_THSEL_2) ||\
((__THSEL__) == ADCTINY_THSEL_3))
/* Exported Functions ------------------------------------------------------- */
void TADC_DeInit(void);
void TADC_StructInit(TADCInitType* TADC_InitStruct);
void TADC_Init(TADCInitType* TADC_InitStruct);
void TADC_Cmd(uint32_t NewState);
uint8_t TADC_GetOutput(void);
void TADC_IntTHConfig(uint32_t THSel);
void TADC_INTConfig(uint32_t NewState);
uint8_t TADC_GetINTStatus(void);
void TADC_ClearINTStatus(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_ADC_TINY_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,82 @@
/**
******************************************************************************
* @file lib_ana.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Analog library.
******************************************************************************
* @attention
*
*
******************************************************************************
*/
#ifndef __LIB_ANA_H
#define __LIB_ANA_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
/***** StatusMask (ANA_GetStatus) *****/
#define ANA_STATUS_AVCCLV ANA_COMPOUT_AVCCLV
#define ANA_STATUS_VDCINDROP ANA_COMPOUT_VDCINDROP
#define ANA_STATUS_VDDALARM ANA_COMPOUT_VDDALARM
#define ANA_STATUS_COMP2 ANA_COMPOUT_COMP2
#define ANA_STATUS_COMP1 ANA_COMPOUT_COMP1
#define ANA_STATUS_LOCKL ANA_COMPOUT_LOCKL
#define ANA_STATUS_LOCKH ANA_COMPOUT_LOCKH
/***** IntMask (ANA_GetINTStatus / ANA_ClearINTStatus / ANA_INTConfig) *****/
#define ANA_INT_TADC_OVER ANA_INTSTS_INTSTS13
#define ANA_INT_REGERR ANA_INTSTS_INTSTS12
#define ANA_INT_SME ANA_INTSTS_INTSTS11
#define ANA_INT_AVCCLV ANA_INTSTS_INTSTS10
#define ANA_INT_VDCINDROP ANA_INTSTS_INTSTS8
#define ANA_INT_VDDALARM ANA_INTSTS_INTSTS7
#define ANA_INT_COMP2 ANA_INTSTS_INTSTS3
#define ANA_INT_COMP1 ANA_INTSTS_INTSTS2
#define ANA_INT_ADCA ANA_INTSTS_INTSTS1
#define ANA_INT_ADCM ANA_INTSTS_INTSTS0
#define ANA_INT_Msk (0x3DEFUL)
/* Private macros ------------------------------------------------------------*/
#define IS_ANA_STATUS(__STATUS__) (((__STATUS__) == ANA_STATUS_AVCCLV) ||\
((__STATUS__) == ANA_STATUS_VDCINDROP) ||\
((__STATUS__) == ANA_STATUS_VDDALARM) ||\
((__STATUS__) == ANA_STATUS_COMP2) ||\
((__STATUS__) == ANA_STATUS_COMP1) ||\
((__STATUS__) == ANA_STATUS_LOCKL) ||\
((__STATUS__) == ANA_STATUS_LOCKH))
#define IS_ANA_INTSTSR(__INTSTSR__) (((__INTSTSR__) == ANA_INT_TADC_OVER) ||\
((__INTSTSR__) == ANA_INT_REGERR) ||\
((__INTSTSR__) == ANA_INT_SME) ||\
((__INTSTSR__) == ANA_INT_AVCCLV) ||\
((__INTSTSR__) == ANA_INT_VDCINDROP) ||\
((__INTSTSR__) == ANA_INT_VDDALARM) ||\
((__INTSTSR__) == ANA_INT_COMP2) ||\
((__INTSTSR__) == ANA_INT_COMP1) ||\
((__INTSTSR__) == ANA_INT_ADCA) ||\
((__INTSTSR__) == ANA_INT_ADCM))
#define IS_ANA_INTSTSC(__INTSTSC__) ((((__INTSTSC__) & ANA_INT_Msk) != 0U) &&\
(((__INTSTSC__) & ~ANA_INT_Msk) == 0U))
#define IS_ANA_INT(__INT__) IS_ANA_INTSTSC(__INT__)
/* Exported Functions ------------------------------------------------------- */
uint8_t ANA_GetStatus(uint32_t StatusMask);
uint8_t ANA_GetINTStatus(uint32_t IntMask);
void ANA_ClearINTStatus(uint32_t IntMask);
void ANA_INTConfig(uint32_t IntMask, uint32_t NewState);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_ANA_H */
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,97 @@
/**
******************************************************************************
* @file lib_comp.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief COMP library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_COMP_H
#define __LIB_COMP_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
/* Macros --------------------------------------------------------------------*/
/***** COMP_DEBConfig *****/
//COMPx
#define COMP_1 (0x00U)
#define COMP_2 (0x02U)
#define IS_COMP(__COMP__) (((__COMP__) == COMP_1) || ((__COMP__) == COMP_2))
//Debounce
#define COMP_DEB_0 ANA_CTRL_CMP1DEB_0
#define COMP_DEB_1 ANA_CTRL_CMP1DEB_1
#define COMP_DEB_2 ANA_CTRL_CMP1DEB_2
#define COMP_DEB_3 ANA_CTRL_CMP1DEB_3
#define IS_COMP_DEB(__DEB__) (((__DEB__) == COMP_DEB_0) ||\
((__DEB__) == COMP_DEB_1) ||\
((__DEB__) == COMP_DEB_2) ||\
((__DEB__) == COMP_DEB_3))
/***** Mode (COMP_ModeConfig) *****/
#define COMP_MODE_OFF ANA_CTRL_COMP1_SEL_0
#define COMP_MODE_RISING ANA_CTRL_COMP1_SEL_1
#define COMP_MODE_FALLING ANA_CTRL_COMP1_SEL_2
#define COMP_MODE_BOTH ANA_CTRL_COMP1_SEL_3
#define IS_COMP_MODE(__MODE__) (((__MODE__) == COMP_MODE_OFF) ||\
((__MODE__) == COMP_MODE_RISING) ||\
((__MODE__) == COMP_MODE_FALLING) ||\
((__MODE__) == COMP_MODE_BOTH))
/***** SourceSelect (COMP_ConfigSignalSource) *****/
#define COMP_SIGNALSRC_P_TO_REF ANA_REG2_CMP1_SEL_0
#define COMP_SIGNALSRC_N_TO_REF ANA_REG2_CMP1_SEL_1
#define COMP_SIGNALSRC_P_TO_N ANA_REG2_CMP1_SEL_2
#define IS_COMP_SIGNALSRC(__SIGNALSRC__) (((__SIGNALSRC__) == COMP_SIGNALSRC_P_TO_REF) ||\
((__SIGNALSRC__) == COMP_SIGNALSRC_N_TO_REF) ||\
((__SIGNALSRC__) == COMP_SIGNALSRC_P_TO_N))
/***** REFSelect (COMP_ConfigREF) *****/
#define COMP_REF_VREF (0)
#define COMP_REF_BGPREF ANA_REG2_REFSEL_CMP1
#define IS_COMP_REF(__REF__) (((__REF__) == COMP_REF_VREF) ||\
((__REF__) == COMP_REF_BGPREF))
/***** BiasSel (COMP_BiasConfig) *****/
#define COMP_BIAS_20nA ANA_REG5_IT_CMP1_0
#define COMP_BIAS_100nA ANA_REG5_IT_CMP1_1
#define COMP_BIAS_500nA ANA_REG5_IT_CMP1_2
#define IS_COMP_BIAS(__BIAS__) (((__BIAS__) == COMP_BIAS_20nA) ||\
((__BIAS__) == COMP_BIAS_100nA)||\
((__BIAS__) == COMP_BIAS_500nA))
/* Exported Functions ------------------------------------------------------- */
void COMP_DEBConfig(uint32_t COMPx, uint32_t Debounce);
void COMP_ModeConfig(uint32_t COMPx, uint32_t Mode);
void COMP_SignalSourceConfig(uint32_t COMPx, uint32_t SourceSelect);
void COMP_REFConfig(uint32_t COMPx, uint32_t REFSelect);
void COMP_BiasConfig(uint32_t COMPx, uint32_t BiasSel);
void COMP_INTConfig(uint32_t COMPx, uint32_t NewState);
uint8_t COMP_GetINTStatus(uint32_t COMPx);
void COMP_ClearINTStatus(uint32_t COMPx);
void COMP_Output_Cmd(uint32_t COMPx, uint32_t NewState);
void COMP_Cmd(uint32_t COMPx, uint32_t NewState);
uint32_t COMP_GetCNTValue(uint32_t COMPx);
void COMP_ClearCNTValue(uint32_t COMPx);
uint8_t COMP1_GetOutputLevel(void);
uint8_t COMP2_GetOutputLevel(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_COMP_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,85 @@
/**
******************************************************************************
* @file lib_crypt.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief CRYPT library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_CRYPT_H
#define __LIB_CRYPT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
//Length
#define CRYPT_LENGTH_32 CRYPT_CTRL_LENGTH_32
#define CRYPT_LENGTH_64 CRYPT_CTRL_LENGTH_64
#define CRYPT_LENGTH_96 CRYPT_CTRL_LENGTH_96
#define CRYPT_LENGTH_128 CRYPT_CTRL_LENGTH_128
#define CRYPT_LENGTH_160 CRYPT_CTRL_LENGTH_160
#define CRYPT_LENGTH_192 CRYPT_CTRL_LENGTH_192
#define CRYPT_LENGTH_224 CRYPT_CTRL_LENGTH_224
#define CRYPT_LENGTH_256 CRYPT_CTRL_LENGTH_256
#define CRYPT_LENGTH_288 CRYPT_CTRL_LENGTH_288
#define CRYPT_LENGTH_320 CRYPT_CTRL_LENGTH_320
#define CRYPT_LENGTH_352 CRYPT_CTRL_LENGTH_352
#define CRYPT_LENGTH_384 CRYPT_CTRL_LENGTH_384
#define CRYPT_LENGTH_416 CRYPT_CTRL_LENGTH_416
#define CRYPT_LENGTH_448 CRYPT_CTRL_LENGTH_448
#define CRYPT_LENGTH_480 CRYPT_CTRL_LENGTH_480
#define CRYPT_LENGTH_512 CRYPT_CTRL_LENGTH_512
//Nostop
#define CRYPT_STOPCPU (0)
#define CRYPT_NOSTOPCPU CRYPT_CTRL_NOSTOP
/* Private macros ------------------------------------------------------------*/
#define IS_CRYPT_ADDR(__ADDR__) (((__ADDR__) < 0x8000) &&\
(((__ADDR__) & 0x3U) == 0U))
#define IS_CRYPT_LENGTH(__LENGTH__) (((__LENGTH__) == CRYPT_LENGTH_32) ||\
((__LENGTH__) == CRYPT_LENGTH_64) ||\
((__LENGTH__) == CRYPT_LENGTH_32) ||\
((__LENGTH__) == CRYPT_LENGTH_96) ||\
((__LENGTH__) == CRYPT_LENGTH_128) ||\
((__LENGTH__) == CRYPT_LENGTH_160) ||\
((__LENGTH__) == CRYPT_LENGTH_192) ||\
((__LENGTH__) == CRYPT_LENGTH_224) ||\
((__LENGTH__) == CRYPT_LENGTH_256) ||\
((__LENGTH__) == CRYPT_LENGTH_288) ||\
((__LENGTH__) == CRYPT_LENGTH_320) ||\
((__LENGTH__) == CRYPT_LENGTH_352) ||\
((__LENGTH__) == CRYPT_LENGTH_384) ||\
((__LENGTH__) == CRYPT_LENGTH_416) ||\
((__LENGTH__) == CRYPT_LENGTH_448) ||\
((__LENGTH__) == CRYPT_LENGTH_480) ||\
((__LENGTH__) == CRYPT_LENGTH_512))
#define IS_CRYPT_NOSTOP(__NOSTOP__) (((__NOSTOP__) == CRYPT_STOPCPU) || ((__NOSTOP__) == CRYPT_NOSTOPCPU))
/* Exported Functions ------------------------------------------------------- */
void CRYPT_AddressAConfig(uint16_t AddrA);
void CRYPT_AddressBConfig(uint16_t AddrB);
void CRYPT_AddressOConfig(uint16_t AddrO);
uint8_t CRYPT_GetCarryBorrowBit(void);
void CRYPT_StartAdd(uint32_t Length, uint32_t Nostop);
void CRYPT_StartMultiply(uint32_t Length, uint32_t Nostop);
void CRYPT_StartSub(uint32_t Length, uint32_t Nostop);
void CRYPT_StartRShift1(uint32_t Length, uint32_t Nostop);
void CRYPT_WaitForLastOperation(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_CRYPT_H */
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,74 @@
/**
******************************************************************************
* @file lib_flash.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief FLASH library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_FLASH_H
#define __LIB_FLASH_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
//CSMode
#define FLASH_CSMODE_DISABLE FLASH_CTRL_CSMODE_DISABLE
#define FLASH_CSMODE_ALWAYSON FLASH_CTRL_CSMODE_ALWAYSON
#define FLASH_CSMODE_TIM2OF FLASH_CTRL_CSMODE_TIM2OV
#define FLASH_CSMODE_RTC FLASH_CTRL_CSMODE_RTC
#define IS_FLASH_CSMODE(__CSMODE__) (((__CSMODE__) == FLASH_CSMODE_DISABLE) ||\
((__CSMODE__) == FLASH_CSMODE_ALWAYSON) ||\
((__CSMODE__) == FLASH_CSMODE_TIM2OF) ||\
((__CSMODE__) == FLASH_CSMODE_RTC))
//INT
#define FLASH_INT_CS FLASH_CTRL_CSINTEN
#define IS_FLASH_INT(__INT__) ((__INT__) == FLASH_INT_CS)
//WriteStatus
#define FLASH_WSTA_BUSY 0
#define FLASH_WRITE_FINISH 1
#define FLASH_WSTA_FINISH FLASH_WRITE_FINISH
#define IS_FLASH_ADDRESS(__ADDRESS__) ((__ADDRESS__) < 0x40000UL)
#define IS_FLASH_ADRRW(__ADDRW__) (((__ADDRW__) < 0x40000UL) &&\
(((__ADDRW__) & 0x3U) == 0U))
#define IS_FLASH_ADRRHW(__ADDRHW__) (((__ADDRHW__) < 0x40000UL) &&\
(((__ADDRHW__) & 0x1U) == 0U))
#define IS_FLASH_CHECKSUMADDR(__ADDRESS1__,__ADDRESS2__) (((__ADDRESS1__) < 0x40000) && ((__ADDRESS2__) < 0x40000) && ((__ADDRESS1__) < (__ADDRESS2__)))
/* Exported Functions ------------------------------------------------------- */
void FLASH_Init(uint32_t CSMode);
void FLASH_INTConfig(uint32_t IntMask, uint32_t NewState);
void FLASH_CycleInit(void);
void FLASH_SectorErase(uint32_t SectorAddr);
void FLASH_ProgramWord(uint32_t Addr, uint32_t *WordBuffer, uint32_t Length);
void FLASH_ProgramHWord(uint32_t Addr, uint16_t *HWordBuffer, uint32_t Length);
void FLASH_ProgramByte(uint32_t Addr, uint8_t *ByteBuffer, uint32_t Length);
uint32_t FLASH_GetWriteStatus(void);
void FLASH_SetCheckSumRange(uint32_t AddrStart, uint32_t AddrEnd);
void FLASH_SetCheckSumCompValue(uint32_t Checksum);
uint32_t FLASH_GetCheckSum(void);
uint8_t FLASH_GetINTStatus(uint32_t IntMask);
void FLASH_ClearINTStatus(uint32_t IntMask);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_FLASH_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,175 @@
/**
******************************************************************************
* @file lib_gpio.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief GPIO library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_GPIO_H
#define __LIB_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t GPIO_Pin;
uint32_t GPIO_Mode;
} GPIO_InitType;
/**
* @brief Bit_State_enumeration
*/
typedef enum {
Bit_RESET = 0,
Bit_SET
} BitState;
//GPIO_Pin
#define GPIO_Pin_0 ((uint16_t)0x0001)
#define GPIO_Pin_1 ((uint16_t)0x0002)
#define GPIO_Pin_2 ((uint16_t)0x0004)
#define GPIO_Pin_3 ((uint16_t)0x0008)
#define GPIO_Pin_4 ((uint16_t)0x0010)
#define GPIO_Pin_5 ((uint16_t)0x0020)
#define GPIO_Pin_6 ((uint16_t)0x0040)
#define GPIO_Pin_7 ((uint16_t)0x0080)
#define GPIO_Pin_8 ((uint16_t)0x0100)
#define GPIO_Pin_9 ((uint16_t)0x0200)
#define GPIO_Pin_10 ((uint16_t)0x0400)
#define GPIO_Pin_11 ((uint16_t)0x0800)
#define GPIO_Pin_12 ((uint16_t)0x1000)
#define GPIO_Pin_13 ((uint16_t)0x2000)
#define GPIO_Pin_14 ((uint16_t)0x4000)
#define GPIO_Pin_15 ((uint16_t)0x8000)
#define GPIO_Pin_All ((uint16_t)0xFFFF)
//GPIO_Mode
#define GPIO_Mode_INPUT (0xCU)
#define GPIO_Mode_OUTPUT_CMOS (0x2U)
#define GPIO_Mode_OUTPUT_OD (0x3U)
#define GPIO_Mode_INOUT_OD (0xBU)
#define GPIO_Mode_INOUT_CMOS (0xAU)
#define GPIO_Mode_FORBIDDEN (0x4U)
//GPIO AF
#define GPIOB_AF_PLLHDIV IOB_SEL_SEL1
#define GPIOB_AF_OSC IOB_SEL_SEL6
#define GPIOB_AF_PLLLOUT IOB_SEL_SEL2
#define GPIOE_AF_CMP1O IOE_SEL_SEL7
//PMUIO AF
#define PMUIO7_AF_PLLDIV PMU_IOASEL_SEL7
#define PMUIO_AF_CMP2O PMU_IOASEL_SEL6
#define PMUIO3_AF_PLLDIV PMU_IOASEL_SEL3
#define PMUIO_AF_Msk (PMUIO7_AF_PLLDIV | PMUIO_AF_CMP2O | PMUIO3_AF_PLLDIV)
//GPIO pin remap
#define GPIO_REMAP_I2C IO_MISC_I2CIOC
//PLLDIV
#define GPIO_PLLDIV_1 IO_MISC_PLLHDIV_1
#define GPIO_PLLDIV_2 IO_MISC_PLLHDIV_2
#define GPIO_PLLDIV_4 IO_MISC_PLLHDIV_4
#define GPIO_PLLDIV_8 IO_MISC_PLLHDIV_8
#define GPIO_PLLDIV_16 IO_MISC_PLLHDIV_16
/* Private macros ------------------------------------------------------------*/
#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_Pin_All) != 0UL) &&\
(((__PIN__) & ~GPIO_Pin_All) == 0UL))
#define IS_GPIO_PINR(__PINR__) (((__PINR__) == GPIO_Pin_0) ||\
((__PINR__) == GPIO_Pin_1) ||\
((__PINR__) == GPIO_Pin_2) ||\
((__PINR__) == GPIO_Pin_3) ||\
((__PINR__) == GPIO_Pin_4) ||\
((__PINR__) == GPIO_Pin_5) ||\
((__PINR__) == GPIO_Pin_6) ||\
((__PINR__) == GPIO_Pin_7) ||\
((__PINR__) == GPIO_Pin_8) ||\
((__PINR__) == GPIO_Pin_9) ||\
((__PINR__) == GPIO_Pin_10) ||\
((__PINR__) == GPIO_Pin_11) ||\
((__PINR__) == GPIO_Pin_12) ||\
((__PINR__) == GPIO_Pin_13) ||\
((__PINR__) == GPIO_Pin_14) ||\
((__PINR__) == GPIO_Pin_15))
#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_Mode_INPUT) ||\
((__MODE__) == GPIO_Mode_OUTPUT_CMOS) ||\
((__MODE__) == GPIO_Mode_OUTPUT_OD) ||\
((__MODE__) == GPIO_Mode_INOUT_OD) ||\
((__MODE__) == GPIO_Mode_INOUT_CMOS) ||\
((__MODE__) == GPIO_Mode_FORBIDDEN))
#define IS_GPIO_BITVAL(__BITVAL__) (((__BITVAL__) == 1U) || ((__BITVAL__) == 0U))
#define IS_GPIO_GPIOAF(__GPIOAF__) (((__GPIOAF__) == GPIOB_AF_PLLHDIV) ||\
((__GPIOAF__) == GPIOB_AF_OSC) ||\
((__GPIOAF__) == GPIOE_AF_CMP1O) ||\
((__GPIOAF__) == GPIOB_AF_PLLLOUT))
#define IS_GPIO_PMUIOAF(__PMUIOAF__) ((((__PMUIOAF__) & PMUIO_AF_Msk) != 0U) &&\
(((__PMUIOAF__) & ~PMUIO_AF_Msk) == 0U))
#define IS_GPIO_REMAP(__REMAP__) ((__REMAP__) == GPIO_REMAP_I2C)
#define IS_GPIO_PLLDIV(__PLLDIV__) (((__PLLDIV__) == GPIO_PLLDIV_1) ||\
((__PLLDIV__) == GPIO_PLLDIV_2) ||\
((__PLLDIV__) == GPIO_PLLDIV_4) ||\
((__PLLDIV__) == GPIO_PLLDIV_8) ||\
((__PLLDIV__) == GPIO_PLLDIV_16))
/* Exported Functions ------------------------------------------------------- */
/* GPIO Exported Functions Group1:
Initialization and functions --------------*/
void GPIOBToF_Init(GPIO_TypeDef *GPIOx, GPIO_InitType *InitStruct);
void GPIOA_Init(GPIOA_TypeDef *GPIOx, GPIO_InitType *InitStruct);
/* GPIO Exported Functions Group2:
Read input data ---------------------------*/
uint8_t GPIOBToF_ReadInputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
uint8_t GPIOA_ReadInputDataBit(GPIOA_TypeDef *GPIOx, uint16_t GPIO_Pin);
uint16_t GPIOBToF_ReadInputData(GPIO_TypeDef* GPIOx);
uint16_t GPIOA_ReadInputData(GPIOA_TypeDef* GPIOx);
/* GPIO Exported Functions Group3:
Read output data --------------------------*/
uint8_t GPIOBToF_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint8_t GPIOA_ReadOutputDataBit(GPIOA_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint16_t GPIOBToF_ReadOutputData(GPIO_TypeDef* GPIOx);
uint16_t GPIOA_ReadOutputData(GPIOA_TypeDef* GPIOx);
/* GPIO Exported Functions Group4:
Write output data -------------------------*/
void GPIOBToF_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIOA_SetBits(GPIOA_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIOBToF_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIOA_ResetBits(GPIOA_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIOBToF_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint8_t val);
void GPIOA_WriteBit(GPIOA_TypeDef* GPIOx, uint16_t GPIO_Pin, uint8_t val);
void GPIOBToF_Write(GPIO_TypeDef* GPIOx, uint16_t val);
void GPIOA_Write(GPIOA_TypeDef* GPIOx, uint16_t val);
/* GPIO Exported Functions Group5:
IO AF configure ---------------------------*/
void GPIOBToF_AFConfig(GPIO_TypeDef* GPIOx, uint32_t GPIO_AFx, uint8_t NewState);
void GPIOA_AFConfig(uint32_t PMUIO_AFx, uint8_t NewState);
/* GPIO Exported Functions Group6:
IO Remap configure ------------------------*/
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, uint8_t NewState);
/* GPIO Exported Functions Group7:
Others ------------------------------------*/
void GPIO_PLLDIV_Config(uint32_t Divider);
void GPIOA_NoDeg_Cmd( uint16_t GPIO_Pin, uint8_t NewState);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_GPIO_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,119 @@
/**
******************************************************************************
* @file lib_i2c.h
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief IIC library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_I2C_H
#define __LIB_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t SlaveAddr;
uint32_t GeneralCallAck;
uint32_t AssertAcknowledge;
uint32_t ClockSource;
} I2C_InitType;
//GeneralCallAck
#define I2C_GENERALCALLACK_ENABLE I2C_ADDR_GC
#define I2C_GENERALCALLACK_DISABLE 0
//AssertAcknowledge
#define I2C_ASSERTACKNOWLEDGE_ENABLE I2C_CTRL_AA
#define I2C_ASSERTACKNOWLEDGE_DISABLE 0
//ClockSource
#define I2C_CLOCKSOURCE_APBD256 I2C_CTRL_CR_0
#define I2C_CLOCKSOURCE_APBD224 I2C_CTRL_CR_1
#define I2C_CLOCKSOURCE_APBD192 I2C_CTRL_CR_2
#define I2C_CLOCKSOURCE_APBD160 I2C_CTRL_CR_3
#define I2C_CLOCKSOURCE_APBD960 I2C_CTRL_CR_4
#define I2C_CLOCKSOURCE_APBD120 I2C_CTRL_CR_5
#define I2C_CLOCKSOURCE_APBD60 I2C_CTRL_CR_6
#define I2C_CLOCKSOURCE_TIM3OFD8 I2C_CTRL_CR_7
typedef struct
{
uint16_t SlaveAddr;
uint8_t SubAddrType;
uint32_t PageRange;
uint32_t SubAddress;
uint8_t *pBuffer;
uint32_t Length;
} I2C_WRType;
//SubAddrType
#define I2C_SUBADDR_1BYTE 1
#define I2C_SUBADDR_2BYTE 2
#define I2C_SUBADDR_OTHER 3
//remap
#define I2C_REMAP_ENABLE 1
#define I2C_REMAP_DISABLE 0
/* Private macros ------------------------------------------------------------*/
#define IS_I2C_GC(__GC__) (((__GC__) == I2C_GENERALCALLACK_ENABLE) ||\
((__GC__) == I2C_GENERALCALLACK_DISABLE))
#define IS_I2C_AA(__AA__) (((__AA__) == I2C_ASSERTACKNOWLEDGE_ENABLE) ||\
((__AA__) == I2C_ASSERTACKNOWLEDGE_DISABLE))
#define IS_I2C_CLKSRC(__CLKSRC__) (((__CLKSRC__) == I2C_CLOCKSOURCE_APBD256) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD224) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD192) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD160) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD960) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD120) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_APBD60) ||\
((__CLKSRC__) == I2C_CLOCKSOURCE_TIM3OFD8))
#define I2C_SUBADDR_TYPE(__TYPE__) (((__TYPE__) == I2C_SUBADDR_1BYTE) ||\
((__TYPE__) == I2C_SUBADDR_2BYTE) ||\
((__TYPE__) == I2C_SUBADDR_OTHER))
/* Exported Functions ------------------------------------------------------- */
/* I2C Exported Functions Group1:
(De)Initialization ------------------------*/
void I2C_DeInit(uint32_t remap);
void I2C_StructInit(I2C_InitType *InitStruct);
void I2C_Init(I2C_InitType *InitStruct);
/* I2C Exported Functions Group2:
Interrupt ---------------------------------*/
void I2C_INTConfig(uint32_t NewState);
uint8_t I2C_GetINTStatus(void);
void I2C_ClearINTStatus(void);
/* I2C Exported Functions Group3:
Transfer datas ----------------------------*/
uint16_t I2C_MasterReadBytes(I2C_WRType *InitStruct);
uint16_t I2C_MasterWriteBytes(I2C_WRType *InitStruct);
/* I2C Exported Functions Group4:
MISC Configuration ------------------------*/
void I2C_Cmd(uint32_t NewState);
/* I2C Exported Functions Group5:
Others ------------------------------------*/
void I2C_AssertAcknowledgeConfig(uint32_t NewState);
uint8_t I2C_ReceiveData(void);
void I2C_SendData(uint8_t Dat);
void I2C_GenerateSTART(uint32_t NewState);
void I2C_GenerateSTOP(uint32_t NewState);
uint8_t I2C_GetStatusCode(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_I2C_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,104 @@
/**
******************************************************************************
* @file lib_iso7816.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief ISO7816 library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_ISO7816_H
#define __LIB_ISO7816_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t FirstBit;
uint32_t ACKLen;
uint32_t Parity;
uint32_t Baudrate;
} ISO7816_InitType;
//FirstBit
#define ISO7816_FIRSTBIT_LSB ISO7816_INFO_LSB
#define ISO7816_FIRSTBIT_MSB 0
#define IS_ISO7816_FIRSTBIT(__FIRSTBIT__) (((__FIRSTBIT__) == ISO7816_FIRSTBIT_LSB) ||\
((__FIRSTBIT__) == ISO7816_FIRSTBIT_MSB))
//ACKLen
#define ISO7816_ACKLEN_1 0
#define ISO7816_ACKLEN_2 ISO7816_CFG_ACKLEN
#define IS_ISO7816_ACKLEN(__ACKLEN__) (((__ACKLEN__) == ISO7816_ACKLEN_1) ||\
((__ACKLEN__) == ISO7816_ACKLEN_2))
//Parity
#define ISO7816_PARITY_EVEN 0
#define ISO7816_PARITY_ODD ISO7816_CFG_CHKP
#define IS_ISO7816_PARITY(__PARITY__) (((__PARITY__) == ISO7816_PARITY_EVEN) || ((__PARITY__) == ISO7816_PARITY_ODD))
#define IS_ISO7816_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) > 299UL)
#define IS_ISO7816_PRESCALER(__PRESCALER__) (((__PRESCALER__) <= 0x80) && ((__PRESCALER__) > 0U))
//interrupt
#define ISO7816_INT_RXOV ISO7816_CFG_OVIE
#define ISO7816_INT_TX ISO7816_CFG_SDIE
#define ISO7816_INT_RX ISO7816_CFG_RCIE
#define ISO7816_INT_Msk (ISO7816_INT_RXOV \
|ISO7816_INT_TX \
|ISO7816_INT_RX)
#define IS_ISO7816_INT(__INT__) ((((__INT__) & ISO7816_INT_Msk) != 0U) &&\
(((__INT__) & ~ISO7816_INT_Msk) == 0U))
//INTStatus
#define ISO7816_INTSTS_RXOV ISO7816_INFO_OVIF
#define ISO7816_INTSTS_TX ISO7816_INFO_SDIF
#define ISO7816_INTSTS_RX ISO7816_INFO_RCIF
#define ISO7816_INTSTS_Msk (ISO7816_INTSTS_RXOV \
|ISO7816_INTSTS_TX \
|ISO7816_INTSTS_RX)
#define IS_ISO7816_INTFLAGR(__INTFLAG__) (((__INTFLAG__) == ISO7816_INTSTS_RXOV) ||\
((__INTFLAG__) == ISO7816_INTSTS_TX) ||\
((__INTFLAG__) == ISO7816_INTSTS_RX))
#define IS_ISO7816_INTFLAGC(__INTFLAG__) ((((__INTFLAG__)&ISO7816_INTSTS_Msk) != 0U) &&\
(((__INTFLAG__)&(~ISO7816_INTSTS_Msk)) == 0U))
//status
#define ISO7816_FLAG_SDERR ISO7816_INFO_SDERR
#define ISO7816_FLAG_RCERR ISO7816_INFO_RCERR
#define ISO7816_FLAG_Msk (ISO7816_FLAG_SDERR|ISO7816_FLAG_RCERR)
#define IS_ISO7816_FLAGR(__FLAG__) (((__FLAG__) == ISO7816_FLAG_SDERR) || ((__FLAG__) == ISO7816_FLAG_RCERR))
#define IS_ISO7816_FLAGC(__FLAG__) ((((__FLAG__) & ISO7816_FLAG_Msk) != 0U) &&\
(((__FLAG__) & (~ISO7816_FLAG_Msk)) == 0U))
/* Exported Functions ------------------------------------------------------- */
void ISO7816_DeInit(ISO7816_TypeDef *ISO7816x);
void ISO7816_StructInit(ISO7816_InitType *InitStruct);
void ISO7816_Init(ISO7816_TypeDef *ISO7816x, ISO7816_InitType *Init_Struct);
void ISO7816_Cmd(ISO7816_TypeDef *ISO7816x, uint32_t NewState);
void ISO7816_BaudrateConfig(ISO7816_TypeDef *ISO7816x, uint32_t BaudRate);
void ISO7816_CLKDIVConfig(ISO7816_TypeDef *ISO7816x, uint32_t Prescaler);
void ISO7816_CLKOutputCmd(ISO7816_TypeDef *ISO7816x, uint32_t NewState);
void ISO7816_SendData(ISO7816_TypeDef *ISO7816x, uint8_t ch);
uint8_t ISO7816_ReceiveData(ISO7816_TypeDef *ISO7816x);
void ISO7816_INTConfig(ISO7816_TypeDef *ISO7816x, uint32_t INTMask, uint8_t NewState);
uint8_t ISO7816_GetINTStatus(ISO7816_TypeDef *ISO7816x, uint32_t INTMask);
void ISO7816_ClearINTStatus(ISO7816_TypeDef *ISO7816x, uint32_t INTMask);
uint8_t ISO7816_GetFlag(ISO7816_TypeDef *ISO7816x, uint32_t FlagMask);
void ISO7816_ClearFlag(ISO7816_TypeDef *ISO7816x, uint32_t FlagMask);
uint8_t ISO7816_GetLastTransmitACK(ISO7816_TypeDef *ISO7816x);
uint8_t ISO7816_GetLastReceiveCHKSUM(ISO7816_TypeDef *ISO7816x);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_ISO7816_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,162 @@
/**
******************************************************************************
* @file lib_lcd.h
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief LCD library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_LCD_H
#define __LIB_LCD_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
/* LCD SEGx IO typedef */
typedef struct
{
__IO uint32_t *GPIO;
uint16_t Pin;
}LCD_SEGIO;
/* LCD COMx IO typedef */
typedef struct
{
__IO uint32_t *GPIO;
uint16_t Pin;
}LCD_COMIO;
typedef struct
{
uint32_t Type;
uint32_t Drv;
uint32_t FRQ;
uint32_t SWPR;
uint32_t FBMODE;
uint32_t BKFILL;
} LCD_InitType;
//Type
#define LCD_TYPE_4COM LCD_CTRL_TYPE_4COM
#define LCD_TYPE_6COM LCD_CTRL_TYPE_6COM
#define LCD_TYPE_8COM LCD_CTRL_TYPE_8COM
//DrivingRes
#define LCD_DRV_300 LCD_CTRL_DRV_300KOHM
#define LCD_DRV_600 LCD_CTRL_DRV_600KOHM
#define LCD_DRV_150 LCD_CTRL_DRV_150KOHM
#define LCD_DRV_200 LCD_CTRL_DRV_200KOHM
//ScanFRQ
#define LCD_FRQ_64H LCD_CTRL_FRQ_64HZ
#define LCD_FRQ_128H LCD_CTRL_FRQ_128HZ
#define LCD_FRQ_256H LCD_CTRL_FRQ_256HZ
#define LCD_FRQ_512H LCD_CTRL_FRQ_512HZ
//SwitchMode
#define LCD_FBMODE_BUFA LCD_CTRL2_FBMODE_BUFA
#define LCD_FBMODE_BUFAB LCD_CTRL2_FBMODE_BUFAANDBUFB
#define LCD_FBMODE_BUFABLANK LCD_CTRL2_FBMODE_BUFAANDBLANK
//BlankFill
#define LCD_BKFILL_1 LCD_CTRL2_BKFILL
#define LCD_BKFILL_0 0
//ComMode
#define LCD_COMMOD_4COM 1
#define LCD_COMMOD_6COM 3
#define LCD_COMMOD_8COM 7
//BiasSelection
#define LCD_BMODE_DIV3 0
#define LCD_BMODE_DIV4 ANA_REG6_LCD_BMODE
//VLCDSelection
#define LCD_VLCD_0 0
#define LCD_VLCD_INC60MV 1
#define LCD_VLCD_INC120MV 2
#define LCD_VLCD_INC180MV 3
#define LCD_VLCD_INC240MV 4
#define LCD_VLCD_INC300MV 5
#define LCD_VLCD_DEC60MV 6
#define LCD_VLCD_DEC120MV 7
#define LCD_VLCD_DEC180MV 8
#define LCD_VLCD_DEC240MV 9
#define LCD_VLCD_DEC300MV 10
#define LCD_VLCD_DEC360MV 11
#define LCD_VLCD_DEC420MV 12
#define LCD_VLCD_DEC480MV 13
#define LCD_VLCD_DEC540MV 14
#define LCD_VLCD_DEC600MV 15
/* Private macros ------------------------------------------------------------*/
#define IS_LCD_TYPE(__TYPE__) (((__TYPE__) == LCD_TYPE_4COM) ||\
((__TYPE__) == LCD_TYPE_6COM) ||\
((__TYPE__) == LCD_TYPE_8COM))
#define IS_LCD_DRV(__DRV__) (((__DRV__) == LCD_DRV_300) ||\
((__DRV__) == LCD_DRV_600) ||\
((__DRV__) == LCD_DRV_150) ||\
((__DRV__) == LCD_DRV_200))
#define IS_LCD_FRQ(__FRQ__) (((__FRQ__) == LCD_FRQ_64H) ||\
((__FRQ__) == LCD_FRQ_128H) ||\
((__FRQ__) == LCD_FRQ_256H) ||\
((__FRQ__) == LCD_FRQ_512H))
#define IS_LCD_SWPR(__SWPR__) ((__SWPR__) <= 0xFFUL)
#define IS_LCD_FBMODE(__FBMODE__) (((__FBMODE__) == LCD_FBMODE_BUFA) ||\
((__FBMODE__) == LCD_FBMODE_BUFAB) ||\
((__FBMODE__) == LCD_FBMODE_BUFABLANK))
#define IS_LCD_BKFILL(__BKFILL__) (((__BKFILL__) == LCD_BKFILL_1) || ((__BKFILL__) == LCD_BKFILL_0))
#define IS_LCD_BMODE(__BMODE__) (((__BMODE__) == LCD_BMODE_DIV3) ||\
((__BMODE__) == LCD_BMODE_DIV4))
#define IS_LCD_COMMOD(__COMMOD__) (((__COMMOD__) == LCD_COMMOD_4COM) ||\
((__COMMOD__) == LCD_COMMOD_6COM) ||\
((__COMMOD__) == LCD_COMMOD_8COM))
#define IS_LCD_VLCD(__VLCD__) (((__VLCD__) == LCD_VLCD_0) ||\
((__VLCD__) == LCD_VLCD_INC60MV) ||\
((__VLCD__) == LCD_VLCD_INC120MV) ||\
((__VLCD__) == LCD_VLCD_INC180MV) ||\
((__VLCD__) == LCD_VLCD_INC240MV) ||\
((__VLCD__) == LCD_VLCD_INC300MV) ||\
((__VLCD__) == LCD_VLCD_DEC60MV) ||\
((__VLCD__) == LCD_VLCD_DEC120MV) ||\
((__VLCD__) == LCD_VLCD_DEC180MV) ||\
((__VLCD__) == LCD_VLCD_DEC240MV) ||\
((__VLCD__) == LCD_VLCD_DEC300MV) ||\
((__VLCD__) == LCD_VLCD_DEC360MV) ||\
((__VLCD__) == LCD_VLCD_DEC420MV) ||\
((__VLCD__) == LCD_VLCD_DEC480MV) ||\
((__VLCD__) == LCD_VLCD_DEC540MV) ||\
((__VLCD__) == LCD_VLCD_DEC600MV))
/* Exported Functions ------------------------------------------------------- */
/* LCD Exported Functions Group1:
(De)Initialization -------------------------*/
void LCD_DeInit(void);
void LCD_StructInit(LCD_InitType *LCD_InitStruct);
void LCD_Init(LCD_InitType *InitStruct);
/* LCD Exported Functions Group1:
MISC Configuration -------------------------*/
void LCD_Cmd(uint32_t NewState);
void LCD_IOConfig(uint32_t ComMode, uint32_t SEGVal0, uint32_t SEGVal1, uint16_t SEGVal2, uint32_t NewState);
void LCD_SetSEG(uint32_t SegCtrl0, uint32_t SegCtrl1, uint16_t SegCtrl2);
void LCD_BiasModeConfig(uint32_t BiasSelection);
uint32_t LCD_VoltageConfig(uint32_t VLCDSelection);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_LCD_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,80 @@
/**
******************************************************************************
* @file lib_misc.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief MISC library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_MISC_H
#define __LIB_MISC_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
//FlagMask
#define MISC_FLAG_LOCKUP MISC_SRAMINT_LOCKUP
#define MISC_FLAG_PIAC MISC_SRAMINT_PIAC
#define MISC_FLAG_HIAC MISC_SRAMINT_HIAC
#define MISC_FLAG_PERR MISC_SRAMINT_PERR
#define MISC_FLAG_Msk (MISC_FLAG_LOCKUP | MISC_FLAG_PIAC | MISC_FLAG_HIAC | MISC_FLAG_PERR)
//MISC interrupt
#define MISC_INT_LOCK MISC_SRAMINIT_LOCKIE
#define MISC_INT_PIAC MISC_SRAMINIT_PIACIE
#define MISC_INT_HIAC MISC_SRAMINIT_HIACIE
#define MISC_INT_PERR MISC_SRAMINIT_PERRIE
#define MISC_INT_Msk (MISC_INT_LOCK | MISC_INT_PIAC | MISC_INT_HIAC | MISC_INT_PERR)
//IR
#define MISC_IREN_TX0 MISC_IREN_UART0
#define MISC_IREN_TX1 MISC_IREN_UART1
#define MISC_IREN_TX2 MISC_IREN_UART2
#define MISC_IREN_TX3 MISC_IREN_UART3
#define MISC_IREN_TX4 MISC_IREN_UART4
#define MISC_IREN_TX5 MISC_IREN_UART5
#define MISC_IREN_Msk (0x3FUL)
/* Private macros ------------------------------------------------------------*/
#define IS_MISC_FLAGR(__FLAGR__) (((__FLAGR__) == MISC_FLAG_LOCKUP) ||\
((__FLAGR__) == MISC_FLAG_PIAC) ||\
((__FLAGR__) == MISC_FLAG_HIAC) ||\
((__FLAGR__) == MISC_FLAG_PERR))
#define IS_MISC_FLAGC(__FLAGC__) ((((__FLAGC__) & MISC_FLAG_Msk) != 0U) &&\
(((__FLAGC__) & ~MISC_FLAG_Msk) == 0U))
#define IS_MISC_INT(__INT__) ((((__INT__) & MISC_INT_Msk) != 0U) &&\
(((__INT__) &~MISC_INT_Msk) == 0U))
#define IS_MISC_IREN(__IREN__) ((((__IREN__) & MISC_IREN_Msk) != 0U) &&\
(((__IREN__) & ~MISC_IREN_Msk) == 0U))
/* Exported Functions ------------------------------------------------------- */
uint8_t MISC_GetFlag(uint32_t FlagMask);
void MISC_ClearFlag(uint32_t FlagMask);
void MISC_INTConfig(uint32_t INTMask, uint32_t NewState);
void MISC_SRAMParityCmd(uint32_t NewState);
uint32_t MISC_GetSRAMPEAddr(void);
uint32_t MISC_GetAPBErrAddr(void);
uint32_t MISC_GetAHBErrAddr(void);
void MISC_IRCmd(uint32_t IRx, uint32_t NewState);
void MISC_IRDutyConfig(uint16_t DutyHigh, uint16_t DutyLow);
void MISC_HardFaultCmd(uint32_t NewState);
void MISC_LockResetCmd(uint32_t NewState);
void MISC_IRQLATConfig(uint8_t Latency);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_MISC_H */
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,178 @@
/**
******************************************************************************
* @file lib_pwm.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief PWM library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_PWM_H
#define __LIB_PWM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t ClockDivision;
uint32_t Mode;
uint32_t ClockSource;
} PWM_BaseInitType;
//ClockDivision
#define PWM_CLKDIV_2 PWM_CTL_ID_DIV2
#define PWM_CLKDIV_4 PWM_CTL_ID_DIV4
#define PWM_CLKDIV_8 PWM_CTL_ID_DIV8
#define PWM_CLKDIV_16 PWM_CTL_ID_DIV16
//Mode
#define PWM_MODE_STOP PWM_CTL_MC_STOP
#define PWM_MODE_UPCOUNT PWM_CTL_MC_UP
#define PWM_MODE_CONTINUOUS PWM_CTL_MC_CONTINUE
#define PWM_MODE_UPDOWN PWM_CTL_MC_UPDOWN
//ClockSource
#define PWM_CLKSRC_APB PWM_CTL_TESL_APBDIV1
#define PWM_CLKSRC_APBD128 PWM_CTL_TESL_APBDIV128
typedef struct
{
uint32_t Period;
uint32_t OutMode;
} PWM_OCInitType;
//OUTMOD
#define PWM_OUTMOD_CONST PWM_CCTL_OUTMOD_CONST
#define PWM_OUTMOD_SET PWM_CCTL_OUTMOD_SET
#define PWM_OUTMOD_TOGGLE_RESET PWM_CCTL_OUTMOD_TOGGLE_RESET
#define PWM_OUTMOD_SET_RESET PWM_CCTL_OUTMOD_SET_RESET
#define PWM_OUTMOD_TOGGLE PWM_CCTL_OUTMOD_TOGGLE
#define PWM_OUTMOD_RESET PWM_CCTL_OUTMOD_RESET
#define PWM_OUTMOD_TOGGLE_SET PWM_CCTL_OUTMOD_TOGGLE_SET
#define PWM_OUTMOD_RESET_SET PWM_CCTL_OUTMOD_RESET_SET
//PWM CHANNEL
#define PWM_CHANNEL_0 0
#define PWM_CHANNEL_1 1
#define PWM_CHANNEL_2 2
#define PWM_OSEL0_T0O0 (0<<0)
#define PWM_OSEL0_T0O1 (1<<0)
#define PWM_OSEL0_T0O2 (2<<0)
#define PWM_OSEL0_T1O0 (4<<0)
#define PWM_OSEL0_T1O1 (5<<0)
#define PWM_OSEL0_T1O2 (6<<0)
#define PWM_OSEL0_T2O0 (8<<0)
#define PWM_OSEL0_T2O1 (9<<0)
#define PWM_OSEL0_T2O2 (10<<0)
#define PWM_OSEL0_T3O0 (12<<0)
#define PWM_OSEL0_T3O1 (13<<0)
#define PWM_OSEL0_T3O2 (14<<0)
//outline
#define PWM_OLINE_0 1
#define PWM_OLINE_1 2
#define PWM_OLINE_2 4
#define PWM_OLINE_3 8
#define PWM_OLINE_Msk 0xF
//PWM output selection
#define PWM0_OUT0 PWM_OSEL0_T0O0
#define PWM0_OUT1 PWM_OSEL0_T0O1
#define PWM0_OUT2 PWM_OSEL0_T0O2
#define PWM1_OUT0 PWM_OSEL0_T1O0
#define PWM1_OUT1 PWM_OSEL0_T1O1
#define PWM1_OUT2 PWM_OSEL0_T1O2
#define PWM2_OUT0 PWM_OSEL0_T2O0
#define PWM2_OUT1 PWM_OSEL0_T2O1
#define PWM2_OUT2 PWM_OSEL0_T2O2
#define PWM3_OUT0 PWM_OSEL0_T3O0
#define PWM3_OUT1 PWM_OSEL0_T3O1
#define PWM3_OUT2 PWM_OSEL0_T3O2
//Level
#define PWM_LEVEL_HIGH PWM_CCTL_OUT
#define PWM_LEVEL_LOW 0
/* Private macros ------------------------------------------------------------*/
#define IS_PWM_CLKDIV(__CLKDIV__) (((__CLKDIV__) == PWM_CLKDIV_2) ||\
((__CLKDIV__) == PWM_CLKDIV_4) ||\
((__CLKDIV__) == PWM_CLKDIV_8) ||\
((__CLKDIV__) == PWM_CLKDIV_16))
#define IS_PWM_CNTMODE(__CNTMODE__) (((__CNTMODE__) == PWM_MODE_STOP) ||\
((__CNTMODE__) == PWM_MODE_UPCOUNT) ||\
((__CNTMODE__) == PWM_MODE_CONTINUOUS) ||\
((__CNTMODE__) == PWM_MODE_UPDOWN))
#define IS_PWM_CLKSRC(__CLKSRC__) (((__CLKSRC__) == PWM_CLKSRC_APB) ||\
((__CLKSRC__) == PWM_CLKSRC_APBD128))
#define IS_PWM_OUTMODE(__OUTMODE__) (((__OUTMODE__) == PWM_OUTMOD_CONST) ||\
((__OUTMODE__) == PWM_OUTMOD_SET) ||\
((__OUTMODE__) == PWM_OUTMOD_TOGGLE_RESET) ||\
((__OUTMODE__) == PWM_OUTMOD_SET_RESET) ||\
((__OUTMODE__) == PWM_OUTMOD_TOGGLE) ||\
((__OUTMODE__) == PWM_OUTMOD_RESET) ||\
((__OUTMODE__) == PWM_OUTMOD_TOGGLE_SET) ||\
((__OUTMODE__) == PWM_OUTMOD_RESET_SET))
#define IS_PWM_CCR(__CCR__) ((__CCR__) < 0x10000U)
#define IS_PWM_CHANNEL(__CHANNEL__) (((__CHANNEL__) == PWM_CHANNEL_0) ||\
((__CHANNEL__) == PWM_CHANNEL_1) ||\
((__CHANNEL__) == PWM_CHANNEL_2))
#define IS_PWM_OUTLINE(__OUTLINE__) ((((__OUTLINE__) & PWM_OLINE_Msk) != 0U) &&\
(((__OUTLINE__) & ~PWM_OLINE_Msk) == 0U))
#define IS_PWM_OUTSEL(__OUTSEL__) (((__OUTSEL__) == PWM0_OUT0) ||\
((__OUTSEL__) == PWM0_OUT1) ||\
((__OUTSEL__) == PWM0_OUT2) ||\
((__OUTSEL__) == PWM1_OUT0) ||\
((__OUTSEL__) == PWM1_OUT1) ||\
((__OUTSEL__) == PWM1_OUT2) ||\
((__OUTSEL__) == PWM2_OUT0) ||\
((__OUTSEL__) == PWM2_OUT1) ||\
((__OUTSEL__) == PWM2_OUT2) ||\
((__OUTSEL__) == PWM3_OUT0) ||\
((__OUTSEL__) == PWM3_OUT1) ||\
((__OUTSEL__) == PWM3_OUT2))
#define IS_PWM_OUTLVL(__OUTLVL__) (((__OUTLVL__) == PWM_LEVEL_HIGH) ||\
((__OUTLVL__) == PWM_LEVEL_LOW))
/* Exported Functions ------------------------------------------------------- */
/* PWM Exported Functions Group1:
Initialization ----------------------------*/
void PWM_BaseInit(PWM_TypeDef *PWMx, PWM_BaseInitType *InitStruct);
void PWM_BaseStructInit(PWM_BaseInitType *InitStruct);
void PWM_OC0Init(PWM_TypeDef *PWMx, PWM_OCInitType *OCInitType);
void PWM_OC1Init(PWM_TypeDef *PWMx, PWM_OCInitType *OCInitType);
void PWM_OC2Init(PWM_TypeDef *PWMx, PWM_OCInitType *OCInitType);
void PWM_OCStructInit(PWM_OCInitType *OCInitType);
/* PWM Exported Functions Group2:
Interrupt ---------------------------------*/
void PWM_BaseINTConfig(PWM_TypeDef *PWMx, uint32_t NewState);
uint8_t PWM_GetBaseINTStatus(PWM_TypeDef *PWMx);
void PWM_ClearBaseINTStatus(PWM_TypeDef *PWMx);
void PWM_ChannelINTConfig(PWM_TypeDef *PWMx, uint32_t Channel, uint32_t NewState);
uint8_t PWM_GetChannelINTStatus(PWM_TypeDef *PWMx, uint32_t Channel);
void PWM_ClearChannelINTStatus(PWM_TypeDef *PWMx, uint32_t Channel);
/* PWM Exported Functions Group3:
MISC --------------------------------------*/
void PWM_ClearCounter(PWM_TypeDef *PWMx);
void PWM_CCRConfig(PWM_TypeDef *PWMx, uint32_t Channel, uint16_t Period);
//Compare output
void PWM_OLineConfig(uint32_t OutSelection, uint32_t OLine);
void PWM_OutputCmd(PWM_TypeDef *PWMx, uint32_t Channel, uint32_t NewState);
void PWM_SetOutLevel(PWM_TypeDef *PWMx, uint32_t Channel, uint32_t Level);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_PWM_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,198 @@
/**
******************************************************************************
* @file lib_rtc.h
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief RTC library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_RTC_H
#define __LIB_RTC_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
/* RTC Time struct */
typedef struct
{
uint32_t Year;
uint32_t Month;
uint32_t Date;
uint32_t WeekDay;
uint32_t Hours;
uint32_t Minutes;
uint32_t Seconds;
} RTC_TimeTypeDef;
//INT
#define RTC_INT_CEILLE RTC_INTEN_INTEN8
#define RTC_INT_ACDONE RTC_INTEN_INTEN7
#define RTC_INT_WKUCNT RTC_INTEN_INTEN6
#define RTC_INT_MIDNIGHT RTC_INTEN_INTEN5
#define RTC_INT_WKUHOUR RTC_INTEN_INTEN4
#define RTC_INT_WKUMIN RTC_INTEN_INTEN3
#define RTC_INT_WKUSEC RTC_INTEN_INTEN2
#define RTC_INT_TIMEILLE RTC_INTEN_INTEN1
#define RTC_INT_Msk (0x1FEUL)
//INTSTS
#define RTC_INTSTS_CEILLE RTC_INTSTS_INTSTS8
#define RTC_INTSTS_ACDONE RTC_INTSTS_INTSTS7
#define RTC_INTSTS_WKUCNT RTC_INTSTS_INTSTS6
#define RTC_INTSTS_MIDNIGHT RTC_INTSTS_INTSTS5
#define RTC_INTSTS_WKUHOUR RTC_INTSTS_INTSTS4
#define RTC_INTSTS_WKUMIN RTC_INTSTS_INTSTS3
#define RTC_INTSTS_WKUSEC RTC_INTSTS_INTSTS2
#define RTC_INTSTS_TIMEILLE RTC_INTSTS_INTSTS1
#define RTC_INTSTS_Msk (0x1FEUL)
/* RTC AutoCal struct */
typedef struct
{
uint32_t Period;
uint32_t ATDelay;
uint32_t ATClockSource;
uint32_t ADCSource;
} RTC_AutCalType;
//ATDelay
#define RTC_ATDELAY_15MS RTC_ACCTRL_ACDEL_0
#define RTC_ATDELAY_31MS RTC_ACCTRL_ACDEL_1
#define RTC_ATDELAY_62MS RTC_ACCTRL_ACDEL_2
#define RTC_ATDELAY_125MS RTC_ACCTRL_ACDEL_3
//ATClockSource
#define RTC_ATCS_DISABLE RTC_ACCTRL_ACCLK_0
#define RTC_ATCS_SEC RTC_ACCTRL_ACCLK_1
#define RTC_ATCS_MIN RTC_ACCTRL_ACCLK_2
#define RTC_ATCS_HOUR RTC_ACCTRL_ACCLK_3
//ADCSource
#define RTC_ADCS_DATA (0)
#define RTC_ADCS_PORT RTC_ACCTRL_ADCSEL
//CNTCLK
#define RTC_WKUCNT_RTCCLK RTC_WKUCNT_CNTSEL_0
#define RTC_WKUCNT_2048 RTC_WKUCNT_CNTSEL_1
#define RTC_WKUCNT_512 RTC_WKUCNT_CNTSEL_2
#define RTC_WKUCNT_128 RTC_WKUCNT_CNTSEL_3
//Prescaler
#define RTC_CLKDIV_1 RTC_PSCA_PSCA_0
#define RTC_CLKDIV_4 RTC_PSCA_PSCA_1
/* Private macros ------------------------------------------------------------*/
#define IS_RTC_REGOP_STARTADDR(__STARTADDR__) (((__STARTADDR__) & 0x3U) == 0U)
/* Year 0 ~ 99 */
#define IS_RTC_TIME_YEAR(__YEAR__) ((__YEAR__) < 0x9AU)
/* Month 1 ~ 12 */
#define IS_RTC_TIME_MONTH(__MONTH__) (((__MONTH__) > 0x0U) && ((__MONTH__) < 0x13U))
/* Date 1 ~ 31 */
#define IS_RTC_TIME_DATE(__DATE__) (((__DATE__) > 0x0U) && ((__DATE__) < 0x32))
/* Weekday 0 ~ 6 */
#define IS_RTC_TIME_WEEKDAY(__WEEKDAY__) ((__WEEKDAY__) < 0x7U)
/* Hours 0 ~ 23 */
#define IS_RTC_TIME_HOURS(__HOURS__) ((__HOURS__) < 0x24)
/* Minutes 0 ~ 59 */
#define IS_RTC_TIME_MINS(__MINS__) ((__MINS__) < 0x5A)
/* Seconds 0 ~ 59 */
#define IS_RTC_TIME_SECS(__SECS__) ((__SECS__) < 0x5A)
#define IS_RTC_INT(__INT__) ((((__INT__) & RTC_INT_Msk) != 0U) &&\
(((__INT__) & ~RTC_INT_Msk) == 0U))
#define IS_RTC_INTFLAGR(__INTFLAGR_) (((__INTFLAGR_) == RTC_INTSTS_CEILLE) ||\
((__INTFLAGR_) == RTC_INTSTS_ACDONE) ||\
((__INTFLAGR_) == RTC_INTSTS_WKUCNT) ||\
((__INTFLAGR_) == RTC_INTSTS_MIDNIGHT) ||\
((__INTFLAGR_) == RTC_INTSTS_WKUHOUR) ||\
((__INTFLAGR_) == RTC_INTSTS_WKUMIN) ||\
((__INTFLAGR_) == RTC_INTSTS_WKUSEC) ||\
((__INTFLAGR_) == RTC_INTSTS_TIMEILLE))
#define IS_RTC_INTFLAGC(__INTFLAGC__) ((((__INTFLAGC__) & RTC_INTSTS_Msk) != 0U) &&\
(((__INTFLAGC__) & ~RTC_INTSTS_Msk) == 0U))
#define IS_RTC_AUTOCAL_RELOAD(__RELOAD__) (((__RELOAD__) == RTC_AUTORELOAD_DISABLE) ||\
((__RELOAD__) == RTC_AUTORELOAD_ENABLE))
#define IS_RTC_AUTOCAL_ATDLY(__ATDLY__) (((__ATDLY__) == RTC_ATDELAY_15MS) ||\
((__ATDLY__) == RTC_ATDELAY_31MS) ||\
((__ATDLY__) == RTC_ATDELAY_62MS) ||\
((__ATDLY__) == RTC_ATDELAY_125MS))
#define IS_RTC_AUTOCAL_ATCS(__ATCS__) (((__ATCS__) == RTC_ATCS_DISABLE) ||\
((__ATCS__) == RTC_ATCS_SEC) ||\
((__ATCS__) == RTC_ATCS_MIN) ||\
((__ATCS__) == RTC_ATCS_HOUR))
#define IS_RTC_AUTOCAL_ADCSRC(__ADCSRC__) (((__ADCSRC__) == RTC_ADCS_DATA) ||\
((__ADCSRC__) == RTC_ADCS_PORT))
#define IS_RTC_AUTOCAL_PERIOD(__PERIOD__) ((__PERIOD__) < 64U)
#define IS_RTC_WKUSEC_PERIOD(__PERIOD__) (((__PERIOD__) < 0x41U) && ((__PERIOD__) > 0U))
#define IS_RTC_WKUMIN_PERIOD(__PERIOD__) (((__PERIOD__) < 0x41U) && ((__PERIOD__) > 0U))
#define IS_RTC_WKUHOUR_PERIOD(__PERIOD__) (((__PERIOD__) < 0x21U) && ((__PERIOD__) > 0U))
#define IS_RTC_WKUCNT_PERIOD(__PERIOD__) (((__PERIOD__) < 0x1000001U) && ((__PERIOD__) > 0U))
#define IS_RTC_WKUCNT_CNTSEL(__CNTSEL__) (((__CNTSEL__) == RTC_WKUCNT_RTCCLK) ||\
((__CNTSEL__) == RTC_WKUCNT_2048) ||\
((__CNTSEL__) == RTC_WKUCNT_512) ||\
((__CNTSEL__) == RTC_WKUCNT_128))
#define IS_RTC_CLKDIV(__CLKDIV__) (((__CLKDIV__) == RTC_CLKDIV_1) ||\
((__CLKDIV__) == RTC_CLKDIV_4))
/* Exported Functions ------------------------------------------------------- */
/* RTC Exported Functions Group1:
Time functions -----------------------------*/
void RTC_SetTime(RTC_TimeTypeDef *sTime);
void RTC_GetTime(RTC_TimeTypeDef *gTime);
/* RTC Exported Functions Group2:
Registers operation functions --------------*/
void RTC_WriteProtection(uint32_t NewState);
void RTC_WaitForSynchro(void);
void RTC_WriteRegisters(uint32_t StartAddr, const uint32_t *wBuffer, uint8_t Len);
void RTC_ReadRegisters(uint32_t StartAddr, uint32_t *rBuffer, uint8_t Len);
/* RTC Exported Functions Group3:
Interrupt functions ------------------------*/
void RTC_INTConfig(uint32_t INTMask, uint32_t NewState);
uint8_t RTC_GetINTStatus(uint32_t FlagMask);
void RTC_ClearINTStatus(uint32_t FlagMask);
/* RTC Exported Functions Group4:
AutoCal functions --------------------------*/
void RTC_AutoCalStructInit(RTC_AutCalType *RTCAC_InitStruct);
void RTC_AutoCalInit(RTC_AutCalType *InitStruct);
void RTC_TrigSourceConfig(uint32_t TrigSource, uint32_t Period);
uint32_t RTC_AutoCalCmd(uint32_t NewState);
void RTC_StartAutoCalManual(void);
void RTC_WaitForAutoCalManual(void);
uint8_t RTC_GetACBusyFlag(void);
/* RTC Exported Functions Group5:
Wake-up functions --------------------------*/
void RTC_WKUSecondsConfig(uint8_t nPeriod);
void RTC_WKUMinutesConfig(uint8_t nPeriod);
void RTC_WKUHoursConfig(uint8_t nPeriod);
void RTC_WKUCounterConfig(uint32_t nClock,uint32_t CNTCLK);
uint32_t RTC_GetWKUCounterValue(void);
/* RTC Exported Functions Group6:
MISC functions -----------------------------*/
void RTC_PrescalerConfig(uint32_t Prescaler);
void RTC_PLLDIVConfig(uint32_t nfrequency);
void RTC_PLLDIVOutputCmd(uint8_t NewState);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_RTC_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,180 @@
/**
******************************************************************************
* @file lib_spi.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief SPI library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_SPI_H
#define __LIB_SPI_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t Mode;
uint32_t SPH;
uint32_t SPO;
uint32_t ClockDivision;
uint32_t CSNSoft;
uint32_t SWAP;
} SPI_InitType;
//Mode
#define SPI_MODE_MASTER 0
#define SPI_MODE_SLAVE SPI_CTRL_MOD
//SPH
#define SPI_SPH_0 0
#define SPI_SPH_1 SPI_CTRL_SCKPHA
//SPO
#define SPI_SPO_0 0
#define SPI_SPO_1 SPI_CTRL_SCKPOL
//ClockDivision
#define SPI_CLKDIV_2 (0)
#define SPI_CLKDIV_4 (SPI_CTRL_SCKSEL_0)
#define SPI_CLKDIV_8 (SPI_CTRL_SCKSEL_1)
#define SPI_CLKDIV_16 (SPI_CTRL_SCKSEL_0 | SPI_CTRL_SCKSEL_1)
#define SPI_CLKDIV_32 (SPI_CTRL_SCKSEL_2)
#define SPI_CLKDIV_64 (SPI_CTRL_SCKSEL_0 | SPI_CTRL_SCKSEL_2)
#define SPI_CLKDIV_128 (SPI_CTRL_SCKSEL_1 | SPI_CTRL_SCKSEL_2)
//CSNSoft
#define SPI_CSNSOFT_ENABLE SPI_CTRL_CSGPIO
#define SPI_CSNSOFT_DISABLE 0
//SWAP
#define SPI_SWAP_ENABLE SPI_CTRL_SWAP
#define SPI_SWAP_DISABLE 0
//INT
#define SPI_INT_TX (0x80000000|SPI_TXSTS_TXIEN)
#define SPI_INT_RX (0x40000000|SPI_RXSTS_RXIEN)
//status
#define SPI_STS_TXIF (0x80000000|SPI_TXSTS_TXIF)
#define SPI_STS_TXEMPTY (0x80000000|SPI_TXSTS_TXEMPTY)
#define SPI_STS_TXFUR (0x80000000|SPI_TXSTS_TXFUR)
#define SPI_STS_RXIF (0x40000000|SPI_RXSTS_RXIF)
#define SPI_STS_RXFULL (0x40000000|SPI_RXSTS_RXFULL)
#define SPI_STS_RXFOV (0x40000000|SPI_RXSTS_RXFOV)
#define SPI_STS_BSY (0x20000000|SPI_MISC_BSY)
#define SPI_STS_RFF (0x20000000|SPI_MISC_RFF)
#define SPI_STS_RNE (0x20000000|SPI_MISC_RNE)
#define SPI_STS_TNF (0x20000000|SPI_MISC_TNF)
#define SPI_STS_TFE (0x20000000|SPI_MISC_TFE)
//TXFLEV
#define SPI_TXFLEV_0 (0)
#define SPI_TXFLEV_1 (SPI_TXSTS_TXFLEV_0)
#define SPI_TXFLEV_2 (SPI_TXSTS_TXFLEV_1)
#define SPI_TXFLEV_3 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_1)
#define SPI_TXFLEV_4 (SPI_TXSTS_TXFLEV_2)
#define SPI_TXFLEV_5 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_2)
#define SPI_TXFLEV_6 (SPI_TXSTS_TXFLEV_1 | SPI_TXSTS_TXFLEV_2)
#define SPI_TXFLEV_7 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_1 | SPI_TXSTS_TXFLEV_2)
//RXFLEV
#define SPI_RXFLEV_0 (0)
#define SPI_RXFLEV_1 (SPI_RXSTS_RXFLEV_0)
#define SPI_RXFLEV_2 (SPI_RXSTS_RXFLEV_1)
#define SPI_RXFLEV_3 (SPI_RXSTS_RXFLEV_0 | SPI_RXSTS_RXFLEV_1)
#define SPI_RXFLEV_4 (SPI_RXSTS_RXFLEV_2)
#define SPI_RXFLEV_5 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_0)
#define SPI_RXFLEV_6 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_1)
#define SPI_RXFLEV_7 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_1 | SPI_RXSTS_RXFLEV_0)
/* Private macros ------------------------------------------------------------*/
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_MASTER) || ((__MODE__) == SPI_MODE_SLAVE))
#define IS_SPI_SPH(__SPH__) (((__SPH__) == SPI_SPH_0) || ((__SPH__) == SPI_SPH_1))
#define IS_SPI_SPO(__SPO__) (((__SPO__) == SPI_SPO_0) || ((__SPO__) == SPI_SPO_1))
#define IS_SPI_CLKDIV(__CLKDIV__) (((__CLKDIV__) == SPI_CLKDIV_2) ||\
((__CLKDIV__) == SPI_CLKDIV_4) ||\
((__CLKDIV__) == SPI_CLKDIV_8) ||\
((__CLKDIV__) == SPI_CLKDIV_16) ||\
((__CLKDIV__) == SPI_CLKDIV_32) ||\
((__CLKDIV__) == SPI_CLKDIV_64) ||\
((__CLKDIV__) == SPI_CLKDIV_128))
#define IS_SPI_CSN(__CSN__) (((__CSN__) == SPI_CSNSOFT_ENABLE) || ((__CSN__) == SPI_CSNSOFT_DISABLE))
#define IS_SPI_SWAP(__SWAP__) (((__SWAP__) == SPI_SWAP_ENABLE) || ((__SWAP__) == SPI_SWAP_DISABLE))
#define IS_SPI_INT(__INT__) ((((__INT__) & (SPI_INT_TX | SPI_INT_RX)) != 0U) &&\
(((__INT__) & ~(SPI_INT_TX | SPI_INT_RX)) == 0U))
#define IS_SPI_STSR(__STSR__) (((__STSR__) == SPI_STS_TXIF) ||\
((__STSR__) == SPI_STS_TXEMPTY) ||\
((__STSR__) == SPI_STS_TXFUR) ||\
((__STSR__) == SPI_STS_RXFULL) ||\
((__STSR__) == SPI_STS_RXFOV) ||\
((__STSR__) == SPI_STS_BSY) ||\
((__STSR__) == SPI_STS_RFF) ||\
((__STSR__) == SPI_STS_RNE) ||\
((__STSR__) == SPI_STS_TNF) ||\
((__STSR__) == SPI_STS_TFE) ||\
((__STSR__) == SPI_STS_RXIF))
#define IS_SPI_STSC(__STSC__) ((((__STSC__) & (SPI_STS_TXIF | SPI_STS_RXIF)) != 0U) &&\
(((__STSC__) & ~(SPI_STS_TXIF | SPI_STS_RXIF)) == 0U))
#define IS_SPI_TXFLEV(__TXFLEV__) (((__TXFLEV__) == SPI_TXFLEV_0) ||\
((__TXFLEV__) == SPI_TXFLEV_1) ||\
((__TXFLEV__) == SPI_TXFLEV_2) ||\
((__TXFLEV__) == SPI_TXFLEV_3) ||\
((__TXFLEV__) == SPI_TXFLEV_4) ||\
((__TXFLEV__) == SPI_TXFLEV_5) ||\
((__TXFLEV__) == SPI_TXFLEV_6) ||\
((__TXFLEV__) == SPI_TXFLEV_7))
#define IS_SPI_RXFLEV(__RXFLEV__) (((__RXFLEV__) == SPI_RXFLEV_0) ||\
((__RXFLEV__) == SPI_RXFLEV_1) ||\
((__RXFLEV__) == SPI_RXFLEV_2) ||\
((__RXFLEV__) == SPI_RXFLEV_3) ||\
((__RXFLEV__) == SPI_RXFLEV_4) ||\
((__RXFLEV__) == SPI_RXFLEV_5) ||\
((__RXFLEV__) == SPI_RXFLEV_6) ||\
((__RXFLEV__) == SPI_RXFLEV_7))
/* Exported Functions ------------------------------------------------------- */
/* SPI Exported Functions Group1:
(De)Initialization -------------------------*/
void SPI_DeviceInit(SPI_TypeDef *SPIx);
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitType *InitStruct);
void SPI_StructInit(SPI_InitType *InitStruct);
/* SPI Exported Functions Group2:
Interrupt (flag) ---------------------------*/
void SPI_INTConfig(SPI_TypeDef *SPIx, uint32_t INTMask, uint32_t NewState);
uint8_t SPI_GetStatus(SPI_TypeDef *SPIx, uint32_t Status);
void SPI_ClearStatus(SPI_TypeDef *SPIx, uint32_t Status);
/* SPI Exported Functions Group3:
Transfer datas -----------------------------*/
void SPI_SendData(SPI_TypeDef *SPIx, uint8_t ch);
uint8_t SPI_ReceiveData(SPI_TypeDef *SPIx);
/* SPI Exported Functions Group4:
MISC Configuration -------------------------*/
void SPI_Cmd(SPI_TypeDef *SPIx, uint32_t NewState);
void SPI_TransmitFIFOLevelConfig(SPI_TypeDef *SPIx, uint32_t FIFOLevel);
void SPI_ReceiveFIFOLevelConfig(SPI_TypeDef *SPIx, uint32_t FIFOLevel);
uint8_t SPI_GetTransmitFIFOLevel(SPI_TypeDef *SPIx);
uint8_t SPI_GetReceiveFIFOLevel(SPI_TypeDef *SPIx);
void SPI_SmartModeCmd(SPI_TypeDef *SPIx, uint32_t NewState);
void SPI_OverWriteModeCmd(SPI_TypeDef *SPIx, uint32_t NewState);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_SPI_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,63 @@
/**
******************************************************************************
* @file lib_tmr.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Timer library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_TMR_H
#define __LIB_TMR_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t Period;
uint32_t ClockSource;
uint32_t EXTGT;
} TMR_InitType;
//ClockSource
#define TMR_CLKSRC_INTERNAL 0
#define TMR_CLKSRC_EXTERNAL TMR_CTRL_EXTCLK
//ClockGate
#define TMR_EXTGT_DISABLE 0
#define TMR_EXTGT_ENABLE TMR_CTRL_EXTEN
/* Private macros ------------------------------------------------------------*/
#define IS_TMR_CLKSRC(__CLKSRC__) (((__CLKSRC__) == TMR_CLKSRC_INTERNAL) || ((__CLKSRC__) == TMR_CLKSRC_EXTERNAL))
#define IS_TMR_EXTGT(__EXTGT__) (((__EXTGT__) == TMR_EXTGT_DISABLE) || ((__EXTGT__) == TMR_EXTGT_ENABLE))
/* Exported Functions ------------------------------------------------------- */
/* Timer Exported Functions Group1:
(De)Initialization ----------------------*/
void TMR_DeInit(TMR_TypeDef *TMRx);
void TMR_Init(TMR_TypeDef *TMRx, TMR_InitType *InitStruct);
void TMR_StructInit(TMR_InitType *InitStruct);
/* Timer Exported Functions Group2:
Interrupt (flag) -------------------------*/
void TMR_INTConfig(TMR_TypeDef *TMRx, uint32_t NewState);
uint8_t TMR_GetINTStatus(TMR_TypeDef *TMRx);
void TMR_ClearINTStatus(TMR_TypeDef *TMRx);
/* Timer Exported Functions Group3:
MISC Configuration -----------------------*/
void TMR_Cmd(TMR_TypeDef *TMRx, uint32_t NewState);
uint32_t TMR_GetCurrentValue(TMR_TypeDef *TMRx);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_TMR_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,142 @@
/**
******************************************************************************
* @file lib_u32k.h
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief UART 32K library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_U32K_H
#define __LIB_U32K_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
typedef struct
{
uint32_t Debsel;
uint32_t Parity;
uint32_t WordLen;
uint32_t FirstBit;
uint32_t AutoCal;
uint32_t Baudrate;
uint32_t LineSel;
} U32K_InitType;
//Debsel
#define U32K_DEBSEL_0 U32K_CTRL0_DEBSEL_0
#define U32K_DEBSEL_1 U32K_CTRL0_DEBSEL_1
#define U32K_DEBSEL_2 U32K_CTRL0_DEBSEL_2
#define U32K_DEBSEL_3 U32K_CTRL0_DEBSEL_3
//Parity
#define U32K_PARITY_EVEN U32K_CTRL0_PMODE_EVEN
#define U32K_PARITY_ODD U32K_CTRL0_PMODE_ODD
#define U32K_PARITY_0 U32K_CTRL0_PMODE_0
#define U32K_PARITY_1 U32K_CTRL0_PMODE_1
#define U32K_PARITY_NONE 0
//WordLen
#define U32K_WORDLEN_8B 0
#define U32K_WORDLEN_9B U32K_CTRL0_MODE
//FirstBit
#define U32K_FIRSTBIT_LSB 0
#define U32K_FIRSTBIT_MSB U32K_CTRL0_MSB
//AutoCal
#define U32K_AUTOCAL_ON 0
#define U32K_AUTOCAL_OFF U32K_CTRL0_ACOFF
//Line
#define U32K_LINE_RX0 U32K_CTRL1_RXSEL_RX0
#define U32K_LINE_RX1 U32K_CTRL1_RXSEL_RX1
#define U32K_LINE_RX2 U32K_CTRL1_RXSEL_RX2
#define U32K_LINE_RX3 U32K_CTRL1_RXSEL_RX3
//INT
#define U32K_INT_RXOV U32K_CTRL1_RXOVIE
#define U32K_INT_RXPE U32K_CTRL1_RXPEIE
#define U32K_INT_RX U32K_CTRL1_RXIE
#define U32K_INT_Msk (U32K_INT_RXOV \
|U32K_INT_RXPE \
|U32K_INT_RX)
//INT Status
#define U32K_INTSTS_RXOV U32K_STS_RXOV
#define U32K_INTSTS_RXPE U32K_STS_RXPE
#define U32K_INTSTS_RX U32K_STS_RXIF
#define U32K_INTSTS_Msk (U32K_INTSTS_RXOV \
|U32K_INTSTS_RXPE \
|U32K_INTSTS_RX)
//WKUMode
#define U32K_WKUMOD_RX 0 // Wake-up when receive data
#define U32K_WKUMOD_PC U32K_CTRL0_WKUMODE // Wake-up when receive data and parity/stop bit correct
/* Private macros ------------------------------------------------------------*/
#define IS_U32K_DEBSEL(__DEBSEL__) (((__DEBSEL__) == U32K_DEBSEL_0) ||\
((__DEBSEL__) == U32K_DEBSEL_1) ||\
((__DEBSEL__) == U32K_DEBSEL_2) ||\
((__DEBSEL__) == U32K_DEBSEL_3))
#define IS_U32K_PARITY(__PARITY__) (((__PARITY__) == U32K_PARITY_EVEN) ||\
((__PARITY__) == U32K_PARITY_ODD) ||\
((__PARITY__) == U32K_PARITY_0) ||\
((__PARITY__) == U32K_PARITY_1) ||\
((__PARITY__) == U32K_PARITY_NONE))
#define IS_U32K_WORDLEN(__WORDLEN__) (((__WORDLEN__) == U32K_WORDLEN_8B) || ((__WORDLEN__) == U32K_WORDLEN_9B))
#define IS_U32K_FIRSTBIT(__FIRSTBIT__) (((__FIRSTBIT__) == U32K_FIRSTBIT_LSB) || ((__FIRSTBIT__) == U32K_FIRSTBIT_MSB))
#define IS_U32K_AUTOCAL(__AUTOCAL__) (((__AUTOCAL__) == U32K_AUTOCAL_ON) || ((__AUTOCAL__) == U32K_AUTOCAL_OFF))
#define IS_U32K_LINE(__LINE__) (((__LINE__) == U32K_LINE_RX0) ||\
((__LINE__) == U32K_LINE_RX1) ||\
((__LINE__) == U32K_LINE_RX2) ||\
((__LINE__) == U32K_LINE_RX3))
#define IS_U32K_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9601UL)
#define IS_U32K_INT(__INT__) ((((__INT__) & U32K_INT_Msk) != 0U) &&\
(((__INT__) & ~U32K_INT_Msk) == 0U))
#define IS_U32K_INTFLAGR(__INTFLAGR__) (((__INTFLAGR__) == U32K_INTSTS_RXOV) ||\
((__INTFLAGR__) == U32K_INTSTS_RXPE) ||\
((__INTFLAGR__) == U32K_INTSTS_RX))
#define IS_U32K_INTFLAGC(__INTFLAGC__) ((((__INTFLAGC__) & U32K_INTSTS_Msk) != 0U) &&\
(((__INTFLAGC__) & ~U32K_INTSTS_Msk) == 0U))
#define IS_U32K_WKUMODE(__WKUMODE__) (((__WKUMODE__) == U32K_WKUMOD_RX) || ((__WKUMODE__) == U32K_WKUMOD_PC))
/* Exported Functions ------------------------------------------------------- */
/* U32K Exported Functions Group1:
(De)Initialization -----------------------*/
void U32K_DeInit(U32K_TypeDef *U32Kx);
void U32K_Init(U32K_TypeDef *U32Kx, U32K_InitType *InitStruct);
void U32K_StructInit(U32K_InitType *InitStruct);
/* U32K Exported Functions Group2:
Interrupt (flag) configure ---------------*/
void U32K_INTConfig(U32K_TypeDef *U32Kx, uint32_t INTMask, uint8_t NewState);
uint8_t U32K_GetINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask);
void U32K_ClearINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask);
/* U32K Exported Functions Group3:
Receive datas -----------------------------*/
uint8_t U32K_ReceiveData(U32K_TypeDef *U32Kx);
/* U32K Exported Functions Group4:
MISC Configuration -------- ---------------*/
void U32K_BaudrateConfig(U32K_TypeDef *U32Kx, uint32_t BaudRate);
void U32K_Cmd(U32K_TypeDef *U32Kx, uint32_t NewState);
void U32K_LineConfig(U32K_TypeDef *U32Kx, uint32_t Line);
void U32K_WKUModeConfig(U32K_TypeDef *U32Kx, uint32_t WKUMode);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_U32K_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,167 @@
/**
******************************************************************************
* @file lib_uart.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief UART library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_UART_H
#define __LIB_UART_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
//UART Init struct
typedef struct
{
uint32_t Mode;
uint32_t Parity;
uint32_t WordLen;
uint32_t FirstBit;
uint32_t Baudrate;
} UART_InitType;
//Mode
#define UART_MODE_RX UART_CTRL_RXEN
#define UART_MODE_TX UART_CTRL_TXEN
#define UART_MODE_OFF 0
#define UART_MODE_Msk (UART_CTRL_RXEN | UART_CTRL_TXEN)
//Parity
#define UART_PARITY_EVEN UART_CTRL2_PMODE_EVEN
#define UART_PARITY_ODD UART_CTRL2_PMODE_ODD
#define UART_PARITY_0 UART_CTRL2_PMODE_0
#define UART_PARITY_1 UART_CTRL2_PMODE_1
#define UART_PARITY_NONE 0
//WordLen
#define UART_WORDLEN_8B 0
#define UART_WORDLEN_9B UART_CTRL2_MODE
//FirstBit
#define UART_FIRSTBIT_LSB 0
#define UART_FIRSTBIT_MSB UART_CTRL2_MSB
//UART Configration Information struct
typedef struct
{
uint32_t Mode_Transmit :1; //1: TX Enable; 0: TX Disable
uint32_t Mode_Receive :1; //1: RX Enable; 0: RX Disable
uint32_t Baudrate; //The value of current budrate
uint8_t Parity; //0: parity bit=0; 1: parity bit=1; 2: Even parity; 3:Odd parity
uint8_t WordLen; //8: data bits=8; 9: data bits=9
uint8_t FirstBit; //0: LSB transmit first; 1: MSB transmit first
} UART_ConfigINFOType;
//status
#define UART_FLAG_RXPARITY UART_STATE_RXPSTS
#define UART_FLAG_TXDONE UART_STATE_TXDONE
#define UART_FLAG_RXPE UART_STATE_RXPE
#define UART_FLAG_RXOV UART_STATE_RXOV
#define UART_FLAG_TXOV UART_STATE_TXOV
#define UART_FLAG_RXFULL UART_STATE_RXFULL
#define UART_FLAG_RCMsk (UART_FLAG_TXDONE \
|UART_FLAG_RXPE \
|UART_FLAG_RXOV \
|UART_STATE_RXFULL\
|UART_FLAG_TXOV)
//interrupt
#define UART_INT_TXDONE UART_CTRL_TXDONEIE
#define UART_INT_RXPE UART_CTRL_RXPEIE
#define UART_INT_RXOV UART_CTRL_RXOVIE
#define UART_INT_TXOV UART_CTRL_TXOVIE
#define UART_INT_RX UART_CTRL_RXIE
#define UART_INT_Msk (UART_INT_TXDONE \
|UART_INT_RXPE \
|UART_INT_RXOV \
|UART_INT_TXOV \
|UART_INT_RX)
//INTStatus
#define UART_INTSTS_TXDONE UART_INTSTS_TXDONEIF
#define UART_INTSTS_RXPE UART_INTSTS_RXPEIF
#define UART_INTSTS_RXOV UART_INTSTS_RXOVIF
#define UART_INTSTS_TXOV UART_INTSTS_TXOVIF
#define UART_INTSTS_RX UART_INTSTS_RXIF
#define UART_INTSTS_Msk (UART_INTSTS_TXDONE \
|UART_INTSTS_RXPE \
|UART_INTSTS_RXOV \
|UART_INTSTS_TXOV \
|UART_INTSTS_RX)
/* Private macros ------------------------------------------------------------*/
#define IS_UART_MODE(__MODE__) (((((__MODE__) & UART_MODE_Msk) != 0U) && (((__MODE__) & ~UART_MODE_Msk) == 0U)) ||\
((__MODE__) == UART_MODE_OFF))
#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_EVEN) ||\
((__PARITY__) == UART_PARITY_ODD) ||\
((__PARITY__) == UART_PARITY_0) ||\
((__PARITY__) == UART_PARITY_1) ||\
((__PARITY__) == UART_PARITY_NONE))
#define IS_UART_WORDLEN(__WORDLEN__) (((__WORDLEN__) == UART_WORDLEN_8B) ||\
((__WORDLEN__) == UART_WORDLEN_9B))
#define IS_UART_FIRSTBIT(__FIRSTBIT__) (((__FIRSTBIT__) == UART_FIRSTBIT_LSB) ||\
((__FIRSTBIT__) == UART_FIRSTBIT_MSB))
#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 0x100000UL)
#define IS_UART_FLAGR(__FLAGR__) (((__FLAGR__) == UART_FLAG_RXPARITY) ||\
((__FLAGR__) == UART_FLAG_TXDONE) ||\
((__FLAGR__) == UART_FLAG_RXPE) ||\
((__FLAGR__) == UART_FLAG_RXOV) ||\
((__FLAGR__) == UART_FLAG_TXOV) ||\
((__FLAGR__) == UART_FLAG_RXFULL))
#define IS_UART_FLAGC(__FLAGC__) ((((__FLAGC__) & UART_FLAG_RCMsk) != 0U) &&\
(((__FLAGC__) & ~UART_FLAG_RCMsk) == 0U))
#define IS_UART_INT(__INT__) ((((__INT__) & UART_INT_Msk) != 0U) &&\
(((__INT__) & ~UART_INT_Msk) == 0U))
#define IS_UART_INTFLAGR(__INTFLAGR__) (((__INTFLAGR__) == UART_INTSTS_TXDONE) ||\
((__INTFLAGR__) == UART_INTSTS_RXPE) ||\
((__INTFLAGR__) == UART_INTSTS_RXOV) ||\
((__INTFLAGR__) == UART_INTSTS_TXOV) ||\
((__INTFLAGR__) == UART_INTSTS_RX))
#define IS_UART_INTFLAGC(__INTFLAGC__) ((((__INTFLAGC__) & UART_INTSTS_Msk) != 0U) &&\
(((__INTFLAGC__) & ~UART_INTSTS_Msk) == 0U))
/* Exported Functions ------------------------------------------------------- */
/* UART Exported Functions Group1:
Initialization and functions --------------*/
void UART_DeInit(UART_TypeDef *UARTx);
void UART_Init(UART_TypeDef *UARTx, UART_InitType *InitStruct);
void UART_StructInit(UART_InitType *InitStruct);
/* UART Exported Functions Group2:
(Interrupt) Flag --------------------------*/
uint8_t UART_GetFlag(UART_TypeDef *UARTx, uint32_t FlagMask);
void UART_ClearFlag(UART_TypeDef *UARTx, uint32_t FlagMask);
void UART_INTConfig(UART_TypeDef *UARTx, uint32_t INTMask, uint8_t NewState);
uint8_t UART_GetINTStatus(UART_TypeDef *UARTx, uint32_t INTMask);
void UART_ClearINTStatus(UART_TypeDef *UARTx, uint32_t INTMask);
/* UART Exported Functions Group3:
Transfer datas ----------------------------*/
void UART_SendData(UART_TypeDef *UARTx, uint8_t ch);
uint8_t UART_ReceiveData(UART_TypeDef *UARTx);
/* UART Exported Functions Group4:
MISC Configuration ------------------------*/
void UART_BaudrateConfig(UART_TypeDef *UARTx, uint32_t BaudRate);
void UART_Cmd(UART_TypeDef *UARTx, uint32_t Mode, uint32_t NewState);
void UART_GetConfigINFO(UART_TypeDef *UARTx, UART_ConfigINFOType *ConfigInfo);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_UART_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,36 @@
/**
*******************************************************************************
* @file lib_version.h
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief Version library.
*******************************************************************************/
#ifndef __LIB_VERSION_H
#define __LIB_VERSION_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
#define DRIVER_VERSION(major,minor) (((major) << 8) | (minor))
/* Exported Functions ------------------------------------------------------- */
/**
* @brief Read receive data register.
* @param None
* @retval Version value
*/
uint16_t Target_GetDriveVersion(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_VERSION_H */
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,46 @@
/**
******************************************************************************
* @file lib_wdt.h
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief WDT library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#ifndef __LIB_WDT_H
#define __LIB_WDT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "target.h"
#define WDT_2_SECS PMU_WDTEN_WDTSEL_0
#define WDT_1_SECS PMU_WDTEN_WDTSEL_1
#define WDT_0_5_SECS PMU_WDTEN_WDTSEL_2
#define WDT_0_25_SECS PMU_WDTEN_WDTSEL_3
/* Private macros ------------------------------------------------------------*/
#define IS_WDT_PERIOD(__PERIOD__) (((__PERIOD__) == WDT_2_SECS) ||\
((__PERIOD__) == WDT_1_SECS) ||\
((__PERIOD__) == WDT_0_5_SECS) ||\
((__PERIOD__) == WDT_0_25_SECS))
/* Exported Functions ------------------------------------------------------- */
void WDT_Enable(void);
void WDT_Disable(void);
void WDT_Clear(void);
void WDT_SetPeriod(uint32_t period);
uint16_t WDT_GetCounterValue(void);
#ifdef __cplusplus
}
#endif
#endif /* __LIB_WDT_H */
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,175 @@
/**
******************************************************************************
* @file lib_adc_tiny.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief ADC_TINY library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#include "lib_adc_tiny.h"
#define ANA_REGF_RSTValue (0U)
/**
* @brief Initializes the Tiny ADC peripheral registers to their default reset values.
* @param None
* @retval None
*/
void TADC_DeInit(void)
{
ANA->REGF = ANA_REGF_RSTValue;
ANA->INTSTS = ANA_INTSTS_INTSTS13;
ANA->MISC_A &= ~ANA_MISC_TADCTH;
}
/**
* @brief Fills each TADC_InitStruct member with its default value.
* @param TADC_InitStruct: pointer to an TADCInitType structure which will be initialized.
* @retval None
*/
void TADC_StructInit(TADCInitType* TADC_InitStruct)
{
/*--------------- Reset TADC init structure parameters values ---------------*/
/* Initialize the SignalSel member */
TADC_InitStruct->SignalSel = ADCTINY_SIGNALSEL_IOE6;
/* Initialize the ADTREF1 member */
TADC_InitStruct->ADTREF1 = ADCTINY_REF1_0_9;
/* Initialize the ADTREF2 member */
TADC_InitStruct->ADTREF2 = ADCTINY_REF2_1_8;
/* Initialize the ADTREF3 member */
TADC_InitStruct->ADTREF3 = ADCTINY_REF3_2_7;
}
/**
* @brief Tiny ADC initialization.
* @param TADC_InitStruct
SelADT:
ADCTINY_SIGNALSEL_IOE6
ADCTINY_SIGNALSEL_IOE7
ADTREF1:
ADCTINY_REF1_0_9
ADCTINY_REF1_0_7
ADTREF2:
ADCTINY_REF2_1_8
ADCTINY_REF2_1_6
ADTREF3:
ADCTINY_REF3_2_7
ADCTINY_REF3_2_5
* @retval None
*/
void TADC_Init(TADCInitType* TADC_InitStruct)
{
uint32_t tmp;
/* Check parameters */
assert_parameters(IS_ADCTINY_SELADT(TADC_InitStruct->SignalSel));
assert_parameters(IS_ADCTINY_ADTREF1(TADC_InitStruct->ADTREF1));
assert_parameters(IS_ADCTINY_ADTREF2(TADC_InitStruct->ADTREF2));
assert_parameters(IS_ADCTINY_ADTREF3(TADC_InitStruct->ADTREF3));
tmp = ANA->REGF;
tmp &= ~(ANA_REGF_SELADT \
|ANA_REGF_ADTREF1SEL\
|ANA_REGF_ADTREF2SEL\
|ANA_REGF_ADTREF3SEL);
tmp |= (TADC_InitStruct->SignalSel \
|TADC_InitStruct->ADTREF1\
|TADC_InitStruct->ADTREF2\
|TADC_InitStruct->ADTREF3);
ANA->REGF = tmp;
}
/**
* @brief TADC enable control.
* @param NewState
ENABLE
DISABLE
* @retval None
*/
void TADC_Cmd(uint32_t NewState)
{
/* Check parameters */
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
if (NewState == ENABLE)
ANA->REGF |= ANA_REGF_PDNADT;
else
ANA->REGF &= ~ANA_REGF_PDNADT;
}
/**
* @brief Get TADC output.
* @param None
* @retval Output of Tiny ADC(0 ~ 3).
*/
uint8_t TADC_GetOutput(void)
{
return ((ANA->COMPOUT & ANA_COMPOUT_TADCO) >> ANA_COMPOUT_TADCO_Pos);
}
/**
* @brief Configure Tiny ADC interrupt threshold.
* @param THSel:
ADCTINY_THSEL_0
ADCTINY_THSEL_1
ADCTINY_THSEL_2
ADCTINY_THSEL_3
* @retval None.
*/
void TADC_IntTHConfig(uint32_t THSel)
{
uint32_t tmp;
/* Check parameters */
assert_parameters(IS_ADCTINY_THSEL(THSel));
tmp = ANA->MISC_A;
tmp &= ~ANA_MISC_TADCTH;
tmp |= THSel;
ANA->MISC_A = tmp;
}
/**
* @brief TADC interrupt enable control.
* @param NewState
ENABLE
DISABLE
* @retval None
*/
void TADC_INTConfig(uint32_t NewState)
{
/* Check parameters */
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
if (NewState == ENABLE)
ANA->INTEN |= ANA_INTEN_INTEN13;
else
ANA->INTEN &= ~ANA_INTEN_INTEN13;
}
/**
* @brief Get Tiny ADC interrupt status.
* @param None
* @retval Interrupt status.
*/
uint8_t TADC_GetINTStatus(void)
{
if (ANA->INTSTS & ANA_INTSTS_INTSTS13)
return 1;
else
return 0;
}
/**
* @brief Clear Tiny ADC interrupt status.
* @param None
* @retval None
*/
void TADC_ClearINTStatus(void)
{
ANA->INTSTS = ANA_INTSTS_INTSTS13;
}
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,136 @@
/**
******************************************************************************
* @file lib_ana.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Analog library.
******************************************************************************
* @attention
*
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "lib_ana.h"
/**
* @brief Get analog status.
* @param StatusMask:
ANA_STATUS_AVCCLV
ANA_STATUS_VDCINDROP
ANA_STATUS_VDDALARM
ANA_STATUS_COMP2
ANA_STATUS_COMP1
ANA_STATUS_LOCKL
ANA_STATUS_LOCKH
* @retval Analog status
*/
uint8_t ANA_GetStatus(uint32_t StatusMask)
{
/* Check parameters */
assert_parameters(IS_ANA_STATUS(StatusMask));
if (ANA->COMPOUT & StatusMask)
{
return 1;
}
else
{
return 0;
}
}
/**
* @brief Get interrupt status.
* @param IntMask:
ANA_INT_TADC_OVER
ANA_INT_REGERR
ANA_INT_SME
ANA_INT_AVCCLV
ANA_INT_VDCINDROP
ANA_INT_VDDALARM
ANA_INT_COMP2
ANA_INT_COMP1
ANA_INT_ADCA
ANA_INT_ADCM
* @retval interrupt status.
*/
uint8_t ANA_GetINTStatus(uint32_t IntMask)
{
/* Check parameters */
assert_parameters(IS_ANA_INTSTSR(IntMask));
if (ANA->INTSTS&IntMask)
{
return 1;
}
else
{
return 0;
}
}
/**
* @brief Clear interrupt status.
* @param IntMask:
ANA_INT_TADC_OVER
ANA_INT_REGERR
ANA_INT_SME
ANA_INT_AVCCLV
ANA_INT_VDCINDROP
ANA_INT_VDDALARM
ANA_INT_COMP2
ANA_INT_COMP1
ANA_INT_ADCA
ANA_INT_ADCM
* @retval None
*/
void ANA_ClearINTStatus(uint32_t IntMask)
{
/* Check parameters */
assert_parameters(IS_ANA_INTSTSC(IntMask));
ANA->INTSTS = IntMask;
}
/**
* @brief ANA interrupt configure.
* @param IntMask:
ANA_INT_REGERR
ANA_INT_SME
ANA_INT_AVCCLV
ANA_INT_VDCINDROP
ANA_INT_VDDALARM
ANA_INT_COMP2
ANA_INT_COMP1
ANA_INT_ADCA
ANA_INT_ADCM
NewState:
ENABLE
DISABLE
* @retval None
*/
void ANA_INTConfig(uint32_t IntMask, uint32_t NewState)
{
uint32_t tmp;
/* Check parameters */
assert_parameters(IS_ANA_INT(IntMask));
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
tmp = ANA->INTEN;
if (NewState == ENABLE)
{
tmp |= IntMask;
}
else
{
tmp &= ~IntMask;
}
ANA->INTEN = tmp;
}
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,178 @@
/**
******************************************************************************
* @file lib_tmr.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief Timer library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#include "lib_tmr.h"
#define TMR_CTRL_RSTValue (0UL)
#define TMR_VALUE_RSTValue (0UL)
#define TMR_RELOAD_RSTValue (0UL)
/**
* @brief Initializes the TMRx peripheral registers to their default reset values.
* @param TMRx:
TMR0 ~ TMR3
* @retval None
*/
void TMR_DeInit(TMR_TypeDef *TMRx)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
/* Disable timer */
TMRx->CTRL &= ~TMR_CTRL_EN;
/* clear interrupt status */
TMRx->INT = TMR_INT_INT;
/* write default reset values */
TMRx->CTRL = TMR_CTRL_RSTValue;
TMRx->RELOAD = TMR_RELOAD_RSTValue;
TMRx->VALUE = TMR_VALUE_RSTValue;
}
/**
* @brief TMR initialization.
* @param TMRx:
TMR0 ~ TMR3
InitStruct: Timer configuration.
ClockSource:
TMR_CLKSRC_INTERNAL
TMR_CLKSRC_EXTERNAL
EXTGT:
TMR_EXTGT_DISABLE
TMR_EXTGT_ENABLE
Period: the auto-reload value
* @retval None
*/
void TMR_Init(TMR_TypeDef *TMRx, TMR_InitType *InitStruct)
{
uint32_t tmp;
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
assert_parameters(IS_TMR_CLKSRC(InitStruct->ClockSource));
assert_parameters(IS_TMR_EXTGT(InitStruct->EXTGT));
tmp = TMRx->CTRL;
tmp &= ~(TMR_CTRL_EXTCLK|TMR_CTRL_EXTEN);
tmp |= (InitStruct->ClockSource|InitStruct->EXTGT);
TMRx->CTRL = tmp;
TMRx->VALUE = InitStruct->Period;
TMRx->RELOAD = InitStruct->Period;
}
/**
* @brief Fills each TMR_InitType member with its default value.
* @param InitStruct: pointer to an TMR_InitType structure which will be initialized.
* @retval None
*/
void TMR_StructInit(TMR_InitType *InitStruct)
{
/*--------------- Reset TMR init structure parameters values ---------------*/
/* Initialize the ClockSource member */
InitStruct->ClockSource = TMR_CLKSRC_INTERNAL;
/* Initialize the EXTGT member */
InitStruct->EXTGT = TMR_EXTGT_DISABLE;
/* Initialize the Period member */
InitStruct->Period = 0;
}
/**
* @brief Interrupt configuration.
* @param TMRx:
TMR0~TMR3
NewState:
ENABLE
DISABLE
* @retval None
*/
void TMR_INTConfig(TMR_TypeDef *TMRx, uint32_t NewState)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
if (NewState == ENABLE)
{
TMRx->CTRL |= TMR_CTRL_INTEN;
}
else
{
TMRx->CTRL &= ~TMR_CTRL_INTEN;
}
}
/**
* @brief Get timer interrupt status.
* @param TMRx:
TMR0~TMR3
* @retval Interrupt status.
*/
uint8_t TMR_GetINTStatus(TMR_TypeDef *TMRx)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
if (TMRx->INT&TMR_INT_INT)
return 1;
else
return 0;
}
/**
* @brief Clear timer interrupt status bit.
* @param TMRx:
TMR0~TMR3
* @retval None.
*/
void TMR_ClearINTStatus(TMR_TypeDef *TMRx)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
TMRx->INT = TMR_INT_INT;
}
/**
* @brief TMRER enable.
* @param TMRx:
TMR0~TMR3
NewState:
ENABLE
DISABLE
* @retval None
*/
void TMR_Cmd(TMR_TypeDef *TMRx, uint32_t NewState)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
if (NewState == ENABLE)
TMRx->CTRL |= TMR_CTRL_EN;
else
TMRx->CTRL &= ~TMR_CTRL_EN;
}
/**
* @brief Get TMRx current value.
* @param TMRx:
TMR0~TMR3
* @retval timer value.
*/
uint32_t TMR_GetCurrentValue(TMR_TypeDef *TMRx)
{
/* Check parameters */
assert_parameters(IS_TMR_ALL_INSTANCE(TMRx));
return (TMRx->VALUE);
}
/*********************************** END OF FILE ******************************/
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,25 @@
/**
*******************************************************************************
* @file lib_version.c
* @author Application Team
* @version V4.5.0
* @date 2019-05-14
* @brief Version library.
*******************************************************************************/
#include "lib_version.h"
#define Target_DriveVersion DRIVER_VERSION(4, 7)
/**
* @brief Get Target driver's current version.
* @param None
* @retval Version value
* Bit[15:8] : Major version
* Bit[7:0] : Minor version
*/
uint16_t Target_GetDriveVersion(void)
{
return (Target_DriveVersion);
}
/*********************************** END OF FILE ******************************/
@@ -0,0 +1,88 @@
/**
******************************************************************************
* @file lib_wdt.c
* @author Application Team
* @version V4.4.0
* @date 2018-09-27
* @brief WDT library.
******************************************************************************
* @attention
*
******************************************************************************
*/
#include "lib_wdt.h"
#define WDTPASS_KEY 0xAA5555AA
#define WDTCLR_KEY 0x55AAAA55
/**
* @brief Enable WDT timer.
* @param None
* @retval None
*/
void WDT_Enable(void)
{
PMU->WDTPASS = WDTPASS_KEY;
PMU->WDTEN |= PMU_WDTEN_WDTEN;
PMU->WDTPASS = WDTPASS_KEY;
PMU->WDTEN |= PMU_WDTEN_WDTEN;
}
/**
* @brief Disable WDT timer.
* @param None
* @retval None
*/
void WDT_Disable(void)
{
PMU->WDTPASS = WDTPASS_KEY;
PMU->WDTEN &= ~PMU_WDTEN_WDTEN;
PMU->WDTPASS = WDTPASS_KEY;
PMU->WDTEN &= ~PMU_WDTEN_WDTEN;
}
/**
* @brief Clear WDT counter.
* @param None
* @retval None
*/
void WDT_Clear(void)
{
PMU->WDTCLR = WDTCLR_KEY;
}
/**
* @brief Set WDT counting period.
* @param counting period:
WDT_2_SECS
WDT_1_SECS
WDT_0_5_SECS
WDT_0_25_SECS
* @retval None
*/
void WDT_SetPeriod(uint32_t period)
{
uint32_t tmp;
assert_parameters(IS_WDT_PERIOD(period));
tmp = PMU->WDTEN;
tmp &= ~PMU_WDTEN_WDTSEL;
tmp |= period;
PMU->WDTPASS = WDTPASS_KEY;
PMU->WDTEN = tmp;
}
/**
* @brief Get WDT counter value.
* @param None
* @retval current counter value.
*/
uint16_t WDT_GetCounterValue(void)
{
return (PMU->WDTCLR & PMU_WDTCLR_WDTCNT);
}
/*********************************** END OF FILE ******************************/
+77
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@@ -0,0 +1,77 @@
# VANGOV85XX-EVAL
## 简介
VANGOV85XX-EVAL是-杭州万高科技推出的一款基于V85XX的评估板,板载资源主要如下:
| 硬件 | 描述 |
| --------- | ------------- |
| 芯片型号 | V8530 |
| CPU | ARM Cortex M0 |
| 主频 | 26M |
| 片内SRAM | 32K |
| 片内FLASH | 256K |
## 数据手册
[产品页面](http://www.vangotech.com/product.php?areas=0&bigs=1&smalls=4&id=14)
[datasheet](http://www.vangotech.com/uploadpic/162798006058.pdf)
## 编译说明
VANGOV85XX-EVAL板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器,以下是具体版本信息:
| IDE/编译器 | 已测试版本 |
| ---------- | ---------------------------- |
| GCC |gcc version 6.2.1 20161205 (release) |
## 烧写及执行
供电方式:开发板使用 USB TypeA 接口或者 DC-005 连接器提供 5V 电源。
下载程序:下载程序到开发板需要一套 JLink 或者使用 SD612 工具。
串口连接:使用串口线连接到COM1(UART0),或者使用USB转TTL模块连接PA9(MCU TX)和PA10(MCU RX)。
### 运行结果
如果编译 & 烧写无误,当复位设备后,会在串口上看到RT-Thread的启动logo信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build Jan 4 2021
2006 - 2021 Copyright by rt-thread team
msh />
```
## 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| --------- | -------- | :------------------------: |
| UART | 支持 | UART0~4 |
| GPIO | 支持 | GPIOB~F |
| ADC | 未支持 | ADC0~7 |
| HWTIMER | 未支持 | TIMER0~3 |
| RTC | 未支持 | RTC |
| WDT | 未支持 | Free watchdog timer |
| IIC | 未支持 | I2C0 |
| SPI | 未支持 | SPI0~1 |
| LCD | 未支持 | |
| SDRAM | 未支持 | |
| SPI FLASH | 未支持 | |
### IO在板级支持包中的映射情况
| IO号 | 板级包中的定义 |
| ---- | -------------- |
| PC0 | LED1 |
| PC2 | LED2 |
| PE0 | LED3 |
| PE1 | LED4 |
| PA0 | KEY1 |
| PC13 | KEY2 |
| PB14 | KEY3 |
## 联系人信息
维护人:[idk500](https://github.com/idk500)
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# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread-VangoV85xx.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
define symbol __Reset_Handler_text_start__ = 0x000000C0;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000 ;
define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place at address mem:__Reset_Handler_text_start__ { readonly section .Reset_Handler_text };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
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/*
*****************************************************************************
**
** File : Target_FLASH.ld
**
** Abstract : Linker script for Target Device with
** 256KByte FLASH, 32KByte RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Date : 2019-01-07
**
*****************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = 0x20008000; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x400; /* required amount of heap */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector : AT(0)
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
.chipinit_section : AT(0xC0)
{
. = ALIGN(4);
*(.chipinit_section) /* .text sections (code) */
*(.chipinit_section*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data goes into FLASH */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}
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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00010000 { ; load region size_region
ER_IROM1 0x00000000 0x00010000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00002000 { ; RW data
lib_CodeRAM.o (+RO +ZI +RW)
.ANY (+RW +ZI)
}
}
Binary file not shown.
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-04 iysheng first version
*/
#include <board.h>
#include <drivers/adc.h>
#include <rtdbg.h>
#include <stdio.h>
#include <rtthread.h>
#include "board.h"
#define LED1 GET_PIN(C, 0)
int main(void)
{
rt_pin_mode(LED1, PIN_MODE_OUTPUT);
while (1)
{
rt_pin_write(LED1, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED1, PIN_LOW);
rt_thread_mdelay(500);
}
return 0;
}
#ifndef ASSERT_NDEBUG
/**
* @brief Reports the name of the source file and the source line number
* where the assert_errhandler error has occurred.
* @param file: pointer to the source file name
* @param line: assert_errhandler error line source number
* @retval None
*/
void assert_errhandler(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'drivers')
# add the general drivers.
src = Split("""
board.c
""")
CPPPATH = [cwd]
# add uart drivers.
if GetDepend('RT_USING_SERIAL'):
src += ['drv_usart.c']
if GetDepend('RT_USING_PIN'):
src += ['drv_gpio.c']
if GetDepend('RT_USING_ADC'):
src += ['drv_adc.c']
if GetDepend('RT_USING_HWTIMER'):
src += ['drv_hwtimer.c']
if GetDepend('RT_USING_RTC'):
src += ['drv_rtc.c']
if GetDepend('RT_USING_WDT'):
src += ['drv_iwdt.c']
if GetDepend('RT_USING_SPI'):
src += ['drv_spi.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-04 iysheng first version
* 2021-09-07 idk500 suit for Vango V85xx
* 2021-09-08 ZhuXW add delay function
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#include <target.h>
#include <board.h>
#include <drv_usart.h>
/*
* System Clock Configuration
*/
void SystemClock_Config(void)
{
// SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
NVIC_SetPriority(SysTick_IRQn, 0);
CLK_InitTypeDef CLK_Struct;
CLK_Struct.ClockType = CLK_TYPE_AHBSRC \
|CLK_TYPE_PLLL \
|CLK_TYPE_HCLK \
|CLK_TYPE_PCLK;
CLK_Struct.AHBSource = CLK_AHBSEL_LSPLL;
CLK_Struct.PLLL.Frequency = CLK_PLLL_26_2144MHz;
CLK_Struct.PLLL.Source = CLK_PLLLSRC_XTALL;
CLK_Struct.PLLL.State = CLK_PLLL_ON;
CLK_Struct.HCLK.Divider = 1;
CLK_Struct.PCLK.Divider = 2;
CLK_ClockConfig(&CLK_Struct);
}
/*
* This is the timer interrupt service routine.
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/**
* This function will initial V85xx board.
*/
void rt_hw_board_init()
{
SystemClock_Config();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef BSP_USING_SDRAM
rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END);
#else
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
}
void rt_hw_us_delay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = SysTick->LOAD;
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
told = SysTick->VAL;
while (1)
{
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
/*@}*/
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-04 iysheng first version
* 2021-09-07 FuC Suit for Vango V85xx
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <target.h>
#include "drv_gpio.h"
#include "drv_spi.h"
/* Internal SRAM memory size[Kbytes] <8-64>, Default: 32*/
#define V85XX_SRAM_SIZE 32
#define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END V85XX_SRAM_END
/* #define DEBUG */
#ifdef DEBUG
#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
#else
#define DEBUG_PRINTF(...)
#endif
#endif
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-28 iysheng first version
*/
#ifndef __DRV_COMM_H__
#define __DRV_COMM_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifndef ARRAY_SIZE
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __DRV_HWTIMER_H__ */
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-27 iysheng first release
* 2021-09-10 ZhuXW add V85XX support
*/
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
#include <board.h>
#ifdef __cplusplus
extern "C" {
#endif
#define __V85XX_PORT(port) GPIO##port##_BASE
#define GET_PIN(PORTx,PIN) (__V85XX_PORT(PORTx)==GPIOA_BASE) ? (rt_base_t)(0 + PIN):(rt_base_t)((16 * ( ((rt_base_t)__V85XX_PORT(PORTx) - (rt_base_t)GPIOB_BASE)/(0x0400UL) +1)) + PIN)
#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
#define PIN_V85XXPORT(pin) ((GPIO_TypeDef *)(GPIOB_BASE + (0x400u * PIN_PORT(pin))))
#define PIN_V85XXPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
struct pin_irq_map
{
rt_uint16_t pinbit;
IRQn_Type irqno;
};
#ifdef __cplusplus
}
#endif
#endif /* __DRV_GPIO_H__ */
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-01-01 aozima first implementation.
* 2021-09-21 zhuxw add vango v85xx spi drivers
*
*/
#ifndef __DRV_SPI_H__
#define __DRV_SPI_H__
#endif // __DRV_SPI_H__
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-04 iysheng first version
*/
#ifndef __DRV_USART_H__
#define __DRV_USART_H__
#include <rthw.h>
#include <rtthread.h>
/* V85XX uart driver */
struct V85xx_uart {
UART_TypeDef * uart_periph;
IRQn_Type irqn;
struct rt_serial_device *serial;
char *device_name;
};
#endif
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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
/* kservice optimization */
#define RT_DEBUG
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x40004
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 16
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_SPI
/* Using USB */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_USING_POSIX
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* system packages */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
#define SOC_SERIES_V85XX
#define SOC_V85XX
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define BSP_USING_UART2
#define RT_USING_SPI1
#define RT_USING_SPI2
#endif
+126
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import os
# toolchains options
ARCH='arm'
CPU='cortex-m0'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'D:/toolchain/gnu_tools_arm_embedded/5.4_2016q3/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# tool-chains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Dgcc' # -D' + PART_TYPE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-v85xx.map,-cref,-u,Reset_Handler -T Target_FLASH.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2 -g'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M0'
CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-v85xx.map --scatter Target_FLASH.sct'
LFLAGS += ' --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab)'
EXEC_PATH += '/ARM/ARMCC/bin'
print(EXEC_PATH)
CFLAGS += ' --c99'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D VANGOV85XXDEV'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --debug'
CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M0'
CFLAGS += ' -e'
CFLAGS += ' --fpu=None'
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' -Ol'
CFLAGS += ' --use_c++_inline'
AFLAGS = ''
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M0'
AFLAGS += ' --fpu None'
LFLAGS = ' --config Target_FLASH.icf'
LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
LFLAGS += ' --entry __iar_program_start'
EXEC_PATH += '/arm/bin/'
POST_ACTION = ''
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@@ -0,0 +1,42 @@
*.pyc
*.map
*.dblite
*.elf
*.bin
*.hex
*.axf
*.exe
*.pdb
*.idb
*.ilk
*.old
build
Debug
documentation/html
packages/
*~
*.o
*.obj
*.out
*.bak
*.dep
*.lib
*.i
*.d
.DS_Stor*
.config 3
.config 4
.config 5
Midea-X1
*.uimg
GPATH
GRTAGS
GTAGS
.vscode
JLinkLog.txt
JLinkSettings.ini
DebugConfig/
RTE/
settings/
*.uvguix*
cconfig.h
+22
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@@ -0,0 +1,22 @@
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "../libraries/Kconfig"
source "board/Kconfig"
@@ -0,0 +1,84 @@
# APM32F103ZE MINI BOARD BSP 说明
## 简介
本文档为 APM32F103ZE MINI 开发板(MINI BOARD)的 BSP (板级支持包) 说明。
主要内容如下:
- 开发板资源介绍
- BSP 快速上手
通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。
## 开发板介绍
APM32F103ZE MINI BOARD,采用标准JTAG/SWD调试接口,引出了全部的IO。开发板外观如下图所示:
![board](figures/APM32F103ZE.png)
该开发板常用 **板载资源** 如下:
- MCU:APM32F103C8T6,主频 96MHz,512KB FLASH ,128KB RAM
- 外部 RAM:无
- 外部 FLASH:无
- 常用外设
- LED:2个,(黄色,PE5/PE6)
- 按键:2个,K1(兼具唤醒功能,PA0),K2(PC13)
- 常用接口:RS232转串口、、USB SLAVE
- 调试接口:标准 JTAG/SWD
## 外设支持
本 BSP 目前对外设的支持情况如下:
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :------------------------------------ |
| RS232转串口 | 支持 | 使用 UART1/ UART2(通过跳线选择) |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | PA0, PA1... PG15 ---> PIN: 0, 1...143 |
| UART | 支持 | UART1/2 |
## 使用说明
本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。
### 快速上手
本 BSP 为开发者提供MDK5 工程。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。
#### 硬件连接
使用数据线连接开发板到 PC,打开电源开关。
#### 编译下载
双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。
> 工程默认配置使用 J-Link 仿真器下载程序,在通过 J-Link 连接开发板的基础上,点击下载按钮即可下载程序到开发板
#### 运行结果
下载程序成功之后,系统会自动运行,LED 闪烁
连接开发板对应串口到 PC , 在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.4 build Aug 20 2021
2006 - 2021 Copyright by rt-thread team
msh >
```
## 注意事项
- 可在极海官方网站进行所需资料下载,如pack安装包和MINI开发板原理图等(www.geehy.com);
## 联系人信息
-[abbbcc ](https://gitee.com/abbbcc)
@@ -0,0 +1,15 @@
# for module compiling
import os
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
@@ -0,0 +1,60 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
apm32_library = 'APM32F10x_Library'
rtconfig.BSP_LIBRARY_TYPE = apm32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, apm32_library, 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'Drivers', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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