mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp/renesas] add bsp ra6e2-ek #10631
This commit is contained in:
BruceOu
@@ -253,6 +253,7 @@
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"renesas/ra6m4-iot",
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"renesas/ra6m3-ek",
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"renesas/ra6m3-hmi-board",
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"renesas/ra6e2-ek",
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"renesas/ra6e2-fpb",
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"renesas/ra4e2-eco",
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"renesas/ra4m2-eco",
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,5 @@
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/RTE
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/Listings
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/Objects
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ra_cfg.txt
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@@ -0,0 +1,9 @@
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# files format check exclude path, please follow the instructions below to modify;
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# If you need to exclude an entire folder, add the folder path in dir_path;
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# If you need to exclude a file, add the path to the file in file_path.
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dir_path:
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- ra
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- ra_gen
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- ra_cfg
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- RTE
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@@ -0,0 +1,64 @@
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
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<azone>
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<rzone name="R7FA6E2BB3CFM.rzone"/>
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<partition>
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<peripheral name="PORT0" group="PORT">
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<slot name="P000" secure="true"/>
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<slot name="P001" secure="true"/>
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<slot name="P002" secure="true"/>
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<slot name="P003" secure="true"/>
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<slot name="P004" secure="true"/>
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<slot name="P005" secure="true"/>
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<slot name="P006" secure="true"/>
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<slot name="P008" secure="true"/>
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<slot name="P013" secure="true"/>
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<slot name="P014" secure="true"/>
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<slot name="P015" secure="true"/>
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</peripheral>
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<peripheral name="PORT1" group="PORT">
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<slot name="P100" secure="true"/>
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<slot name="P101" secure="true"/>
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<slot name="P102" secure="true"/>
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<slot name="P105" secure="true"/>
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<slot name="P106" secure="true"/>
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<slot name="P107" secure="true"/>
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<slot name="P108" secure="true"/>
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<slot name="P109" secure="true"/>
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<slot name="P110" secure="true"/>
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<slot name="P111" secure="true"/>
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<slot name="P113" secure="true"/>
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</peripheral>
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<peripheral name="PORT2" group="PORT">
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<slot name="P205" secure="true"/>
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<slot name="P206" secure="true"/>
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<slot name="P207" secure="true"/>
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<slot name="P208" secure="true"/>
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</peripheral>
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<peripheral name="PORT3" group="PORT">
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<slot name="P300" secure="true"/>
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<slot name="P301" secure="true"/>
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<slot name="P304" secure="true"/>
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</peripheral>
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<peripheral name="PORT4" group="PORT">
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<slot name="P400" secure="true"/>
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<slot name="P401" secure="true"/>
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<slot name="P402" secure="true"/>
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<slot name="P403" secure="true"/>
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<slot name="P407" secure="true"/>
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<slot name="P408" secure="true"/>
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<slot name="P409" secure="true"/>
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<slot name="P410" secure="true"/>
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<slot name="P411" secure="true"/>
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</peripheral>
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<peripheral name="PORT5" group="PORT">
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<slot name="P500" secure="true"/>
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</peripheral>
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<peripheral name="SCI0" group="SCI" security=""/>
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<peripheral name="ICU">
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<slot name="IRQ0" secure="true"/>
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<slot name="IRQ1" secure="true"/>
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<slot name="IRQ2" secure="true"/>
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<slot name="IRQ3" secure="true"/>
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</peripheral>
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</partition>
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</azone>
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@@ -0,0 +1,99 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<raConfiguration version="9">
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<generalSettings>
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<option key="#Board#" value="board.ra6e2fpb"/>
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<option key="CPU" value="RA6E2"/>
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<option key="Core" value="CM33"/>
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<option key="#TargetName#" value="R7FA6E2BB3CFM"/>
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<option key="#TargetARCHITECTURE#" value="cortex-m33"/>
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<option key="#DeviceCommand#" value="R7FA6E2BB"/>
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<option key="#RTOS#" value="_none"/>
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<option key="#pinconfiguration#" value="R7FA6E2BB3CFM.pincfg"/>
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<option key="#FSPVersion#" value="5.5.0"/>
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<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra6e2_fpb##"/>
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<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
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</generalSettings>
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<raBspConfiguration/>
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<raClockConfiguration>
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<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
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<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
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<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
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<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
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<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
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<node id="board.clock.pll.source" option="board.clock.pll.source.hoco"/>
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<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
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<node id="board.clock.pll.mul" option="board.clock.pll.mul.100"/>
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<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
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<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
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<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
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<node id="board.clock.uclk.source" option="board.clock.uclk.source.disabled"/>
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<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
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<node id="board.clock.cecclk.source" option="board.clock.cecclk.source.disabled"/>
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<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
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<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
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<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
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<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
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<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
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<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
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<node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
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<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
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<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
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<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
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<node id="board.clock.cecclk.div" option="board.clock.cecclk.div.1"/>
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<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.1"/>
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<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
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<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
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<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
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<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
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<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
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<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
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<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
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<node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
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<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
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<node id="board.clock.cecclk.display" option="board.clock.cecclk.display.value"/>
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<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
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</raClockConfiguration>
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<raPinConfiguration>
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<pincfg active="true" name="" symbol="">
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<configSetting altId="adc0.an000.p000" configurationId="adc0.an000"/>
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<configSetting altId="adc0.an001.p001" configurationId="adc0.an001"/>
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<configSetting altId="adc0.an002.p002" configurationId="adc0.an002"/>
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<configSetting altId="adc0.an004.p004" configurationId="adc0.an004"/>
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<configSetting altId="adc0.an007.p003" configurationId="adc0.an007"/>
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<configSetting altId="adc0.an011.p013" configurationId="adc0.an011"/>
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<configSetting altId="i3c_fslash_iic.i3c_scl.p100" configurationId="i3c_fslash_iic.i3c_scl"/>
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<configSetting altId="i3c_fslash_iic.i3c_sda.p101" configurationId="i3c_fslash_iic.i3c_sda"/>
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<configSetting altId="irq.irq9.p304" configurationId="irq.irq9"/>
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<configSetting altId="jtag_fslash_swd.swclk.p300" configurationId="jtag_fslash_swd.swclk"/>
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<configSetting altId="jtag_fslash_swd.swdio.p108" configurationId="jtag_fslash_swd.swdio"/>
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<configSetting altId="p005.input" configurationId="p005"/>
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<configSetting altId="p006.input" configurationId="p006"/>
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<configSetting altId="p008.input" configurationId="p008"/>
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<configSetting altId="p014.input" configurationId="p014"/>
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<configSetting altId="p015.input" configurationId="p015"/>
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<configSetting altId="p105.input" configurationId="p105"/>
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<configSetting altId="p106.input" configurationId="p106"/>
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<configSetting altId="p107.input" configurationId="p107"/>
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<configSetting altId="p111.input" configurationId="p111"/>
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<configSetting altId="p113.input" configurationId="p113"/>
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<configSetting altId="p205.input" configurationId="p205"/>
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<configSetting altId="p206.output.low" configurationId="p206"/>
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<configSetting altId="p207.output.low" configurationId="p207"/>
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<configSetting altId="p208.input" configurationId="p208"/>
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<configSetting altId="p301.input" configurationId="p301"/>
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<configSetting altId="p400.output.high" configurationId="p400"/>
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<configSetting altId="p401.output.high" configurationId="p401"/>
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<configSetting altId="p402.input" configurationId="p402"/>
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<configSetting altId="p403.input" configurationId="p403"/>
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<configSetting altId="p407.input" configurationId="p407"/>
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<configSetting altId="p408.input" configurationId="p408"/>
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<configSetting altId="p409.input" configurationId="p409"/>
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<configSetting altId="p500.input" configurationId="p500"/>
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<configSetting altId="sci0.rxd0.p410" configurationId="sci0.rxd0" isUsedByDriver="true"/>
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<configSetting altId="sci0.sck0.p102" configurationId="sci0.sck0"/>
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<configSetting altId="sci0.txd0.p411" configurationId="sci0.txd0" isUsedByDriver="true"/>
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<configSetting altId="sci9.rxd9.p110" configurationId="sci9.rxd9"/>
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<configSetting altId="sci9.txd9.p109" configurationId="sci9.txd9"/>
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</pincfg>
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</raPinConfiguration>
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</raConfiguration>
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@@ -0,0 +1,24 @@
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#Sun Oct 27 23:48:31 CST 2024
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com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#5.5.0/all=607301841,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1605847057,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|703213290,ra/fsp/inc/fsp_version.h|2923157824,ra/fsp/inc/api/fsp_common_api.h|984154367,ra/fsp/inc/api/r_ioport_api.h|2578112255,ra/fsp/inc/api/bsp_api.h
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com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#5.5.0/libraries=
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com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
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com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.1669822211=false
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com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#6.1.0+fsp.5.5.0/all=1441545198,ra/arm/CMSIS_6/LICENSE|1219721305,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_version.h|409404162,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_armclang.h|3759822293,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc000.h|956077447,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm3.h|3181146757,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm33.h|3011809468,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm4.h|3557548549,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm55.h|1716662092,ra/arm/CMSIS_6/CMSIS/Core/Include/core_ca.h|432601292,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_gcc.h|215226313,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm85.h|3033126542,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0.h|2145813412,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm7.h|3716711724,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0plus.h|2642675438,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_compiler.h|1528066797,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm23.h|3285488134,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc300.h|3342995321,ra/arm/CMSIS_6/CMSIS/Core/Include/core_starmc1.h|862174236,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm52.h|3422691989,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm35p.h|440777068,ra/arm/CMSIS_6/CMSIS/Core/Include/tz_context.h|3070162158,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_clang.h|1573341164,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm1.h|1753083115,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_iccarm_m.h|271089146,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_mpu.h|1964429271,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_pmu.h|2951442685,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_clang_m.h|1572899130,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_mpu.h|163659099,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_tiarmclang_m.h|1179088122,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_gcc_m.h|2095512231,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_armclang_m.h|2703360002,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_cachel1.h|3180041419,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv81m_pac.h|117658130,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_cp15.h|1790528804,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_clang_a.h|987654843,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_armclang_a.h|3644000269,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_gcc_a.h|947683335,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_iccarm_a.h|3200474466,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/irq_ctrl.h|154254372,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_gcc_r.h|681720804,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_clang_r.h|718227869,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_armclang_r.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#device\#\#\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.contentgen.options/options/suppresswarningspaths=ra/arm
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6e2_fpb\#\#\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#device\#\#R7FA6E2BB3CFM\#\#5.5.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#5.5.0/all=3455513762,ra/fsp/src/r_ioport/r_ioport.c|2745191493,ra/fsp/inc/instances/r_ioport.h|984154367,ra/fsp/inc/api/r_ioport_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#6.1.0+fsp.5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
|
||||
com.renesas.cdt.ddsc.project.standalone.projectgenerationoptions/isCpp=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#events\#\#\#\#5.5.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#5.5.0/all=4077763839,ra/fsp/src/r_sci_uart/r_sci_uart.c|1050842453,ra/fsp/inc/instances/r_sci_uart.h|2184748992,ra/fsp/inc/api/r_transfer_api.h|1365856538,ra/fsp/inc/api/r_uart_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6e2_fpb\#\#\#\#5.5.0/all=1381046541,ra/board/ra6e2_fpb/board.h|1528657985,ra/board/ra6e2_fpb/board_init.c|681177226,ra/board/ra6e2_fpb/board_init.h|2772293690,ra/board/ra6e2_fpb/board_leds.c|1936324734,ra/board/ra6e2_fpb/board_leds.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#device\#\#R7FA6E2BB3CFM\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#fsp\#\#\#\#5.5.0/all=2546093092,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3276693394,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|407111472,ra/fsp/src/bsp/mcu/all/bsp_common.c|1933227766,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|3911931782,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1386088601,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2797403644,ra/fsp/src/bsp/mcu/all/bsp_sdram.c|1605565920,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1514141478,ra/fsp/src/bsp/mcu/all/bsp_macl.c|2583260336,ra/fsp/src/bsp/mcu/all/bsp_security.h|1820625425,ra/fsp/src/bsp/mcu/all/bsp_exceptions.h|1254321900,ra/fsp/src/bsp/mcu/all/bsp_common.h|3182992915,ra/fsp/src/bsp/mcu/all/bsp_io.h|3476082743,ra/fsp/src/bsp/mcu/all/board_sdram.h|4246582758,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2323020791,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1490618937,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1750764556,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|4161080445,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3275847891,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|3561046660,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1746951639,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3787004779,ra/fsp/src/bsp/mcu/all/bsp_sdram.h|892781819,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2935422572,ra/fsp/src/bsp/mcu/all/bsp_macl.h|996969774,ra/fsp/src/bsp/mcu/all/bsp_security.c|4109231342,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|3211935645,ra/fsp/src/bsp/mcu/all/bsp_io.c|997181494,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|4014147970,ra/fsp/src/bsp/mcu/all/bsp_irq.h|3817098077,ra/fsp/src/bsp/mcu/all/bsp_guard.h|107417934,ra/fsp/src/bsp/mcu/all/bsp_irq.c|4028248479,ra/fsp/src/bsp/mcu/ra6e2/bsp_feature_gen.h|4185404797,ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h|784900941,ra/fsp/src/bsp/mcu/ra6e2/bsp_elc.h|3972235245,ra/fsp/src/bsp/mcu/ra6e2/bsp_mcu_info.h|1164417254,ra/fsp/inc/fsp_features.h|2745191493,ra/fsp/inc/instances/r_ioport.h|1032438424,script/fsp.scat|346195372,script/ac6/fsp_keep.via
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#fsp\#\#\#\#5.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#device\#\#\#\#5.5.0/all=751037218,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6e2\#\#events\#\#\#\#5.5.0/libraries=
|
||||
@@ -0,0 +1,28 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
BSP_DIR := .
|
||||
|
||||
RTT_DIR := ../../..
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example : default "F:/git_repositories/rt-thread"
|
||||
|
||||
PKGS_DIR := packages
|
||||
|
||||
ENV_DIR := /
|
||||
|
||||
config SOC_R7FA6E2BB
|
||||
bool
|
||||
select SOC_SERIES_R7FA6E2
|
||||
select ARCH_ARM_CORTEX_SECURE
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
source "$(RTT_DIR)/Kconfig"
|
||||
osource "$PKGS_DIR/Kconfig"
|
||||
rsource "../libraries/Kconfig"
|
||||
|
||||
if !RT_USING_NANO
|
||||
rsource "$(BSP_DIR)/board/Kconfig"
|
||||
endif
|
||||
@@ -0,0 +1,159 @@
|
||||
# 瑞萨 EK-RA6E2 开发板 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为瑞萨 EK-RA6E2 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板介绍
|
||||
- BSP 快速上手指南
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
基于瑞萨 RA6E2 MCU 开发的 EK-RA6E2 MCU 评估板，通过灵活配置软件包和 IDE，可帮助用户对 RA6E2 MCU 群组的特性轻松进行评估，并对嵌入系统应用程序进行开发。
|
||||
|
||||
开发板正面外观如下图：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：R7FA6E2BB3CFM，200MHz，Arm Cortex®-M33 内核，256kB 代码闪存, 40kB SRAM
|
||||
- 调试接口：板载 J-Link 接口
|
||||
- 扩展接口：两个 PMOD 连接器
|
||||
|
||||
**更多详细资料及工具**
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------------- | :----------------- | :------------- |
|
||||
| UART | 支持 | UART0 为默认日志输出端口 |
|
||||
| GPIO | 支持 | |
|
||||
| IIC | 支持 | 软件 |
|
||||
| WDT | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| ADC | 支持 | |
|
||||
| DAC | 支持 | |
|
||||
| SPI | 支持 | |
|
||||
| FLASH | 支持 | |
|
||||
| PWM | 支持 | |
|
||||
| CAN | 支持 | |
|
||||
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 目前仅提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
**硬件连接**
|
||||
|
||||
使用 USB 数据线连接开发板到 PC，使用 J-link 接口下载和 DEBUG 程序。使用 USB 转串口工具连接 UART0：P411(TXD)、P410(RXD)。
|
||||
|
||||
**编译下载**
|
||||
|
||||
- 编译：双击 project.uvprojx 文件，打开 MDK5 工程，编译程序。
|
||||
|
||||
> 注意：此工程需要使用 J-link驱动。建议使用 V8.10 及以上版本烧录工程。[J-Link 下载链接](https://www.segger.com/downloads/jlink/)
|
||||
|
||||
- 下载：编译成功后，点击“Download”即可下载程序。
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
**查看运行结果**
|
||||
|
||||
下载程序成功之后，系统会自动运行并打印系统信息。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.2.1 build Aug 19 2025 22:44:51
|
||||
2006 - 2024 Copyright by RT-Thread team
|
||||
|
||||
Hello RT-Thread!
|
||||
msh >
|
||||
```
|
||||
|
||||
**应用入口函数**
|
||||
|
||||
应用层的入口函数在 **bsp\ra6e2-ek\src\hal_emtry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
|
||||
|
||||
```c
|
||||
void hal_entry(void)
|
||||
{
|
||||
rt_kprintf("\nHello RT-Thread!\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED1_PIN, PIN_HIGH);
|
||||
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED1_PIN, PIN_LOW);
|
||||
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
### 进阶使用
|
||||
|
||||
**资料及文档**
|
||||
|
||||
- [开发板官网主页](https://www.renesas.cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/fpb-ra6e2-fast-prototyping-board-ra6e2-mcu-group)
|
||||
- [开发板用户手册](https://www.renesas.cn/zh/document/mat/fpb-ra6e2-v1-users-manual?r=25433341)
|
||||
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
|
||||
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
|
||||
- [RA6E2_datasheet](https://www.renesas.cn/zh/document/dst/ra6e2-group-datasheet?language=en)
|
||||
- [RA6E2 Group User’s Manual: Hardware](https://www.renesas.cn/zh/document/mah/ra6e2-group-users-manual-hardware?language=en)
|
||||
|
||||
**FSP 配置**
|
||||
|
||||
需要修改瑞萨的 BSP 外设配置或添加新的外设端口，需要用到瑞萨的 [FSP](https://www.renesas.cn/zh/software-tool/flexible-software-package-fsp#documents) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
|
||||
|
||||
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.cn/zh/software-tool/flexible-software-package-fsp)。
|
||||
2. 下载安装完成后，需要添加 EK-RA6E2 开发板的官方板级支持包。
|
||||
> 打开[ EK-RA6E2 开发板详情页](https://www.renesas.cn/zh/design-resources/boards-kits/ek-ra6e2p)，在“下载”列表中找到 ”EK-RA6E2板级支持包“，点击链接即可下载。
|
||||
3. 如何将 ”EK-RA6E2板级支持包“添加到 FSP 中，请参考文档[如何导入板级支持包](https://www.renesas.cn/zh/software-tool/flexible-software-package-fsp)。
|
||||
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
||||
此 BSP 默认只开启了 UART0 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。
|
||||
|
||||
步骤如下：
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
|
||||
## 注意事项
|
||||
|
||||
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<ouxiaolong@bruceou.cn>
|
||||
@@ -0,0 +1,27 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
CPPPATH = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
if GetOption('target') != 'mdk5':
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('./src/*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,54 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
rtconfig.BSP_LIBRARY_TYPE = None
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,50 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
rsource "../../libraries/HAL_Drivers/drivers/Kconfig"
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
if BSP_USING_UART
|
||||
|
||||
menuconfig BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default n
|
||||
if BSP_USING_UART0
|
||||
config BSP_UART0_RX_USING_DMA
|
||||
bool "Enable UART0 RX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_TX_USING_DMA
|
||||
bool "Enable UART0 TX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_RX_BUFSIZE
|
||||
int "Set UART0 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART0_TX_BUFSIZE
|
||||
int "Set UART0 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
endmenu
|
||||
@@ -0,0 +1,16 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-08-19 BruceOu first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RA_SRAM_SIZE 40 /* The SRAM size of the chip needs to be modified */
|
||||
#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024)
|
||||
|
||||
#ifdef __ARMCC_VERSION
|
||||
extern int Image$$RAM_END$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __RAM_segment_used_end__;
|
||||
#define HEAP_BEGIN (&__RAM_segment_used_end__)
|
||||
#endif
|
||||
|
||||
#define HEAP_END RA_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = []
|
||||
|
||||
if GetDepend(['BSP_USING_RW007']):
|
||||
src += Glob('drv_rw007.c')
|
||||
|
||||
CPPPATH = [cwd]
|
||||
LOCAL_CFLAGS = ''
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
LOCAL_CFLAGS += ' -std=c99'
|
||||
elif rtconfig.PLATFORM in ['armcc']:
|
||||
LOCAL_CFLAGS += ' --c99'
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-08-19 BruceOu first version
|
||||
*/
|
||||
|
||||
/* Number of IRQ channels on the device */
|
||||
#define RA_IRQ_MAX 15
|
||||
|
||||
/* PIN to IRQx table */
|
||||
#define PIN2IRQX_TABLE \
|
||||
{ \
|
||||
switch (pin) \
|
||||
{ \
|
||||
case BSP_IO_PORT_04_PIN_00: \
|
||||
case BSP_IO_PORT_01_PIN_05: \
|
||||
case BSP_IO_PORT_02_PIN_06: \
|
||||
return 0; \
|
||||
case BSP_IO_PORT_01_PIN_01: \
|
||||
case BSP_IO_PORT_01_PIN_04: \
|
||||
case BSP_IO_PORT_02_PIN_05: \
|
||||
return 1; \
|
||||
case BSP_IO_PORT_01_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_13: \
|
||||
return 2; \
|
||||
case BSP_IO_PORT_01_PIN_10: \
|
||||
case BSP_IO_PORT_02_PIN_12: \
|
||||
return 3; \
|
||||
case BSP_IO_PORT_01_PIN_11: \
|
||||
case BSP_IO_PORT_04_PIN_11: \
|
||||
case BSP_IO_PORT_04_PIN_02: \
|
||||
return 4; \
|
||||
case BSP_IO_PORT_03_PIN_02: \
|
||||
case BSP_IO_PORT_04_PIN_10: \
|
||||
case BSP_IO_PORT_04_PIN_01: \
|
||||
return 5; \
|
||||
case BSP_IO_PORT_03_PIN_01: \
|
||||
case BSP_IO_PORT_04_PIN_09: \
|
||||
case BSP_IO_PORT_00_PIN_00: \
|
||||
return 6; \
|
||||
case BSP_IO_PORT_04_PIN_08: \
|
||||
case BSP_IO_PORT_00_PIN_01: \
|
||||
return 7; \
|
||||
case BSP_IO_PORT_00_PIN_02: \
|
||||
return 8; \
|
||||
case BSP_IO_PORT_03_PIN_04: \
|
||||
case BSP_IO_PORT_00_PIN_04: \
|
||||
return 9; \
|
||||
case BSP_IO_PORT_00_PIN_05: \
|
||||
return 10; \
|
||||
case BSP_IO_PORT_00_PIN_06: \
|
||||
return 11; \
|
||||
case BSP_IO_PORT_00_PIN_08: \
|
||||
return 12; \
|
||||
case BSP_IO_PORT_00_PIN_15: \
|
||||
return 13; \
|
||||
case BSP_IO_PORT_04_PIN_03: \
|
||||
return 14; \
|
||||
default : \
|
||||
return -1; \
|
||||
} \
|
||||
}
|
||||
@@ -0,0 +1,162 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<vendor>Renesas</vendor>
|
||||
<name>Project Content</name>
|
||||
<description>Project content managed by the Renesas Smart Configurator</description>
|
||||
<url/>
|
||||
<releases>
|
||||
<release version="1.0.0"/>
|
||||
</releases>
|
||||
<generators>
|
||||
<generator id="Renesas RA Smart Configurator">
|
||||
<project_files>
|
||||
<file category="include" name="src/"/>
|
||||
<file category="source" name="src/hal_entry.c"/>
|
||||
</project_files>
|
||||
</generator>
|
||||
</generators>
|
||||
<components generator="Renesas RA Smart Configurator">
|
||||
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
|
||||
<files>
|
||||
<file category="include" name="ra/arm/CMSIS_6/CMSIS/Core/Include/"/>
|
||||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_armclang_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_clang_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_cp15.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_gcc_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_iccarm_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/irq_ctrl.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_clang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_version.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_ca.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0plus.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm23.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm3.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm33.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm35p.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm4.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm52.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm55.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm85.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc000.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc300.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_starmc1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_cachel1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_mpu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv81m_pac.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_mpu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_pmu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_armclang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_clang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_gcc_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_iccarm_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_tiarmclang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_armclang_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_clang_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_gcc_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/tz_context.h" path=""/>
|
||||
<file category="other" name="ra/arm/CMSIS_6/LICENSE"/>
|
||||
<file category="header" name="ra/board/ra6e2_fpb/board.h" path=""/>
|
||||
<file category="source" name="ra/board/ra6e2_fpb/board_init.c"/>
|
||||
<file category="header" name="ra/board/ra6e2_fpb/board_init.h" path=""/>
|
||||
<file category="source" name="ra/board/ra6e2_fpb/board_leds.c"/>
|
||||
<file category="header" name="ra/board/ra6e2_fpb/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/fsp_common_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/board_sdram.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_exceptions.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_macl.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_macl.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sdram.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_sdram.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6e2/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6e2/bsp_feature_gen.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6e2/bsp_mcu_info.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
<files>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/"/>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Generated Data">
|
||||
<files>
|
||||
<file category="include" name="ra_gen/"/>
|
||||
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
|
||||
<file category="source" name="ra_gen/common_data.c"/>
|
||||
<file category="header" name="ra_gen/common_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/hal_data.c"/>
|
||||
<file category="header" name="ra_gen/hal_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/main.c"/>
|
||||
<file category="source" name="ra_gen/pin_data.c"/>
|
||||
<file category="other" name="ra_gen/SConscript"/>
|
||||
<file category="source" name="ra_gen/vector_data.c"/>
|
||||
<file category="header" name="ra_gen/vector_data.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Linker Script">
|
||||
<files>
|
||||
<file category="linkerScript" name="script/fsp.scat"/>
|
||||
<file category="other" name="script/ac6/fsp_keep.via"/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
After Width: | Height: | Size: 12 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 329 KiB |
@@ -0,0 +1,22 @@
|
||||
|
||||
/* generated memory regions file - do not edit */
|
||||
#define RAM_START 0x20000000
|
||||
#define RAM_LENGTH 0xA000
|
||||
#define FLASH_START 0x00000000
|
||||
#define FLASH_LENGTH 0x40000
|
||||
#define DATA_FLASH_START 0x08000000
|
||||
#define DATA_FLASH_LENGTH 0x1000
|
||||
#define OPTION_SETTING_START 0x0100A100
|
||||
#define OPTION_SETTING_LENGTH 0x100
|
||||
#define OPTION_SETTING_S_START 0x0100A200
|
||||
#define OPTION_SETTING_S_LENGTH 0x100
|
||||
#define ID_CODE_START 0x0100A120
|
||||
#define ID_CODE_LENGTH 0x10
|
||||
#define SDRAM_START 0x80010000
|
||||
#define SDRAM_LENGTH 0x0
|
||||
#define QSPI_FLASH_START 0x60000000
|
||||
#define QSPI_FLASH_LENGTH 0x4000000
|
||||
#define OSPI_DEVICE_0_START 0x80020000
|
||||
#define OSPI_DEVICE_0_LENGTH 0x0
|
||||
#define OSPI_DEVICE_1_START 0x80030000
|
||||
#define OSPI_DEVICE_1_LENGTH 0x0
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,25 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
group = []
|
||||
CPPPATH = []
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
if GetOption('target') != 'mdk5':
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
|
||||
src += Glob(cwd + '/fsp/src/r_*/*.c')
|
||||
CPPPATH = [ cwd + '/arm/CMSIS_6/CMSIS/Core/Include',
|
||||
cwd + '/fsp/inc',
|
||||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,190 @@
|
||||
/*
|
||||
* Copyright (c) 2017-2020 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS-Core(A) Interrupt Controller API Header File
|
||||
*/
|
||||
|
||||
#ifndef IRQ_CTRL_H_
|
||||
#define IRQ_CTRL_H_
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef IRQHANDLER_T
|
||||
#define IRQHANDLER_T
|
||||
/// Interrupt handler data type
|
||||
typedef void (*IRQHandler_t) (void);
|
||||
#endif
|
||||
|
||||
#ifndef IRQN_ID_T
|
||||
#define IRQN_ID_T
|
||||
/// Interrupt ID number data type
|
||||
typedef int32_t IRQn_ID_t;
|
||||
#endif
|
||||
|
||||
/* Interrupt mode bit-masks */
|
||||
#define IRQ_MODE_TRIG_Pos (0U)
|
||||
#define IRQ_MODE_TRIG_Msk (0x07UL /*<< IRQ_MODE_TRIG_Pos*/)
|
||||
#define IRQ_MODE_TRIG_LEVEL (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_LEVEL_LOW (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_LEVEL_HIGH (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_RISING (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_FALLING (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_BOTH (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt
|
||||
|
||||
#define IRQ_MODE_TYPE_Pos (3U)
|
||||
#define IRQ_MODE_TYPE_Msk (0x01UL << IRQ_MODE_TYPE_Pos)
|
||||
#define IRQ_MODE_TYPE_IRQ (0x00UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU IRQ line
|
||||
#define IRQ_MODE_TYPE_FIQ (0x01UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU FIQ line
|
||||
|
||||
#define IRQ_MODE_DOMAIN_Pos (4U)
|
||||
#define IRQ_MODE_DOMAIN_Msk (0x01UL << IRQ_MODE_DOMAIN_Pos)
|
||||
#define IRQ_MODE_DOMAIN_NONSECURE (0x00UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting non-secure domain
|
||||
#define IRQ_MODE_DOMAIN_SECURE (0x01UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting secure domain
|
||||
|
||||
#define IRQ_MODE_CPU_Pos (5U)
|
||||
#define IRQ_MODE_CPU_Msk (0xFFUL << IRQ_MODE_CPU_Pos)
|
||||
#define IRQ_MODE_CPU_ALL (0x00UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets all CPUs
|
||||
#define IRQ_MODE_CPU_0 (0x01UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 0
|
||||
#define IRQ_MODE_CPU_1 (0x02UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 1
|
||||
#define IRQ_MODE_CPU_2 (0x04UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 2
|
||||
#define IRQ_MODE_CPU_3 (0x08UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 3
|
||||
#define IRQ_MODE_CPU_4 (0x10UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 4
|
||||
#define IRQ_MODE_CPU_5 (0x20UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 5
|
||||
#define IRQ_MODE_CPU_6 (0x40UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 6
|
||||
#define IRQ_MODE_CPU_7 (0x80UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 7
|
||||
|
||||
// Encoding in some early GIC implementations
|
||||
#define IRQ_MODE_MODEL_Pos (13U)
|
||||
#define IRQ_MODE_MODEL_Msk (0x1UL << IRQ_MODE_MODEL_Pos)
|
||||
#define IRQ_MODE_MODEL_NN (0x0UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the N-N model
|
||||
#define IRQ_MODE_MODEL_1N (0x1UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the 1-N model
|
||||
|
||||
#define IRQ_MODE_ERROR (0x80000000UL) ///< Bit indicating mode value error
|
||||
|
||||
/* Interrupt priority bit-masks */
|
||||
#define IRQ_PRIORITY_Msk (0x0000FFFFUL) ///< Interrupt priority value bit-mask
|
||||
#define IRQ_PRIORITY_ERROR (0x80000000UL) ///< Bit indicating priority value error
|
||||
|
||||
/// Initialize interrupt controller.
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Initialize (void);
|
||||
|
||||
/// Register interrupt handler.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] handler interrupt handler function address
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler);
|
||||
|
||||
/// Get the registered interrupt handler.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return registered interrupt handler function address.
|
||||
IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn);
|
||||
|
||||
/// Enable interrupt.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Enable (IRQn_ID_t irqn);
|
||||
|
||||
/// Disable interrupt.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Disable (IRQn_ID_t irqn);
|
||||
|
||||
/// Get interrupt enable state.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 - interrupt is disabled, 1 - interrupt is enabled.
|
||||
uint32_t IRQ_GetEnableState (IRQn_ID_t irqn);
|
||||
|
||||
/// Configure interrupt request mode.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] mode mode configuration
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode);
|
||||
|
||||
/// Get interrupt mode configuration.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set.
|
||||
uint32_t IRQ_GetMode (IRQn_ID_t irqn);
|
||||
|
||||
/// Get ID number of current interrupt request (IRQ).
|
||||
/// \return interrupt ID number.
|
||||
IRQn_ID_t IRQ_GetActiveIRQ (void);
|
||||
|
||||
/// Get ID number of current fast interrupt request (FIQ).
|
||||
/// \return interrupt ID number.
|
||||
IRQn_ID_t IRQ_GetActiveFIQ (void);
|
||||
|
||||
/// Signal end of interrupt processing.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn);
|
||||
|
||||
/// Set interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Get interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 - interrupt is not pending, 1 - interrupt is pending.
|
||||
uint32_t IRQ_GetPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Clear interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_ClearPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Set interrupt priority value.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] priority interrupt priority value
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority);
|
||||
|
||||
/// Get interrupt priority.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriority (IRQn_ID_t irqn);
|
||||
|
||||
/// Set priority masking threshold.
|
||||
/// \param[in] priority priority masking threshold value
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriorityMask (uint32_t priority);
|
||||
|
||||
/// Get priority masking threshold
|
||||
/// \return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriorityMask (void);
|
||||
|
||||
/// Set priority grouping field split point
|
||||
/// \param[in] bits number of MSB bits included in the group priority field comparison
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriorityGroupBits (uint32_t bits);
|
||||
|
||||
/// Get priority grouping field split point
|
||||
/// \return current number of MSB bits included in the group priority field comparison with
|
||||
/// optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriorityGroupBits (void);
|
||||
|
||||
#endif // IRQ_CTRL_H_
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2009-2023 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS Core Version Definitions
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS-Core(M) Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< \brief CMSIS Core(M) version number */
|
||||
|
||||
/* CMSIS-Core(A) Version definitions */
|
||||
#define __CA_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(A) main version */
|
||||
#define __CA_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(A) sub version */
|
||||
#define __CA_CMSIS_VERSION ((__CA_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CA_CMSIS_VERSION_SUB ) /*!< \brief CMSIS-Core(A) version number */
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1451
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,161 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_armclang_r.h
|
||||
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
|
||||
* @version V6.0.0
|
||||
* @date 04. December 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_ARMCLANG_R_H
|
||||
#define __CMSIS_ARMCLANG_R_H
|
||||
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
|
||||
#ifndef __CMSIS_ARMCLANG_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV %1, sp \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr), "=r"(result) : : "memory"
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV sp, %1 \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr) : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
#endif /* __CMSIS_ARMCLANG_R_H */
|
||||
@@ -0,0 +1,161 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_clang_r.h
|
||||
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
|
||||
* @version V6.0.0
|
||||
* @date 04. December 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_CLANG_CORER_H
|
||||
#define __CMSIS_CLANG_CORER_H
|
||||
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
|
||||
#ifndef __CMSIS_CLANG_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV %1, sp \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr), "=r"(result) : : "memory"
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV sp, %1 \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr) : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
#endif /* __CMSIS_CLANG_COREA_H */
|
||||
@@ -0,0 +1,163 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_gcc_r.h
|
||||
* @brief CMSIS compiler GCC header file
|
||||
* @version V6.0.0
|
||||
* @date 4. August 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_GCC_R_H
|
||||
#define __CMSIS_GCC_R_H
|
||||
|
||||
#ifndef __CMSIS_GCC_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
/* ignore some GCC warnings */
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
||||
|
||||
|
||||
/** \defgroup CMSIS_Core_intrinsics CMSIS Core Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr = __get_CPSR();
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"CPS #0x1F \n"
|
||||
"MOV %0, sp " : "=r"(result) : : "memory"
|
||||
);
|
||||
__set_CPSR(cpsr);
|
||||
__ISB();
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr = __get_CPSR();
|
||||
__ASM volatile(
|
||||
"CPS #0x1F \n"
|
||||
"MOV sp, %0 " : : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
__set_CPSR(cpsr);
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
/*@} end of group CMSIS_Core_intrinsics */
|
||||
|
||||
#pragma GCC diagnostic pop
|
||||
|
||||
#endif /* __CMSIS_GCC_R_H */
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (c) 2017-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS Core(M) Context Management for Armv8-M TrustZone
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef TZ_CONTEXT_H
|
||||
#define TZ_CONTEXT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef TZ_MODULEID_T
|
||||
#define TZ_MODULEID_T
|
||||
/// \details Data type that identifies secure software modules called by a process.
|
||||
typedef uint32_t TZ_ModuleId_t;
|
||||
#endif
|
||||
|
||||
/// \details TZ Memory ID identifies an allocated memory slot.
|
||||
typedef uint32_t TZ_MemoryId_t;
|
||||
|
||||
/// Initialize secure context memory system
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_InitContextSystem_S (void);
|
||||
|
||||
/// Allocate context memory for calling secure software modules in TrustZone
|
||||
/// \param[in] module identifies software modules called from non-secure mode
|
||||
/// \return value != 0 id TrustZone memory slot identifier
|
||||
/// \return value 0 no memory available or internal error
|
||||
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
|
||||
|
||||
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Load secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Store secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
|
||||
|
||||
#endif // TZ_CONTEXT_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup BOARDS
|
||||
* @defgroup BOARD_RA6E2_FPB for the RA6E2-FPB board
|
||||
* @brief BSP for the RA6E2-FPB Board
|
||||
*
|
||||
* The RA6E2_FPB is a development kit for the Renesas R7FA6E2BB3CFM microcontroller in a LQFP64 package.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* BSP Board Specific Includes. */
|
||||
#include "board_init.h"
|
||||
#include "board_leds.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
#define BOARD_RA6E2_FPB
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @} (end defgroup BOARD_RA6E2_FPB) */
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BOARD_RA6E2_FPB
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
|
||||
#if defined(BOARD_RA6E2_FPB)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @brief Performs any initialization specific to this BSP.
|
||||
*
|
||||
* @param[in] p_args Pointer to arguments of the user's choice.
|
||||
**********************************************************************************************************************/
|
||||
void bsp_init (void * p_args)
|
||||
{
|
||||
FSP_PARAMETER_NOT_USED(p_args);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BOARD_RA6E2_FPB) */
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BOARD_RA6E2_FPB
|
||||
* @brief Board specific code for the RA6E2-FPB Board
|
||||
*
|
||||
* This include file is specific to the RA6E2-FPB board.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_INIT_H
|
||||
#define BOARD_INIT_H
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
void bsp_init(void * p_args);
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BOARD_RA6E2_FPB) */
|
||||
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BOARD_RA6E2_FPB_LEDS
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
#if defined(BOARD_RA6E2_FPB)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Array of LED IOPORT pins. */
|
||||
static const uint16_t g_bsp_prv_leds[] =
|
||||
{
|
||||
(uint16_t) BSP_IO_PORT_02_PIN_07, ///< LED1
|
||||
(uint16_t) BSP_IO_PORT_02_PIN_06, ///< LED2
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Structure with LED information for this board. */
|
||||
|
||||
const bsp_leds_t g_bsp_leds =
|
||||
{
|
||||
.led_count = (uint16_t) ((sizeof(g_bsp_prv_leds) / sizeof(g_bsp_prv_leds[0]))),
|
||||
.p_leds = &g_bsp_prv_leds[0]
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BOARD_RA6E2_FPB_LEDS) */
|
||||
@@ -0,0 +1,60 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup BOARD_RA6E2_FPB
|
||||
* @defgroup BOARD_RA6E2_FPB_LEDS Board LEDs
|
||||
* @brief LED information for this board.
|
||||
*
|
||||
* This is code specific to the FPB board. It includes info on the number of LEDs and which pins are they
|
||||
* are on.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_LEDS_H
|
||||
#define BOARD_LEDS_H
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Information on how many LEDs and what pins they are on. */
|
||||
typedef struct st_bsp_leds
|
||||
{
|
||||
uint16_t led_count; ///< The number of LEDs on this board
|
||||
uint16_t const * p_leds; ///< Pointer to an array of IOPORT pins for controlling LEDs
|
||||
} bsp_leds_t;
|
||||
|
||||
/** Available user-controllable LEDs on this board. These enums can be can be used to index into the array of LED pins
|
||||
* found in the bsp_leds_t structure. */
|
||||
typedef enum e_bsp_led
|
||||
{
|
||||
BSP_LED_LED1, ///< LED1
|
||||
BSP_LED_LED2, ///< LED2
|
||||
} bsp_led_t;
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Public Functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end defgroup BOARD_RA6E2_FPB_LEDS) */
|
||||
@@ -0,0 +1,101 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BSP_API_H
|
||||
#define BSP_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* FSP Common Includes. */
|
||||
#include "fsp_common_api.h"
|
||||
|
||||
/* Gets MCU configuration information. */
|
||||
#include "bsp_cfg.h"
|
||||
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
|
||||
/* Store warning settings for 'conversion' and 'sign-conversion' to as specified on command line. */
|
||||
#pragma GCC diagnostic push
|
||||
|
||||
/* CMSIS-CORE currently generates 2 warnings when compiling with GCC. One in core_cmInstr.h and one in core_cm4_simd.h.
|
||||
* We are not modifying these files so we will ignore these warnings temporarily. */
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#endif
|
||||
|
||||
/* Vector information for this project. This is generated by the tooling. */
|
||||
#include "../../src/bsp/mcu/all/bsp_exceptions.h"
|
||||
#include "vector_data.h"
|
||||
|
||||
/* CMSIS-CORE Renesas Device Files. Must come after bsp_feature.h, which is included in bsp_cfg.h. */
|
||||
#include "../../src/bsp/cmsis/Device/RENESAS/Include/renesas.h"
|
||||
#include "../../src/bsp/cmsis/Device/RENESAS/Include/system.h"
|
||||
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
|
||||
/* Restore warning settings for 'conversion' and 'sign-conversion' to as specified on command line. */
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
#if defined(BSP_API_OVERRIDE)
|
||||
#include BSP_API_OVERRIDE
|
||||
#else
|
||||
|
||||
/* BSP Common Includes. */
|
||||
#include "../../src/bsp/mcu/all/bsp_common.h"
|
||||
|
||||
/* BSP MCU Specific Includes. */
|
||||
#include "../../src/bsp/mcu/all/bsp_register_protection.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_irq.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_io.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_group_irq.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_clocks.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_module_stop.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_security.h"
|
||||
|
||||
/* Factory MCU information. */
|
||||
#include "../../inc/fsp_features.h"
|
||||
|
||||
/* BSP Common Includes (Other than bsp_common.h) */
|
||||
#include "../../src/bsp/mcu/all/bsp_delay.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_mcu_api.h"
|
||||
|
||||
#if __has_include("../../src/bsp/mcu/all/internal/bsp_internal.h")
|
||||
#include "../../src/bsp/mcu/all/internal/bsp_internal.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
fsp_err_t R_FSP_VersionGet(fsp_pack_version_t * const p_version);
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,192 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup RENESAS_SYSTEM_INTERFACES
|
||||
* @defgroup IOPORT_API I/O Port Interface
|
||||
* @brief Interface for accessing I/O ports and configuring I/O functionality.
|
||||
*
|
||||
* @section IOPORT_API_SUMMARY Summary
|
||||
* The IOPort shared interface provides the ability to access the IOPorts of a device at both bit and port level.
|
||||
* Port and pin direction can be changed.
|
||||
*
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_IOPORT_API_H
|
||||
#define R_IOPORT_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common error codes and definitions. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
#ifndef BSP_OVERRIDE_IOPORT_SIZE_T
|
||||
|
||||
/** IO port type used with ports */
|
||||
typedef uint16_t ioport_size_t; ///< IO port size
|
||||
#endif
|
||||
|
||||
/** Pin identifier and pin configuration value */
|
||||
typedef struct st_ioport_pin_cfg
|
||||
{
|
||||
uint32_t pin_cfg; ///< Pin configuration - Use ioport_cfg_options_t parameters to configure
|
||||
bsp_io_port_pin_t pin; ///< Pin identifier
|
||||
} ioport_pin_cfg_t;
|
||||
|
||||
/** Multiple pin configuration data for loading into registers by R_IOPORT_Open() */
|
||||
typedef struct st_ioport_cfg
|
||||
{
|
||||
uint16_t number_of_pins; ///< Number of pins for which there is configuration data
|
||||
ioport_pin_cfg_t const * p_pin_cfg_data; ///< Pin configuration data
|
||||
const void * p_extend; ///< Pointer to hardware extend configuration
|
||||
} ioport_cfg_t;
|
||||
|
||||
/** IOPORT control block. Allocate an instance specific control block to pass into the IOPORT API calls.
|
||||
*/
|
||||
typedef void ioport_ctrl_t;
|
||||
|
||||
/** IOPort driver structure. IOPort functions implemented at the HAL layer will follow this API. */
|
||||
typedef struct st_ioport_api
|
||||
{
|
||||
/** Initialize internal driver data and initial pin configurations. Called during startup. Do
|
||||
* not call this API during runtime. Use @ref ioport_api_t::pinsCfg for runtime reconfiguration of
|
||||
* multiple pins.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure. Must be declared by user. Elements set here.
|
||||
* @param[in] p_cfg Pointer to pin configuration data array.
|
||||
*/
|
||||
fsp_err_t (* open)(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
|
||||
|
||||
/** Close the API.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
**/
|
||||
fsp_err_t (* close)(ioport_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Configure multiple pins.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] p_cfg Pointer to pin configuration data array.
|
||||
*/
|
||||
fsp_err_t (* pinsCfg)(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
|
||||
|
||||
/** Configure settings for an individual pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] cfg Configuration options for the pin.
|
||||
*/
|
||||
fsp_err_t (* pinCfg)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg);
|
||||
|
||||
/** Read the event input data of the specified pin and return the level.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] p_pin_event Pointer to return the event data.
|
||||
*/
|
||||
fsp_err_t (* pinEventInputRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_event);
|
||||
|
||||
/** Write pin event data.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin event data is to be written to.
|
||||
* @param[in] pin_value Level to be written to pin output event.
|
||||
*/
|
||||
fsp_err_t (* pinEventOutputWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value);
|
||||
|
||||
/** Read level of a pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] p_pin_value Pointer to return the pin level.
|
||||
*/
|
||||
fsp_err_t (* pinRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_value);
|
||||
|
||||
/** Write specified level to a pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be written to.
|
||||
* @param[in] level State to be written to the pin.
|
||||
*/
|
||||
fsp_err_t (* pinWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level);
|
||||
|
||||
/** Set the direction of one or more pins on a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port being configured.
|
||||
* @param[in] direction_values Value controlling direction of pins on port.
|
||||
* @param[in] mask Mask controlling which pins on the port are to be configured.
|
||||
*/
|
||||
fsp_err_t (* portDirectionSet)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t direction_values,
|
||||
ioport_size_t mask);
|
||||
|
||||
/** Read captured event data for a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be read.
|
||||
* @param[in] p_event_data Pointer to return the event data.
|
||||
*/
|
||||
fsp_err_t (* portEventInputRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_event_data);
|
||||
|
||||
/** Write event output data for a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port event data will be written to.
|
||||
* @param[in] event_data Data to be written as event data to specified port.
|
||||
* @param[in] mask_value Each bit set to 1 in the mask corresponds to that bit's value in event data.
|
||||
* being written to port.
|
||||
*/
|
||||
fsp_err_t (* portEventOutputWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t event_data,
|
||||
ioport_size_t mask_value);
|
||||
|
||||
/** Read states of pins on the specified port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be read.
|
||||
* @param[in] p_port_value Pointer to return the port value.
|
||||
*/
|
||||
fsp_err_t (* portRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_port_value);
|
||||
|
||||
/** Write to multiple pins on a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be written to.
|
||||
* @param[in] value Value to be written to the port.
|
||||
* @param[in] mask Mask controlling which pins on the port are written to.
|
||||
*/
|
||||
fsp_err_t (* portWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask);
|
||||
} ioport_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_ioport_instance
|
||||
{
|
||||
ioport_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
ioport_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
ioport_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} ioport_instance_t;
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup IOPORT_API)
|
||||
**********************************************************************************************************************/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef FSP_VERSION_H
|
||||
#define FSP_VERSION_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Includes board and MCU related header files. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup RENESAS_COMMON
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** FSP pack major version. */
|
||||
#define FSP_VERSION_MAJOR (5U)
|
||||
|
||||
/** FSP pack minor version. */
|
||||
#define FSP_VERSION_MINOR (5U)
|
||||
|
||||
/** FSP pack patch version. */
|
||||
#define FSP_VERSION_PATCH (0U)
|
||||
|
||||
/** FSP pack version build number (currently unused). */
|
||||
#define FSP_VERSION_BUILD (0U)
|
||||
|
||||
/** Public FSP version name. */
|
||||
#define FSP_VERSION_STRING ("5.5.0")
|
||||
|
||||
/** Unique FSP version ID. */
|
||||
#define FSP_VERSION_BUILD_STRING ("Built with Renesas Advanced Flexible Software Package version 5.5.0")
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** FSP Pack version structure */
|
||||
typedef union st_fsp_pack_version
|
||||
{
|
||||
/** Version id */
|
||||
uint32_t version_id;
|
||||
|
||||
/**
|
||||
* Code version parameters, little endian order.
|
||||
*/
|
||||
struct version_id_b_s
|
||||
{
|
||||
uint8_t build; ///< Build version of FSP Pack
|
||||
uint8_t patch; ///< Patch version of FSP Pack
|
||||
uint8_t minor; ///< Minor version of FSP Pack
|
||||
uint8_t major; ///< Major version of FSP Pack
|
||||
} version_id_b;
|
||||
} fsp_pack_version_t;
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,150 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/* Ensure Renesas MCU variation definitions are included to ensure MCU
|
||||
* specific register variations are handled correctly. */
|
||||
#ifndef BSP_FEATURE_H
|
||||
#error "INTERNAL ERROR: bsp_feature.h must be included before renesas.h."
|
||||
#endif
|
||||
|
||||
/** @addtogroup Renesas
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RA
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef RA_H
|
||||
#define RA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "cmsis_compiler.h"
|
||||
|
||||
/** @addtogroup Configuration_of_CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* =========================================================================================================================== */
|
||||
/* ================ Interrupt Number Definition ================ */
|
||||
/* =========================================================================================================================== */
|
||||
/* IRQn_Type is provided in bsp_exceptions.h. Vectors generated by the FSP Configuration tool are in vector_data.h */
|
||||
|
||||
/** @} */ /* End of group Configuration_of_CMSIS */
|
||||
|
||||
/* =========================================================================================================================== */
|
||||
/* ================ Processor and Core Peripheral Section ================ */
|
||||
/* =========================================================================================================================== */
|
||||
|
||||
#if BSP_MCU_GROUP_RA0E1
|
||||
#include "R7FA0E107.h"
|
||||
#elif BSP_MCU_GROUP_RA2A1
|
||||
#include "R7FA2A1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA2A2
|
||||
#include "R7FA2A2AD.h"
|
||||
#elif BSP_MCU_GROUP_RA2E1
|
||||
#include "R7FA2E1A9.h"
|
||||
#elif BSP_MCU_GROUP_RA2E2
|
||||
#include "R7FA2E2A7.h"
|
||||
#elif BSP_MCU_GROUP_RA2E3
|
||||
#include "R7FA2E307.h"
|
||||
#elif BSP_MCU_GROUP_RA2L1
|
||||
#include "R7FA2L1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA4E1
|
||||
#include "R7FA4E10D.h"
|
||||
#elif BSP_MCU_GROUP_RA4E2
|
||||
#include "R7FA4E2B9.h"
|
||||
#elif BSP_MCU_GROUP_RA4M1
|
||||
#include "R7FA4M1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA4M2
|
||||
#include "R7FA4M2AD.h"
|
||||
#elif BSP_MCU_GROUP_RA4M3
|
||||
#include "R7FA4M3AF.h"
|
||||
#elif BSP_MCU_GROUP_RA4T1
|
||||
#include "R7FA4T1BB.h"
|
||||
#elif BSP_MCU_GROUP_RA4W1
|
||||
#include "R7FA4W1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA6E1
|
||||
#include "R7FA6E10F.h"
|
||||
#elif BSP_MCU_GROUP_RA6E2
|
||||
#include "R7FA6E2BB.h"
|
||||
#elif BSP_MCU_GROUP_RA6M1
|
||||
#include "R7FA6M1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA6M2
|
||||
#include "R7FA6M2AF.h"
|
||||
#elif BSP_MCU_GROUP_RA6M3
|
||||
#include "R7FA6M3AH.h"
|
||||
#elif BSP_MCU_GROUP_RA6M4
|
||||
#include "R7FA6M4AF.h"
|
||||
#elif BSP_MCU_GROUP_RA6M5
|
||||
#include "R7FA6M5BH.h"
|
||||
#elif BSP_MCU_GROUP_RA6T1
|
||||
#include "R7FA6T1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA6T2
|
||||
#include "R7FA6T2BD.h"
|
||||
#elif BSP_MCU_GROUP_RA6T3
|
||||
#include "R7FA6T3BB.h"
|
||||
#elif BSP_MCU_GROUP_RA8M1
|
||||
#include "R7FA8M1AH.h"
|
||||
#elif BSP_MCU_GROUP_RA8D1
|
||||
#include "R7FA8D1BH.h"
|
||||
#elif BSP_MCU_GROUP_RA8T1
|
||||
#include "R7FA8T1AH.h"
|
||||
#else
|
||||
#if __has_include("renesas_internal.h")
|
||||
#include "renesas_internal.h"
|
||||
#else
|
||||
#warning "Unsupported MCU"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ARM has advised to no longer use the __ARM_ARCH_8_1M_MAIN__ type macro and to instead use the __ARM_ARCH and __ARM_ARCH_ISA_THUMB
|
||||
* macros for differentiating architectures. However, with all of our toolchains, neither paradigm is being correctly produced for Cortex-M85
|
||||
* and thus we still need a workaround. Below is a summary of the current macros produced by each toolchain for CM85:
|
||||
*
|
||||
* | Toolchain | __ARM_ARCH | _ARM_ARCH_xx__ |
|
||||
* |-----------|------------|------------------------|
|
||||
* | GCC | 8 | __ARM_ARCH_8M_MAIN__ |
|
||||
* | LLVM | 8 | __ARM_ARCH_8_1M_MAIN__ |
|
||||
* | AC6 | 8 | __ARM_ARCH_8_1M_MAIN__ |
|
||||
* | IAR | 801 | __ARM_ARCH_8M_MAIN__ |
|
||||
*
|
||||
* The expected output for CM85 should be __ARM_ARCH == 801, __ARM_ARCH_ISA_THUMB == 2, and __ARM_ARCH_8_1M_MAIN__
|
||||
*
|
||||
* IAR is currently the only toolchain producing the correct __ARM_ARCH value.
|
||||
*
|
||||
*- See https://github.com/ARM-software/CMSIS_6/issues/159
|
||||
*/
|
||||
#if BSP_CFG_MCU_PART_SERIES == 8 && !defined(__ICCARM__) && BSP_CFG_CPU_CORE != 1
|
||||
#undef __ARM_ARCH
|
||||
#define __ARM_ARCH 801
|
||||
#endif
|
||||
|
||||
#if (__ARM_ARCH == 7) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M4
|
||||
#elif (__ARM_ARCH == 8) && (__ARM_ARCH_ISA_THUMB == 1)
|
||||
#define RENESAS_CORTEX_M23
|
||||
#elif (__ARM_ARCH == 8) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M33
|
||||
#elif (__ARM_ARCH == 801) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M85
|
||||
#else
|
||||
#warning Unsupported Architecture
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RA_H */
|
||||
|
||||
/** @} */ /* End of group RA */
|
||||
|
||||
/** @} */ /* End of group Renesas */
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_RENESAS_ARM_H
|
||||
#define SYSTEM_RENESAS_ARM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern uint32_t SystemCoreClock; /** System Clock Frequency (Core Clock) */
|
||||
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the System and update the SystemCoreClock variable.
|
||||
*/
|
||||
extern void SystemInit(void);
|
||||
|
||||
/**
|
||||
* Update SystemCoreClock variable
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Updates the SystemCoreClock with current core Clock
|
||||
* retrieved from cpu registers.
|
||||
*/
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,143 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
#if BSP_TZ_SECURE_BUILD
|
||||
#define BSP_TZ_STACK_SEAL_SIZE (8U)
|
||||
#else
|
||||
#define BSP_TZ_STACK_SEAL_SIZE (0U)
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Defines function pointers to be used with vector table. */
|
||||
typedef void (* exc_ptr_t)(void);
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
void Reset_Handler(void);
|
||||
void Default_Handler(void);
|
||||
int32_t main(void);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* MCU starts executing here out of reset. Main stack pointer is set up already.
|
||||
**********************************************************************************************************************/
|
||||
BSP_SECTION_FLASH_GAP void Reset_Handler (void)
|
||||
{
|
||||
/* Initialize system using BSP. */
|
||||
SystemInit();
|
||||
|
||||
/* Call user application. */
|
||||
#ifdef __ARMCC_VERSION
|
||||
main();
|
||||
#elif defined(__GNUC__)
|
||||
extern int entry(void);
|
||||
entry();
|
||||
#endif
|
||||
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* Infinite Loop. */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* Default exception handler.
|
||||
**********************************************************************************************************************/
|
||||
BSP_SECTION_FLASH_GAP void Default_Handler (void)
|
||||
{
|
||||
/** A error has occurred. The user will need to investigate the cause. Common problems are stack corruption
|
||||
* or use of an invalid pointer. Use the Fault Status window in e2 studio or manually check the fault status
|
||||
* registers for more information.
|
||||
*/
|
||||
BSP_CFG_HANDLE_UNRECOVERABLE_ERROR(0);
|
||||
}
|
||||
|
||||
/* Main stack */
|
||||
static uint8_t g_main_stack[BSP_CFG_STACK_MAIN_BYTES + BSP_TZ_STACK_SEAL_SIZE] BSP_ALIGN_VARIABLE(BSP_STACK_ALIGNMENT)
|
||||
BSP_PLACE_IN_SECTION(BSP_SECTION_STACK);
|
||||
|
||||
/* Heap */
|
||||
#if (BSP_CFG_HEAP_BYTES > 0)
|
||||
|
||||
BSP_DONT_REMOVE static uint8_t g_heap[BSP_CFG_HEAP_BYTES] BSP_ALIGN_VARIABLE(BSP_STACK_ALIGNMENT) \
|
||||
BSP_PLACE_IN_SECTION(BSP_SECTION_HEAP);
|
||||
#endif
|
||||
|
||||
/* All system exceptions in the vector table are weak references to Default_Handler. If the user wishes to handle
|
||||
* these exceptions in their code they should define their own function with the same name.
|
||||
*/
|
||||
#if defined(__ICCARM__)
|
||||
#define WEAK_REF_ATTRIBUTE
|
||||
|
||||
#pragma weak HardFault_Handler = Default_Handler
|
||||
#pragma weak MemManage_Handler = Default_Handler
|
||||
#pragma weak BusFault_Handler = Default_Handler
|
||||
#pragma weak UsageFault_Handler = Default_Handler
|
||||
#pragma weak SecureFault_Handler = Default_Handler
|
||||
#pragma weak SVC_Handler = Default_Handler
|
||||
#pragma weak DebugMon_Handler = Default_Handler
|
||||
#pragma weak PendSV_Handler = Default_Handler
|
||||
#pragma weak SysTick_Handler = Default_Handler
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
#define WEAK_REF_ATTRIBUTE __attribute__((weak, alias("Default_Handler")))
|
||||
#endif
|
||||
|
||||
void NMI_Handler(void); // NMI has many sources and is handled by BSP
|
||||
void HardFault_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void MemManage_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void BusFault_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void UsageFault_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void SecureFault_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void SVC_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void DebugMon_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void PendSV_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
void SysTick_Handler(void) WEAK_REF_ATTRIBUTE;
|
||||
|
||||
/* Vector table. */
|
||||
BSP_DONT_REMOVE const exc_ptr_t __Vectors[BSP_CORTEX_VECTOR_TABLE_ENTRIES] BSP_PLACE_IN_SECTION(
|
||||
BSP_SECTION_FIXED_VECTORS) =
|
||||
{
|
||||
(exc_ptr_t) (&g_main_stack[0] + BSP_CFG_STACK_MAIN_BYTES), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* NMI Handler */
|
||||
HardFault_Handler, /* Hard Fault Handler */
|
||||
MemManage_Handler, /* MPU Fault Handler */
|
||||
BusFault_Handler, /* Bus Fault Handler */
|
||||
UsageFault_Handler, /* Usage Fault Handler */
|
||||
SecureFault_Handler, /* Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* SVCall Handler */
|
||||
DebugMon_Handler, /* Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* PendSV Handler */
|
||||
SysTick_Handler, /* SysTick Handler */
|
||||
};
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BOARD_SDRAM_H
|
||||
#define BOARD_SDRAM_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* DEPRECATED: This is a temporary alias to the new SDRAM support in bsp_sdram.c. It will be removed in FSP v6.0.0.
|
||||
* It is only present if the new support has not been enabled. */
|
||||
#if 1 != BSP_CFG_SDRAM_ENABLED
|
||||
#define bsp_sdram_init() R_BSP_SdramInit(true)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,109 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BSP_COMPILER_SUPPORT_H
|
||||
#define BSP_COMPILER_SUPPORT_H
|
||||
|
||||
#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
|
||||
#include "arm_cmse.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
#if defined(__ARMCC_VERSION) /* AC6 compiler */
|
||||
|
||||
/* The AC6 linker requires uninitialized code to be placed in a section that starts with ".bss." Without this, load
|
||||
* memory (ROM) is reserved unnecessarily. */
|
||||
#define BSP_UNINIT_SECTION_PREFIX ".bss"
|
||||
#ifndef BSP_SECTION_HEAP
|
||||
#define BSP_SECTION_HEAP BSP_UNINIT_SECTION_PREFIX ".heap"
|
||||
#endif
|
||||
#define BSP_DONT_REMOVE __attribute__((used))
|
||||
#define BSP_ATTRIBUTE_STACKLESS __attribute__((naked))
|
||||
#define BSP_FORCE_INLINE __attribute__((always_inline))
|
||||
#elif defined(__GNUC__) /* GCC compiler */
|
||||
#define BSP_UNINIT_SECTION_PREFIX
|
||||
#ifndef BSP_SECTION_HEAP
|
||||
#define BSP_SECTION_HEAP ".heap"
|
||||
#endif
|
||||
#define BSP_DONT_REMOVE
|
||||
#define BSP_ATTRIBUTE_STACKLESS __attribute__((naked))
|
||||
#define BSP_FORCE_INLINE __attribute__((always_inline))
|
||||
#elif defined(__ICCARM__) /* IAR compiler */
|
||||
#define BSP_UNINIT_SECTION_PREFIX
|
||||
#ifndef BSP_SECTION_HEAP
|
||||
#define BSP_SECTION_HEAP "HEAP"
|
||||
#endif
|
||||
#define BSP_DONT_REMOVE __root
|
||||
#define BSP_ATTRIBUTE_STACKLESS __stackless
|
||||
#define BSP_FORCE_INLINE _Pragma("inline=forced")
|
||||
#endif
|
||||
|
||||
#ifndef BSP_SECTION_STACK
|
||||
#define BSP_SECTION_STACK BSP_UNINIT_SECTION_PREFIX ".stack"
|
||||
#endif
|
||||
#ifndef BSP_SECTION_FLASH_GAP
|
||||
#define BSP_SECTION_FLASH_GAP
|
||||
#endif
|
||||
#define BSP_SECTION_NOINIT BSP_UNINIT_SECTION_PREFIX ".noinit"
|
||||
#define BSP_SECTION_FIXED_VECTORS ".fixed_vectors"
|
||||
#define BSP_SECTION_APPLICATION_VECTORS ".application_vectors"
|
||||
#define BSP_SECTION_ROM_REGISTERS ".rom_registers"
|
||||
#define BSP_SECTION_ID_CODE ".id_code"
|
||||
|
||||
/* Compiler neutral macros. */
|
||||
#define BSP_PLACE_IN_SECTION(x) __attribute__((section(x))) __attribute__((__used__))
|
||||
|
||||
#define BSP_ALIGN_VARIABLE(x) __attribute__((aligned(x)))
|
||||
|
||||
#define BSP_PACKED __attribute__((aligned(1))) // DEPRECATED
|
||||
|
||||
#define BSP_WEAK_REFERENCE __attribute__((weak))
|
||||
|
||||
/** Stacks (and heap) must be sized and aligned to an integer multiple of this number. */
|
||||
#define BSP_STACK_ALIGNMENT (8)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* TrustZone definitions
|
||||
**********************************************************************************************************************/
|
||||
#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) && !defined(__clang_analyzer__)
|
||||
#if defined(__ICCARM__) /* IAR compiler */
|
||||
#define BSP_CMSE_NONSECURE_CALL __cmse_nonsecure_call
|
||||
#define BSP_CMSE_NONSECURE_ENTRY __cmse_nonsecure_entry
|
||||
#else
|
||||
#define BSP_CMSE_NONSECURE_CALL __attribute__((cmse_nonsecure_call))
|
||||
#define BSP_CMSE_NONSECURE_ENTRY __attribute__((cmse_nonsecure_entry))
|
||||
#endif
|
||||
#else
|
||||
#define BSP_CMSE_NONSECURE_CALL
|
||||
#define BSP_CMSE_NONSECURE_ENTRY
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @} (end of addtogroup BSP_MCU) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,73 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BSP_DELAY_H
|
||||
#define BSP_DELAY_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
#include "bsp_compiler_support.h"
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* The number of cycles required per software delay loop. */
|
||||
#ifndef BSP_DELAY_LOOP_CYCLES
|
||||
#if defined(RENESAS_CORTEX_M85)
|
||||
|
||||
/* On M85 cores, code alignment can affect execution speed. bsp_prv_software_delay_loop is aligned to 8 bytes for
|
||||
* GCC and AC6, but IAR does not support aligning code. The below ensures the correct loop cycle count is used in
|
||||
* this case. */
|
||||
#if defined(__ICCARM__)
|
||||
#define BSP_DELAY_LOOP_CYCLES (((uint32_t) bsp_prv_software_delay_loop & 0x6) ? 2 : 1)
|
||||
#else
|
||||
#define BSP_DELAY_LOOP_CYCLES (1)
|
||||
#endif
|
||||
#else
|
||||
#define BSP_DELAY_LOOP_CYCLES (4)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Calculates the number of delay loops to pass to bsp_prv_software_delay_loop to achieve at least the requested cycle
|
||||
* count delay. This is 1 loop longer than optimal if cycles is a multiple of BSP_DELAY_LOOP_CYCLES, but it ensures
|
||||
* the requested number of loops is at least 1 since bsp_prv_software_delay_loop cannot be called with a loop count
|
||||
* of 0. */
|
||||
#define BSP_DELAY_LOOPS_CALCULATE(cycles) (((cycles) / BSP_DELAY_LOOP_CYCLES) + 1U)
|
||||
|
||||
/** Available delay units for R_BSP_SoftwareDelay(). These are ultimately used to calculate a total # of microseconds */
|
||||
typedef enum
|
||||
{
|
||||
BSP_DELAY_UNITS_SECONDS = 1000000, ///< Requested delay amount is in seconds
|
||||
BSP_DELAY_UNITS_MILLISECONDS = 1000, ///< Requested delay amount is in milliseconds
|
||||
BSP_DELAY_UNITS_MICROSECONDS = 1 ///< Requested delay amount is in microseconds
|
||||
} bsp_delay_units_t;
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
BSP_ATTRIBUTE_STACKLESS void bsp_prv_software_delay_loop(uint32_t loop_cnt);
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
#ifndef BSP_EXCEPTIONS_H
|
||||
#define BSP_EXCEPTIONS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* This list includes only Arm standard exceptions. Renesas interrupts are defined in vector_data.h. */
|
||||
typedef enum IRQn
|
||||
{
|
||||
Reset_IRQn = -15, /* 1 Reset Vector invoked on Power up and warm reset */
|
||||
NonMaskableInt_IRQn = -14, /* 2 Non maskable Interrupt cannot be stopped or preempted */
|
||||
HardFault_IRQn = -13, /* 3 Hard Fault all classes of Fault */
|
||||
MemoryManagement_IRQn = -12, /* 4 Memory Management MPU mismatch, including Access Violation and No Match */
|
||||
BusFault_IRQn = -11, /* 5 Bus Fault Pre-Fetch-, Memory Access, other address/memory Fault */
|
||||
UsageFault_IRQn = -10, /* 6 Usage Fault i.e. Undef Instruction, Illegal State Transition */
|
||||
SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */
|
||||
SVCall_IRQn = -5, /* 11 System Service Call via SVC instruction */
|
||||
DebugMonitor_IRQn = -4, /* 12 Debug Monitor */
|
||||
PendSV_IRQn = -2, /* 14 Pendable request for system service */
|
||||
SysTick_IRQn = -1, /* 15 System Tick Timer */
|
||||
} IRQn_Type;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,122 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if (BSP_FEATURE_ICU_NMIER_MAX_INDEX > 15U)
|
||||
#define BSP_PRV_NMIER_T uint32_t
|
||||
#else
|
||||
#define BSP_PRV_NMIER_T uint16_t
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** This array holds callback functions. */
|
||||
bsp_grp_irq_cb_t g_bsp_group_irq_sources[BSP_FEATURE_ICU_NMIER_MAX_INDEX + 1] BSP_SECTION_EARLY_INIT;
|
||||
|
||||
void NMI_Handler(void);
|
||||
static void bsp_group_irq_call(bsp_grp_irq_t irq);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* Calls the callback function for an interrupt if a callback has been registered.
|
||||
*
|
||||
* @param[in] irq Which interrupt to check and possibly call.
|
||||
*
|
||||
* @retval FSP_SUCCESS Callback was called.
|
||||
* @retval FSP_ERR_INVALID_ARGUMENT No valid callback has been registered for this interrupt source.
|
||||
*
|
||||
* @warning This function is called from within an interrupt
|
||||
**********************************************************************************************************************/
|
||||
BSP_SECTION_FLASH_GAP static void bsp_group_irq_call (bsp_grp_irq_t irq)
|
||||
{
|
||||
/** Check for valid callback */
|
||||
if (NULL != g_bsp_group_irq_sources[irq])
|
||||
{
|
||||
/** Callback has been found. Call it. */
|
||||
g_bsp_group_irq_sources[irq](irq);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* Register a callback function for supported interrupts. If NULL is passed for the callback argument then any
|
||||
* previously registered callbacks are unregistered.
|
||||
*
|
||||
* @param[in] irq Interrupt for which to register a callback.
|
||||
* @param[in] p_callback Pointer to function to call when interrupt occurs.
|
||||
*
|
||||
* @retval FSP_SUCCESS Callback registered
|
||||
* @retval FSP_ERR_ASSERTION Callback pointer is NULL
|
||||
**********************************************************************************************************************/
|
||||
BSP_SECTION_FLASH_GAP fsp_err_t R_BSP_GroupIrqWrite (bsp_grp_irq_t irq, void (* p_callback)(bsp_grp_irq_t irq))
|
||||
{
|
||||
#if BSP_CFG_PARAM_CHECKING_ENABLE
|
||||
|
||||
/* Check pointer for NULL value. */
|
||||
FSP_ASSERT(p_callback);
|
||||
#endif
|
||||
|
||||
/* Register callback. */
|
||||
g_bsp_group_irq_sources[irq] = p_callback;
|
||||
|
||||
return FSP_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* Non-maskable interrupt handler. This exception is defined by the BSP, unlike other system exceptions, because
|
||||
* there are many sources that map to the NMI exception.
|
||||
**********************************************************************************************************************/
|
||||
BSP_SECTION_FLASH_GAP void NMI_Handler (void)
|
||||
{
|
||||
/* NMISR is masked by NMIER to prevent iterating over NMI status flags that are not enabled. */
|
||||
BSP_PRV_NMIER_T nmier = R_ICU->NMIER;
|
||||
BSP_PRV_NMIER_T nmisr = R_ICU->NMISR & nmier;
|
||||
|
||||
/* Loop over all NMI status flags */
|
||||
for (bsp_grp_irq_t irq = BSP_GRP_IRQ_IWDT_ERROR; irq <= (bsp_grp_irq_t) (BSP_FEATURE_ICU_NMIER_MAX_INDEX); irq++)
|
||||
{
|
||||
/* If the current irq status register is set call the irq callback. */
|
||||
if (0U != (nmisr & (1U << irq)))
|
||||
{
|
||||
(void) bsp_group_irq_call(irq);
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear status flags that have been handled. */
|
||||
R_ICU->NMICLR = nmisr;
|
||||
|
||||
#if BSP_CFG_MCU_PART_SERIES == 8
|
||||
|
||||
/* Wait for NMISR to be cleared before exiting the ISR to prevent the IRQ from being regenerated.
|
||||
* See section "13.2.12 NMICLR : Non-Maskable Interrupt Status Clear Register" in the RA8M1 manual
|
||||
* R01UH0994EJ0100 */
|
||||
FSP_HARDWARE_REGISTER_WAIT((R_ICU->NMISR & nmisr), 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
@@ -0,0 +1,69 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BSP_GROUP_IRQ_H
|
||||
#define BSP_GROUP_IRQ_H
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BSP_OVERRIDE_GROUP_IRQ_T
|
||||
|
||||
/** Which interrupts can have callbacks registered. */
|
||||
typedef enum e_bsp_grp_irq
|
||||
{
|
||||
BSP_GRP_IRQ_IWDT_ERROR = 0, ///< IWDT underflow/refresh error has occurred
|
||||
BSP_GRP_IRQ_WDT_ERROR = 1, ///< WDT underflow/refresh error has occurred
|
||||
BSP_GRP_IRQ_LVD1 = 2, ///< Voltage monitoring 1 interrupt
|
||||
BSP_GRP_IRQ_LVD2 = 3, ///< Voltage monitoring 2 interrupt
|
||||
BSP_GRP_IRQ_VBATT = 4, ///< VBATT monitor interrupt
|
||||
BSP_GRP_IRQ_OSC_STOP_DETECT = 6, ///< Oscillation stop is detected
|
||||
BSP_GRP_IRQ_NMI_PIN = 7, ///< NMI Pin interrupt
|
||||
BSP_GRP_IRQ_RAM_PARITY = 8, ///< RAM Parity Error
|
||||
BSP_GRP_IRQ_RAM_ECC = 9, ///< RAM ECC Error
|
||||
BSP_GRP_IRQ_MPU_BUS_SLAVE = 10, ///< MPU Bus Slave Error
|
||||
BSP_GRP_IRQ_MPU_BUS_MASTER = 11, ///< MPU Bus Master Error
|
||||
BSP_GRP_IRQ_MPU_STACK = 12, ///< MPU Stack Error
|
||||
BSP_GRP_IRQ_TRUSTZONE = 13, ///< MPU Stack Error
|
||||
BSP_GRP_IRQ_CACHE_PARITY = 15, ///< MPU Stack Error
|
||||
} bsp_grp_irq_t;
|
||||
|
||||
#endif
|
||||
|
||||
/* Callback type. */
|
||||
typedef void (* bsp_grp_irq_cb_t)(bsp_grp_irq_t irq);
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Public functions defined in bsp.h */
|
||||
void bsp_group_interrupt_open(void); // Used internally by BSP
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "bsp_guard.h"
|
||||
|
||||
/* Only the secure project has nonsecure callable functions. */
|
||||
#if BSP_TZ_SECURE_BUILD
|
||||
|
||||
/* If the CGG Security Attribution is configured to secure access only. */
|
||||
#if BSP_CFG_CLOCKS_SECURE == 1
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* Set the callback used by the secure project to notify the nonsecure project when the clock settings have changed.
|
||||
*
|
||||
* @retval FSP_SUCCESS Callback set.
|
||||
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
|
||||
**********************************************************************************************************************/
|
||||
BSP_CMSE_NONSECURE_ENTRY fsp_err_t R_BSP_ClockUpdateCallbackSet (bsp_clock_update_callback_t p_callback,
|
||||
bsp_clock_update_callback_args_t * p_callback_memory)
|
||||
{
|
||||
bsp_clock_update_callback_t p_callback_checked =
|
||||
(bsp_clock_update_callback_t) cmse_check_address_range((void *) p_callback, sizeof(void *), CMSE_AU_NONSECURE);
|
||||
|
||||
bsp_clock_update_callback_args_t * p_callback_memory_checked =
|
||||
(bsp_clock_update_callback_args_t *) cmse_check_address_range(p_callback_memory,
|
||||
sizeof(bsp_clock_update_callback_args_t),
|
||||
CMSE_AU_NONSECURE);
|
||||
FSP_ASSERT(p_callback == p_callback_checked);
|
||||
FSP_ASSERT(p_callback_memory == p_callback_memory_checked);
|
||||
|
||||
r_bsp_clock_update_callback_set(p_callback_checked, p_callback_memory_checked);
|
||||
|
||||
return FSP_SUCCESS;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BSP_GUARD_H
|
||||
#define BSP_GUARD_H
|
||||
|
||||
#include "bsp_api.h"
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
#if BSP_TZ_SECURE_BUILD || BSP_TZ_NONSECURE_BUILD
|
||||
BSP_CMSE_NONSECURE_ENTRY fsp_err_t R_BSP_ClockUpdateCallbackSet(bsp_clock_update_callback_t p_callback,
|
||||
bsp_clock_update_callback_args_t * p_callback_memory);
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
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Reference in New Issue
Block a user