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[bsp][yichip] add yc3122-pos (#7526)
Co-authored-by: supperthomas <78900636@qq.com>
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zhiqiandengandsupperthomas authored and 
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@@ -63,6 +63,7 @@ jobs:
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- "at32/at32f425-start"
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- "at32/at32f435-start"
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- "at32/at32f437-start"
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- "yichip/yc3122-pos"
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- "hc32/ev_hc32f4a0_lqfp176"
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- "hc32/ev_hc32f460_lqfp100_v2"
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- "hc32l196"
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@@ -0,0 +1,27 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config SOC_YC3122
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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source "drivers/Kconfig"
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@@ -0,0 +1,9 @@
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# files format check exclude path, please follow the instructions below to modify;
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# If you need to exclude an entire folder, add the folder path in dir_path;
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# If you need to exclude a file, add the path to the file in file_path.
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dir_path:
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- CMSIS
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- core
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- sdk
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- startup
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@@ -0,0 +1,79 @@
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/**************************************************************************//**
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* @file system_<Device>.h
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* @brief CMSIS Cortex-M# Device Peripheral Access Layer Header File for
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* Device <Device>
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* @version V3.10
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* @date 23. November 2012
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*
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* @note
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*
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******************************************************************************/
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/* Copyright (c) 2012 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
|
||||
specific prior written permission.
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*
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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#ifndef SYSTEM_YC3122_H /* ToDo: replace '<Device>' with your device name */
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#define SYSTEM_YC3122_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "yc3122.h"
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#include "type.h"
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#include "rom_api.h"
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SYSTEM_<Device>_H */
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/**************************************************************************//**
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* @file system_<Device>.c
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* @brief CMSIS Cortex-M# Device Peripheral Access Layer Source File for
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* Device <Device>
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* @version V3.10
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* @date 23. November 2012
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*
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* @note
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*
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******************************************************************************/
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/* Copyright (c) 2012 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
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||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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#include <stdint.h>
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#include "system_yc3122.h"
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/*----------------------------------------------------------------------------
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DEFINES
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*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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/* ToDo: add here your necessary defines for device initialization
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following is an example for different system frequencies */
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#define __HSI (192000000UL)
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#define __SYSTEM_CLOCK (__HSI / 4)
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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/* ToDo: initialize SystemCoreClock with the system core clock frequency value
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achieved after system intitialization.
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This means system core clock frequency after call to SystemInit() */
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uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/
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/*----------------------------------------------------------------------------
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Clock functions
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*----------------------------------------------------------------------------*/
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void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
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{
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/* ToDo: add code to calculate the system frequency based upon the current
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register settings.
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This function can be used to retrieve the system core clock frequeny
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after user changed register sittings. */
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SystemCoreClock = __SYSTEM_CLOCK;
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}
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System.
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*/
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void SystemInit (void)
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{
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/* ToDo: add code to initialize the system
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do not use global variables because this function is called before
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reaching pre-main. RW section maybe overwritten afterwards. */
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/* Write access code "0x55->0xaa->0x17" to set or clear "access_en" */
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MLPM->ACCESS_CODE.reg = 0x55;
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MLPM->ACCESS_CODE.reg = 0xaa;
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MLPM->ACCESS_CODE.reg = 0x17;
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if (MLPM->ACCESS_EN.reg != ENABLE)
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{
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MLPM->ACCESS_EN.reg = ENABLE;
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}
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MLPM->BAKEUP_REG1.reg = 0xaaaaaaaa;
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}
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/**************************************************************************//**
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* @file cmsis_version.h
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* @brief CMSIS Core(M) Version definitions
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* @version V5.0.2
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* @date 19. April 2017
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******************************************************************************/
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/*
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* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined ( __ICCARM__ )
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#pragma system_include /* treat file as system include file for MISRA check */
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#elif defined (__clang__)
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#pragma clang system_header /* treat file as system include file */
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#endif
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#ifndef __CMSIS_VERSION_H
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#define __CMSIS_VERSION_H
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/* CMSIS Version definitions */
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#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
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#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
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#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
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__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
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#endif
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/******************************************************************************
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* @file tz_context.h
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* @brief Context Management for Armv8-M TrustZone
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* @version V1.0.1
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* @date 10. January 2018
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******************************************************************************/
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/*
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* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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||||
* limitations under the License.
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*/
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#if defined ( __ICCARM__ )
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#pragma system_include /* treat file as system include file for MISRA check */
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#elif defined (__clang__)
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#pragma clang system_header /* treat file as system include file */
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#endif
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#ifndef TZ_CONTEXT_H
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#define TZ_CONTEXT_H
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#include <stdint.h>
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#ifndef TZ_MODULEID_T
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#define TZ_MODULEID_T
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/// \details Data type that identifies secure software modules called by a process.
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typedef uint32_t TZ_ModuleId_t;
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#endif
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/// \details TZ Memory ID identifies an allocated memory slot.
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typedef uint32_t TZ_MemoryId_t;
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/// Initialize secure context memory system
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/// \return execution status (1: success, 0: error)
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uint32_t TZ_InitContextSystem_S (void);
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/// Allocate context memory for calling secure software modules in TrustZone
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/// \param[in] module identifies software modules called from non-secure mode
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/// \return value != 0 id TrustZone memory slot identifier
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/// \return value 0 no memory available or internal error
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TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
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/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
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/// \param[in] id TrustZone memory slot identifier
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/// \return execution status (1: success, 0: error)
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uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
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/// Load secure context (called on RTOS thread context switch)
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/// \param[in] id TrustZone memory slot identifier
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/// \return execution status (1: success, 0: error)
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uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
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/// Store secure context (called on RTOS thread context switch)
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/// \param[in] id TrustZone memory slot identifier
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/// \return execution status (1: success, 0: error)
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uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
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#endif // TZ_CONTEXT_H
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from building import *
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import rtconfig
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import os
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cwd = GetCurrentDir()
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path_sdk = os.path.join(cwd,'sdk')
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path_core = os.path.join(cwd,'core')
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path_cmin = os.path.join(cwd,'CMSIS','Include')
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path_cmde = os.path.join(cwd,'CMSIS','Device','YICHIP','YC3122')
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src = Glob('sdk/*.c')
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CPPPATH = [path_sdk,path_core,path_cmin,os.path.join(path_cmde,'Include'),cwd]
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src += Glob(path_cmde + '/Source/Templates/*.c')
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src += ['core/system.c']
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if rtconfig.PLATFORM in ['gcc']:
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src += ['sdk/libyc_qspi.a']
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elif rtconfig.PLATFORM in ['armcc', 'armclang']:
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src += ['sdk/yc_qspi.lib']
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if rtconfig.PLATFORM in ['gcc']:
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src += [path_cmde + '/Source/Templates/gcc/startup_yc3122.S']
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elif rtconfig.PLATFORM in ['armcc', 'armclang']:
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src += [path_cmde + '/Source/Templates/arm/startup_yc3122.s']
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elif rtconfig.PLATFORM in ['iccarm']:
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src += [path_cmde + '/Source/Templates/iar/startup_yc3122.s']
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group = DefineGroup('Libraries', src, depend = [''],CPPPATH = CPPPATH, CPPDEFINES = ['__USE_YC_M0__'])
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Return('group')
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/*
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* Copyright (c) 2006-2020, YICHIP Development Team
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||||
* @file yc_rom_api.h
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||||
* @brief source file for setting rom_api
|
||||
*
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||||
* Change Logs:
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||||
* Date Author Version Notes
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||||
* 2020-11-05 wushengyan V1.0.0 the first version
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*/
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#ifndef __ROM_API_H__
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#define __ROM_API_H__
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#define YC3122_AA (0)
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#define YC3122_AB (1)
|
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#define IC_DEVICE YC3122_AB
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#if (IC_DEVICE == YC3122_AA)
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||||
/* TIMER */
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||||
#define FUNC_DELAY_US_ADDR (0x5030 + 1)
|
||||
#define FUNC_DELAY_MS_ADDR (0x5068 + 1)
|
||||
|
||||
/* OTP */
|
||||
#define FUNC_INIT_OTP_ADDR (0x5468 + 1)
|
||||
#define FUNC_DEINIT_OTP_ADDR (0x54c8 + 1)
|
||||
#define FUNC_READ_OTP_ADDR (0x5510 + 1)
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||||
#define FUNC_WRITE_OTP_ADDR (0x5648 + 1)
|
||||
#define FUNC_READ_CHIPID_ADDR (0x56ac + 1)
|
||||
#define FUNC_READ_CHIPLF_ADDR (0x56ba + 1)
|
||||
|
||||
/* LPM */
|
||||
#define FUNC_LIGHT_SLEEP_ADDR (0x5338 + 1)
|
||||
#define FUNC_DEEP_SLEEP_ADDR (0x535c + 1)
|
||||
|
||||
/* QSPI */
|
||||
#define FUNC_ENC_WRITE_FLASH_ADDR (0x67c0 + 1)
|
||||
#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x59a8 + 1)
|
||||
#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x59b4 + 1)
|
||||
#define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR (0x59c0 + 1)
|
||||
#define FUNC_QSPI_FLASH_WRITE_ADDR (0x58e8 + 1)
|
||||
#define FUNC_QSPI_FLASH_READ_ADDR (0x59ea + 1)
|
||||
#define FUNC_FLASH_BLANK_CHECK (0x670c + 1)
|
||||
#define FUNC_PREFETCH (0x5398 + 1)
|
||||
#define FUNC_READ_FLASH_ID (0x5a54 + 1)
|
||||
|
||||
#elif (IC_DEVICE == YC3122_AB)
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||||
|
||||
/* TIMER */
|
||||
#define FUNC_DELAY_US_ADDR (0x5020 + 1)
|
||||
#define FUNC_DELAY_MS_ADDR (0x5058 + 1)
|
||||
|
||||
/* OTP */
|
||||
#define FUNC_INIT_OTP_ADDR (0x5458 + 1)
|
||||
#define FUNC_DEINIT_OTP_ADDR (0x54b8 + 1)
|
||||
#define FUNC_READ_OTP_ADDR (0x5500 + 1)
|
||||
#define FUNC_WRITE_OTP_ADDR (0x5638 + 1)
|
||||
#define FUNC_READ_CHIPID_ADDR (0x569c + 1)
|
||||
#define FUNC_READ_CHIPLF_ADDR (0x56aa + 1)
|
||||
|
||||
/* LPM */
|
||||
#define FUNC_LIGHT_SLEEP_ADDR (0x5328 + 1)
|
||||
#define FUNC_DEEP_SLEEP_ADDR (0x534c + 1)
|
||||
|
||||
/* QSPI */
|
||||
#define FUNC_ENC_WRITE_FLASH_ADDR (0x6798 + 1)
|
||||
#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x5998 + 1)
|
||||
#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x59a4 + 1)
|
||||
#define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR (0x59b0 + 1)
|
||||
#define FUNC_QSPI_FLASH_WRITE_ADDR (0x58d8 + 1)
|
||||
#define FUNC_QSPI_FLASH_READ_ADDR (0x59da + 1)
|
||||
#define FUNC_FLASH_BLANK_CHECK (0x66e4 + 1)
|
||||
#define FUNC_PREFETCH (0x5388 + 1)
|
||||
#define FUNC_READ_FLASH_ID (0x5a44 + 1)
|
||||
#define FUNC_QSPI_FLASH_CMD (0x57ec + 1)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_system.h
|
||||
* @brief source file for setting system
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2020-11-05 wushengyan V1.0.0 the first version
|
||||
*/
|
||||
#ifndef __SYSTEM_H__
|
||||
#define __SYSTEM_H__
|
||||
|
||||
#define SDK_DEBUG //Debug switch
|
||||
|
||||
#include <string.h>
|
||||
#include "yc_uart.h"
|
||||
#include "rom_api.h"
|
||||
#include "board_config.h"
|
||||
|
||||
#define BIT_SET(a,b) ((a) |= (1<<(b)))
|
||||
#define BIT_CLEAR(a,b) ((a) &= ~(1<<(b)))
|
||||
#define BIT_FLIP(a,b) ((a) ^= (1<<(b))) //bit Negation
|
||||
#define BIT_GET(a,b) (((a) & (1<<(b)))>>(b))
|
||||
|
||||
/**
|
||||
* @brief Print format string to serial port 0.You need to initialize the serial port 0 before you use MyPrintf.
|
||||
*
|
||||
* @param format : format string
|
||||
* @param ...: format parameter
|
||||
*/
|
||||
void MyPrintf(char *format, ...);
|
||||
|
||||
void printv(uint8_t *buf, uint32_t len, char *s);
|
||||
|
||||
void PrintPort_Set(UART_TypeDef *UARTx);
|
||||
|
||||
void Board_Init(void);
|
||||
|
||||
void _assert_handler(const char *file, int line, const char *func);
|
||||
|
||||
#ifdef SDK_DEBUG
|
||||
#define _ASSERT(x) \
|
||||
if (!(x)) \
|
||||
{ \
|
||||
_assert_handler(__FILE__,__LINE__,__FUNCTION__);\
|
||||
}
|
||||
#else
|
||||
#define _ASSERT(x)
|
||||
#endif
|
||||
|
||||
#define YC_DEBUG_LOG(type, message) \
|
||||
do \
|
||||
{ \
|
||||
if (type) \
|
||||
MyPrintf message; \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
#endif /*__SYSTEM_H__*/
|
||||
@@ -0,0 +1,77 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_type.h
|
||||
* @brief source file for setting type
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2020-11-05 wushengyan V1.0.0 the first version
|
||||
*/
|
||||
|
||||
#ifndef __TYPE_H__
|
||||
#define __TYPE_H__
|
||||
|
||||
#if defined (__CC_ARM) || defined ( __ICCARM__ )
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned long long uint64_t;
|
||||
typedef unsigned char byte;
|
||||
typedef unsigned short word;
|
||||
|
||||
typedef signed char int8_t;
|
||||
typedef signed short int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long long int64_t;
|
||||
#else
|
||||
#include "stdio.h"
|
||||
typedef unsigned char byte;
|
||||
typedef unsigned short word;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief __NOINLINE definition
|
||||
*/
|
||||
#if defined ( __CC_ARM ) || defined ( __GNUC__ )
|
||||
/* ARM & GNUCompiler
|
||||
----------------
|
||||
*/
|
||||
#define __NOINLINE noinline
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
*/
|
||||
#define __NOINLINE _Pragma("optimize = no_inline")
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef Boolean
|
||||
typedef enum {FALSE = 0, TRUE =1} Boolean;
|
||||
#define IS_BOOLEAN(bool) ((bool == FALSE) || (bool == TRUE))
|
||||
#endif
|
||||
|
||||
#ifndef FunctionalState
|
||||
typedef enum {DISABLE = 0, ENABLE =1} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(state) ((state== DISABLE) || (state == ENABLE))
|
||||
#endif
|
||||
|
||||
#ifndef FunctionalState
|
||||
typedef enum {ERROR = 0, SUCCESS = 1} ErrorStatus;
|
||||
#define IS_ERROR_STATE(status) ((status== ERROR) || (status == SUCCESS))
|
||||
#endif
|
||||
|
||||
#ifndef FlagStatus
|
||||
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
|
||||
#endif
|
||||
|
||||
#ifndef YC_NULL
|
||||
#define YC_NULL (0)
|
||||
#endif
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL (0)
|
||||
#endif
|
||||
|
||||
#endif /*__TYPE_H__*/
|
||||
|
||||
Binary file not shown.
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_exit.h
|
||||
* @brief source file for setting exit
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2021-12-24 yangzhengfeng V1.0.0 Modify the register module configuration
|
||||
* 2021-01-03 wangjingfan V1.0.1 Compile error correction
|
||||
*/
|
||||
|
||||
#ifndef __YC_EXTI_H__
|
||||
#define __YC_EXTI_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "yc3122.h"
|
||||
#include "yc_gpio.h"
|
||||
|
||||
/**
|
||||
* @brief EXTI Trigger enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Trigger_Off = 0,
|
||||
EXTI_Trigger_HighLev = 1,
|
||||
EXTI_Trigger_LowLev = 2,
|
||||
EXTI_Trigger_Rising = 3,
|
||||
EXTI_Trigger_Falling = 4,
|
||||
EXTI_Trigger_Rising_Falling = 5,
|
||||
EXTI_Trigger_DEFAULT_VAL = 0xff
|
||||
} EXTI_TriggerTypeDef;
|
||||
|
||||
#define IS_TRIG_TYPEDEF(TRIGTYPE) ((TRIGTYPE) == EXTI_Trigger_Off || \
|
||||
(TRIGTYPE) == EXTI_Trigger_HighLev || \
|
||||
(TRIGTYPE) == EXTI_Trigger_LowLev || \
|
||||
(TRIGTYPE) == EXTI_Trigger_Rising || \
|
||||
(TRIGTYPE) == EXTI_Trigger_Falling || \
|
||||
(TRIGTYPE) == EXTI_Trigger_Rising_Falling)
|
||||
|
||||
/**
|
||||
* @brief EXTI Trigger source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Line_0 = 0,
|
||||
EXTI_Line_1 = 1,
|
||||
EXTI_Line_2 = 2,
|
||||
EXTI_Line_3 = 3,
|
||||
EXTI_Line_4 = 4,
|
||||
EXTI_Line_DEFAULT_VAL = 0xff
|
||||
} EXTI_LineTypeDef;
|
||||
|
||||
#define IS_EXTI_LINE(LINE) (((LINE) == EXTI_Line_0) || \
|
||||
((LINE) == EXTI_Line_1) || \
|
||||
((LINE) == EXTI_Line_2) || \
|
||||
((LINE) == EXTI_Line_3) || \
|
||||
((LINE) == EXTI_Line_4))
|
||||
|
||||
#define IS_EXTI_PIN_SOURCE(PIN) (((((PIN) & ~(uint16_t)0xFFFF)) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||
|
||||
#define EXTI_MODE_TypeDef GPIO_MODULE_TypeDef
|
||||
#define EXTI_PIN_TypeDef GPIO_Pin_TypeDef
|
||||
#define EXIT_Num GPIO_PORT_NUM
|
||||
#define EXIT_Pin_Num GPIO_PIN_NUM
|
||||
|
||||
void EXTI_ClearITPendingBit(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource);
|
||||
void EXTI_DeInit(void);
|
||||
uint16_t EXTI_GetITLineStatus(EXTI_LineTypeDef EXTI_Line);
|
||||
uint16_t EXTI_GetITEXTI_PinSourceStatus(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource);
|
||||
void EXTI_LineConfig(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource, EXTI_TriggerTypeDef EXTI_Trigger);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __YC_EXTI_H__ */
|
||||
|
||||
/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,194 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_qspi.h
|
||||
* @brief This file contains all the functions prototypes for the IFlash library.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2021-08-14 wushengyan V1.0.0 the first version
|
||||
*/
|
||||
|
||||
#ifndef __YC_QSPI_H__
|
||||
#define __YC_QSPI_H__
|
||||
#include "yc3122.h"
|
||||
|
||||
#define BOOT_UART_DOWNLOAD_FLAG 0x5a5aa5a5
|
||||
#define BOOT_USB_DOWNLOAD_FLAG 0xaa5555aa
|
||||
#define BOOT_AUTO_SELECT_FLAG 0xffffffff
|
||||
|
||||
#define ENC_BULK_BUF_SIZE 0x9000
|
||||
|
||||
typedef enum {
|
||||
YC_QFLASH_SIZE_UNKNOW = 0,
|
||||
YC_QFLASH_SIZE_512KB = 1,
|
||||
YC_QFLASH_SIZE_1MB = 2,
|
||||
YC_QFLASH_SIZE_4MB = 3,
|
||||
} yc_qspi_flash_size_enum;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t is_end;
|
||||
uint16_t enc_index;
|
||||
uint8_t enc_buf[ENC_BULK_BUF_SIZE];
|
||||
} ENC_BulkTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @method qspi_flash_pageerase
|
||||
* @brief page erase (256byte)
|
||||
* @param flash_addr
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_pageerase(uint32_t flash_addr);
|
||||
/**
|
||||
* @method qspi_flash_sectorerase
|
||||
* @brief sector erase (4K)
|
||||
* @param flash_addr:flash addr (4k Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_sectorerase(uint32_t flash_addr);
|
||||
|
||||
/**
|
||||
* @method qspi_flash_blockerase32k
|
||||
* @brief block erase (32K)
|
||||
* @param flash_addr:flash addr (32k Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_blockerase32k(uint32_t flash_addr);
|
||||
|
||||
/**
|
||||
* @method qspi_flash_blockerase64k
|
||||
* @brief block erase (64K)
|
||||
* @param flash_addr:flash addr (64k Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_blockerase64k(uint32_t flash_addr);
|
||||
|
||||
/**
|
||||
* @method qspi_flash_write
|
||||
* @brief write flash
|
||||
* @param flash_addr:flash addr (when flash_addr%256!=0,256-(flash_addr%256)+len must less than 256)
|
||||
* @param buf
|
||||
* @param len
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_write(uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method qspi_flash_read
|
||||
* @brief read flash
|
||||
* @param flash_addr:flash addr
|
||||
* @param buf
|
||||
* @param len
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t qspi_flash_read(uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method flash_blank_check
|
||||
* @brief check logical addr data is blank
|
||||
* @param startaddr:cpu addr
|
||||
* @param len
|
||||
* @retval TRUE: blank
|
||||
* FALSE: not blank
|
||||
*/
|
||||
Boolean flash_blank_check(uint32_t startaddr, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method enc_write_flash
|
||||
* @brief write data to flash with enc
|
||||
* @param flash_addr:cpu addr (must 32 Bytes align)
|
||||
* @param buf
|
||||
* @param len:(must 32 Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_write_flash(uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method enc_read_flash
|
||||
* @brief read flash data with enc
|
||||
* @param flash_addr:cpu addr
|
||||
* @param buf
|
||||
* @param len
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_read_flash(uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method enc_read_flash_fast
|
||||
* @brief enc read flash fast(You must sure that the read area is written by enc)
|
||||
* @param flash_addr:cpu addr
|
||||
* @param buf
|
||||
* @param len
|
||||
* @return SUCCESS or ERROR
|
||||
*/
|
||||
uint8_t enc_read_flash_fast(uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method enc_erase_flash_32byte
|
||||
* @brief erase 32 Bytes
|
||||
* @param flash_addr : cpu addr (must 32 Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_erase_flash_32byte(uint32_t flash_addr);
|
||||
|
||||
/**
|
||||
* @method enc_erase_flash_32k
|
||||
* @brief enc erase 32K Bytes
|
||||
* @param flash_addr : cpu addr (must 32K Bytes align)
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_erase_flash_32k(uint32_t flash_addr);
|
||||
|
||||
/**
|
||||
* @brief enc erase flash app area
|
||||
* @param addr:align at 32k for CPU addr
|
||||
* @param len:erase len
|
||||
* @return ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_earse_flash_app_area(uint32_t addr,uint32_t len);
|
||||
|
||||
/**
|
||||
* @brief enc write download flag
|
||||
* @param addr:BOOT_UART_DOWNLOAD_FLAG,BOOT_USB_DOWNLOAD_FLAG or BOOT_AUTO_SELECT_FLAG
|
||||
* @return ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_write_download_flag(uint32_t flag);
|
||||
|
||||
/**
|
||||
* @method enc_write_flash_bulk
|
||||
* @brief write bulk data to flash with enc
|
||||
* @param EncBulkStruct:enc buf struct
|
||||
* @param flash_addr:cpu addr(start addr must 32k Bytes align)
|
||||
* @param buf
|
||||
* @param len: Integer multiple of 32 bytes
|
||||
* @retval ERROR,SUCCESS
|
||||
*/
|
||||
uint8_t enc_write_flash_bulk(ENC_BulkTypeDef *EncBulkStruct,uint32_t flash_addr, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* @method prefetch
|
||||
* @brief fetch code to cache
|
||||
* @param start_addr: code start addr
|
||||
* @param end_addr : code end addr
|
||||
* @retval NULL
|
||||
*/
|
||||
void prefetch(void *start_addr, void *end_addr);
|
||||
|
||||
/**
|
||||
* @method read_flash_size
|
||||
* @brief read the chip flash size
|
||||
* @param NULL
|
||||
* @retval yc_qspi_flash_size_enum
|
||||
*/
|
||||
yc_qspi_flash_size_enum read_flash_size(void);
|
||||
|
||||
/**
|
||||
* @method qspi_GetVersion
|
||||
* @brief get qspi lib version
|
||||
* @param NULL
|
||||
* @retval version
|
||||
*/
|
||||
uint32_t qspi_GetVersion(void);
|
||||
|
||||
#endif
|
||||
Binary file not shown.
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,157 @@
|
||||
/*
|
||||
* Copyright (c); 2006-2020, YICHIP Development Team
|
||||
* @file yc_uart.h
|
||||
* @brief source file for setting uart
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2020-11-06 wushengyan V1.0.0 the first version
|
||||
*/
|
||||
|
||||
#ifndef __YC_UART_H__
|
||||
#define __YC_UART_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "yc3122.h"
|
||||
#include "system.h"
|
||||
|
||||
/**
|
||||
* @defgroup UARTx
|
||||
*/
|
||||
#define IS_UART(UARTx) (((UARTx) == MUART0) ||\
|
||||
((UARTx) == MUART1) ||\
|
||||
((UARTx) == MUART2) ||\
|
||||
((UARTx) == MUART3))
|
||||
|
||||
/**
|
||||
* @defgroup UART_RxMode
|
||||
*/
|
||||
#define MODE_RX_ENABLE 1
|
||||
#define MODE_RX_DISABLE 0
|
||||
#define IS_UART_RX_MODE(MODE) (((MODE) == MODE_RX_ENABLE) ||\
|
||||
((MODE) == MODE_RX_DISABLE))
|
||||
|
||||
/**
|
||||
* @defgroup USART_Parity
|
||||
*/
|
||||
#define YC_PARITY_NONE 0
|
||||
#define YC_PARITY_EVEN 0
|
||||
#define YC_PARITY_ODD 1
|
||||
#define IS_UART_PARITY(PARITY) (((PARITY) == YC_PARITY_NONE) ||\
|
||||
((PARITY) == YC_PARITY_EVEN) ||\
|
||||
((PARITY) == YC_PARITY_ODD))
|
||||
|
||||
/**
|
||||
* @defgroup UART_DataBits
|
||||
*/
|
||||
#define DATABITS_8B 0
|
||||
#define DATABITS_9B 1
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == DATABITS_8B) || \
|
||||
((LENGTH) == DATABITS_9B))
|
||||
|
||||
/**
|
||||
* @defgroup UART_Stop_Bits
|
||||
*/
|
||||
#define STOPBITS_1 0
|
||||
#define STOPBITS_2 1
|
||||
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == STOPBITS_1) || \
|
||||
((STOPBITS) == STOPBITS_2) )
|
||||
|
||||
/**
|
||||
* @defgroup UART_Hardware_Flow_Control
|
||||
*/
|
||||
#define FLOWCTRL_NONE 0
|
||||
#define FLOWCTRL_ENABLE 1
|
||||
#define IS_UART_FLOW_CTRL(CTRL) (((CTRL) == FLOWCTRL_NONE) || \
|
||||
((CTRL) == FLOWCTRL_ENABLE))
|
||||
|
||||
/**
|
||||
* @defgroup UART_Smart_Card_Control
|
||||
*/
|
||||
#define SMARTCARD_ENABLE 1
|
||||
#define SMARTCARD_DISABLE 0
|
||||
#define IS_UART_SMART_CARD(CTRL) (((CTRL) == SMARTCARD_ENABLE) || \
|
||||
((CTRL) == SMARTCARD_DISABLE))
|
||||
|
||||
/**
|
||||
* @defgroup UART_CommMode
|
||||
*/
|
||||
#define MODE_SINGLE_LINE 1
|
||||
#define MODE_DUPLEX 0
|
||||
#define IS_UART_COMM_MODE(MODE) (((MODE) == MODE_SINGLE_LINE) ||\
|
||||
((MODE) == MODE_DUPLEX))
|
||||
|
||||
/**
|
||||
* @defgroup USART_BaudRate
|
||||
*/
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0x5B8) &&\
|
||||
((BAUDRATE) < 0x0044AA21))
|
||||
|
||||
/**
|
||||
* @defgroup UART_Interrupt_Type_definition
|
||||
*/
|
||||
#define UART_IT_TX 0x01
|
||||
#define UART_IT_RX 0x02
|
||||
#define IS_UART_IT(ITx) (((ITx) == UART_IT_TX) || ((ITx) == UART_IT_RX))
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t RxMode; /*!< Specifies wether the Receive or Transmit mode
|
||||
is enabled or disabled. This parameter can be
|
||||
a value of @ref UART_Mode */
|
||||
|
||||
uint8_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of
|
||||
@ref UART_Parity @note When parity is enabled,
|
||||
the computed parity is inserted at
|
||||
the MSB position of the transmitted data
|
||||
(9th bit when the word length is set to
|
||||
9 data bits; 8th bit when the word length is
|
||||
set to 8 data bits);. */
|
||||
|
||||
uint8_t DataBits; /*!< Specifies the number of data bits transmitted
|
||||
or received in a frame. This parameter can be
|
||||
a value of @ref UART_DataBits */
|
||||
|
||||
uint8_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
parameter can be a value of @ref UART_Stop_Bits */
|
||||
|
||||
uint8_t FlowCtrl; /*!< Specifies wether the hardware flow control mode
|
||||
is enabled or disabled. This parameter can be
|
||||
a value of @ref UART_Hardware_Flow_Control */
|
||||
|
||||
uint8_t SmartCard;
|
||||
|
||||
uint8_t CommMode;
|
||||
|
||||
uint32_t BaudRate; /*!< This member configures the USART
|
||||
communication baud rate. */
|
||||
} UART_InitTypeDef;
|
||||
|
||||
void UART_DeInit(UART_TypeDef *UARTx);
|
||||
void UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef *UART_InitStruct);
|
||||
void UART_StructInit(UART_InitTypeDef *UART_InitStruct);
|
||||
void UART_ITConfig(UART_TypeDef *UARTx, uint32_t UART_IT, FunctionalState NewState);
|
||||
void UART_SendData(UART_TypeDef *UARTx, uint8_t Data);
|
||||
void UART_SendBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len);
|
||||
uint8_t UART_ReceiveData(UART_TypeDef *UARTx);
|
||||
uint32_t UART_ReceiveBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len);
|
||||
void UART_AutoFlowCtrlCmd(UART_TypeDef *UARTx, FunctionalState NewState);
|
||||
uint8_t UART_GetITIdentity(UART_TypeDef *UARTx);
|
||||
Boolean UART_IsRXFIFOFull(UART_TypeDef *UARTx);
|
||||
Boolean UART_IsRXFIFONotEmpty(UART_TypeDef *UARTx);
|
||||
Boolean UART_IsBusy(UART_TypeDef *UARTx);
|
||||
void UART_SetITTimeout(UART_TypeDef *UARTx, uint16_t timeout);
|
||||
void UART_SetRxITNum(UART_TypeDef *UARTx, uint8_t Bcnt);
|
||||
uint32_t UART_ReceiveDataLen(UART_TypeDef *UARTx);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,105 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_wdt.c
|
||||
* @brief This file provides all the WDT firmware functions.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2021-01-04 yangzhengfeng V1.0.0 the first version
|
||||
*/
|
||||
#include "yc_wdt.h"
|
||||
|
||||
/**
|
||||
* @brief Set WDT Clk Div
|
||||
* @param Wdtclkdiv: Wdtclkdiv value equal 1 to 16
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_CLKDIV(uint32_t Wdtclkdiv)
|
||||
{
|
||||
_ASSERT(IS_WDT_CLKDI(Wdtclkdiv));
|
||||
|
||||
MWDT->CONFIG.bit.CLK_DIV = Wdtclkdiv;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set reload counter
|
||||
* @param Reload: Reload counter equal to 2 to 31
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_SetReload(uint32_t Reload)
|
||||
{
|
||||
_ASSERT(IS_WDT_RELOAD(Reload));
|
||||
|
||||
MWDT->CONFIG.bit.RELOAD = Reload;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Feed the watchdog function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_ReloadCounter(void)
|
||||
{
|
||||
MWDT->KICK.reg = COUNTER_RELOAD_KEY;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable WDT
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_Enable(void)
|
||||
{
|
||||
MWDT->CONFIG.bit.EN = ENABLE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set WDT mode
|
||||
* @param WDT_Mode : Select the following values :
|
||||
* WDT_CPUReset
|
||||
* WDT_Interrupt.
|
||||
* @retval none
|
||||
* @description If Select WDT_CPUReset Mode,the bit for WDT RESET will be set;if
|
||||
* Select WDT_Interrupt the bit for WDT RESET will
|
||||
*/
|
||||
void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode)
|
||||
{
|
||||
_ASSERT(IS_WDT_MODE(WDT_Mode));
|
||||
|
||||
if(WDT_CPUReset == WDT_Mode)
|
||||
{
|
||||
MWDT->CONFIG.bit.MODE = WDT_CPUReset;
|
||||
MRSTGEN->RST_EN.bit.WDT = ENABLE;
|
||||
}
|
||||
else if(WDT_Interrupt == WDT_Mode)
|
||||
{
|
||||
MWDT->CONFIG.bit.MODE = WDT_Interrupt;
|
||||
MRSTGEN->RST_EN.bit.WDT = DISABLE;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get interrupt Status
|
||||
* @param none
|
||||
* @retval SET:interrupt ocuured.
|
||||
*/
|
||||
uint8_t WDT_GetITStatus(void)
|
||||
{
|
||||
uint16_t ret;
|
||||
|
||||
ret = MWDT->IRQ_STATUS.bit.STATE;
|
||||
|
||||
return ret ;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear interrupt
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void WDT_ClearITPendingBit(void)
|
||||
{
|
||||
MWDT->CLEAR.reg = 1;
|
||||
}
|
||||
|
||||
/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file yc_wdt.h
|
||||
* @brief This file provides all the WDT firmware functions.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2021-01-04 yangzhengfeng V1.0.0 the first version
|
||||
*/
|
||||
|
||||
#ifndef __YC_WDT_H__
|
||||
#define __YC_WDT_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "yc3122.h"
|
||||
#include "system.h"
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
WDT_CPUReset = 0,
|
||||
WDT_Interrupt,
|
||||
} WDT_ModeTypeDef;
|
||||
|
||||
#define WDTCLKDIV_1 0x00
|
||||
#define WDTCLKDIV_2 0x01
|
||||
#define WDTCLKDIV_3 0x02
|
||||
#define WDTCLKDIV_4 0x03
|
||||
#define WDTCLKDIV_5 0x04
|
||||
#define WDTCLKDIV_6 0x05
|
||||
#define WDTCLKDIV_7 0x06
|
||||
#define WDTCLKDIV_8 0x07
|
||||
#define WDTCLKDIV_9 0x08
|
||||
#define WDTCLKDIV_10 0x09
|
||||
#define WDTCLKDIV_11 0x0A
|
||||
#define WDTCLKDIV_12 0x0B
|
||||
#define WDTCLKDIV_13 0x0c
|
||||
#define WDTCLKDIV_14 0x0D
|
||||
#define WDTCLKDIV_15 0x0E
|
||||
#define WDTCLKDIV_16 0x0F
|
||||
|
||||
/**************the value of feed dog************/
|
||||
#define COUNTER_RELOAD_KEY 0x5937
|
||||
#define ITSTATUS 0x01
|
||||
#define IS_WDT_CLKDI(wdtclkdiv) (wdtclkdiv < 16)
|
||||
#define IS_WDT_RELOAD(load) (load <= 0x1f)
|
||||
#define IS_WDT_MODE(mode) ((mode == WDT_CPUReset) || (mode == WDT_Interrupt))
|
||||
|
||||
void WDT_CLKDIV(uint32_t Wdtclkdiv);
|
||||
void WDT_SetReload(uint32_t Reload);
|
||||
void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode);
|
||||
void WDT_ClearITPendingBit(void);
|
||||
void WDT_Enable(void);
|
||||
void WDT_ReloadCounter(void);
|
||||
uint8_t WDT_GetITStatus(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__YC_WDT_H__*/
|
||||
|
||||
/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,47 @@
|
||||
# YC3122-pos 板级支持包 说明
|
||||
|
||||
标签： YICHIP、Cortex-M0、RISC_V YC3121、国产MCU
|
||||
|
||||
---
|
||||
|
||||
## 1. 简介
|
||||
|
||||
本文档为 YC3122-pos 的 BSP(板级支持包) 说明。
|
||||
|
||||
通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
### 1.1 开发板介绍
|
||||
|
||||
YC3122-pos 开发板由易兆微提供，可满足基础测试及高端开发需求。
|
||||
|
||||
开发板外观如下图所示：
|
||||
|
||||
YC3122-pos
|
||||
|
||||
|
||||
|
||||
YC3122-pos 开发板板载资源如下：
|
||||
|
||||
- MCU：YC3122 ARM 32-bit Cortex-M0和RISC V 双核处理器，RISC V支持浮点算法主频 192MHz，512KB/1MB/4MB FLASH ，320KB SRAM
|
||||
- 常用外设
|
||||
- LED：4 个
|
||||
- 梯形矩阵键盘
|
||||
- 蜂鸣器
|
||||
- USB
|
||||
- UART
|
||||
- I2C
|
||||
- DCMI
|
||||
- GPIO(80个)
|
||||
- SDIO2.0
|
||||
- ADC
|
||||
- SPI LCD
|
||||
- SPI NFC
|
||||
- 7816接口 （接触IC卡，支持3V , 1.8V）
|
||||
- 7811接口 （三轨磁条卡解码模块，支持ISO/ABA AAMVA 及IBM等标准卡）
|
||||
- TIMER：9个32bi位 （支持PWM）
|
||||
- TRNG：（1个真随机数发生器）
|
||||
- 安全加密算法
|
||||
- 对称算法：对称算法：DES、TDES、AES-128/192/256、国密IV（SM4）
|
||||
- 非对称算法：RSA-1024/2048、国密II（SM2）、ECC
|
||||
- HASH 校验算法：SHA-1/224/256/384/512、国密III（SM3）
|
||||
- 调试接口：SWD / ICE
|
||||
@@ -0,0 +1,11 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
Return('objs')
|
||||
@@ -0,0 +1,40 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,15 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rtdbg.h>
|
||||
|
||||
/* defined the LED pin: PA12 */
|
||||
#define LED_PIN (51)
|
||||
#define FS_PARTITION_NAME "filesystem"
|
||||
|
||||
#ifdef BSP_USING_INTER_FLASH
|
||||
#include <dfs_elm.h>
|
||||
#include <dfs_file.h>
|
||||
#include <unistd.h>
|
||||
#include <dfs_fs.h>
|
||||
#include <fal.h>
|
||||
static void elmfs_sample(void)
|
||||
{
|
||||
fal_init();
|
||||
|
||||
struct rt_device *flash_dev = fal_blk_device_create(FS_PARTITION_NAME);
|
||||
if (flash_dev == NULL)
|
||||
{
|
||||
LOG_E("Can't create a block device on '%s' partition.", FS_PARTITION_NAME);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_I("Create a block device on the %s partition of flash successful...", FS_PARTITION_NAME);
|
||||
}
|
||||
if (dfs_mkfs("elm", flash_dev->parent.name) == 0)
|
||||
{
|
||||
LOG_I("dfs_mkfs ok!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("dfs_mkfs err!\n");
|
||||
}
|
||||
|
||||
if (dfs_mount(flash_dev->parent.name, "/", "elm", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("Failed to initialize filesystem!");
|
||||
LOG_D("You should create a filesystem on the block device first!");
|
||||
}
|
||||
struct statfs elm_stat;
|
||||
if (statfs("/", &elm_stat) == 0)
|
||||
{
|
||||
LOG_I("elmfat filesystem block size:0x%x,total blocks:0x%x,free blocks:0x%x\n", elm_stat.f_bsize, elm_stat.f_blocks, elm_stat.f_bfree);
|
||||
}
|
||||
|
||||
if (mkdir("/user", 0x777) == 0)
|
||||
{
|
||||
LOG_I("make a directory: '/user'.\n");
|
||||
}
|
||||
|
||||
LOG_I("open file\n");
|
||||
int fd = open("/user/test.txt", O_WRONLY | O_CREAT);
|
||||
LOG_I("open file ok\n");
|
||||
char str[] = "elmfat mount";
|
||||
if (fd >= 0)
|
||||
{
|
||||
LOG_I("write file\n");
|
||||
if (write(fd, str, sizeof(str)) == sizeof(str))
|
||||
LOG_I("write data done.\n");
|
||||
close(fd);
|
||||
}
|
||||
int size;
|
||||
char buf[20];
|
||||
fd = open("/user/test.txt", O_RDONLY);
|
||||
if (fd >= 0)
|
||||
{
|
||||
LOG_I("read file\n");
|
||||
size = read(fd, buf, sizeof(buf));
|
||||
close(fd);
|
||||
if (size == sizeof(str))
|
||||
{
|
||||
LOG_I("Read data from file test.txt(size:%d):%s\n", size, buf);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("open err\n");
|
||||
}
|
||||
|
||||
if (statfs("/", &elm_stat) == 0)
|
||||
{
|
||||
LOG_I("elmfat filesystem block size:0x%x,total blocks:0x%x,free blocks:0x%x\n", elm_stat.f_bsize, elm_stat.f_blocks, elm_stat.f_bfree);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
int main(void)
|
||||
{
|
||||
#ifdef BSP_USING_INTER_FLASH
|
||||
elmfs_sample();
|
||||
#endif
|
||||
int count = 1;
|
||||
/* set LED4 pin mode to output */
|
||||
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (count++)
|
||||
{
|
||||
rt_pin_write(LED_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -0,0 +1,26 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menu "UART Drivers"
|
||||
config BSP_USING_UART0
|
||||
bool "Enable UART0 PC6/5(R/T)"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1 PC2/3(R/T)"
|
||||
select RT_USING_SERIAL
|
||||
default n
|
||||
endmenu
|
||||
|
||||
config BSP_USING_INTER_FLASH
|
||||
bool "Enable inter flash"
|
||||
default n
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,29 @@
|
||||
# RT-Thread building script for component
|
||||
|
||||
from building import *
|
||||
import os
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
board.c
|
||||
""")
|
||||
|
||||
# add gpio driver code
|
||||
if GetDepend(['BSP_USING_GPIO']):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
# add serial driver code
|
||||
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'):
|
||||
src += ['drv_uart.c']
|
||||
|
||||
# add inter flash fal filesystem
|
||||
if GetDepend('BSP_USING_INTER_FLASH'):
|
||||
src += Glob('ports/*.c')
|
||||
|
||||
path_ports = os.path.join(cwd,'ports')
|
||||
CPPPATH = [cwd,path_ports]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#if defined(BSP_USING_EXT_SRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
|
||||
static struct rt_memheap system_heap;
|
||||
#endif
|
||||
#define SystemCoreClock (48000000)
|
||||
|
||||
static void bsp_clock_config(void)
|
||||
{
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
}
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
extern int rt_hw_uart_init(void);
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
bsp_clock_config();
|
||||
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
/* UART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_uart_init();
|
||||
#endif
|
||||
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
#include <rtthread.h>
|
||||
#include <yc3122.h>
|
||||
#include "yc_gpio.h"
|
||||
#include "yc_uart.h"
|
||||
#include "yc_exti.h"
|
||||
|
||||
#define SRAM_BASE 0x20000
|
||||
#define SRAM_SIZE 0x10000
|
||||
|
||||
#ifdef BSP_USING_EXT_SRAM
|
||||
#define EXT_SRAM_BASE SRAMM_BASE
|
||||
#define EXT_SRAM_SIZE BSP_EXT_SRAM_SIZE
|
||||
#define EXT_SRAM_BEGIN EXT_SRAM_BASE
|
||||
#define EXT_SRAM_END (EXT_SRAM_BASE + EXT_SRAM_SIZE)
|
||||
#endif
|
||||
|
||||
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section = "HEAP"
|
||||
#define HEAP_rBEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
#define HEAP_END SRAM_END
|
||||
#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN)
|
||||
extern void rt_hw_board_init(void);
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,193 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
struct yc3122_uart
|
||||
{
|
||||
UART_TypeDef *uart;
|
||||
IRQn_Type irq;
|
||||
};
|
||||
|
||||
static rt_err_t yc3122_uart_configure(struct rt_serial_device *serial,
|
||||
struct serial_configure *cfg)
|
||||
{
|
||||
struct yc3122_uart *uart;
|
||||
UART_InitTypeDef UART_initStruct;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(cfg != RT_NULL);
|
||||
uart = (struct yc3122_uart *)serial->parent.user_data;
|
||||
NVIC_DisableIRQ(uart->irq);
|
||||
UART_initStruct.BaudRate = cfg->baud_rate;
|
||||
UART_initStruct.FlowCtrl = FLOWCTRL_NONE ;
|
||||
UART_initStruct.CommMode = MODE_DUPLEX;
|
||||
UART_initStruct.SmartCard = SMARTCARD_DISABLE;
|
||||
UART_initStruct.RxMode = MODE_RX_ENABLE;
|
||||
switch (cfg->data_bits)
|
||||
{
|
||||
case DATA_BITS_9:
|
||||
UART_initStruct.DataBits = DATABITS_9B;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.DataBits = DATABITS_8B;
|
||||
break;
|
||||
}
|
||||
switch (cfg->stop_bits)
|
||||
{
|
||||
case STOP_BITS_2:
|
||||
UART_initStruct.StopBits = STOPBITS_2;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.StopBits = STOPBITS_1;
|
||||
break;
|
||||
}
|
||||
switch (cfg->parity)
|
||||
{
|
||||
case PARITY_ODD:
|
||||
UART_initStruct.Parity = YC_PARITY_ODD;
|
||||
break;
|
||||
case PARITY_EVEN:
|
||||
UART_initStruct.Parity = YC_PARITY_EVEN;
|
||||
break;
|
||||
default:
|
||||
UART_initStruct.Parity = YC_PARITY_NONE;
|
||||
break;
|
||||
}
|
||||
UART_Init(uart->uart, &UART_initStruct);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t yc3122_uart_control(struct rt_serial_device *serial,
|
||||
int cmd, void *arg)
|
||||
{
|
||||
struct yc3122_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3122_uart *)serial->parent.user_data;
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
UART_SetRxITNum(uart->uart, 0);
|
||||
NVIC_DisableIRQ(uart->irq);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
UART_ITConfig(uart->uart, UART_IT_RX, ENABLE);
|
||||
UART_SetRxITNum(uart->uart, 1);
|
||||
NVIC_EnableIRQ((IRQn_Type)uart->irq);
|
||||
break;
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int yc3122_uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct yc3122_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3122_uart *)serial->parent.user_data;
|
||||
while (UART_IsBusy(uart->uart));
|
||||
UART_SendData(uart->uart, c);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int yc3122_uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch;
|
||||
struct yc3122_uart *uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct yc3122_uart *)serial->parent.user_data;
|
||||
ch = -1;
|
||||
if (UART_ReceiveDataLen(uart->uart) != 0)
|
||||
{
|
||||
ch = UART_ReceiveData(uart->uart);
|
||||
}
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops yc3122_uart_ops =
|
||||
{
|
||||
yc3122_uart_configure,
|
||||
yc3122_uart_control,
|
||||
yc3122_uart_putc,
|
||||
yc3122_uart_getc,
|
||||
};
|
||||
|
||||
#if defined(BSP_USING_UART0)
|
||||
/* UART0 device driver structure */
|
||||
static struct yc3122_uart uart0;
|
||||
static struct rt_serial_device serial0;
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
/* UART in mode Receiver */
|
||||
if (UART_GetITIdentity(uart0.uart) == UART_IT_RX)
|
||||
{
|
||||
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART0 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
/* UART1 device driver structure */
|
||||
static struct yc3122_uart uart1;
|
||||
static struct rt_serial_device serial1;
|
||||
void UART1_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
/* UART in mode Receiver */
|
||||
if (UART_GetITIdentity(uart1.uart) == UART_IT_RX)
|
||||
{
|
||||
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct yc3122_uart *uart;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
#ifdef BSP_USING_UART0
|
||||
|
||||
GPIO_CONFIG(53) = UART0_TXD;
|
||||
GPIO_CONFIG(54) = UART0_RXD;
|
||||
uart = &uart0;
|
||||
uart->uart = MUART0;
|
||||
uart->irq = UART0_IRQn;
|
||||
serial0.ops = &yc3122_uart_ops;
|
||||
serial0.config = config;
|
||||
/* register UART0 device */
|
||||
rt_hw_serial_register(&serial0, RT_CONSOLE_DEVICE_NAME,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
#endif /* BSP_USING_UART0 */
|
||||
#ifdef BSP_USING_UART1
|
||||
GPIO_CONFIG(53) = UART1_TXD;
|
||||
GPIO_CONFIG(54) = UART1_RXD;
|
||||
uart = &uart1;
|
||||
uart->uart = MUART1;
|
||||
uart->irq = UART1_IRQn;
|
||||
serial1.ops = &yc3122_uart_ops;
|
||||
serial1.config = config;
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&serial1, "uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
#endif /* BSP_USING_UART1 */
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WSY first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_UART_H__
|
||||
#define DRV_UART_H__
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,32 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x1000200;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x1000200;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x1ffffff;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0xF800;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x800;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,161 @@
|
||||
/* Linker script to configure memory regions.
|
||||
* Need modifying for a specific board.
|
||||
* FLASH.ORIGIN: starting address of flash
|
||||
* FLASH.LENGTH: length of flash
|
||||
* RAM.ORIGIN: starting address of RAM bank 0
|
||||
* RAM.LENGTH: length of RAM bank 0
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */
|
||||
RAM (rwx) : ORIGIN = 0x20000, LENGTH = 0x10000 /* 64K */
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
*flash_start*.o
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
@@ -0,0 +1,16 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x01000200 0x0007FE00 { ; load region size_region
|
||||
ER_IROM1 0x01000200 0x0007FE00 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x00020004 0x0004FFFC { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* File : fal_cfg.h
|
||||
* COPYRIGHT (C) 2012-2018, Shanghai Real-Thread Technology Co., Ltd
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-08-21 MurphyZhao the first version
|
||||
*/
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
/* enable yc3122 onchip flash driver sample */
|
||||
#define FAL_FLASH_PORT_DRIVER_YC3122
|
||||
/* enable SFUD flash driver sample */
|
||||
//#define FAL_FLASH_PORT_DRIVER_SFUD
|
||||
|
||||
extern const struct fal_flash_dev yc3122_onchip_flash;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&yc3122_onchip_flash, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
|
||||
#define APP_START_ADDR (0)
|
||||
#define APP_SIZE (128*1024)
|
||||
#define PARAM_START_ADDR (APP_START_ADDR+APP_SIZE)
|
||||
#define PARAM_SIZE (64*1024)
|
||||
#define DOWNLOAD_START_ADDR (PARAM_START_ADDR+PARAM_SIZE)
|
||||
#define DOWNLOAD_SIZE (APP_SIZE)
|
||||
#define FONT_START_ADDR (DOWNLOAD_START_ADDR+DOWNLOAD_SIZE)
|
||||
#define FONT_SIZE (64*1024)
|
||||
#define FILESYSTEM_ADDR (FONT_START_ADDR+FONT_SIZE)
|
||||
#define FILESYSTEM_SIZE (128*1024)
|
||||
/* partition table */
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash", APP_START_ADDR, APP_SIZE, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "param", "onchip_flash", PARAM_START_ADDR, PARAM_SIZE, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "download", "onchip_flash", DOWNLOAD_START_ADDR, DOWNLOAD_SIZE, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "font", "onchip_flash", FONT_START_ADDR, FONT_SIZE, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "filesystem", "onchip_flash", FILESYSTEM_ADDR, FILESYSTEM_SIZE, 0}, \
|
||||
}
|
||||
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
@@ -0,0 +1,88 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, YICHIP Development Team
|
||||
* @file
|
||||
* @brief
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Version Notes
|
||||
* 2020-11-06 dengzhiqian V1.0.0 the first version
|
||||
*/
|
||||
|
||||
#include <fal.h>
|
||||
#include "board.h"
|
||||
#include "yc_qspi.h"
|
||||
#include "rtdbg.h"
|
||||
|
||||
#define FLASH_START_ADRESS ((uint32_t)0x1000000)
|
||||
#define FLASH_SIZE ((uint32_t)4 * 1024 * 1024)
|
||||
#define FLASH_BLOCK_SIZE ((uint32_t)512)
|
||||
#define FLASH_END_ADDRESS ((uint32_t)(FLASH_START_ADRESS + FLASH_SIZE))
|
||||
#define FLASH_PAGE_NBPERBANK 256
|
||||
#define FLASH_BANK_NUMBER 2
|
||||
#define FLASH_PAGE_SIZE 256
|
||||
// #define LOGOPEN
|
||||
#ifdef LOGOPEN
|
||||
#define YC3122_FLASH_DEBUG LOG_D
|
||||
#else
|
||||
#define YC3122_FLASH_DEBUG(...)
|
||||
#endif
|
||||
static int read(long offset, uint8_t *buf, size_t size)
|
||||
{
|
||||
uint32_t addr = yc3122_onchip_flash.addr + offset;
|
||||
|
||||
if ((addr + size) > FLASH_END_ADDRESS)
|
||||
{
|
||||
YC3122_FLASH_DEBUG("ERROR: read outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
|
||||
return -1;
|
||||
}
|
||||
YC3122_FLASH_DEBUG("r_ addr:0x%x,size:0x%x\n", addr, size);
|
||||
qspi_flash_read(addr, buf, size);
|
||||
return size;
|
||||
}
|
||||
|
||||
static int write(long offset, const uint8_t *buf, size_t size)
|
||||
{
|
||||
uint32_t addr = yc3122_onchip_flash.addr + offset;
|
||||
|
||||
if ((addr + size) > FLASH_END_ADDRESS)
|
||||
{
|
||||
YC3122_FLASH_DEBUG("ERROR: write outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
|
||||
return -1;
|
||||
}
|
||||
if (size < 1)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
YC3122_FLASH_DEBUG("w_ addr:0x%x,size:0x%x\n", addr, size);
|
||||
qspi_flash_write(addr, (uint8_t *)buf, size);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int erase(long offset, size_t size)
|
||||
{
|
||||
uint32_t addr = yc3122_onchip_flash.addr + offset;
|
||||
if ((addr + size) > FLASH_END_ADDRESS || addr % 0x100 != 0)
|
||||
{
|
||||
YC3122_FLASH_DEBUG("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
|
||||
return -1;
|
||||
}
|
||||
YC3122_FLASH_DEBUG("s_ addr:0x%x,size:0x%x\n", addr, size);
|
||||
if (addr % FLASH_PAGE_SIZE != 0)
|
||||
{
|
||||
YC3122_FLASH_DEBUG("ERROR: erase addr is not page alignment\n");
|
||||
}
|
||||
for (uint32_t i = 0; i < size; i += 256)
|
||||
qspi_flash_pageerase(addr + i);
|
||||
return size;
|
||||
}
|
||||
|
||||
const struct fal_flash_dev yc3122_onchip_flash =
|
||||
{
|
||||
"onchip_flash",
|
||||
FLASH_START_ADRESS,
|
||||
FLASH_SIZE,
|
||||
FLASH_BLOCK_SIZE,
|
||||
{NULL, read, write, erase},
|
||||
8,
|
||||
};
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 2.2 MiB |
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,152 @@
|
||||
# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad (REV D)
|
||||
|
||||
import os
|
||||
import sys
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# device options
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:\gcc-arm-none-eabi-7-2018-q2-update-win32'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "drivers\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf.exe --text -a -c --output=@L_asm.txt "!L" \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M0'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M0'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "drivers/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,184 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
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</ProjectOpt>
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File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user