[bsp/phytium] add phytium bsp to support e2000 bootup with smp (#6566)

add phytium board (E2000) bsp
support usart
support SMP with demo
This commit is contained in:
zhugengyu
2022-11-10 09:22:48 -05:00
committed by GitHub
parent 5370d4da50
commit 1537544f6a
464 changed files with 85749 additions and 0 deletions
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*.dis
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# PHYTIUM BSP 说明
## 简介
本文档为基于 RT-THREAD 的 Phytium 系列 CPU 相关 BSP 说明。
本文的主要内容如下:
- BSP 简介
- 移植支持情况
- 如何在 Ubuntu/Windows 环境下使用此 BSP
- 如何进行编译与实验
- 维护人信息
- 注意事项
## BSP简介
- 飞腾芯片产品具有谱系全、性能高、生态完善、自主化程度高等特点,目前主要包括高性能服务器CPU(飞腾腾云S系列)、高效能桌面CPU(飞腾腾锐D系列)、高端嵌入式CPU(飞腾腾珑E系列)和飞腾套片四大系列,为从端到云的各型设备提供核心算力支撑。
- 本BSP目前支持飞腾腾锐D系列、飞腾腾珑E系列 相关CPU,基于 Phytium-Standalone-SDK 进行开发。开发者能够使用
- 本BSP 支持Phytium系列CPU 工作在 aarch32/aarch64 两种执行状态 ,开发者能够根据自己的应用场景灵活选择CPU 工作状态。
## 移植支持情况
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| UART | 支持 | uart1 打印输出|
| **芯片** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| E2000D | 支持 | 支持SMP |
| E2000Q | 支持 | 支持SMP |
| E2000S | 支持 | |
## 如何在Ubuntu/Windows 环境下使用此BSP
### Ubuntu 环境
1. 根据 [Linux x86_64 SDK安装方法](https://gitee.com/phytium_embedded/phytium-standalone-sdk/blob/release/doc/reference/usr/install_linux_x86_64.md) 中1.1 - 1.2 节中介绍,先安装 SDK 编译环境
2. 参考[RT-Thread/env](https://github.com/RT-Thread/env) 中Tutorial 在ubuntu 环境下安装 env 环境
3. 在编译环境下执行 ```source ~/.env/env.sh```
4. 以aarch32 执行状态为例,```cd bsp/phytium/aarch32```
### Windows 环境
1. 根据[Windows 10 SDK安装方法](https://gitee.com/phytium_embedded/phytium-standalone-sdk/blob/release/doc/reference/usr/install_windows.md),安装 SDK 编译环境,编辑新建 Windows 环境变量 AARCH32_CROSS_PATH 和 AARCH64_CROSS_PATH
2. 参考[RT-Thread/env](https://github.com/RT-Thread/env) 中Tutorial 在 Windows 环境下解压 env 压缩包
3. 以aarch32 执行状态为例,```cd bsp/phytium/aarch32```
4. 使用 export_project.py 导出 BSP 工程到其他目录进行开发
5. 使用 RT-Studio 导入 BSP 工程进行开发
## 如何进行编译与实验
### 编译说明
- [AARCH32](./aarch32/README.md)
- [AARCH64](./aarch64/README.md)
### 烧写及执行
#### Ubuntu 环境配置 tftp 服务
- 在开发环境`host`侧安装`tftp`服务
```
sudo apt-get install tftp-hpa tftpd-hpa
sudo apt-get install xinetd
```
- 新建 tftboot 目录, 以`/mnt/d/tftboot`为例, 此目录应与项目编译脚本makefile中的USR_BOOT_DIR一致, 并确保 tftboot 目录有执行权限`chmod 777 /**/tftboot`
- 配置主机 tftpboot 服务, 新建并配置文件`/etc/xinetd.d/tftp`
```
# /etc/xinetd.d/tftp
server tftp
{
socket_type = dgram
protocol = udp
wait = yes
user = root
server = /usr/sbin/in.tftpd
server_args = -s /mnt/d/tftboot
disable = no
per_source = 11
cps = 100 2
flags = IPv4
}
```
- 启动主机`tftp`服务,生成默认配置
```
$ sudo service tftpd-hpa start
```
- 修改主机`tftp`配置,指向`tftboot`目录
修改/etc/default/tftpd-hpa
```
$ sudo nano /etc/default/tftpd-hpa
# /etc/default/tftpd-hpa
TFTP_USERNAME="tftp"
TFTP_DIRECTORY="/mnt/d/tftboot"
TFTP_ADDRESS=":69"
TFTP_OPTIONS="-l -c -s"
```
- 重启主机`tftp`服务
```
$ sudo service tftpd-hpa restart
```
- 测试主机`tftp`服务的可用性
> 登录`tftp`服务,获取`tftboot`目录下的一个文件
```
$ tftp 192.168.4.50
tftp> get test1234
tftp> q
```
#### Windows环境下配置 tftp 服务
- 下载Tftpd64 工具 ,并安装Tftpd64 工具
![输入图片说明](./figures/tftp32_srv.png)
- 之后每次使用前,进入Windows服务,手动将一下服务打开
![输入图片说明](./figures/config_tftp32.png)
#### 利用uboot 上tftp 服务加载镜像
- 进入`u-boot`界面,输入如下指令,配置开发板ip,`host`侧ip和网关地址
```
setenv ipaddr 192.168.4.20
setenv serverip 192.168.4.50
setenv gatewayip 192.168.4.1
```
- 将编译好的elf 或者bin 文件拷贝至Tftpd64所设置文件夹下
- 随后烧录的文件到开发板,输入以下指令
```
tftpboot 0x90100000 rtthread.elf
bootelf -p 0x90100000
```
### 运行结果
![运行结果](./figures/result.png)
## 维护人信息
- huanghe: huanghe@phytium.com.cn
- zhugengyu: zhugengyu@phytium.com.cn
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mainmenu "RT-Thread Project Configuration"
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config BSP_DIR
string
option env="BSP_ROOT"
default "../."
config STANDALONE_DIR
string
option env="STANDALONE_DIR"
default ".././libraries/standalone"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$BSP_DIR/libraries/drivers/Kconfig"
config PHYTIUM_ARCH_AARCH32
bool
select ARCH_ARM_CORTEX_A
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select RT_USING_GIC_V3
select TARGET_ARMV8_AARCH32
select USE_AARCH64_L1_TO_AARCH32
default y
menu "Standalone Setting"
config TARGET_ARMV8_AARCH32
bool "Armv8 Aarch32"
default y
config USE_AARCH64_L1_TO_AARCH32
bool
prompt "Use Aarch64 L1 to Aarch32 code"
default y
help
Use the Aarch64 to Aarch32 mode function
source "$STANDALONE_DIR/board/Kconfig"
source "$STANDALONE_DIR/drivers/Kconfig"
source "$STANDALONE_DIR/common/Kconfig"
endmenu
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# AARCH32 工作模式使用
- 当开发者需要基于 Phytium 系列芯片进行开发时,可以从以下几个步骤出发配置芯片
## 1. 如何选择芯片
- Windows Env 环境下
```shell
menuconfig
```
- Linux 环境下
```shell
scons --menuconfig
```
开发者通过以下选择进行配置
```
Standalone Setting > Board Configuration > Chip
```
![](./figures/chip_select.png)
![](./figures/phytium_cpu_select.png)
## 2. 如何选择驱动
```shell
scons --menuconfig
```
开发者通过以下选项进行驱动的使能
```
Hardware Drivers > On-chip Peripheral Drivers
```
![](./figures/select_driver.png)
## 3. 开启SDK中内部调试信息
```shell
scons --menuconfig
```
开发者通过以下选项进行调试信息等级的设置
![](./figures/select_debug_info.png)
## 4. 编译程序
```shell
scons -c
scons
```
- 完成编译之后目录下将会生成以下几个文件
```
rtthread_a32.bin
rtthread_a32.elf
rtthread_a32.map
```
## 5. 打包导出工程源代码
- 指定工程名和路径,打包RT-Thread内核和Phytium BSP代码,可以导出一个工程工程
```
python ./export_project.py -n=phytium-a32 -o=D:/proj/rt-thread-e2000/phytium-a32
```
![](./figures/export_project.png)
- 进入打包工程的目录,修改工程根目录 Kconfig 中的路径 BSP_DIR 和 STANDALONE_DIR
> env 环境中的 menuconfig 不会调用 SConstruct 修改路径环境变量,因此需要手动修改路径
```
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config STANDALONE_DIR
string
option env="STANDALONE_DIR"
default "libraries/standalone"
```
- 输入 menuconfig 和 scons 完成编译
## 6. 将工程导入 RT-Studio
- 在 RT-Studio 使用功能`RT-Thread Bsp 到工作空间`,导入 5. 中导出的 BSP 工程
- 设置 BSP 工程的交叉编译链后进行后续开发
![](./figures/import_project.png)
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# RT-Thread building script for bridge
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
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import os
import sys
import rtconfig
IS_EXPORTED = False
# setup RT-Thread Root Path
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.getcwd() + '/../../..'
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
if RTT_ROOT == 'rt-thread':
IS_EXPORTED = True # if kenrel and bsp has been exported by export_project.py
# setup Phytium BSP Root Path
if IS_EXPORTED:
BSP_ROOT = '.'
else:
BSP_ROOT = RTT_ROOT + '/bsp/phytium'
TARGET = 'rtthread_a32.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('BSP_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
if not IS_EXPORTED: # if project is not exported, libraries and board need to manually add
# include libraries
objs.extend(SConscript(os.path.join(BSP_ROOT + '/libraries', 'SConscript')))
# include board
objs.extend(SConscript(os.path.join(BSP_ROOT + '/board', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#ifdef RT_USING_SMP
struct rt_thread test_core[RT_CPUS_NR];
static char *core_thread_name[8] =
{
"core0_test",
"core1_test",
"core2_test",
"core3_test",
"core4_test",
"core5_test",
"core6_test",
"core7_test"
};
static rt_uint8_t core_stack[RT_CPUS_NR][1024];
static void demo_core_thread(void *parameter)
{
rt_base_t level;
while (1)
{
/* code */
level = rt_cpus_lock();
rt_kprintf("Hi, core%d \r\n", rt_hw_cpu_id());
rt_cpus_unlock(level);
rt_thread_mdelay(2000000);
}
}
void demo_core(void)
{
rt_ubase_t i;
rt_ubase_t cpu_id = 0;
for (i = 0; i < RT_CPUS_NR; i++)
{
cpu_id = i;
rt_thread_init(&test_core[i],
core_thread_name[i],
demo_core_thread,
RT_NULL,
&core_stack[i],
1024,
20,
32);
rt_thread_control(&test_core[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
rt_thread_startup(&test_core[i]);
}
}
#endif
int main(void)
{
#ifdef RT_USING_SMP
demo_core();
#endif
return RT_EOK;
}
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from building import *
cwd = GetCurrentDir()
src = Glob('*.S') + Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('AARCH32-BOOT', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
.global _boot
.set FPEXC_EN, 0x40000000 /* FPU enable bit, (1 << 30) */
.org 0
.text
.section .boot,"ax"
/* switch from aarch64-el2 to aarch32-el1 */
_boot:
Startup_Aarch32:
.long 0xd5384240 /* mrs x0, currentel */
.long 0xd342fc00 /* lsr x0, x0, #2 */
.long 0x92400400 /* and x0, x0, #0x3 */
.long 0xf1000c1f /* cmp x0, #0x3 */
.long 0x540003a1 /* b.ne 1d0080c4 <el2_mode> */
el3_mode:
.long 0xd53ecca0 /* mrs x0, s3_6_c12_c12_5 - ICC_SRE_EL3 */
.long 0xb2400c00 /* orr x0, x0, #0xf */
.long 0xd51ecca0 /* msr s3_6_c12_c12_5, x0 */
.long 0xd5033fdf /* isb */
.long 0xd53cc9a0 /* mrs x0, s3_4_c12_c9_5 - ICC_SRE_EL2 */
.long 0xb2400c00 /* orr x0, x0, #0xf */
.long 0xd51cc9a0 /* msr s3_4_c12_c9_5, x0 */
.long 0xd5033fdf /* isb */
.long 0xd538cca0 /* mrs x0, s3_0_c12_c12_5 - ICC_SRE_EL1 */
.long 0xb2400000 /* orr x0, x0, #0x1 */
.long 0xd518cca0 /* msr s3_0_c12_c12_5, x0 */
.long 0xd5033fdf /* isb */
.long 0xd2803620 /* mov x0, #0x1b1 */
.long 0xd51e1100 /* msr scr_el3, x0 */
.long 0xd2867fe0 /* mov x0, #0x33ff */
.long 0xd51c1140 /* msr cptr_el2, x0 */
.long 0xd2810000 /* mov x0, #0x800 */
.long 0xf2a61a00 /* movk x0, #0x30d0, lsl #16 */
.long 0xd5181000 /* msr sctlr_el1, x0 */
.long 0x910003e0 /* mov x0, sp */
.long 0xd51c4100 /* msr sp_el1, x0 */
.long 0xd53ec000 /* mrs x0, vbar_el3 */
.long 0xd518c000 /* msr vbar_el1, x0 */
.long 0xd2803a60 /* mov x0, #0x1d3 */
.long 0xd51e4000 /* msr spsr_el3, x0 */
.long 0x10000500 /* adr x0, 1d008158 <el1_mode> */
.long 0xd51e4020 /* msr elr_el3, x0 */
.long 0xd69f03e0 /* eret */
el2_mode:
.long 0xd53cc9a0 /* mrs x0, s3_4_c12_c9_5 - ICC_SRE_EL2 */
.long 0xb2400c00 /* orr x0, x0, #0xf */
.long 0xd51cc9a0 /* msr s3_4_c12_c9_5, x0 */
.long 0xd5033fdf /* isb */
.long 0xd538cca0 /* mrs x0, s3_0_c12_c12_5 - ICC_SRE_EL1 */
.long 0xb2400000 /* orr x0, x0, #0x1 */
.long 0xd518cca0 /* msr s3_0_c12_c12_5, x0 */
.long 0xd5033fdf /* isb */
.long 0xd53ce100 /* mrs x0, cnthctl_el2 */
.long 0xb2400400 /* orr x0, x0, #0x3 */
.long 0xd51ce100 /* msr cnthctl_el2, x0 */
.long 0xd51ce07f /* msr cntvoff_el2, xzr */
.long 0xd5380000 /* mrs x0, midr_el1 */
.long 0xd53800a1 /* mrs x1, mpidr_el1 */
.long 0xd51c0000 /* msr vpidr_el2, x0 */
.long 0xd51c00a1 /* msr vmpidr_el2, x1 */
.long 0xd2867fe0 /* mov x0, #0x33ff */
.long 0xd51c1140 /* msr cptr_el2, x0 */
.long 0xd51c117f /* msr hstr_el2, xzr */
.long 0xd2a00600 /* mov x0, #0x300000 */
.long 0xd5181040 /* msr cpacr_el1, x0 */
.long 0xd2800000 /* mov x0, #0x0 */
.long 0xb2630000 /* orr x0, x0, #0x20000000 */
.long 0xd51c1100 /* msr hcr_el2, x0 */
.long 0xd53c1100 /* mrs x0, hcr_el2 */
.long 0xd2810000 /* mov x0, #0x800 */
.long 0xf2a61a00 /* movk x0, #0x30d0, lsl #16 */
.long 0xd5181000 /* msr sctlr_el1, x0 */
.long 0x910003e0 /* mov x0, sp */
.long 0xd51c4100 /* msr sp_el1, x0 */
.long 0xd53cc000 /* mrs x0, vbar_el2 */
.long 0xd518c000 /* msr vbar_el1, x0 */
.long 0xd2803a60 /* mov x0, #0x1d3 */
.long 0xd51c4000 /* msr spsr_el2, x0 */
.long 0x10000060 /* adr x0, 1d008158 <el1_mode> */
.long 0xd51c4020 /* msr elr_el2, x0 */
.long 0xd69f03e0 /* eret */
el1_mode:
mov r0, #0
mov r1, #0
mov r2, #0
mov r3, #0
mov r4, #0
mov r5, #0
mov r6, #0
mov r7, #0
mov r8, #0
mov r9, #0
mov r10, #0
mov r11, #0
mov r12, #0
mcr p15, 0, r0, c1, c0, 0 /* reset control register */
isb
/* enable vfp, therefore f_prink workable */
vmrs r1, FPEXC /* read the exception register */
orr r1,r1, #FPEXC_EN /* set VFP enable bit, leave the others in orig state */
vmsr FPEXC, r1 /* write back the exception register */
bl system_vectors /* jump to libcpu/arm/cortex-a/vector_gcc.S */
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import os
import shutil
import argparse
parser = argparse.ArgumentParser()
parser.description='please enter two parameters <project-name> and <export-path> ...'
parser.add_argument("-n", "--name", help="project name", type=str, default="phytium-a32")
parser.add_argument("-o", "--output", help="export path", type=str, default="./phytium-a32")
args = parser.parse_args()
print('=== Exporting Phytium BSP for RT-Studio ====')
board_src_path = os.path.abspath(r'../board')
librs_src_path = os.path.abspath(r'../libraries')
board_dst_path = os.path.abspath(r'./board')
librs_dst_path = os.path.abspath(r'./libraries')
print(' Copying BSP board from {} to {}'.format(board_src_path, board_dst_path))
print(' Copying BSP libraries from {} to {}'.format(librs_src_path, librs_dst_path))
if os.path.exists(board_dst_path):
shutil.rmtree(board_dst_path)
if os.path.exists(librs_dst_path):
shutil.rmtree(librs_dst_path)
shutil.copytree(board_src_path, board_dst_path)
shutil.copytree(librs_src_path, librs_dst_path)
os.system('scons --dist-ide --project-name={} --project-path={}'.format(args.name, args.output))
if os.path.exists(board_dst_path):
shutil.rmtree(board_dst_path)
if os.path.exists(librs_dst_path):
shutil.rmtree(librs_dst_path)
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_boot)
SECTIONS
{
. = 0x80100000;
.text :
{
*(.boot)
. = ALIGN(64);
*(.vectors)
*(.text)
*(.text.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
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} =0
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__rodata_end = .;
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{
PROVIDE(__ctors_start__ = .);
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KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__ctors_end__ = .);
}
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{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(16 * 1024);
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{
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. += 16K;
}
. = ALIGN(8);
__data_start = .;
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. = ALIGN(8);
__bss_start = .;
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. = ALIGN(4);
}
. = ALIGN(4);
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}
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.comment 0 : { *(.comment) }
_end = .;
}
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import os
import rtconfig
# toolchains options
ARCH='arm'
CPU='cortex-a'
CROSS_TOOL='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = r'../../..'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# only support GNU GCC compiler.
PLATFORM = 'gcc'
EXEC_PATH = r'/usr/lib/arm-none-eabi/bin'
if os.getenv('AARCH32_CROSS_PATH'):
EXEC_PATH = os.getenv('AARCH32_CROSS_PATH')
print('EXEC_PATH = {}'.format(EXEC_PATH))
else:
print('AARCH32_CROSS_PATH not found')
BUILD = 'debug'
LIBPATH = EXEC_PATH + r'/../lib'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip'
DEVICE = ' -g -DGUEST -ffreestanding -Wextra -g -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -march=armv8-a -fdiagnostics-color=always'
# CFLAGS = DEVICE + ' -Wall'
CFLAGS = DEVICE
AFLAGS = ' -c'+ DEVICE + ' -fsingle-precision-constant -fno-builtin -x assembler-with-cpp -D__ASSEMBLY__'
LINK_SCRIPT = 'link.lds'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_a32.map,-cref,-u,system_vectors'+\
' -T %s' % LINK_SCRIPT
CPATH = ''
LPATH = LIBPATH
# generate debug info in all cases
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -g -gdwarf-2'
if BUILD == 'debug':
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread_a32.bin\n' +\
SIZE + ' $TARGET \n'
+75
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@@ -0,0 +1,75 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: sdkconfig.h
* Date: 2022-10-13 15:53:46
* LastEditTime: 2022-10-13 15:53:46
* Description: This file is for
*
* Modify History:
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------
*/
#ifndef SDK_CONFIG_H__
#define SDK_CONFIG_H__
#include "rtconfig.h"
/* arch */
#if defined(TARGET_ARMV8_AARCH32)
#define CONFIG_TARGET_ARMV8_AARCH32
#endif
#if defined(USE_AARCH64_L1_TO_AARCH32)
#define CONFIG_USE_AARCH64_L1_TO_AARCH32
#endif
/* board */
/* E2000 */
#if defined(TARGET_E2000)
#define CONFIG_TARGET_E2000
#endif
/* debug */
#ifdef LOG_VERBOS
#define CONFIG_LOG_VERBOS
#endif
#ifdef LOG_ERROR
#define CONFIG_LOG_ERROR
#endif
#ifdef LOG_WARN
#define CONFIG_LOG_WARN
#endif
#ifdef LOG_INFO
#define CONFIG_LOG_INFO
#endif
#ifdef LOG_DEBUG
#define CONFIG_LOG_DEBUG
#endif
#ifdef BOOTUP_DEBUG_PRINTS
#define CONFIG_BOOTUP_DEBUG_PRINTS
#endif
#endif
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mainmenu "RT-Thread Project Configuration"
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config BSP_DIR
string
option env="BSP_ROOT"
default "../."
config STANDALONE_DIR
string
option env="STANDALONE_DIR"
default ".././libraries/standalone"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$BSP_DIR/libraries/drivers/Kconfig"
config BSP_USING_GIC
bool
default y
config BSP_USING_GICV3
bool
default y
config PHYTIUM_ARCH_AARCH64
bool
select ARCH_ARMV8
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select ARCH_CPU_64BIT
select TARGET_ARMV8_AARCH64
default y
menu "Standalone Setting"
config TARGET_ARMV8_AARCH64
bool "Armv8 Aarch64"
default y
source "$STANDALONE_DIR/board/Kconfig"
source "$STANDALONE_DIR/drivers/Kconfig"
source "$STANDALONE_DIR/common/Kconfig"
endmenu
+121
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<!--
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: README.md
* Date: 2022-10-17 15:16:12
* LastEditTime: 2022-10-17 15:16:12
* Description: This file is for
*
* Modify History:
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------
-->
# AARCH64 工作模式使用
- 当开发者需要基于 Phytium 系列芯片进行开发时,可以从以下几个步骤出发配置芯片
## 1. 如何选择芯片
```shell
scons --menuconfig
```
开发者通过以下选择进行配置
```
Standalone Setting > Board Configuration > Chip
```
![](./figures/chip_select.png)
![](./figures/phytium_cpu_select.png)
## 2. 如何选择驱动
```shell
scons --menuconfig
```
开发者通过以下选项进行驱动的使能
```
Hardware Drivers Config > On-chip Peripheral Drivers
```
![](./figures/select_driver.png)
## 3. 开启SDK中内部调试信息
```shell
scons --menuconfig
```
开发者通过以下选项进行调试信息等级的设置
![](./figures/select_debug_info.png)
## 4. 编译程序
```shell
scons -c
scons
```
- 完成编译之后目录下将会生成以下几个文件
```
rtthread_a64.bin
rtthread_a64.elf
rtthread_a64.map
```
## 5. 打包导出工程源代码
- 指定工程名和路径,打包RT-Thread内核和Phytium BSP代码,可以导出一个工程工程
```
python ./export_project.py -n=phytium-a64 -o=D:/proj/rt-thread-e2000/phytium-a64
```
![](./figures/export_project.png)
- 进入打包工程的目录,修改工程根目录 Kconfig 中的路径 BSP_DIR 和 STANDALONE_DIR
> env 环境中的 menuconfig 不会调用 SConstruct 修改路径环境变量,因此需要手动修改路径
```
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config STANDALONE_DIR
string
option env="STANDALONE_DIR"
default "libraries/standalone"
```
- 输入 menuconfig 和 scons 完成编译
## 6. 将工程导入 RT-Studio
- 在 RT-Studio 使用功能`RT-Thread Bsp 到工作空间`,导入 5. 中导出的 BSP 工程
- 设置 BSP 工程的交叉编译链后进行后续开发
![](./figures/import_project.png)
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# RT-Thread building script for bridge
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
+58
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import os
import sys
import rtconfig
IS_EXPORTED = False
# setup RT-Thread Root Path
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.getcwd() + '/../../..'
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
if RTT_ROOT == 'rt-thread':
IS_EXPORTED = True # if kenrel and bsp has been exported by export_project.py
# setup Phytium BSP Root Path
if IS_EXPORTED:
BSP_ROOT = '.'
else:
BSP_ROOT = RTT_ROOT + '/bsp/phytium'
TARGET = 'rtthread_a64.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('BSP_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
if not IS_EXPORTED: # if project is not exported, libraries and board need to manually add
# include libraries
objs.extend(SConscript(os.path.join(BSP_ROOT + '/libraries', 'SConscript')))
# include board
objs.extend(SConscript(os.path.join(BSP_ROOT + '/board', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#ifdef RT_USING_SMP
struct rt_thread test_core[RT_CPUS_NR];
static char *core_thread_name[8] =
{
"core0_test",
"core1_test",
"core2_test",
"core3_test",
"core4_test",
"core5_test",
"core6_test",
"core7_test"
};
static rt_uint8_t core_stack[RT_CPUS_NR][1024];
static void demo_core_thread(void *parameter)
{
rt_base_t level;
while (1)
{
/* code */
level = rt_cpus_lock();
rt_kprintf("Hi, core%d \r\n", rt_hw_cpu_id());
rt_cpus_unlock(level);
rt_thread_mdelay(2000000);
}
}
void demo_core(void)
{
rt_ubase_t i;
rt_ubase_t cpu_id = 0;
for (i = 0; i < RT_CPUS_NR; i++)
{
cpu_id = i;
rt_thread_init(&test_core[i],
core_thread_name[i],
demo_core_thread,
RT_NULL,
&core_stack[i],
1024,
20,
32);
rt_thread_control(&test_core[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
rt_thread_startup(&test_core[i]);
}
}
#endif
int main(void)
{
#ifdef RT_USING_SMP
demo_core();
#endif
return RT_EOK;
}
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import os
import shutil
import argparse
parser = argparse.ArgumentParser()
parser.description='please enter two parameters <project-name> and <export-path> ...'
parser.add_argument("-n", "--name", help="project name", type=str, default="phytium-a64")
parser.add_argument("-o", "--output", help="export path", type=str, default="./phytium-a64")
args = parser.parse_args()
print('=== Exporting Phytium BSP for RT-Studio ====')
board_src_path = os.path.abspath(r'../board')
librs_src_path = os.path.abspath(r'../libraries')
board_dst_path = os.path.abspath(r'./board')
librs_dst_path = os.path.abspath(r'./libraries')
print(' Copying BSP board from {} to {}'.format(board_src_path, board_dst_path))
print(' Copying BSP libraries from {} to {}'.format(librs_src_path, librs_dst_path))
if os.path.exists(board_dst_path):
shutil.rmtree(board_dst_path)
if os.path.exists(librs_dst_path):
shutil.rmtree(librs_dst_path)
shutil.copytree(board_src_path, board_dst_path)
shutil.copytree(librs_src_path, librs_dst_path)
os.system('scons --dist-ide --project-name={} --project-path={}'.format(args.name, args.output))
if os.path.exists(board_dst_path):
shutil.rmtree(board_dst_path)
if os.path.exists(librs_dst_path):
shutil.rmtree(librs_dst_path)
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* 2017-5-30 bernard first version
*/
/* _EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 0x20000; */
SECTIONS
{
. = 0x80100000;
. = ALIGN(4096);
.text :
{
KEEP(*(.text.entrypoint)) /* The entry point */
*(.vectors)
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
*(COMMON)
/* section information for finsh shell */
. = ALIGN(16);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(16);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(16);
/* section information for initial. */
. = ALIGN(16);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(16);
. = ALIGN(16);
_etext = .;
}
. = ALIGN(4);
.eh_frame_hdr :
{
*(.eh_frame_hdr)
*(.eh_frame_entry)
}
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
. = ALIGN(16);
.data :
{
*(.data)
*(.data.*)
*(.data1)
*(.data1.*)
. = ALIGN(16);
_gp = ABSOLUTE(.); /* Base of small data */
*(.sdata)
*(.sdata.*)
}
. = ALIGN(16);
.ctors :
{
PROVIDE(__ctors_start__ = .);
/* new GCC version uses .init_array */
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__ctors_end__ = .);
}
. = ALIGN(4);
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(16);
.bss :
{
PROVIDE(__bss_start = .);
*(.bss)
*(.bss.*)
*(.dynbss)
. = ALIGN(32);
PROVIDE(__bss_end = .);
}
. = ALIGN(4);
.heap :
{
PROVIDE(__heap_start = .);
. = ALIGN(8);
PROVIDE(end = .);
}
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
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/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
__bss_size = SIZEOF(.bss);
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import os
# toolchains options
ARCH ='aarch64'
CPU ='cortex-a'
CROSS_TOOL ='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = r'../../..'
PLATFORM = 'gcc'
EXEC_PATH = r'/opt/gcc-arm-8.3-2019.03-x86_64-aarch64-elf/bin/'
if os.getenv('AARCH64_CROSS_PATH'):
EXEC_PATH = os.getenv('AARCH64_CROSS_PATH')
print('EXEC_PATH = {}'.format(EXEC_PATH))
else:
print('AARCH64_CROSS_PATH not found')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'aarch64-none-elf-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=armv8-a -mtune=cortex-a72'
CFLAGS = DEVICE + ' -Wall'
AFLAGS = ' -c' + ' -x assembler-with-cpp -D__ASSEMBLY__'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread_a64.map,-cref,-u,system_vectors -T link.lds -fdiagnostics-color=always'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtthread_a64.dis\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread_a64.bin\n' + SIZE + ' $TARGET \n'
+71
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@@ -0,0 +1,71 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: sdkconfig.h
* Date: 2022-10-09 15:04:36
* LastEditTime: 2022-10-09 15:04:37
* Description: This file is for
*
* Modify History:
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------
*/
#ifndef SDK_CONFIG_H__
#define SDK_CONFIG_H__
#include "rtconfig.h"
/* board */
/* E2000 */
#if defined(TARGET_E2000)
#define CONFIG_TARGET_E2000
#endif
#if defined(TARGET_E2000Q)
#define CONFIG_TARGET_E2000Q
#endif
#if defined(TARGET_ARMV8_AARCH64)
#define CONFIG_TARGET_ARMV8_AARCH64
#endif
/* debug */
#ifdef LOG_VERBOS
#define CONFIG_LOG_VERBOS
#endif
#ifdef LOG_ERROR
#define CONFIG_LOG_ERROR
#endif
#ifdef LOG_WARN
#define CONFIG_LOG_WARN
#endif
#ifdef LOG_INFO
#define CONFIG_LOG_INFO
#endif
#ifdef LOG_DEBUG
#define CONFIG_LOG_DEBUG
#endif
#ifdef BOOTUP_DEBUG_PRINTS
#define CONFIG_BOOTUP_DEBUG_PRINTS
#endif
#endif
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from building import *
cwd = GetCurrentDir()
src = Glob('*.S')
src += Glob('*.c')
if GetDepend(['TARGET_E2000']):
if GetDepend(['TARGET_E2000Q']):
src += Glob(cwd + '/e2000/q/parameters.c')
elif GetDepend(['TARGET_E2000D']):
src += Glob(cwd + '/e2000/d/parameters.c')
elif GetDepend(['TARGET_E2000S']):
src += Glob(cwd + '/e2000/s/parameters.c')
if GetDepend(['TARGET_F2000_4']):
src += Glob(cwd + '/d2000/parameters.c')
if GetDepend(['TARGET_D2000']):
src += Glob(cwd + '/ft2004/parameters.c')
CPPPATH = [cwd]
group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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+32
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include "fparameters.h"
#include "phytium_cpu.h"
#if defined(__CC_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif defined(__GNUC__)
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END (void *)(0x80000000 + 1024 * 1024 * 1024)
void rt_hw_board_init(void);
#endif
+115
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
/**
* @name: GetCpuMaskToAffval
* @msg: Convert information in cpu_mask to cluster_ID and target_list
* @param {u32} *cpu_mask is each bit of cpu_mask represents a selected CPU, for example, 0x3 represents core0 and CORE1 .
* @param {u32} *cluster_id is information about the cluster in which core resides ,format is
* |--------[bit31-24]-------[bit23-16]-------------[bit15-8]-----------[bit7-0]
* |--------Affinity level3-----Affinity level2-----Affinity level1-----Affinity level0
* @param {u32} *target_list is core mask in cluster
* @return {u32} 0 indicates that the conversion was not successful , 1 indicates that the conversion was successful
*/
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x3)
{
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x1))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3;
}
else if (*cpu_mask & 0xc)
{
*cluster_id = 0x100;
if ((*cpu_mask & 0xc) == 0xc)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x4))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0xc;
}
else if (*cpu_mask & 0x30)
{
*cluster_id = 0x200;
if ((*cpu_mask & 0x30) == 0x30)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x10))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x30;
}
else if (*cpu_mask & 0xc0)
{
*cluster_id = 0x300;
if ((*cpu_mask & 0xc0) == 0xc0)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x40))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0xc0;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
+54
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x3)
{
*cluster_id = 0x200;
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x1))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3; /* clear all mask */
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
+75
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
/**
* @name: GetCpuMaskToAffval
* @msg: 参考 GetCpuMaskToAffval 进行参数的重新定义 ,两个小核心定义的id 为0,1 ,两个大核的id 为 2,3
* @return {*}
* @note:
* @param {u32} *cpu_mask
* @param {u32} *cluster_id
* @param {u32} *target_list
*/
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x4)
{
*target_list = 1;
*cpu_mask &= ~0x4;
}
else if (*cpu_mask & 0x8)
{
*cluster_id = 0x100;
*target_list = 1;
*cpu_mask &= ~0x8;
}
else if (*cpu_mask & 0x3)
{
*cluster_id = 0x200;
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x4))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
+43
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x1)
{
*target_list = 1;
*cluster_id = 0x200;
*cpu_mask &= ~0x1;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
+71
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x3)
{
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x1))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3;
}
else if (*cpu_mask & 0xc)
{
*cluster_id = 0x100;
if ((*cpu_mask & 0xc) == 0xc)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x4))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0xc;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
+113
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "gicv3.h"
#include "fparameters.h"
#include "fcpu_info.h"
#include "phytium_cpu.h"
int phytium_cpu_id_mapping(int cpu_id)
{
#if defined(TARGET_E2000Q)
switch (cpu_id)
{
case 0:
return 2;
case 1:
return 3;
case 2:
return 0;
case 3:
return 1;
default:
RT_ASSERT(0);
return 0;
break;
}
#else
return (int)cpu_id;
#endif
}
#if defined(TARGET_ARMV8_AARCH64)
int phytium_cpu_id(void)
{
FError ret;
u32 cpu_id;
ret = GetCpuId(&cpu_id);
if (ret != ERR_SUCCESS)
{
RT_ASSERT(0);
}
return phytium_cpu_id_mapping(cpu_id);
};
#else
int rt_hw_cpu_id(void)
{
FError ret;
u32 cpu_id;
ret = GetCpuId(&cpu_id);
if (ret != ERR_SUCCESS)
{
RT_ASSERT(0);
}
return phytium_cpu_id_mapping(cpu_id);
};
rt_uint64_t get_main_cpu_affval(void)
{
#if defined(TARGET_E2000Q)
return CORE2_AFF;
#else
return CORE0_AFF;
#endif
}
extern u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list);
rt_uint32_t arm_gic_cpumask_to_affval(rt_uint32_t *cpu_mask, rt_uint32_t *cluster_id, rt_uint32_t *target_list)
{
return GetCpuMaskToAffval(cpu_mask, cluster_id, target_list);
}
#ifdef RT_USING_SMP
void send_core_isg(void)
{
for (rt_size_t i = 0; i <= 0xf; i++)
{
/* code */
rt_kprintf("i %x \r\n", i);
arm_gic_send_affinity_sgi(0, 0, i, 0);
rt_thread_mdelay(100);
}
}
MSH_CMD_EXPORT(send_core_isg, send_core_isg);
#endif
#endif
+80
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#ifndef __PHYTIUM_CPU_H__
#define __PHYTIUM_CPU_H__
#include <rthw.h>
#include <rtthread.h>
#include "fparameters.h"
#define ARM_GIC_MAX_NR 1
#define MAX_HANDLERS 160
#define GIC_IRQ_START 0
#define GIC_ACK_INTID_MASK 0x000003ff
rt_uint64_t get_main_cpu_affval(void);
rt_inline rt_uint32_t platform_get_gic_dist_base(void)
{
return GICV3_DISTRIBUTOR_BASEADDRESS;
}
#if defined(TARGET_ARMV8_AARCH64)
/* the basic constants and interfaces needed by gic */
rt_inline rt_uint32_t platform_get_gic_redist_base(void)
{
extern int phytium_cpu_id(void);
s32 cpu_offset = 0;
#if defined(FT_GIC_REDISTRUBUTIOR_OFFSET)
cpu_offset = FT_GIC_REDISTRUBUTIOR_OFFSET ;
#endif
#if defined(TARGET_E2000Q)
u32 cpu_id = 0;
cpu_id = phytium_cpu_id();
switch (cpu_id)
{
case 0:
case 1:
cpu_offset = 2;
break;
case 2:
case 3:
cpu_offset = -2;
default:
break;
}
#endif
rt_kprintf("offset is %x\n", cpu_offset);
return (GICV3_RD_BASEADDRESS + (cpu_offset) * GICV3_RD_OFFSET);
}
rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
{
return 0U; /* unused in gicv3 */
}
#endif
int phytium_cpu_id_mapping(int cpu_id);
#endif // !
+131
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
* 2022-10-26 zhugengyu support aarch64
*
*/
#include <rtthread.h>
#include "board.h"
#include <gicv3.h>
#include "rtconfig.h"
#include "phytium_cpu.h"
#if defined(TARGET_ARMV8_AARCH64)
#include "cpuport.h"
#include "gtimer.h"
#include "mmu.h"
#endif
#ifdef RT_USING_SMP
#include <interrupt.h>
#if defined(TARGET_ARMV8_AARCH64)
#include "psci.h"
#endif
#include "fpsci.h"
rt_uint64_t rt_cpu_mpidr_early[] =
{
#if defined(TARGET_E2000D)
[0] = 0x80000200,
[1] = 0x80000201,
#elif defined(TARGET_E2000Q)
[0] = 0x80000200,
[1] = 0x80000201,
[2] = 0x80000000,
[3] = 0x80000100,
#elif defined(TARGET_F2000_4) || defined(TARGET_D2000)
[0] = 0x80000000,
[1] = 0x80000001,
[2] = 0x80000100,
[3] = 0x80000101,
#if defined(TARGET_D2000)
[4] = 0x80000200,
[5] = 0x80000201,
[6] = 0x80000300,
[7] = 0x80000301,
#endif
#endif
};
extern int rt_hw_timer_init(void);
extern void secondary_cpu_start(void);
void rt_hw_secondary_cpu_up(void)
{
rt_uint32_t i;
rt_uint32_t cpu_mask = 0;
rt_kprintf("rt_hw_secondary_cpu_up is processing \r\n");
for (i = 1; i < RT_CPUS_NR; i++)
{
cpu_mask = 1 << phytium_cpu_id_mapping(i);
/* code */
PsciCpuOn(cpu_mask, (uintptr)secondary_cpu_start);
#if defined(TARGET_ARMV8_AARCH64)
__DSB();
#else
__asm__ volatile("dsb" ::: "memory");
#endif
}
}
void secondary_cpu_c_start(void)
{
/* mmu init */
#if defined(TARGET_ARMV8_AARCH64)
rt_hw_mmu_init();
#endif
/* spin lock init */
rt_hw_spin_lock(&_cpus_lock);
/* interrupt init */
#if defined(TARGET_ARMV8_AARCH64)
arm_gic_cpu_init(0, platform_get_gic_cpu_base());
arm_gic_redist_init(0, platform_get_gic_redist_base());
#else
arm_gic_cpu_init(0);
arm_gic_redist_init(0);
#endif
/* vector init */
rt_hw_vector_init();
/* gtimer init */
#if defined(TARGET_ARMV8_AARCH64)
rt_hw_gtimer_local_enable();
#else
rt_hw_timer_init();
#endif
rt_hw_interrupt_umask(RT_SCHEDULE_IPI);
/* start scheduler */
rt_kprintf("\rcall cpu %d on success\n", rt_hw_cpu_id());
rt_hw_secondary_cpu_idle_exec();
rt_system_scheduler_start();
}
void rt_hw_secondary_cpu_idle_exec(void)
{
#if defined(TARGET_ARMV8_AARCH64)
__WFE();
#else
asm volatile("wfe" ::
: "memory", "cc");
#endif
}
#endif
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+76
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import os
from building import *
objs = []
cwd = GetCurrentDir()
STANDALONE_DIR = cwd + '/standalone'
# common source
src = Glob(STANDALONE_DIR+'/common/*.c')
path = [STANDALONE_DIR + '/common']
# arch
path += [STANDALONE_DIR + '/arch/common']
if GetDepend(['TARGET_ARMV8_AARCH32']):
src += Glob(STANDALONE_DIR+'/arch/armv8/aarch32/*.c') + Glob(STANDALONE_DIR+'/arch/armv8/aarch32/gcc/*.S')
path += [STANDALONE_DIR + '/arch/armv8/aarch32']
elif GetDepend(['TARGET_ARMV8_AARCH64']):
src += Glob(STANDALONE_DIR+'/arch/armv8/aarch64/*.c') + Glob(STANDALONE_DIR+'/arch/armv8/aarch64/gcc/*.S')
path += [STANDALONE_DIR + '/arch/armv8/aarch64']
# board
src += Glob(STANDALONE_DIR+'/board/common/*.c') + Glob(STANDALONE_DIR+'/board/common/*.S')
path += [STANDALONE_DIR + '/board/common']
if GetDepend(['TARGET_F2000_4']):
src += Glob(STANDALONE_DIR+'/board/ft2004/*.c')
path += [STANDALONE_DIR + '/board/ft2004']
if GetDepend(['TARGET_E2000']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
if GetDepend(['TARGET_E2000Q']):
src += Glob(STANDALONE_DIR+'/board/e2000/q/*.c')
path += [STANDALONE_DIR + '/board/e2000/q']
if GetDepend(['TARGET_E2000D']):
src += Glob(STANDALONE_DIR+'/board/e2000/d/*.c')
path += [STANDALONE_DIR + '/board/e2000/d']
if GetDepend(['ARGET_E2000S']):
src += Glob(STANDALONE_DIR+'/board/e2000/s/*.c')
path += [STANDALONE_DIR + '/board/e2000/s']
if GetDepend(['TARGET_D2000']):
src += Glob(STANDALONE_DIR+'/board/d2000/*.c')
path += [STANDALONE_DIR + '/board/d2000']
# driver
## serial
if GetDepend(['ENABLE_Pl011_UART']):
src += Glob(STANDALONE_DIR+'/drivers/serial/fpl011/*.c')
path += [STANDALONE_DIR + '/drivers/serial/fpl011']
## gicv3
if GetDepend(['ENABLE_GICV3']):
src += Glob(STANDALONE_DIR+'/drivers/gic/fgic/*.c') + Glob(STANDALONE_DIR+'/drivers/gic/fgic/*.S')
path += [STANDALONE_DIR + '/drivers/gic/fgic']
# phytium ports rt-thread drivers
PORT_DRV_DIR = cwd + '/drivers'
src += Glob(PORT_DRV_DIR + '/*.S')
src += Glob(PORT_DRV_DIR + '/*.c')
ASFLAGS = ''
group = DefineGroup('FT_DRIVER', src, depend=[
''], CPPPATH=path, ASFLAGS = ASFLAGS)
Return('group')
+29
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menu "Hardware Drivers"
menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select USE_SERIAL # sdk serial component
select ENABLE_Pl011_UART # select sdk pl011 driver
select RT_USING_SERIAL
if BSP_USING_UART
config RT_USING_UART1
bool "Enable UART1"
default y
config RT_USING_UART0
bool "Enable UART0"
default n
endif
endmenu
menu "Board extended module Drivers"
endmenu
endmenu
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#ifndef __DRV_USART_H__
#define __DRV_USART_H__
#include <rtthread.h>
#include "rtdevice.h"
#include "fpl011.h"
#include "fpl011_hw.h"
#define RTOS_UART_ISR_OEIM_MASK FPL011IMSC_OEIM /* Overrun error interrupt mask. */
#define RTOS_UART_ISR_BEIM_MASK FPL011IMSC_BEIM /* Break error interrupt mask */
#define RTOS_UART_ISR_PEIM_MASK FPL011IMSC_PEIM /* Parity error interrupt mask. */
#define RTOS_UART_ISR_FEIM_MASK FPL011IMSC_FEIM /* Framing error interrupt mask. */
#define RTOS_UART_ISR_RTIM_MASK FPL011IMSC_RTIM /* Receive timeout interrupt mask. */
#define RTOS_UART_ISR_TXIM_MASK FPL011IMSC_TXIM /* Transmit interrupt mask. */
#define RTOS_UART_ISR_RXIM_MASK FPL011IMSC_RXIM /* Receive interrupt mask. */
typedef struct
{
u32 uart_instance; /* select uart global object */
u32 isr_priority; /* irq Priority */
u32 isr_event_mask; /* followed by RTOS_UART_ISR_XX */
u32 uart_baudrate;
} FtFreertosUartConfig;
struct drv_usart
{
FPl011 *handle;
FtFreertosUartConfig config;
struct rt_serial_device serial;
};
#endif // !
+28
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Phytium Public License 1.0 (PPL-1.0)
UNLESS IT HAS ITS OWN COPYRIGHT/LICENSE EMBEDDED IN ITS BODY, EACH FILE IS SUBJECT TO THE FOLLOWING LICENSE TERMS
Copyright (C) 2022, Phytium Technology Co., Ltd.
All Rights Reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that
the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
the following disclaimer in the documentation and/or other materials provided with the distribution.
3. If the name of phytium or the names of its contributors are needed to endorse or promote products
derived from this software ,Prior written permission should be required.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
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/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: generic_timer.c
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:30:07
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include "fparameters.h"
#include "fgeneric_timer.h"
#include "faarch32.h"
#include "sdkconfig.h"
#ifndef SDK_CONFIG_H__
#warning "Please include sdkconfig.h"
#endif
#ifdef CONFIG_USE_SYS_TICK
#include "fassert.h"
#include "finterrupt.h"
static volatile u32 genericTick;
static GenericTimerTickHandler usr_tick_handler = NULL;
#endif
#define AARCH32_CNTP_CTL_ENABLE_MASK (1ul << 0)
#define AARCH32_CNTP_CTL_INTERRUPT_MASK (1ul << 1)
void GenericTimerStart(void)
{
u32 ctrl = aarch32_cntp_ctl_get();
if (!(ctrl & AARCH32_CNTP_CTL_ENABLE_MASK))
{
ctrl |= AARCH32_CNTP_CTL_ENABLE_MASK;
aarch32_cntp_ctl_set(ctrl);
}
}
void GenericTimerStop(void)
{
u32 ctrl = aarch32_cntp_ctl_get();
if ((ctrl & AARCH32_CNTP_CTL_ENABLE_MASK))
{
ctrl &= ~AARCH32_CNTP_CTL_ENABLE_MASK;
aarch32_cntp_ctl_set(ctrl);
}
}
void GenericTimerInterruptEnable(void)
{
u32 ctrl = aarch32_cntp_ctl_get();
if (ctrl & AARCH32_CNTP_CTL_INTERRUPT_MASK)
{
ctrl &= ~AARCH32_CNTP_CTL_INTERRUPT_MASK;
aarch32_cntp_ctl_set(ctrl);
}
}
void GenericTimerInterruptDisable(void)
{
u64 ctrl = aarch32_cntp_ctl_get();
if (!(ctrl & AARCH32_CNTP_CTL_INTERRUPT_MASK))
{
ctrl |= AARCH32_CNTP_CTL_INTERRUPT_MASK;
aarch32_cntp_ctl_set(ctrl);
}
}
u32 GenericTimerFrequecy(void)
{
u32 rate = aarch32_cntfrq_get();
return (rate != 0) ? rate : 1000000;
}
u64 GenericTimerRead(void)
{
return aarch32_cntpct_get();
}
void GenericTimerCompare(u32 interval)
{
aarch32_cntp_tval_set(interval);
}
#ifdef CONFIG_USE_SYS_TICK
static void GenericTimerClearTickIntr(u32 tickRateHz)
{
GenericTimerCompare(GenericTimerFrequecy() / tickRateHz);
}
static void GenericTimerTickIntrHandler(s32 vector, void *param)
{
u32 tickRateHz = (u32)param;
(void)vector;
genericTick++; /* tick */
GenericTimerClearTickIntr(tickRateHz); /* clear tick intrrupt */
if (usr_tick_handler) /* execute user handler */
usr_tick_handler();
}
#endif
void GenericTimerSetupSystick(u32 tickRateHz, GenericTimerTickHandler tickHandler, u32 intrPrority)
{
#ifdef CONFIG_USE_SYS_TICK
u32 cntFrq;
/* disable timer and get system frequency */
GenericTimerStop();
cntFrq = GenericTimerFrequecy();
/* set tick rate */
GenericTimerCompare(cntFrq / tickRateHz);
GenericTimerInterruptEnable();
/* set generic timer intrrupt */
InterruptSetPriority(GENERIC_TIMER_NS_IRQ_NUM, intrPrority);
/* install tick handler */
usr_tick_handler = tickHandler;
InterruptInstall(GENERIC_TIMER_NS_IRQ_NUM, GenericTimerTickIntrHandler,
(void *)tickRateHz, "GenericTimerTick");
/* enable intrrupt */
InterruptUmask(GENERIC_TIMER_NS_IRQ_NUM);
GenericTimerStart();
#endif
}
u32 GenericGetTick(void)
{
#ifdef CONFIG_USE_SYS_TICK
return genericTick;
#else
return 0xffU;
#endif
}
@@ -0,0 +1,51 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fgeneric_timer.h
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:30:13
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_ARCH_ARMV8_AARCH32_GENERIC_TIMER_H
#define BSP_ARCH_ARMV8_AARCH32_GENERIC_TIMER_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
typedef void (* GenericTimerTickHandler)();
void GenericTimerStart(void);
void GenericTimerStop(void);
void GenericTimerInterruptEnable(void);
void GenericTimerInterruptDisable(void);
u32 GenericTimerFrequecy(void);
u64 GenericTimerRead(void);
void GenericTimerCompare(u32 interval);
void GenericTimerSetupSystick(u32 tickRateHz, GenericTimerTickHandler tickHandler, u32 intrPrority);
u32 GenericGetTick(void);
#ifdef __cplusplus
}
#endif
#endif // !
@@ -0,0 +1,75 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: psci.c
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:30:35
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include "fpsci.h"
#include "fsmc.h"
#include "fcpu_info.h"
#include "ferror_code.h"
#include "fparameters.h"
#include "ftypes.h"
#define PSCI_CPUON_NUM 0x84000003
#define PSCI_RESET_NUM 0x84000009
/**
* @name: FPsci_CpuOn
* @msg: Power up a core
* @in param cpu_id_mask: cpu id mask
* @in param bootaddr: a 32-bit entry point physical address (or IPA).
* @return FError
*/
FError PsciCpuOn(s32 cpu_id_mask, uintptr bootaddr)
{
FError ret ;
u64 cluster = 0;
FSmc_Data_t input = {0};
FSmc_Data_t output = {0};
input.function_identifier = PSCI_CPUON_NUM;
ret = GetCpuAffinityByMask(cpu_id_mask, &cluster);
if (ret != ERR_SUCCESS)
{
return ret;
}
input.a1 = cluster;
input.a2 = (u32)(bootaddr & 0xFFFFFFFF);
FSmcCall(&input, &output);
__asm__ volatile("NOP");
return ERR_SUCCESS;
}
void PsciCpuReset(void)
{
FSmc_Data_t input = {0};
FSmc_Data_t output = {0};
input.function_identifier = PSCI_RESET_NUM;
FSmcCall(&input, &output);
__asm__ volatile("NOP");
while (1)
;
}
@@ -0,0 +1,43 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fpsci.h
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:30:40
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_ARCH_ARMV8_AARCH32_PSCI_H
#define BSP_ARCH_ARMV8_AARCH32_PSCI_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
#include "ferror_code.h"
FError PsciCpuOn(s32 cpu_id_mask, uintptr bootaddr);
void PsciCpuReset(void);
#ifdef __cplusplus
}
#endif
#endif // !
@@ -0,0 +1,53 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fsmc.h
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:30:49
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_ARCH_ARMV8_AARCH32_SMC_H
#define BSP_ARCH_ARMV8_AARCH32_SMC_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
typedef struct
{
/* data */
u32 function_identifier;
u32 a1;
u32 a2;
u32 a3;
u32 a4;
u32 a5;
u32 a6;
} FSmc_Data_t;
void FSmcCall(FSmc_Data_t *Input, FSmc_Data_t *Output);
#ifdef __cplusplus
}
#endif
#endif // !FT_SMC_H
@@ -0,0 +1,58 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: smccc-call.S
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:28:10
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
/*******************************************************************************
*
* FSmcCall - initiate SMC call
*
* This routine initiates SMC call which traps the processor into Monitor Mode.
* The ARM SMC Call Convetion defines that up to eight registers can be exchanged
* during an SMC call. The input parameter contains eight INT32 valeus which are
* to be passed in the SMC call; similarily the output parameter also contains
* eight INT32 values which are returned from the SMC call.
*
* \NOMANUAL
*
* RETURNS: OK
*
* void FSmcCall
* (
* FSmc_Data_t * input, /@ r0 - input register values @/
* FSmc_Data_t * output /@ r1 - output register values @/
* )
*/
.arm
.align 4
.globl FSmcCall
FSmcCall:
STMDB sp!, {r0-r7} /* save clobbered registers to stack */
ldr r12, [sp, #(4 * 0)] /* get 1st argument (ptr to input struct) */
ldmia r12, {r0-r7} /* save input argument to r0-r7 */
smc #0
ldr r12, [sp, #(4 * 1)] /* get 2th argument (ptr to output result) */
stmia r12, {r0-r7} /* get output argument from r0-r7 */
ldmfd sp!, {r0-r7} /* restore clobbered registers from stack */
bx lr
.size FSmcCall, .- FSmcCall
@@ -0,0 +1,125 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: farm_smccc.h
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:32:15
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef __LINUX_ARM_SMCCC_H
#define __LINUX_ARM_SMCCC_H
/*
* This file provides common defines for ARM SMC Calling Convention as
* specified in
* http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
*/
#define ARM_SMCCC_STD_CALL 0
#define ARM_SMCCC_FAST_CALL 1
#define ARM_SMCCC_TYPE_SHIFT 31
#define ARM_SMCCC_SMC_32 0
#define ARM_SMCCC_SMC_64 1
#define ARM_SMCCC_CALL_CONV_SHIFT 30
#define ARM_SMCCC_OWNER_MASK 0x3F
#define ARM_SMCCC_OWNER_SHIFT 24
#define ARM_SMCCC_FUNC_MASK 0xFFFF
#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
#define ARM_SMCCC_IS_64(smc_val) \
((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val)&ARM_SMCCC_FUNC_MASK)
#define ARM_SMCCC_OWNER_NUM(smc_val) \
(((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
(((type) << ARM_SMCCC_TYPE_SHIFT) | \
((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
(((owner)&ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
((func_num)&ARM_SMCCC_FUNC_MASK))
#define ARM_SMCCC_OWNER_ARCH 0
#define ARM_SMCCC_OWNER_CPU 1
#define ARM_SMCCC_OWNER_SIP 2
#define ARM_SMCCC_OWNER_OEM 3
#define ARM_SMCCC_OWNER_STANDARD 4
#define ARM_SMCCC_OWNER_TRUSTED_APP 48
#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
#define ARM_SMCCC_OWNER_TRUSTED_OS 50
#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
#define ARM_SMCCC_QUIRK_NONE 0
#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
#ifndef __ASSEMBLY__
#include <stdio.h>
/**
* struct arm_smccc_res - Result from SMC/HVC call
* @a0-a3 result values from registers 0 to 3
*/
struct arm_smccc_res
{
unsigned long a0;
unsigned long a1;
unsigned long a2;
unsigned long a3;
};
/**
* struct arm_smccc_quirk - Contains quirk information
* @id: quirk identification
* @state: quirk specific information
* @a6: Qualcomm quirk entry for returning post-smc call contents of a6
*/
struct arm_smccc_quirk
{
int id;
union
{
unsigned long a6;
} state;
};
/**
* __arm_smccc_smc() - make SMC calls
* @a0-a7: arguments passed in registers 0 to 7
* @res: result values from registers 0 to 3
* @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
*
* This function is used to make SMC calls following SMC Calling Convention.
* The content of the supplied param are copied to registers 0 to 7 prior
* to the SMC instruction. The return values are updated with the content
* from register 0 to 3 on return from the SMC instruction. An optional
* quirk structure provides vendor specific behavior.
*/
void __arm_smccc_smc(unsigned long a0, unsigned long a1,
unsigned long a2, unsigned long a3, unsigned long a4,
unsigned long a5, unsigned long a6, unsigned long a7,
struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
#endif /*__ASSEMBLY__*/
#endif /*__LINUX_ARM_SMCCC_H*/
@@ -0,0 +1,47 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: psci.c
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:33:51
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include "fpsci.h"
#include "farm_smccc.h"
#include "ftypes.h"
#include "fcpu_info.h"
#include "ferror_code.h"
FError PsciCpuOn(s32 cpu_id_mask, uintptr bootaddr)
{
FError ret ;
u64 cluster = 0;
ret = GetCpuAffinityByMask(cpu_id_mask, &cluster);
if (ret != ERR_SUCCESS)
{
printf("GetCpuAffinity is failed \r\n") ;
return ret ;
}
arm_smccc_smc(0xc4000003, cluster, bootaddr, 0, 0, 0, 0, 0, 0);
return ERR_SUCCESS ;
}
void PsciCpuReset(void)
{
struct arm_smccc_res res;
arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
}
@@ -0,0 +1,41 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fpsci.h
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:34:06
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_ARCH_AARMV8_AARCH64_PSCI_H
#define BSP_ARCH_AARMV8_AARCH64_PSCI_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
#include "ferror_code.h"
void PsciCpuReset(void);
FError PsciCpuOn(s32 cpu_id_mask, uintptr bootaddr);
#ifdef __cplusplus
}
#endif
#endif // !BSP_ARCH_AARMV8_AARCH64_PSCI_H
@@ -0,0 +1,49 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: smccc-call.S
* Date: 2022-02-10 14:53:41
* LastEditTime: 2022-02-17 17:31:23
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
.macro SMCCC instr
\instr #0
ldr x4, [sp]
stp x0, x1, [x4, #0]
stp x2, x3, [x4, #16]
ldr x4, [sp, #8]
cbz x4, 1f /* no quirk structure */
ldr x9, [x4, #0]
cmp x9, #1
b.ne 1f
str x6, [x4, 4]
1: ret
.endm SMCCC instr
/*
* void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
* unsigned long a3, unsigned long a4, unsigned long a5,
* unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
* struct arm_smccc_quirk *quirk)
*/
.globl __arm_smccc_smc
.type __arm_smccc_smc, "function"
.cfi_startproc
__arm_smccc_smc:
SMCCC smc
.cfi_endproc
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,50 @@
menu "Board Configuration"
choice BUILD_TARGET_CHIP_TYPE
prompt "Chip"
default TARGET_E2000Q
help
Select chip type for build
config TARGET_F2000_4
bool "FT2000-4"
config TARGET_D2000
bool "D2000"
config TARGET_E2000Q
bool "E2000Q"
select TARGET_E2000
config TARGET_E2000D
bool "E2000D"
select TARGET_E2000
config TARGET_E2000S
bool "E2000S"
select TARGET_E2000
endchoice # BUILD_TARGET_CHIP_TYPE
# an invisible config to define common code of E2000 Q/D/S
config TARGET_E2000
bool
default y if TARGET_E2000Q || TARGET_E2000D || TARGET_E2000S
choice DEBUG_PRINT_UART
prompt "Select Debug uart instance"
default DEFAULT_DEBUG_PRINT_UART1
help
Select arch for build
config DEFAULT_DEBUG_PRINT_UART1
bool "Use uart1"
config DEFAULT_DEBUG_PRINT_UART0
bool "Use uart0"
config DEFAULT_DEBUG_PRINT_UART2
bool "Use uart2"
endchoice # DEBUG_PRINT_UART
endmenu
@@ -0,0 +1,63 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: _cpu_asm.S
* Date: 2022-02-10 14:53:42
* LastEditTime: 2022-02-17 17:57:55
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include "sdkconfig.h"
#ifdef CONFIG_TARGET_ARMV8_AARCH64
// ------------------------------------------------------------
.global GetAffinity
//uint32_t GetAffinity(void);
.type GetAffinity, @function
GetAffinity:
MRS x0, MPIDR_EL1
RET
.global ArchSpinLock;
.text;
ArchSpinLock:
mov w2, #1
sevl
1:
wfe
ldaxr w1, [x0]
cbnz w1, 1b
stxr w1, w2, [x0]
cbnz w1, 1b
ret
.global ArchSpinUnlock;
.text;
ArchSpinUnlock:
stlr xzr, [x0]
ret
#else
.globl GetAffinity
GetAffinity:
mrc p15, #0, r0, c0, c0, #5 @ read multiprocessor affinity register
bx lr
#endif
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,44 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fcpu_info.h
* Date: 2022-03-08 19:37:19
* LastEditTime: 2022-03-15 11:18:07
* Description:  This file is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BOARD_COMMON_CPU_INFO_H
#define BOARD_COMMON_CPU_INFO_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
#include "ferror_code.h"
u32 GetAffinity(void);
FError GetCpuId(u32 *cpu_id_p);
FError GetCpuAffinity(u32 cpu_id, u64 *cluster_value_p);
FError GetCpuAffinityByMask(u32 cpu_id, u64 *affinity_level_p);
FError UseAffinityGetCpuId(u64 affinity_level, u32 *cpu_id_p);
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list);
#ifdef __cplusplus
}
#endif
#endif // !
@@ -0,0 +1,34 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fsmp.h
* Date: 2022-02-10 14:53:42
* LastEditTime: 2022-02-17 17:58:18
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_BOARD_COMMON_SMP_H
#define BSP_BOARD_COMMON_SMP_H
#include "ftypes.h"
void SpinLockInit(unsigned long global_addr);
void SpinLock(void);
void SpinUnlock(void);
#endif // DEBUG
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@@ -0,0 +1,55 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fparameters.h
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 18:00:50
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BOARD_E2000D_PARAMTERERS_H
#define BOARD_E2000D_PARAMTERERS_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "fparameters_comm.h"
/************************** Constant Definitions *****************************/
#define CORE0_AFF 0x200U
#define CORE1_AFF 0x201U
#define FT_CPUS_NR 2U
/* GIC offset */
#define FT_GIC_REDISTRUBUTIOR_OFFSET 2
/*****************************************************************************/
#ifdef __cplusplus
}
#endif
#endif
@@ -0,0 +1,59 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: early_uart.c
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 17:59:26
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
/***************************** Include Files *********************************/
#include "fkernel.h"
#include "fio.h"
#include "fparameters.h"
#include "fearly_uart.h"
/**************************** Type Definitions *******************************/
/************************** Constant Definitions *****************************/
/************************** Variable Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*****************************************************************************/
void OutByte(s8 byte)
{
/* wait until tx fifo is not full */
while ((FtIn32(EARLY_UART_UARTFR) & EARLY_UART_TXFF) == EARLY_UART_TXFF)
{
}
FtOut32(EARLY_UART_UARTDR, (((u32)byte) & EARLY_UART_DATA_MASK));
}
char GetByte(void)
{
/* wait until rx fifo is not empty */
while ((FtIn32(EARLY_UART_UARTFR) & EARLY_UART_RXFE) == EARLY_UART_RXFE)
{
}
return (char)(EARLY_UART_DATA_MASK & FtIn32(EARLY_UART_UARTDR));
}
@@ -0,0 +1,83 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fearly_uart.h
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 18:00:16
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 rtos 2022/6/25 init commit
*/
#ifndef BOARD_E2000_EARLY_UART_H
#define BOARD_E2000_EARLY_UART_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "ftypes.h"
#include "fio.h"
#include "fparameters.h"
#include "sdkconfig.h"
/**************************** Type Definitions *******************************/
/************************** Constant Definitions *****************************/
#if defined(CONFIG_DEFAULT_DEBUG_PRINT_UART2)
#define EARLY_UART_BASE FUART2_BASE_ADDR
#define EARLY_UART_IRQ_NUM FUART2_IRQ_NUM
#elif defined(CONFIG_DEFAULT_DEBUG_PRINT_UART0)
#define EARLY_UART_BASE FUART0_BASE_ADDR
#define EARLY_UART_IRQ_NUM FUART0_IRQ_NUM
#else
#define EARLY_UART_BASE FUART1_BASE_ADDR
#define EARLY_UART_IRQ_NUM FUART1_IRQ_NUM
#endif
#define EARLY_UART_UARTDR (EARLY_UART_BASE + 0x0) /* UART 数据寄存器地址 */
#define EARLY_UART_UARTFR (EARLY_UART_BASE + 0x18) /* UART 状态寄存器地址 */
#define EARLY_UART_UARTCR (EARLY_UART_BASE + 0x30)
#define EARLY_UART_UARTCR_UARTEN BIT(0)
#define EARLY_UART_UARTCR_TXE BIT(8)
#define EARLY_UART_UARTCR_RXE BIT(9)
#define EARLY_UART_UARTCR_INIT (EARLY_UART_UARTCR_UARTEN | EARLY_UART_UARTCR_TXE | \
EARLY_UART_UARTCR_RXE)
#define EARLY_UART_UARTIMSC (EARLY_UART_BASE + 0x38)
#define EARLY_UART_UARTIMSC_RXIM BIT(4)
#define EARLY_UART_UARTIMSC_RTIM BIT(6)
#define EARLY_UART_UARTMIS (EARLY_UART_BASE + 0x40)
#define EARLY_UART_UARTICR (EARLY_UART_BASE + 0x44)
#define EARLY_UART_TXFF BIT(5) /* 发送 FIFO 已满标志位 */
#define EARLY_UART_RXFE BIT(4) /* 接收 FIFO 为空标志位 */
#define EARLY_UART_DATA_MASK GENMASK(7, 0)
#define EARLY_UART_RXI_MASK BIT(4)
#define STDOUT_BASEADDRESS
/************************** Variable Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*****************************************************************************/
void OutByte(s8 byte);
char GetByte(void);
#ifdef __cplusplus
}
#endif
#endif
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,50 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fparameters.h
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 18:00:50
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BOARD_E2000Q_PARAMTERERS_H
#define BOARD_E2000Q_PARAMTERERS_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "fparameters_comm.h"
/************************** Constant Definitions *****************************/
#define CORE0_AFF 0x000U
#define CORE1_AFF 0x100U
#define CORE2_AFF 0x200U
#define CORE3_AFF 0x201U
#define FT_CPUS_NR 4U
/*****************************************************************************/
#ifdef __cplusplus
}
#endif
#endif
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,53 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fparameters.h
* Date: 2022-02-11 13:33:28
* LastEditTime: 2022-02-17 18:00:50
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BOARD_E2000S_PARAMTERERS_H
#define BOARD_E2000S_PARAMTERERS_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "fparameters_comm.h"
/************************** Constant Definitions *****************************/
#define CORE0_AFF 0x200U
#define FT_CPUS_NR 1U
/* GIC offset */
#define FT_GIC_REDISTRUBUTIOR_OFFSET 2
/*****************************************************************************/
#ifdef __cplusplus
}
#endif
#endif
@@ -0,0 +1,64 @@
choice DEBUG_LOG_LEVEL
prompt "Debug Log Level"
default LOG_ERROR
help
VERBOS: Print bigger chunks of debugging information
DEBUG: Print extra information for debugging
INFO: Print necessary information messages
WARN: Print error conditions from which recovery measures have been taken
ERROR: Print critical errors, software module can not recover on its own
config LOG_VERBOS
bool "VERBOS"
config LOG_DEBUG
bool "DEBUG"
config LOG_INFO
bool "INFO"
config LOG_WARN
bool "WARN"
config LOG_ERROR
bool "ERROR"
config LOG_NONE
bool "NONE"
endchoice # DEBUG_LOG_LEVEL
config USE_DEFAULT_INTERRUPT_CONFIG
bool
prompt "Use default interrupt configuration"
default y
help
"If this option is not selected, core0 is used as the main core by default and all interrupt driver modules are initialized. Non-0 core initializes only the necessary interrupt driver modules. If this option is selected, the developer needs to initiate each module independently "
if USE_DEFAULT_INTERRUPT_CONFIG
choice INTERRUPT_ROLE_SELECT
prompt "Interrupt role select"
default INTERRUPT_ROLE_MASTER
help
"Select Interrupt role"
config INTERRUPT_ROLE_MASTER
bool "use master role"
config INTERRUPT_ROLE_SLAVE
bool "use slave role"
endchoice # INTERRUPT_ROLE_SELECT
endif
config LOG_EXTRA_INFO
bool "Debug Log with Extra Info"
default n
help
Print debug information with source file name and source code line num.
config BOOTUP_DEBUG_PRINTS
bool
prompt "Bootup debug"
default n
help
Enable Bootup debug printing
@@ -0,0 +1,118 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: ft_assert.c
* Date: 2021-04-07 09:53:07
* LastEditTime: 2022-02-17 18:04:28
* Description:  This files is for assertion implmentation
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 huanghe 2021.4 init commit
* 1.1 zhugengyu 2022.3 re-define assert macro
*/
/***************************** Include Files *********************************/
#include "ftypes.h"
#include "fassert.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
typedef struct
{
u32 status; /* 当前断言状态 */
FAssertCB cb; /* 断言回调函数 */
} FAssertInfo; /* 断言实例类型 */
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
static void FAssertCallback(const char *file, s32 line, int ret);
/************************** Variable Definitions *****************************/
static FAssertInfo assert_info =
{
.status = FASSERT_NONE,
.cb = FAssertCallback
}; /* 断言实例 */
/*****************************************************************************/
/**
* @name: FAssertSetStatus
* @msg: 设置断言状态
* @return {*}
* @param {FAssertStatus} status, 断言状态
*/
void FAssertSetStatus(FAssertStatus status)
{
assert_info.status = status;
}
/**
* @name: FAssertGetStatus
* @msg: 获取当前断言状态
* @return {FAssertStatus} 当前断言状态
*/
FAssertStatus FAssertGetStatus(void)
{
return assert_info.status;
}
/**
* @name: FAssertCallback
* @msg: 默认的断言回调函数
* @return {*}
* @param {char} *file, 断言发生的源文件
* @param {s32} line, 断言发生的源文件行号
* @param {int} ret, 保留给Non-block断言使用
*/
static void FAssertCallback(const char *file, s32 line, int ret)
{
f_printk("Assert Error at %s : %ld \r\n", file, line);
}
/**
* @name: FAssertSetCB
* @msg: 设置断言回调函数
* @return {*}
* @param {FAssertCB} cb, 断言回调函数
*/
void FAssertSetCB(FAssertCB cb)
{
if (NULL != cb)
assert_info.cb = cb;
}
/**
* @name: FAssert
* @msg: 断言实现
* @return {*}
* @param {char} *file, 断言发生的源文件
* @param {s32} line, 断言发生的源文件行号
* @param {int} code, 断言发生的退出码,保留给Non-block断言使用
*/
void FAssert(const char *file, s32 line, int code)
{
if (NULL != assert_info.cb)
{
/* 如果要实现Non-block断言,需要在回调中返回 */
assert_info.cb(file, line, code);
}
while (TRUE)
{
;
}
}
@@ -0,0 +1,102 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fassert.h
* Date: 2021-04-07 09:53:07
* LastEditTime: 2022-02-17 18:04:35
* Description:  This files is for assertion defintion
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 huanghe 2021.4 init commit
* 1.1 zhugengyu 2022.3 re-define assert macro
*/
#ifndef FT_ASSERT_H
#define FT_ASSERT_H
#ifdef __cplusplus
extern "C"
{
#endif
/***************************** Include Files *********************************/
#include "fprintk.h"
#include "ferror_code.h"
#include "ftypes.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
typedef enum
{
FASSERT_NONE = 0,
FASSERT_OCCURRED
} FAssertStatus; /* 断言状态 */
/* 断言处理回调函数 */
typedef void (*FAssertCB)(const char *file, s32 line, int ret);
/************************** Variable Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
#define FASSERT_MSG(expression, fmt, ...) \
{ \
if (expression) \
{ \
FAssertSetStatus(FASSERT_NONE); \
} \
else \
{ \
FAssertSetStatus(FASSERT_OCCURRED); \
f_printk(fmt, ##__VA_ARGS__); \
FAssert(__FILE__, __LINE__, 0xff); \
} \
}
#define FASSERT(expression)\
{ \
if (expression) \
{ \
FAssertSetStatus(FASSERT_NONE); \
} \
else \
{ \
FAssertSetStatus(FASSERT_OCCURRED); \
FAssert(__FILE__, __LINE__, 0xff); \
} \
}
/* 检查静态断言状态 */
#define FASSERT_STATIC(expression) \
extern int assert_static[(expression) ? 1 : -1]
/************************** Function Prototypes ******************************/
/* 设置断言状态 */
void FAssertSetStatus(FAssertStatus status);
/* 获取当前断言状态 */
FAssertStatus FAssertGetStatus(void);
/* 设置断言回调函数 */
void FAssertSetCB(FAssertCB cb);
/* 断言实现 */
void FAssert(const char *file, s32 line, int code);
#ifdef __cplusplus
}
#endif
#endif // !
@@ -0,0 +1,106 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: ft_debug.c
* Date: 2021-04-25 16:44:23
* LastEditTime: 2022-02-17 18:04:50
* Description:  This files is for
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include "fdebug.h"
#include "fprintf.h"
#include "stdio.h"
#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
void FtDumpHexByte(const u8 *ptr, u32 buflen)
{
u8 *buf = (u8 *)ptr;
fsize_t i, j;
for (i = 0; i < buflen; i += 16)
{
printf("%p: ", ptr + i);
for (j = 0; j < 16; j++)
if (i + j < buflen)
printf("%02X ", buf[i + j]);
else
printf(" ");
printf(" ");
for (j = 0; j < 16; j++)
if (i + j < buflen)
printf("%c", (char)(__is_print(buf[i + j]) ? buf[i + j] : '.'));
printf("\r\n");
}
}
void FtDumpHexByteDebug(const u8 *ptr, u32 buflen)
{
u8 *buf = (u8 *)ptr;
fsize_t i, j;
for (i = 0; i < buflen; i += 16)
{
f_printf("%x: ", ptr + i);
for (j = 0; j < 16; j++)
if (i + j < buflen)
f_printf("%x ", buf[i + j]);
else
f_printf(" ");
f_printf(" ");
for (j = 0; j < 16; j++)
if (i + j < buflen)
f_printf("%c", (char)(__is_print(buf[i + j]) ? buf[i + j] : '.'));
f_printf("\r\n");
}
}
void FtDumpHexWord(const u32 *ptr, u32 buflen)
{
u32 *buf = (u32 *)ptr;
u8 *char_data = (u8 *)ptr;
fsize_t i, j;
buflen = buflen / 4;
for (i = 0; i < buflen; i += 4)
{
printf("%p: ", ptr + i);
for (j = 0; j < 4; j++)
{
if (i + j < buflen)
{
printf("%lx ", buf[i + j]);
}
else
{
printf(" ");
}
}
printf(" ");
for (j = 0; j < 16; j++)
if (i + j < buflen)
printf("%c", (char)(__is_print(char_data[i + j]) ? char_data[i + j] : '.'));
printf("\r\n");
}
}
@@ -0,0 +1,127 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fdebug.h
* Date: 2021-04-07 09:53:07
* LastEditTime: 2022-02-17 18:04:58
* Description:  This files is for debug functions
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef BSP_COMMON_FT_DEBUG_H
#define BSP_COMMON_FT_DEBUG_H
#include <stdio.h>
#include "sdkconfig.h"
#include "ftypes.h"
typedef enum
{
FT_LOG_NONE, /* No log output */
FT_LOG_ERROR, /* Critical errors, software module can not recover on its own */
FT_LOG_WARN, /* Error conditions from which recovery measures have been taken */
FT_LOG_INFO, /* Information messages which describe normal flow of events */
FT_LOG_DEBUG, /* Extra information which is not necessary for normal use (values, pointers, sizes, etc). */
FT_LOG_VERBOSE /* Bigger chunks of debugging information, or frequent messages which can potentially flood the output. */
} ft_log_level_t;
#define LOG_COLOR_BLACK "30"
#define LOG_COLOR_RED "31"
#define LOG_COLOR_GREEN "32"
#define LOG_COLOR_BROWN "33"
#define LOG_COLOR_BLUE "34"
#define LOG_COLOR_PURPLE "35"
#define LOG_COLOR_CYAN "36"
#define LOG_COLOR(COLOR) "\033[0;" COLOR "m"
#define LOG_BOLD(COLOR) "\033[1;" COLOR "m"
#define LOG_RESET_COLOR "\033[0m"
#define LOG_COLOR_E LOG_COLOR(LOG_COLOR_RED)
#define LOG_COLOR_W LOG_COLOR(LOG_COLOR_BROWN)
#define LOG_COLOR_I LOG_COLOR(LOG_COLOR_GREEN)
#define LOG_COLOR_D LOG_COLOR(LOG_COLOR_CYAN)
#define LOG_COLOR_V LOG_COLOR(LOG_COLOR_PURPLE)
/* select debug log level */
#ifdef CONFIG_LOG_VERBOS
#define LOG_LOCAL_LEVEL FT_LOG_VERBOSE
#endif
#ifdef CONFIG_LOG_ERROR
#define LOG_LOCAL_LEVEL FT_LOG_ERROR
#endif
#ifdef CONFIG_LOG_WARN
#define LOG_LOCAL_LEVEL FT_LOG_WARN
#endif
#ifdef CONFIG_LOG_INFO
#define LOG_LOCAL_LEVEL FT_LOG_INFO
#endif
#ifdef CONFIG_LOG_DEBUG
#define LOG_LOCAL_LEVEL FT_LOG_DEBUG
#endif
#define LOG_FORMAT(letter, format) LOG_COLOR_##letter " %s: " format LOG_RESET_COLOR "\r\n"
#define PORT_KPRINTF printf
#ifndef CONFIG_LOG_EXTRA_INFO
#define LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) \
do \
{ \
if (LOG_LOCAL_LEVEL < log_level) \
break; \
PORT_KPRINTF(LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
} while (0)
#else
#include <string.h>
#define __FILENAME__ (strrchr(__FILE__, '/') ? (strrchr(__FILE__, '/') + 1):__FILE__)
/* print debug information with source file name and source code line num. */
#define LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) \
do \
{ \
if (LOG_LOCAL_LEVEL < log_level) \
break; \
PORT_KPRINTF(LOG_FORMAT(log_tag_letter, format" @%s:%d"), tag, ##__VA_ARGS__, __FILENAME__, __LINE__); \
} while (0)
#endif
#define EARLY_LOGE(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_ERROR, E, ##__VA_ARGS__)
#define EARLY_LOGI(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_INFO, I, ##__VA_ARGS__)
#define EARLY_LOGD(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_DEBUG, D, ##__VA_ARGS__)
#define EARLY_LOGW(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_WARN, W, ##__VA_ARGS__)
#define EARLY_LOGV(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_VERBOSE, W, ##__VA_ARGS__)
/* do not compile log if define CONFIG_LOG_NONE */
#ifndef CONFIG_LOG_NONE
#define FT_DEBUG_PRINT_I(TAG, format, ...) EARLY_LOGI(TAG, format, ##__VA_ARGS__)
#define FT_DEBUG_PRINT_E(TAG, format, ...) EARLY_LOGE(TAG, format, ##__VA_ARGS__)
#define FT_DEBUG_PRINT_D(TAG, format, ...) EARLY_LOGD(TAG, format, ##__VA_ARGS__)
#define FT_DEBUG_PRINT_W(TAG, format, ...) EARLY_LOGW(TAG, format, ##__VA_ARGS__)
#define FT_DEBUG_PRINT_V(TAG, format, ...) EARLY_LOGV(TAG, format, ##__VA_ARGS__)
#else
#define FT_DEBUG_PRINT_I(TAG, format, ...)
#define FT_DEBUG_PRINT_E(TAG, format, ...)
#define FT_DEBUG_PRINT_D(TAG, format, ...)
#define FT_DEBUG_PRINT_W(TAG, format, ...)
#define FT_DEBUG_PRINT_V(TAG, format, ...)
#endif
#define FT_RAW_PRINTF(format, ...) PORT_KPRINTF(format, ##__VA_ARGS__)
void FtDumpHexWord(const u32 *ptr, u32 buflen);
void FtDumpHexByte(const u8 *ptr, u32 buflen);
#endif // !
@@ -0,0 +1,106 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: ferror_code.h
* Date: 2021-04-07 09:53:30
* LastEditTime: 2022-02-17 18:05:27
* Description:  This files is for error code functions
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef _FT_ERROR_CODE_H
#define _FT_ERROR_CODE_H
#include "ftypes.h"
typedef u32 FError;
#define FT_SUCCESS 0
/* 系统错误码模块定义 */
typedef enum
{
ErrorModGeneral = 0,
ErrModBsp,
ErrModAssert,
ErrModPort,
StatusModBsp,
ErrModMaxMask = 255,
} FtErrorCodeModuleMask;
/* COMMON组件的错误码子模块定义 */
typedef enum
{
ErrCommGeneral = 0,
ErrCommMemp,
ErrInterrupt,
} FtErrCodeCommMask;
/* BSP模块的错误子模块定义 */
typedef enum
{
ErrBspGeneral = 0,
ErrBspClk,
ErrBspRtc,
ErrBspTimer,
ErrBspUart,
ErrBspGpio,
ErrBspSpi,
ErrBspEth,
ErrBspCan,
ErrPcie,
ErrBspQSpi,
ErrBspMio,
ErrBspI2c,
ErrBspMmc,
ErrBspWdt,
ErrGic,
ErrGdma,
ErrNand,
ErrIoMux,
ErrBspSata,
ErrUsb,
ErrEthPhy,
ErrDdma,
ErrBspAdc,
ErrBspPwm,
ErrSema,
ErrBspModMaxMask = 255
} FtErrCodeBspMask;
#define FT_ERRCODE_SYS_MODULE_OFFSET (u32)24
#define FT_ERRCODE_SUB_MODULE_OFFSET (u32)16
#define FT_ERRCODE_SYS_MODULE_MASK ((u32)0xff << FT_ERRCODE_SYS_MODULE_OFFSET) /* bit 24 .. 31 */
#define FT_ERRCODE_SUB_MODULE_MASK ((u32)0xff << FT_ERRCODE_SUB_MODULE_OFFSET) /* bit 16 .. 23 */
#define FT_ERRCODE_TAIL_VALUE_MASK ((u32)0xffff) /* bit 1 .. 15 */
/* Offset error code */
#define FT_ERRCODE_OFFSET(code, offset, mask) \
(((code) << (offset)) & (mask))
/* Assembly error code */
#define FT_MAKE_ERRCODE(sys_mode, sub_mode, tail) \
((FT_ERRCODE_OFFSET((u32)sys_mode, FT_ERRCODE_SYS_MODULE_OFFSET, FT_ERRCODE_SYS_MODULE_MASK)) | \
(FT_ERRCODE_OFFSET((u32)sub_mode, FT_ERRCODE_SUB_MODULE_OFFSET, FT_ERRCODE_SUB_MODULE_MASK)) | \
((u32)tail & FT_ERRCODE_TAIL_VALUE_MASK))
#define FT_CODE_ERR FT_MAKE_ERRCODE
#define ERR_SUCCESS FT_MAKE_ERRCODE(ErrorModGeneral, ErrBspGeneral, 0) /* 成功 */
#define ERR_GENERAL FT_MAKE_ERRCODE(ErrorModGeneral, ErrBspGeneral, 1) /* 一般错误 */
#endif
@@ -0,0 +1,113 @@
/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fio.h
* Date: 2021-04-07 09:53:07
* LastEditTime: 2022-02-18 08:24:01
* Description:  This files is for general reigster io functions
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#ifndef FT_IO_H
#define FT_IO_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ftypes.h"
static _INLINE u8 FtIn8(uintptr addr)
{
return *(volatile u8 *)addr;
}
static _INLINE u16 FtIn16(uintptr addr)
{
return *(volatile u16 *)addr;
}
static _INLINE u32 FtIn32(uintptr addr)
{
return *(volatile u32 *)addr;
}
static _INLINE u64 FtIn64(uintptr addr)
{
return *(volatile u64 *)addr;
}
static _INLINE void FtOut8(uintptr addr, u8 value)
{
volatile u8 *local_addr = (volatile u8 *)addr;
*local_addr = value;
}
static _INLINE void FtOut16(uintptr addr, u16 value)
{
volatile u16 *local_addr = (volatile u16 *)addr;
*local_addr = value;
}
static _INLINE void FtOut32(uintptr addr, u32 value)
{
volatile u32 *local_addr = (volatile u32 *)addr;
*local_addr = value;
}
static _INLINE void FtOut64(uintptr addr, u64 value)
{
volatile u64 *local_addr = (volatile u64 *)addr;
*local_addr = value;
}
static _INLINE void FtSetBit32(uintptr addr, u32 value)
{
volatile u32 last_value;
last_value = FtIn32(addr);
last_value |= value;
FtOut32(addr, last_value);
}
static _INLINE void FtClearBit32(uintptr addr, u32 value)
{
volatile u32 last_value;
last_value = FtIn32(addr);
last_value &= ~value;
FtOut32(addr, last_value);
}
static _INLINE void FtToggleBit32(uintptr addr, u32 toggle_pos)
{
volatile u32 value;
value = FtIn32(addr);
value ^= (1 << toggle_pos);
FtOut32(addr, value);
}
static _INLINE u16 FtEndianSwap16(u16 data)
{
return (u16)(((data & 0xFF00U) >> 8U) | ((data & 0x00FFU) << 8U));
}
#define FT_WRITE32(_reg, _val) (*(volatile uint32_t *)&_reg = _val)
#define FT_READ32(_reg) (*(volatile uint32_t *)&_reg)
#ifdef __cplusplus
}
#endif
#endif // !
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