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[add] dcmi and ov5640 driver.

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This commit is contained in:
thread-liu
2020-12-03 09:02:36 +08:00
parent c5612fd2e1
commit 10da8d4e44
16 changed files with 4522 additions and 41 deletions
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bsp/stm32/libraries/STM32MPxx_HAL/SConscript
+3 -1
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@@ -69,7 +69,9 @@ if GetDepend(['RT_USING_SDIO']):
if GetDepend(['RT_USING_AUDIO']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai.c']
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai_ex.c']
if GetDepend(['BSP_USING_DCMI']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dcmi.c']
if GetDepend(['BSP_USING_FMC']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fmc.c']
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fsmc.c']
bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sd.c
+2 -2
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@@ -3236,7 +3236,7 @@ uint32_t SD_HighSpeed(SD_HandleTypeDef *hsd)
{
SD_hs[(8U*loop)+count] = SDMMC_ReadFIFO(hsd->Instance);
}
loop += 8U;
loop ++;
}
if((HAL_GetTick()-Timeout) >= SDMMC_DATATIMEOUT)
@@ -3351,7 +3351,7 @@ uint32_t SD_UltraHighSpeed(SD_HandleTypeDef *hsd)
{
SD_hs[(8U*loop)+count] = SDMMC_ReadFIFO(hsd->Instance);
}
loop += 8U;
loop ++;
}
if((HAL_GetTick()-Timeout) >= SDMMC_DATATIMEOUT)
bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Inc/stm32mp1xx_hal_conf.h
+1 -1
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@@ -37,7 +37,7 @@
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/*#define HAL_DCMI_MODULE_ENABLED */
#define HAL_DCMI_MODULE_ENABLED
/*#define HAL_DSI_MODULE_ENABLED */
/*#define HAL_DFSDM_MODULE_ENABLED */
/*#define HAL_DTS_MODULE_ENABLED */
bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
+123
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@@ -1397,6 +1397,129 @@ void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai)
}
}
/**
* @brief DCMI MSP Initialization
* This function configures the hardware resources used in this example
* @param hdcmi: DCMI handle pointer
* @retval None
*/
void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hdcmi->Instance==DCMI)
{
/* USER CODE BEGIN DCMI_MspInit 0 */
/* USER CODE END DCMI_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DCMI_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**DCMI GPIO Configuration
PH9 ------> DCMI_D0
PH10 ------> DCMI_D1
PH11 ------> DCMI_D2
PH12 ------> DCMI_D3
PH14 ------> DCMI_D4
PI4 ------> DCMI_D5
PB8 ------> DCMI_D6
PE6 ------> DCMI_D7
PH8 ------> DCMI_HSYNC
PB7 ------> DCMI_VSYNC
PA6 ------> DCMI_PIXCLK
*/
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_8
|GPIO_PIN_9|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
HAL_NVIC_SetPriority(DCMI_IRQn, 0x03, 0x00);
HAL_NVIC_EnableIRQ(DCMI_IRQn);
/* USER CODE BEGIN DCMI_MspInit 1 */
/* USER CODE END DCMI_MspInit 1 */
}
}
/**
* @brief DCMI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdcmi: DCMI handle pointer
* @retval None
*/
void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
{
if(hdcmi->Instance==DCMI)
{
/* USER CODE BEGIN DCMI_MspDeInit 0 */
/* USER CODE END DCMI_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DCMI_CLK_DISABLE();
/**DCMI GPIO Configuration
PH10 ------> DCMI_D1
PH11 ------> DCMI_D2
PH14 ------> DCMI_D4
PH8 ------> DCMI_HSYNC
PH9 ------> DCMI_D0
PE6 ------> DCMI_D7
PH12 ------> DCMI_D3
PB7 ------> DCMI_VSYNC
PI4 ------> DCMI_D5
PA6 ------> DCMI_PIXCLK
PB8 ------> DCMI_D6
*/
HAL_GPIO_DeInit(GPIOH, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_8
|GPIO_PIN_9|GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7|GPIO_PIN_8);
HAL_GPIO_DeInit(GPIOI, GPIO_PIN_4);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6);
/* USER CODE BEGIN DCMI_MspDeInit 1 */
HAL_DMA_DeInit(hdcmi->DMA_Handle);
/* USER CODE END DCMI_MspDeInit 1 */
}
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
bsp/stm32/stm32mp157a-st-ev1/board/Kconfig
+12
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@@ -72,6 +72,18 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_I2C2
default n
config BSP_USING_DCMI
bool "Enable CAMERA (ov5640)"
select BSP_USING_MFX
select BSP_USING_PMIC
select BSP_USING_I2C
select BSP_USING_I2C2
default n
config BSP_USING_MFX
bool "Enable Multi Function eXpander"
default n
endmenu
menu "On-chip Peripheral Drivers"
bsp/stm32/stm32mp157a-st-ev1/board/SConscript
+8
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@@ -32,6 +32,14 @@ if GetDepend(['BSP_USING_AUDIO']):
src += Glob('ports/drv_wm8994.c')
src += Glob('ports/drv_sound.c')
if GetDepend(['BSP_USING_DCMI']):
src += Glob('ports/drv_dcmi.c')
src += Glob('ports/drv_ov5640.c')
if GetDepend(['BSP_USING_MFX']):
src += Glob('ports/drv_mfx.c')
src += Glob('ports/mfxstm32l152.c')
if GetDepend(['BSP_USING_OPENAMP']):
src += Glob('CubeMX_Config/CM4/Src/ipcc.c')
src += Glob('CubeMX_Config/CM4/Src/openamp.c')
bsp/stm32/stm32mp157a-st-ev1/board/board.h
+1 -6
View File
@@ -23,14 +23,9 @@ extern "C" {
#endif
#define STM32_FLASH_START_ADRESS ((uint32_t)0x10000000)
#if defined(BSP_USING_OPENAMP)
#define STM32_FLASH_SIZE (64 * 1024)
#else
#define STM32_FLASH_SIZE (256 * 1024)
#endif
#define STM32_FLASH_SIZE (191 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(BSP_USING_OPENAMP)
#define STM32_SRAM_BEGIN (uint32_t)0x10030000
#else
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_dcmi.c
+203
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@@ -0,0 +1,203 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu the first version
*/
#include "board.h"
#if defined(BSP_USING_DCMI)
#include "drv_dcmi.h"
#define DRV_DEBUG
#define LOG_TAG "drv.dcmi"
#include <drv_log.h>
struct stm32_dcmi
{
struct rt_device dev;
};
static struct stm32_dcmi rt_dcmi = {0};
DCMI_HandleTypeDef dcmi = {0};
DMA_HandleTypeDef hdma_dcmi = {0};
extern void jpeg_data_process(void);
static void rt_hw_dmci_dma_init(void)
{
__HAL_RCC_DMAMUX_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
hdma_dcmi.Instance = DMA1_Stream3;
hdma_dcmi.Init.Request = DMA_REQUEST_DCMI;
hdma_dcmi.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_dcmi.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_dcmi.Init.MemInc = DMA_MINC_ENABLE;
hdma_dcmi.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_dcmi.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_dcmi.Init.Mode = DMA_CIRCULAR;
hdma_dcmi.Init.Priority = DMA_PRIORITY_HIGH;
hdma_dcmi.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_dcmi.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_dcmi.Init.MemBurst = DMA_MBURST_SINGLE;
hdma_dcmi.Init.PeriphBurst = DMA_PBURST_SINGLE;
HAL_DMA_Init(&hdma_dcmi);
__HAL_LINKDMA(&dcmi, DMA_Handle, hdma_dcmi);
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0x02, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
}
void rt_hw_dcmi_dma_config(rt_uint32_t dst_addr1, rt_uint32_t dst_addr2, rt_uint16_t len)
{
HAL_DMAEx_MultiBufferStart(&hdma_dcmi, (rt_uint32_t)&DCMI->DR, dst_addr1, dst_addr2, len);
__HAL_DMA_ENABLE_IT(&hdma_dcmi, DMA_IT_TC);
}
static rt_err_t rt_hw_dcmi_init(DCMI_HandleTypeDef *device)
{
RT_ASSERT(device != RT_NULL);
device->Instance = DCMI;
device->Init.SynchroMode = DCMI_SYNCHRO_HARDWARE;
device->Init.PCKPolarity = DCMI_PCKPOLARITY_RISING;
device->Init.VSPolarity = DCMI_VSPOLARITY_LOW;
device->Init.HSPolarity = DCMI_HSPOLARITY_LOW;
device->Init.CaptureRate = DCMI_CR_ALL_FRAME;
device->Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B;
device->Init.JPEGMode = DCMI_JPEG_DISABLE;
device->Init.ByteSelectMode = DCMI_BSM_ALL;
device->Init.ByteSelectStart = DCMI_OEBS_ODD;
device->Init.LineSelectMode = DCMI_LSM_ALL;
device->Init.LineSelectStart = DCMI_OELS_ODD;
if (HAL_DCMI_Init(device) != HAL_OK)
{
LOG_E("dcmi init error!");
return RT_ERROR;
}
DCMI->IER = 0x0;
__HAL_DCMI_ENABLE_IT(device, DCMI_IT_FRAME);
__HAL_DCMI_ENABLE(device);
rt_hw_dmci_dma_init();
return RT_EOK;
}
void DCMI_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DCMI_IRQHandler(&dcmi);
/* leave interrupt */
rt_interrupt_leave();
}
/* Capture a frame of the image */
void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
{
/* enter interrupt */
rt_interrupt_enter();
jpeg_data_process();
__HAL_DCMI_ENABLE_IT(&dcmi,DCMI_IT_FRAME);
/* leave interrupt */
rt_interrupt_leave();
}
void DMA1_Stream3_IRQHandler(void)
{
extern void rt_hw_camera_rx_callback(void);
/* enter interrupt */
rt_interrupt_enter();
if(__HAL_DMA_GET_FLAG(&hdma_dcmi, DMA_FLAG_TCIF3_7)!=RESET)
{
__HAL_DMA_CLEAR_FLAG(&hdma_dcmi, DMA_FLAG_TCIF3_7);
rt_hw_camera_rx_callback();
}
/* leave interrupt */
rt_interrupt_leave();
}
static rt_err_t rt_dcmi_init(rt_device_t dev)
{
RT_ASSERT(dev != RT_NULL);
rt_err_t result = RT_EOK;
result = rt_hw_dcmi_init(&dcmi);
if (result != RT_EOK)
{
return result;
}
return result;
}
static rt_err_t rt_dcmi_open(rt_device_t dev, rt_uint16_t oflag)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_err_t rt_dcmi_close(rt_device_t dev)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_err_t rt_dcmi_control(rt_device_t dev, int cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_size_t rt_dcmi_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_size_t rt_dcmi_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
int dcmi_init(void)
{
rt_dcmi.dev.type = RT_Device_Class_Miscellaneous;
rt_dcmi.dev.init = rt_dcmi_init;
rt_dcmi.dev.open = rt_dcmi_open;
rt_dcmi.dev.close = rt_dcmi_close;
rt_dcmi.dev.read = rt_dcmi_read;
rt_dcmi.dev.write = rt_dcmi_write;
rt_dcmi.dev.control = rt_dcmi_control;
rt_dcmi.dev.user_data = RT_NULL;
rt_device_register(&rt_dcmi.dev, "dcmi", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
LOG_I("dcmi init success!");
return RT_EOK;
}
INIT_BOARD_EXPORT(dcmi_init);
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_dcmi.h
+22
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@@ -0,0 +1,22 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu first version
*/
#ifndef __DRV_DCMI_H__
#define __DRV_DCMI_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_mfx.c
+297
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@@ -0,0 +1,297 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-08-08 thread-liu first version
*/
#include "board.h"
#include "mfxstm32l152.h"
#define DRV_DEBUG
#define LOG_TAG "drv.mfx"
#include <drv_log.h>
#define CHIP_ADDRESS 0x42 /* mfx address */
#define I2C_NAME "i2c2"
struct st_mfx
{
struct rt_device dev;
struct rt_i2c_bus_device *i2c_bus;
rt_uint8_t id;
rt_uint16_t type;
};
static struct st_mfx rt_mfx = {0};
static IO_DrvTypeDef *IoDrv = NULL;
static rt_err_t read_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint16_t len, rt_uint8_t *buf)
{
struct rt_i2c_msg msg[2] = {0, 0};
RT_ASSERT(bus != RT_NULL);
msg[0].addr = CHIP_ADDRESS;
msg[0].flags = RT_I2C_WR;
msg[0].buf = &reg;
msg[0].len = 1;
msg[1].addr = CHIP_ADDRESS;
msg[1].flags = RT_I2C_RD;
msg[1].len = len;
msg[1].buf = buf;
if (rt_i2c_transfer(bus, msg, 2) == 2)
{
return RT_EOK;
}
return RT_ERROR;
}
/* i2c write reg */
static rt_err_t write_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t data)
{
rt_uint8_t buf[2];
struct rt_i2c_msg msgs;
RT_ASSERT(bus != RT_NULL);
buf[0] = reg;
buf[1] = data;
msgs.addr = CHIP_ADDRESS;
msgs.flags = RT_I2C_WR;
msgs.buf = buf;
msgs.len = sizeof(buf);
if (rt_i2c_transfer(bus, &msgs, 1) == 1)
{
return RT_EOK;
}
return RT_ERROR;
}
void MFX_IO_Init(void)
{
rt_mfx.i2c_bus = rt_i2c_bus_device_find(I2C_NAME);
if (rt_mfx.i2c_bus == RT_NULL)
{
LOG_E("can't find %c deivce", I2C_NAME);
}
}
void MFX_IO_DeInit(void)
{
}
void MFX_IO_ITConfig(void)
{
static rt_uint8_t mfx_io_it_enabled = 0;
GPIO_InitTypeDef gpio_init_structure;
if(mfx_io_it_enabled == 0)
{
mfx_io_it_enabled = 1;
/* Enable the GPIO EXTI clock */
__HAL_RCC_GPIOI_CLK_ENABLE();
gpio_init_structure.Pin = GPIO_PIN_8;
gpio_init_structure.Pull = GPIO_NOPULL;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_LOW;
gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
HAL_GPIO_Init(GPIOI, &gpio_init_structure);
/* Enable and set GPIO EXTI Interrupt to the lowest priority */
HAL_NVIC_SetPriority((IRQn_Type)(EXTI8_IRQn), 0x04, 0x00);
HAL_NVIC_EnableIRQ((IRQn_Type)(EXTI8_IRQn));
}
}
void MFX_IO_Write(rt_uint16_t Addr, rt_uint8_t Reg, rt_uint8_t Value)
{
write_reg(rt_mfx.i2c_bus, Reg, Value);
}
rt_uint8_t MFX_IO_Read(rt_uint16_t Addr, rt_uint8_t Reg)
{
rt_uint8_t value = 0;
read_reg(rt_mfx.i2c_bus, Reg, 1, &value);
return value;
}
rt_uint16_t MFX_IO_ReadMultiple(rt_uint16_t Addr, rt_uint8_t Reg, rt_uint8_t *Buffer, rt_uint16_t Length)
{
return read_reg(rt_mfx.i2c_bus, Reg, Length, Buffer);
}
RT_WEAK void MFX_IO_Delay(rt_uint32_t Delay)
{
rt_thread_delay(Delay);
}
RT_WEAK void MFX_IO_Wakeup(void)
{
}
RT_WEAK void MFX_IO_EnableWakeupPin(void)
{
}
rt_uint8_t BSP_IO_DeInit(void)
{
IoDrv = NULL;
return RT_EOK;
}
rt_uint32_t BSP_IO_ITGetStatus(rt_uint32_t IoPin)
{
/* Return the IO Pin IT status */
return (IoDrv->ITStatus(0, IoPin));
}
/**
* @brief Clears all the IO IT pending bits.
* @retval None
*/
void BSP_IO_ITClear(void)
{
/* Clear all IO IT pending bits */
IoDrv->ClearIT(0, MFXSTM32L152_GPIO_PINS_ALL);
}
void BSP_IO_ITClearPin(rt_uint32_t IO_Pins_To_Clear)
{
/* Clear only the selected list of IO IT pending bits */
IoDrv->ClearIT(0, IO_Pins_To_Clear);
}
/**
* @brief Configures the IO pin(s) according to IO mode structure value.
* @param IoPin: IO pin(s) to be configured.
* This parameter can be one of the following values:
* @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
* @param IoMode: IO pin mode to configure
* This parameter can be one of the following values:
* @arg IO_MODE_INPUT
* @arg IO_MODE_OUTPUT
* @arg IO_MODE_IT_RISING_EDGE
* @arg IO_MODE_IT_FALLING_EDGE
* @arg IO_MODE_IT_LOW_LEVEL
* @arg IO_MODE_IT_HIGH_LEVEL
* @arg IO_MODE_ANALOG
* @arg IO_MODE_OFF
* @arg IO_MODE_INPUT_PU,
* @arg IO_MODE_INPUT_PD,
* @arg IO_MODE_OUTPUT_OD,
* @arg IO_MODE_OUTPUT_OD_PU,
* @arg IO_MODE_OUTPUT_OD_PD,
* @arg IO_MODE_OUTPUT_PP,
* @arg IO_MODE_OUTPUT_PP_PU,
* @arg IO_MODE_OUTPUT_PP_PD,
* @arg IO_MODE_IT_RISING_EDGE_PU
* @arg IO_MODE_IT_FALLING_EDGE_PU
* @arg IO_MODE_IT_LOW_LEVEL_PU
* @arg IO_MODE_IT_HIGH_LEVEL_PU
* @arg IO_MODE_IT_RISING_EDGE_PD
* @arg IO_MODE_IT_FALLING_EDGE_PD
* @arg IO_MODE_IT_LOW_LEVEL_PD
* @arg IO_MODE_IT_HIGH_LEVEL_PD
* @retval RT_EOK if all initializations are OK. Other value if error.
*/
rt_uint8_t rt_mfx_pin_mode(rt_uint32_t IoPin, IO_ModeTypedef IoMode)
{
/* Configure the selected IO pin(s) mode */
IoDrv->Config(0, IoPin, IoMode);
return RT_EOK;
}
/**
* @brief Sets the IRQ_OUT pin polarity and type
* @param IoIrqOutPinPolarity: High/Low
* @param IoIrqOutPinType: OpenDrain/PushPull
* @retval OK
*/
rt_uint8_t rt_mfx_config_irq(rt_uint8_t IoIrqOutPinPolarity, rt_uint8_t IoIrqOutPinType)
{
if((rt_mfx.id == MFXSTM32L152_ID_1) || (rt_mfx.id == MFXSTM32L152_ID_2))
{
/* Initialize the IO driver structure */
mfxstm32l152_SetIrqOutPinPolarity(0, IoIrqOutPinPolarity);
mfxstm32l152_SetIrqOutPinType(0, IoIrqOutPinType);
}
return RT_EOK;
}
/**
* @brief Sets the selected pins state.
* @param IoPin: Selected pins to write.
* This parameter can be any combination of the IO pins.
* @param PinState: New pins state to write
* @retval None
*/
void rt_mfx_pin_write(rt_uint32_t IoPin, rt_base_t PinState)
{
/* Set the Pin state */
IoDrv->WritePin(0, IoPin, PinState);
}
/**
* @brief Gets the selected pins current state.
* @param IoPin: Selected pins to read.
* This parameter can be any combination of the IO pins.
* @retval The current pins state
*/
rt_uint32_t rt_mfx_pin_read(rt_uint32_t IoPin)
{
return(IoDrv->ReadPin(0, IoPin));
}
/**
* @brief Toggles the selected pins state.
* @param IoPin: Selected pins to toggle.
* This parameter can be any combination of the IO pins.
* @note This function is only used to toggle one pin in the same time
* @retval None
*/
void rt_mfx_pin_toggle(rt_uint32_t IoPin)
{
/* Toggle the current pin state */
if(IoDrv->ReadPin(0, IoPin) != 0)
{
IoDrv->WritePin(0, IoPin, 0); /* Reset */
}
else
{
IoDrv->WritePin(0, IoPin, 1); /* Set */
}
}
int rt_mfx_init(void)
{
/* Read ID and verify the MFX is ready */
rt_mfx.id = mfxstm32l152_io_drv.ReadID(0);
if((rt_mfx.id == MFXSTM32L152_ID_1) || (rt_mfx.id == MFXSTM32L152_ID_2))
{
/* Initialize the IO driver structure */
IoDrv = &mfxstm32l152_io_drv;
/* Initialize MFX */
IoDrv->Init(0);
IoDrv->Start(0, IO_PIN_ALL);
LOG_I("mfx init success, id: 0x%x", rt_mfx.id);
return RT_EOK;
}
LOG_I("mfx init error, id: 0x%x", rt_mfx.id);
return RT_ERROR;
}
INIT_DEVICE_EXPORT(rt_mfx_init);
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_mfx.h
+45
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@@ -0,0 +1,45 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-08-08 thread-liu first version
*/
#ifndef __DRV_MFX_H__
#define __DRV_MFX_H__
#include "board.h"
#include "mfxstm32l152.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum
{
BSP_IO_PIN_RESET = 0,
BSP_IO_PIN_SET = 1
}BSP_IO_PinStateTypeDef;
#define CAMERA_RST1 MFXSTM32L152_AGPIO_PIN_3
#define CAMERA_XSDN MFXSTM32L152_AGPIO_PIN_2
#define CARMERA_PLUG MFXSTM32L152_GPIO_PIN_12
void rt_mfx_init(void);
rt_uint32_t BSP_IO_ITGetStatus(rt_uint32_t IoPin);
void BSP_IO_ITClear(void);
void BSP_IO_ITClearPin(rt_uint32_t IO_Pins_To_Clear);
rt_uint8_t rt_mfx_pin_mode(rt_uint32_t IoPin, IO_ModeTypedef IoMode);
rt_uint8_t rt_mfx_config_irq(rt_uint8_t IoIrqOutPinPolarity, rt_uint8_t IoIrqOutPinType);
void rt_mfx_pin_write(rt_uint32_t IoPin, rt_base_t PinState);
rt_uint32_t rt_mfx_pin_read(rt_uint32_t IoPin);
void rt_mfx_pin_toggle(rt_uint32_t IoPin);
#ifdef __cplusplus
}
#endif
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.c
+666
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bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.h
+653
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bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_pmic.c
+31 -31
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@@ -798,47 +798,47 @@ static rt_err_t rt_hw_pmic_init_register(void)
stpmu1_write_reg(BUCK_ICC_TURNOFF_REG, 0x30);
stpmu1_write_reg(LDO_ICC_TURNOFF_REG, 0x3b);
/* vddcore */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK1, 1200);
STPMU1_Regulator_Enable(STPMU1_BUCK1);
/* vddcore */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK1, 1200);
STPMU1_Regulator_Enable(STPMU1_BUCK1);
/* vddddr */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK2, 1350);
STPMU1_Regulator_Enable(STPMU1_BUCK2);
/* vddddr */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK2, 1350);
STPMU1_Regulator_Enable(STPMU1_BUCK2);
/* vdd */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK3, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK3);
/* vdd */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK3, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK3);
/* 3v3 */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK4, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK4);
/* 3v3 */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK4, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK4);
/* vdda */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO1, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO1);
/* vdda */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO1, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO1);
/* 2v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO2, 2800);
STPMU1_Regulator_Enable(STPMU1_LDO2);
/* 2v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO2, 2800);
STPMU1_Regulator_Enable(STPMU1_LDO2);
/* vtt_ddr lod3 mode buck2/2 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO3, 0xFFFF);
STPMU1_Regulator_Enable(STPMU1_LDO3);
/* vtt_ddr lod3 mode buck2/2 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO3, 0xFFFF);
STPMU1_Regulator_Enable(STPMU1_LDO3);
/* vdd_usb */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO4, 3300);
STPMU1_Regulator_Enable(STPMU1_LDO4);
/* vdd_usb */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO4, 3300);
STPMU1_Regulator_Enable(STPMU1_LDO4);
/* vdd_sd */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO5, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO5);
/* vdd_sd */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO5, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO5);
/* 1v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO6, 1800);
STPMU1_Regulator_Enable(STPMU1_LDO6);
/* 1v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO6, 1800);
STPMU1_Regulator_Enable(STPMU1_LDO6);
STPMU1_Regulator_Enable(STPMU1_VREFDDR);
STPMU1_Regulator_Enable(STPMU1_VREFDDR);
return RT_EOK;
}
bsp/stm32/stm32mp157a-st-ev1/board/ports/mfxstm32l152.c
+1602
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bsp/stm32/stm32mp157a-st-ev1/board/ports/mfxstm32l152.h
+853
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