mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-10-02 14:23:19 +08:00
bsp-ft32 (#5652)
This commit is contained in:
FmdAE
@@ -36,6 +36,7 @@ jobs:
|
||||
- {RTT_BSP: "asm9260t", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "allwinner_tina", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "ft32/ft32f072xb-starter", RTT_TOOL_CHAIN: "sourcery-arm"}
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||||
- {RTT_BSP: "gd32/gd32103c-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "gd32/gd32105c-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
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- {RTT_BSP: "gd32/gd32105r-start", RTT_TOOL_CHAIN: "sourcery-arm"}
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,42 @@
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||||
*.pyc
|
||||
*.map
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||||
*.dblite
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||||
*.elf
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||||
*.bin
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||||
*.hex
|
||||
*.axf
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||||
*.exe
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||||
*.pdb
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||||
*.idb
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||||
*.ilk
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||||
*.old
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||||
build
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||||
Debug
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||||
documentation/html
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||||
packages/
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||||
*~
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||||
*.o
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||||
*.obj
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||||
*.out
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||||
*.bak
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||||
*.dep
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||||
*.lib
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||||
*.i
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||||
*.d
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.DS_Stor*
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.config 3
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.config 4
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.config 5
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Midea-X1
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*.uimg
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GPATH
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||||
GRTAGS
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GTAGS
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||||
.vscode
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||||
JLinkLog.txt
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||||
JLinkSettings.ini
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||||
DebugConfig/
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RTE/
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settings/
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*.uvguix*
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cconfig.h
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@@ -0,0 +1,22 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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@@ -0,0 +1,54 @@
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# FT32F072xx-StarterKit-32 #
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## 1. 简介
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[StarterKit-32](https://www.fremontmicro.com/down/demoboard/index.aspx)是辉芒微提供的开发板，使用 Cortex-M0 内核的 FT32F072x8/xB 作为主控制器。提供包括扩展引脚等外设资源。
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板载主要资源如下：
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| 硬件 | 描述 |
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| -- | -- |
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|CPU| Cortex-M0|
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|主频| 72MHz/96MHz |
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|SRAM| 8KB/24KB |
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|Flash| 64KB/128KB |
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- 常用外设
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- LED：4个，（PB0、PB1、PB2、PB3）
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- 按键：2个，（兼具唤醒功能，PC11、PC13)
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- 触摸：2个，（PB10、PB11）
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- 常用接口：插针串口J8
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## 2. 编译说明
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StarterKit-32板级包支持 MDK5，以下是具体版本信息：
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| IDE/编译器 | 已测试版本 |
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| -- | -- |
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| MDK5(ARM Compiler 5 and 6) | MDK5.35 |
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## 3. 烧写及执行
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下载程序：使用 CMSIS-DAP或者J-link等工具。
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### 3.1 配置和仿真
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工程已经默认使能了RT-Thread UART驱动、GPIO驱动。若想进一步配置工程请
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使用ENV工具。
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## 4. 驱动支持情况及计划
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| 驱动 | 支持情况 | 备注 |
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| ------ | ---- | :------: |
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| UART | 支持 | USART0/1 |
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| GPIO | 支持 | |
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## 5. 联系人信息
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维护人：
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- [FMD-AE](https://github.com/FmdAE)
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## 6. 参考
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* [StarterKit-32](https://www.fremontmicro.com/down/demoboard/index.aspx)
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@@ -0,0 +1,15 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,60 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rt-thread_ft32f072.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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ft32_library = 'FT32F0xx'
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rtconfig.BSP_LIBRARY_TYPE = ft32_library
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, ft32_library, 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'Drivers', 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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@@ -0,0 +1,9 @@
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@@ -0,0 +1,30 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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||||
* SPDX-License-Identifier: Apache-2.0
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*
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||||
* Change Logs:
|
||||
* Date Author Notes
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* 2022-03-02 FMD-AE first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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/* defined the LED2 pin: PA5 */
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#define LED2_PIN GET_PIN(A, 5)
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int main(void)
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{
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/* set LED0 pin mode to output */
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rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
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while (1)
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{
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rt_pin_write(LED2_PIN, PIN_HIGH);
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rt_thread_mdelay(500);
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rt_pin_write(LED2_PIN, PIN_LOW);
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rt_thread_mdelay(500);
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}
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}
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@@ -0,0 +1,52 @@
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menu "Hardware Drivers Config"
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config SOC_FT32F072RB
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bool
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select SOC_SERIES_FT32F0
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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menu "Onboard Peripheral Drivers"
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endmenu
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menu "On-chip Peripheral Drivers"
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config BSP_USING_GPIO
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bool "Enable GPIO"
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select RT_USING_PIN
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default y
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menuconfig BSP_USING_UART
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bool "Enable UART"
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default y
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select RT_USING_SERIAL
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if BSP_USING_UART
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config BSP_USING_UART1
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bool "Enable UART1"
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default n
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config BSP_UART1_RX_USING_DMA
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bool "Enable UART1 RX DMA"
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depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
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default n
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config BSP_USING_UART2
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bool "Enable UART2"
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default y
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config BSP_UART2_RX_USING_DMA
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bool "Enable UART2 RX DMA"
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depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
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default n
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endif
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source "../libraries/Drivers/Kconfig"
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endmenu
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menu "Board extended module Drivers"
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endmenu
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endmenu
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@@ -0,0 +1,29 @@
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import os
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import rtconfig
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from building import *
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Import('SDK_LIB')
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|
||||
cwd = GetCurrentDir()
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||||
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||||
# add general drivers
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||||
src = Split('''
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||||
board.c
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||||
''')
|
||||
|
||||
path = [cwd]
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
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src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/gcc/startup_ft32f072xb.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
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src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/arm/startup_ft32f072xb.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/iar/startup_ft32f072xb.s']
|
||||
|
||||
# FT32F072x8 || FT32F072xB
|
||||
# You can select chips from the list above
|
||||
CPPDEFINES = ['FT32F072xB']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
#include "drv_usart.h"
|
||||
#endif /* RT_USING_SERIAL */
|
||||
|
||||
#define DBG_TAG "drv_common"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
#include <finsh.h>
|
||||
|
||||
static void reboot(uint8_t argc, char **argv)
|
||||
{
|
||||
rt_hw_cpu_reset();
|
||||
}
|
||||
MSH_CMD_EXPORT(reboot, Reboot System);
|
||||
#endif /* RT_USING_FINSH */
|
||||
|
||||
__IO uint32_t uwTick;
|
||||
static uint32_t _systick_ms = 1;
|
||||
|
||||
void IncTick(void)
|
||||
{
|
||||
uwTick += _systick_ms;
|
||||
}
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
|
||||
IncTick();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
uint32_t GetTick(void)
|
||||
{
|
||||
if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
|
||||
IncTick();
|
||||
|
||||
return uwTick;
|
||||
}
|
||||
|
||||
void SuspendTick(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ResumeTick(void)
|
||||
{
|
||||
}
|
||||
|
||||
void Delay(__IO uint32_t Delay)
|
||||
{
|
||||
if (rt_thread_self())
|
||||
{
|
||||
rt_thread_mdelay(Delay);
|
||||
}
|
||||
else
|
||||
{
|
||||
for (rt_uint32_t count = 0; count < Delay; count++)
|
||||
{
|
||||
rt_hw_us_delay(1000);
|
||||
}
|
||||
}
|
||||
}
|
||||
/**
|
||||
* This function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
rt_uint32_t ticks;
|
||||
rt_uint32_t told, tnow, tcnt = 0;
|
||||
rt_uint32_t reload = SysTick->LOAD;
|
||||
|
||||
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told)
|
||||
{
|
||||
if (tnow < told)
|
||||
{
|
||||
tcnt += told - tnow;
|
||||
}
|
||||
else
|
||||
{
|
||||
tcnt += reload - tnow + told;
|
||||
}
|
||||
told = tnow;
|
||||
if (tcnt >= ticks)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial FT32 board.
|
||||
*/
|
||||
RT_WEAK void rt_hw_board_init()
|
||||
{
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
/* Heap initialization */
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
/* Pin driver initialization is open by default */
|
||||
#ifdef RT_USING_PIN
|
||||
rt_hw_pin_init();
|
||||
#endif
|
||||
|
||||
/* USART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_usart_init();
|
||||
#endif
|
||||
|
||||
/* Set the shell console output device */
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
/* Board underlying hardware initialization */
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <ft32f0xx.h>
|
||||
#include "drv_gpio.h"
|
||||
#include <rthw.h>
|
||||
#include <ft32f0xx_gpio.h>
|
||||
#include <ft32f0xx_exti.h>
|
||||
#include <ft32f0xx_usart.h>
|
||||
#include <ft32f0xx_dma.h>
|
||||
#include <ft32f0xx_rcc.h>
|
||||
#include <ft32f0xx_syscfg.h>
|
||||
#ifdef RT_USING_DEVICE
|
||||
#include <rtdevice.h>
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define FT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define FT32_FLASH_SIZE (128 * 1024)
|
||||
#define FT32_FLASH_END_ADDRESS ((uint32_t)(FT32_FLASH_START_ADRESS + FT32_FLASH_SIZE))
|
||||
|
||||
/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
|
||||
#define FT32_SRAM_SIZE 24
|
||||
#define FT32_SRAM_END (0x20000000 + FT32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END FT32_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
@@ -0,0 +1,157 @@
|
||||
/*
|
||||
* linker script for STM32F10x with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128k /* 128KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 16k /* 16K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x400;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00004000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 23 KiB |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,185 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'D:/Program Files (x86)/IAR Systems/Embedded Workbench 8.2'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'armclang':
|
||||
# toolchains
|
||||
CC = 'armclang'
|
||||
CXX = 'armclang'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m0 '
|
||||
CFLAGS += ' -mcpu=cortex-m0 '
|
||||
CFLAGS += ' -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
|
||||
CFLAGS += ' -gdwarf-3 -ffunction-sections '
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
|
||||
LFLAGS += ' --list rt-thread.map '
|
||||
LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
|
||||
|
||||
EXEC_PATH += '/ARM/ARMCLANG/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O1' # armclang recommend
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M0'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M0'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,6 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
dir_path:
|
||||
- FT32F0xx
|
||||
@@ -0,0 +1,34 @@
|
||||
if BSP_USING_USBD
|
||||
config BSP_USBD_TYPE_FS
|
||||
bool
|
||||
# "USB Full Speed (FS) Core"
|
||||
config BSP_USBD_TYPE_HS
|
||||
bool
|
||||
# "USB High Speed (HS) Core"
|
||||
|
||||
config BSP_USBD_SPEED_HS
|
||||
bool
|
||||
# "USB High Speed (HS) Mode"
|
||||
config BSP_USBD_SPEED_HSINFS
|
||||
bool
|
||||
# "USB High Speed (HS) Core in FS mode"
|
||||
|
||||
config BSP_USBD_PHY_EMBEDDED
|
||||
bool
|
||||
# "Using Embedded phy interface"
|
||||
config BSP_USBD_PHY_UTMI
|
||||
bool
|
||||
# "UTMI: USB 2.0 Transceiver Macrocell Interace"
|
||||
config BSP_USBD_PHY_ULPI
|
||||
bool
|
||||
# "ULPI: UTMI+ Low Pin Interface"
|
||||
endif
|
||||
|
||||
config BSP_USING_CRC
|
||||
bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
|
||||
select RT_USING_HWCRYPTO
|
||||
select RT_HWCRYPTO_USING_CRC
|
||||
# "Crypto device frame dose not support above 8-bits granularity"
|
||||
depends on (SOC_SERIES_FT32F0)
|
||||
default n
|
||||
|
||||
@@ -0,0 +1,21 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
""")
|
||||
|
||||
if GetDepend(['RT_USING_PIN']):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
if GetDepend(['RT_USING_SERIAL']):
|
||||
src += ['drv_usart.c']
|
||||
|
||||
path = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __DMA_CONFIG_H__
|
||||
#define __DMA_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* DMA1 channel1 */
|
||||
|
||||
/* DMA1 channel2-3 DMA2 channel1-2 */
|
||||
#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
|
||||
#define UART1_DMA_RX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
|
||||
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define UART1_RX_DMA_INSTANCE DMA1_Channel3
|
||||
#define UART1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
|
||||
#elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
|
||||
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
|
||||
#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI1_RX_DMA_INSTANCE DMA1_Channel2
|
||||
#define SPI1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
|
||||
#endif
|
||||
|
||||
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
|
||||
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
|
||||
#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI1_TX_DMA_INSTANCE DMA1_Channel3
|
||||
#define SPI1_TX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
|
||||
#endif
|
||||
/* DMA1 channel2-3 DMA2 channel1-2 */
|
||||
|
||||
/* DMA1 channel4-7 DMA2 channel3-5 */
|
||||
#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
|
||||
#define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
|
||||
#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define UART2_RX_DMA_INSTANCE DMA1_Channel5
|
||||
#define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMA2_Ch3_5_IRQn
|
||||
#endif
|
||||
/* DMA1 channel4-7 DMA2 channel3-5 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DMA_CONFIG_H__ */
|
||||
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_CONFIG_H__
|
||||
#define __DRV_CONFIG_H__
|
||||
|
||||
#include <board.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(SOC_SERIES_FT32F0)
|
||||
#include "dma_config.h"
|
||||
#include "uart_config.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_DMA_H_
|
||||
#define __DRV_DMA_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(SOC_SERIES_FT32F0)
|
||||
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
||||
#endif
|
||||
|
||||
struct dma_config {
|
||||
DMA_INSTANCE_TYPE *Instance;
|
||||
rt_uint32_t dma_rcc;
|
||||
IRQn_Type dma_irq;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__DRV_DMA_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_GPIO_H__
|
||||
#define __DRV_GPIO_H__
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
|
||||
((__GPIOx__) == (GPIOB))? 1U :\
|
||||
((__GPIOx__) == (GPIOC))? 2U :\
|
||||
((__GPIOx__) == (GPIOD))? 3U :\
|
||||
((__GPIOx__) == (GPIOF))? 5U : 4U)
|
||||
|
||||
#define __GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
|
||||
|
||||
#define __GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
|
||||
|
||||
#define __FT32_PORT(port) GPIO##port##_BASE
|
||||
|
||||
#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__FT32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
|
||||
|
||||
struct pin_irq_map
|
||||
{
|
||||
rt_uint16_t pinbit;
|
||||
IRQn_Type irqno;
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DRV_GPIO_H__ */
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-15 SummerGift first version
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: DO NOT include this file on the header file.
|
||||
*/
|
||||
|
||||
#ifndef LOG_TAG
|
||||
#define DBG_TAG "drv"
|
||||
#else
|
||||
#define DBG_TAG LOG_TAG
|
||||
#endif /* LOG_TAG */
|
||||
|
||||
#ifdef DRV_DEBUG
|
||||
#define DBG_LVL DBG_LOG
|
||||
#else
|
||||
#define DBG_LVL DBG_INFO
|
||||
#endif /* DRV_DEBUG */
|
||||
|
||||
#include <rtdbg.h>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,67 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022.03.02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_USART_H__
|
||||
#define __DRV_USART_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <rthw.h>
|
||||
#include "drv_dma.h"
|
||||
|
||||
int rt_hw_usart_init(void);
|
||||
|
||||
#if defined(SOC_SERIES_FT32F0)
|
||||
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
||||
#endif
|
||||
|
||||
#if defined(SOC_SERIES_FT32F0)
|
||||
#define UART_INSTANCE_CLEAR_FUNCTION USART_ClearITPendingBit
|
||||
#endif
|
||||
|
||||
#define USART_TX_Pin GPIO_PIN_2
|
||||
#define USART_TX_GPIO_Port GPIOA
|
||||
#define USART_RX_Pin GPIO_PIN_3
|
||||
#define USART_RX_GPIO_Port GPIOA
|
||||
|
||||
/* ft32 config class */
|
||||
struct ft32_uart_config
|
||||
{
|
||||
const char *name;
|
||||
USART_TypeDef *Instance;
|
||||
IRQn_Type irq_type;
|
||||
struct dma_config *dma_rx;
|
||||
struct dma_config *dma_tx;
|
||||
};
|
||||
|
||||
/* ft32 uart dirver class */
|
||||
struct ft32_uart
|
||||
{
|
||||
USART_InitTypeDef Init;
|
||||
struct ft32_uart_config *config;
|
||||
|
||||
#ifdef RT_SERIAL_USING_DMA
|
||||
struct
|
||||
{
|
||||
DMA_InitTypeDef Init;
|
||||
DMA_Channel_TypeDef *Instance;
|
||||
rt_size_t last_index;
|
||||
} dma_rx;
|
||||
struct
|
||||
{
|
||||
DMA_InitTypeDef Init;
|
||||
DMA_Channel_TypeDef *Instance;
|
||||
} dma_tx;
|
||||
#endif
|
||||
rt_uint16_t uart_dma_flag;
|
||||
struct rt_serial_device serial;
|
||||
};
|
||||
|
||||
#endif /* __DRV_USART_H__ */
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-03-02 FMD-AE first version
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
#ifndef UART1_CONFIG
|
||||
#define UART1_CONFIG \
|
||||
{ \
|
||||
.name = "uart1", \
|
||||
.Instance = USART1, \
|
||||
.irq_type = USART1_IRQn, \
|
||||
}
|
||||
#endif /* UART1_CONFIG */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_UART1_RX_USING_DMA)
|
||||
#ifndef UART1_DMA_RX_CONFIG
|
||||
#define UART1_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART1_RX_DMA_RCC, \
|
||||
.dma_irq = UART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART1_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
#ifndef UART2_CONFIG
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.Instance = USART2, \
|
||||
.irq_type = USART2_IRQn, \
|
||||
}
|
||||
#endif /* UART2_CONFIG */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_UART2_RX_USING_DMA)
|
||||
#ifndef UART2_DMA_RX_CONFIG
|
||||
#define UART2_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART2_RX_DMA_RCC, \
|
||||
.dma_irq = UART2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART2_RX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __UART_CONFIG_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,110 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx.h
|
||||
* @author FMD AE
|
||||
* @brief CMSIS FT32F0xx Device Peripheral Access Layer Header File.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __FT32F0xx_H
|
||||
#define __FT32F0xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
|
||||
#if !defined (FT32F0)
|
||||
#define FT32F0
|
||||
#endif /* FT32F0 */
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V2.3.3
|
||||
*/
|
||||
#define __FT32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
|
||||
#define __FT32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
|
||||
#define __FT32F0_DEVICE_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
|
||||
#define __FT32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __FT32F0_DEVICE_VERSION ((__FT32F0_DEVICE_VERSION_MAIN << 24)\
|
||||
|(__FT32F0_DEVICE_VERSION_SUB1 << 16)\
|
||||
|(__FT32F0_DEVICE_VERSION_SUB2 << 8 )\
|
||||
|(__FT32F0_DEVICE_VERSION_RC))
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#if defined(FT32F030x6)
|
||||
#include "ft32f030x6.h"
|
||||
#elif defined(FT32F030x8)
|
||||
#include "ft32f030x8.h"
|
||||
#elif defined (FT32F032x6)
|
||||
#include "ft32f032x6.h"
|
||||
#elif defined (FT32F032x8)
|
||||
#include "ft32f032x8.h"
|
||||
#elif defined(FT32F072x8)
|
||||
#include "ft32f072x8.h"
|
||||
#elif defined(FT32F072xB)
|
||||
#include "ft32f072xb.h"
|
||||
#else
|
||||
#error "Please select first the target FT32F0xx device used in your application (in ft32f0xx.h file)"
|
||||
#endif
|
||||
#include "../../../FT32F0xx_Driver/templates/Inc/ft32f0xx_conf.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __FT32F0xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/*****************************END OF FILE****/
|
||||
@@ -0,0 +1,43 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_ft32f0xx.h
|
||||
* @author FMD AE
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File.
|
||||
* @details
|
||||
* @version V1.0.0
|
||||
* @date 2021-07-01
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_FT32F0xx_H
|
||||
#define __SYSTEM_FT32F0xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
export symbol __ICFEDIT_region_RAM_start__;
|
||||
export symbol __ICFEDIT_region_RAM_end__;
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
export symbol __ICFEDIT_region_RAM_start__;
|
||||
export symbol __ICFEDIT_region_RAM_end__;
|
||||
@@ -0,0 +1,33 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
||||
export symbol __ICFEDIT_region_RAM_start__;
|
||||
export symbol __ICFEDIT_region_RAM_end__;
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,103 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_crc.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the CRC firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_CRC_H
|
||||
#define __FT32F0XX_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!< Includes ----------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
/** @addtogroup CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRC_ReverseInputData
|
||||
* @{
|
||||
*/
|
||||
#define CRC_ReverseInputData_No ((uint32_t)0x00000000) /*!< No reverse operation of Input Data */
|
||||
#define CRC_ReverseInputData_8bits CRC_CR_REV_IN_0 /*!< Reverse operation of Input Data on 8 bits */
|
||||
#define CRC_ReverseInputData_16bits CRC_CR_REV_IN_1 /*!< Reverse operation of Input Data on 16 bits */
|
||||
#define CRC_ReverseInputData_32bits CRC_CR_REV_IN /*!< Reverse operation of Input Data on 32 bits */
|
||||
|
||||
#define IS_CRC_REVERSE_INPUT_DATA(DATA) (((DATA) == CRC_ReverseInputData_No) || \
|
||||
((DATA) == CRC_ReverseInputData_8bits) || \
|
||||
((DATA) == CRC_ReverseInputData_16bits) || \
|
||||
((DATA) == CRC_ReverseInputData_32bits))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_PolynomialSize
|
||||
* @brief Only applicable for FT32F042 and FT32F072 devices
|
||||
* @{
|
||||
*/
|
||||
#define CRC_PolSize_7 CRC_CR_POLSIZE /*!< 7-bit polynomial for CRC calculation */
|
||||
#define CRC_PolSize_8 CRC_CR_POLSIZE_1 /*!< 8-bit polynomial for CRC calculation */
|
||||
#define CRC_PolSize_16 CRC_CR_POLSIZE_0 /*!< 16-bit polynomial for CRC calculation */
|
||||
#define CRC_PolSize_32 ((uint32_t)0x00000000)/*!< 32-bit polynomial for CRC calculation */
|
||||
|
||||
#define IS_CRC_POL_SIZE(SIZE) (((SIZE) == CRC_PolSize_7) || \
|
||||
((SIZE) == CRC_PolSize_8) || \
|
||||
((SIZE) == CRC_PolSize_16) || \
|
||||
((SIZE) == CRC_PolSize_32))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/* Configuration of the CRC computation unit **********************************/
|
||||
void CRC_DeInit(void);
|
||||
void CRC_ResetDR(void);
|
||||
//void CRC_PolynomialSizeSelect(uint32_t CRC_PolSize); /*!< Only applicable for FT32F042 and FT32F072 devices */
|
||||
void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData);
|
||||
void CRC_ReverseOutputDataCmd(FunctionalState NewState);
|
||||
void CRC_SetInitRegister(uint32_t CRC_InitValue);
|
||||
void CRC_SetPolynomial(uint32_t CRC_Pol);
|
||||
|
||||
/* CRC computation ************************************************************/
|
||||
uint32_t CRC_CalcCRC(uint32_t CRC_Data);
|
||||
uint32_t CRC_CalcCRC16bits(uint16_t CRC_Data);
|
||||
uint32_t CRC_CalcCRC8bits(uint8_t CRC_Data);
|
||||
uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
|
||||
uint32_t CRC_GetCRC(void);
|
||||
|
||||
/* Independent register (IDR) access (write/read) *****************************/
|
||||
void CRC_SetIDRegister(uint8_t CRC_IDValue);
|
||||
uint8_t CRC_GetIDRegister(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_CRC_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
@@ -0,0 +1,163 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_crs.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the CRS firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_CRS_H
|
||||
#define __FT32F0XX_CRS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!< Includes ----------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
/** @addtogroup CRS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRS_Interrupt_Sources
|
||||
* @{
|
||||
*/
|
||||
#define CRS_IT_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
|
||||
#define CRS_IT_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
|
||||
#define CRS_IT_ERR CRS_ISR_ERRF /*!< error */
|
||||
#define CRS_IT_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
|
||||
#define CRS_IT_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
|
||||
#define CRS_IT_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
|
||||
#define CRS_IT_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
|
||||
|
||||
#define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
|
||||
((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC))
|
||||
|
||||
#define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
|
||||
((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \
|
||||
((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \
|
||||
((IT) == CRS_IT_SYNCMISS))
|
||||
|
||||
#define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRS_Flags
|
||||
* @{
|
||||
*/
|
||||
#define CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
|
||||
#define CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
|
||||
#define CRS_FLAG_ERR CRS_ISR_ERRF /*!< error */
|
||||
#define CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
|
||||
#define CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
|
||||
#define CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
|
||||
#define CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
|
||||
|
||||
#define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \
|
||||
((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \
|
||||
((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \
|
||||
((FLAG) == CRS_FLAG_SYNCMISS))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRS_Synchro_Source
|
||||
* @{
|
||||
*/
|
||||
#define CRS_SYNCSource_GPIO ((uint32_t)0x00) /*!< Synchro Signal soucre GPIO */
|
||||
#define CRS_SYNCSource_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */
|
||||
#define CRS_SYNCSource_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF */
|
||||
|
||||
#define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \
|
||||
((SOURCE) == CRS_SYNCSource_LSE) ||\
|
||||
((SOURCE) == CRS_SYNCSource_USB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRS_SynchroDivider
|
||||
* @{
|
||||
*/
|
||||
#define CRS_SYNC_Div1 ((uint32_t)0x00) /*!< Synchro Signal not divided */
|
||||
#define CRS_SYNC_Div2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */
|
||||
#define CRS_SYNC_Div4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */
|
||||
#define CRS_SYNC_Div8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
|
||||
#define CRS_SYNC_Div16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */
|
||||
#define CRS_SYNC_Div32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
|
||||
#define CRS_SYNC_Div64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
|
||||
#define CRS_SYNC_Div128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */
|
||||
|
||||
#define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2) ||\
|
||||
((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8) || \
|
||||
((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \
|
||||
((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRS_SynchroPolarity
|
||||
* @{
|
||||
*/
|
||||
#define CRS_SYNCPolarity_Rising ((uint32_t)0x00) /*!< Synchro Active on rising edge */
|
||||
#define CRS_SYNCPolarity_Falling CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */
|
||||
|
||||
#define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \
|
||||
((POLARITY) == CRS_SYNCPolarity_Falling))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/* Configuration of the CRS **********************************/
|
||||
void CRS_DeInit(void);
|
||||
void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue);
|
||||
void CRS_FrequencyErrorCounterCmd(FunctionalState NewState);
|
||||
void CRS_AutomaticCalibrationCmd(FunctionalState NewState);
|
||||
void CRS_SoftwareSynchronizationGenerate(void);
|
||||
void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue);
|
||||
void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue);
|
||||
void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler);
|
||||
void CRS_SynchronizationSourceConfig(uint32_t CRS_Source);
|
||||
void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity);
|
||||
uint32_t CRS_GetReloadValue(void);
|
||||
uint32_t CRS_GetHSI48CalibrationValue(void);
|
||||
uint32_t CRS_GetFrequencyErrorValue(void);
|
||||
uint32_t CRS_GetFrequencyErrorDirection(void);
|
||||
|
||||
/* Interrupts and flags management functions **********************************/
|
||||
void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState);
|
||||
FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG);
|
||||
void CRS_ClearFlag(uint32_t CRS_FLAG);
|
||||
ITStatus CRS_GetITStatus(uint32_t CRS_IT);
|
||||
void CRS_ClearITPendingBit(uint32_t CRS_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_CRS_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
@@ -0,0 +1,43 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_dac.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the DAC firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef __FT32F0XX_DAC_H
|
||||
#define __FT32F0XX_DAC_H
|
||||
|
||||
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @Parama DAC_CTRL
|
||||
*/
|
||||
|
||||
#define DAC_DATA_RESET ((uint32_t)(0x0000007f))
|
||||
|
||||
#define DAC_CTRL_READ (uint8_t)(0x20)
|
||||
#define DAC_DATA1_READ (uint8_t)(0x24)
|
||||
#define DAC_DATA2_READ (uint8_t)(0x28)
|
||||
|
||||
|
||||
#define IS_DAC_DATA(DATA) ((DATA) <= 0x7F)
|
||||
|
||||
|
||||
/**
|
||||
* @Parama DAC1_DATA
|
||||
*/
|
||||
void DAC_Ref_Config(uint32_t DAC_RefSel);
|
||||
void Bsp_DAC_Config(void);
|
||||
uint8_t DAC_Read_Reg(uint8_t DAC_Register);
|
||||
void DAC_Cmd(FunctionalState NewState);
|
||||
void DAC_SetChannel1Data(uint32_t DAC_Align, uint8_t Data);
|
||||
void DAC_SetChannel2Data(uint32_t DAC_Align, uint8_t Data);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,87 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_debug.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the DBGMCU firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_DBGMCU_H
|
||||
#define __FT32F0XX_DBGMCU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
/** @addtogroup DBGMCU
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
|
||||
/** @defgroup DBGMCU_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DBGMCU_STOP DBGMCU_CR_DBG_STOP
|
||||
#define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
|
||||
#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF9) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
#define DBGMCU_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP
|
||||
#define DBGMCU_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP
|
||||
#define DBGMCU_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP
|
||||
#define DBGMCU_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP
|
||||
#define DBGMCU_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP
|
||||
#define DBGMCU_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP
|
||||
#define DBGMCU_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP
|
||||
#define DBGMCU_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
|
||||
#define DBGMCU_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
|
||||
#define DBGMCU_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP
|
||||
#define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xFDDFE2CC) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
#define DBGMCU_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP
|
||||
#define DBGMCU_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP
|
||||
#define DBGMCU_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP
|
||||
#define DBGMCU_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP
|
||||
#define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8F7FF) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/* Device and Revision ID management functions ********************************/
|
||||
uint32_t DBGMCU_GetREVID(void);
|
||||
uint32_t DBGMCU_GetDEVID(void);
|
||||
|
||||
/* Peripherals Configuration functions ****************************************/
|
||||
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
|
||||
void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
|
||||
void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_DBGMCU_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
@@ -0,0 +1,112 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FT32f0xx_div.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the dividor firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-12-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_DIV_H
|
||||
#define __FT32F0XX_DIV_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
#include <stdint.h>
|
||||
/** @addtogroup DIV
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief DIV Status
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
DIV_COMPLETE = 0,
|
||||
DIV_ERROR_DIV0ERR,
|
||||
DIV_ERROR_DIV0V,
|
||||
}DIV_Status;
|
||||
|
||||
/**
|
||||
* @brief Dividor Data structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t DIV_quotient; /*!< Selects The feedback resister of the OPA. */
|
||||
uint32_t DIV_remainder; /*!< Selects The compensate cap of the OPA.*/
|
||||
}DIV_ResultTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DIV_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DIV_IT_DIV0ERR DIV_SC_DIV0IE
|
||||
#define DIV_IT_DIVOV DIV_SC_DIVOVIE
|
||||
#define IS_DIV_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFFEB) == (uint32_t)RESET))
|
||||
|
||||
#define IS_DIV_GET_IT(IT) (((IT) == DIV_IT_DIV0ERR) || ((IT) == DIV_IT_DIVOV))
|
||||
|
||||
#define IS_DIV_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFFEB0) == (uint32_t)RESET))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DIV_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DIV_FLAG_BUSY DIV_SC_DIVBUSY
|
||||
#define DIV_FLAG_DIV0ERR DIV_SC_DIV0ERR
|
||||
#define DIV_FLAG_DIVOV DIV_SC_DIVOV
|
||||
|
||||
#define IS_DIV_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFFFFFF5) == (uint32_t)RESET))
|
||||
|
||||
#define IS_DIV_GET_FLAG(FLAG) (((FLAG) == DIV_FLAG_BUSY) || ((FLAG) == DIV_FLAG_DIV0ERR) || ((FLAG) == DIV_FLAG_DIV0ERR))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/* DIV Calculating functions *****************************************/
|
||||
DIV_Status DivS32ByS16(DIV_ResultTypeDef* pResult,int32_t divedent,int16_t dividor);
|
||||
|
||||
/* Interrupts and flags management functions **********************************/
|
||||
void DIV_ITConfig(uint32_t DIV_IT, FunctionalState NewState);
|
||||
FlagStatus DIV_GetFlagStatus(uint32_t DIV_FLAG);
|
||||
void DIV_ClearFlag(uint32_t DIV_FLAG);
|
||||
ITStatus DIV_GetITStatus(uint32_t DIV_IT);
|
||||
void DIV_ClearITPendingBit(uint32_t DIV_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__FT32F0XX_DIV_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,186 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_exti.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the EXTI
|
||||
* firmware library
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_EXTI_H
|
||||
#define __FT32F0XX_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
/** @addtogroup EXTI
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief EXTI mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Mode_Interrupt = 0x00,
|
||||
EXTI_Mode_Event = 0x04
|
||||
}EXTIMode_TypeDef;
|
||||
|
||||
#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
|
||||
|
||||
/**
|
||||
* @brief EXTI Trigger enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Trigger_Rising = 0x08,
|
||||
EXTI_Trigger_Falling = 0x0C,
|
||||
EXTI_Trigger_Rising_Falling = 0x10
|
||||
}EXTITrigger_TypeDef;
|
||||
|
||||
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
|
||||
((TRIGGER) == EXTI_Trigger_Falling) || \
|
||||
((TRIGGER) == EXTI_Trigger_Rising_Falling))
|
||||
/**
|
||||
* @brief EXTI Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
|
||||
This parameter can be any combination of @ref EXTI_Lines */
|
||||
|
||||
EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
|
||||
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||
|
||||
EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
|
||||
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||
|
||||
FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
|
||||
This parameter can be set either to ENABLE or DISABLE */
|
||||
}EXTI_InitTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup EXTI_Lines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define EXTI_Line0 ((uint32_t)0x00000001) /*!< External interrupt line 0 */
|
||||
#define EXTI_Line1 ((uint32_t)0x00000002) /*!< External interrupt line 1 */
|
||||
#define EXTI_Line2 ((uint32_t)0x00000004) /*!< External interrupt line 2 */
|
||||
#define EXTI_Line3 ((uint32_t)0x00000008) /*!< External interrupt line 3 */
|
||||
#define EXTI_Line4 ((uint32_t)0x00000010) /*!< External interrupt line 4 */
|
||||
#define EXTI_Line5 ((uint32_t)0x00000020) /*!< External interrupt line 5 */
|
||||
#define EXTI_Line6 ((uint32_t)0x00000040) /*!< External interrupt line 6 */
|
||||
#define EXTI_Line7 ((uint32_t)0x00000080) /*!< External interrupt line 7 */
|
||||
#define EXTI_Line8 ((uint32_t)0x00000100) /*!< External interrupt line 8 */
|
||||
#define EXTI_Line9 ((uint32_t)0x00000200) /*!< External interrupt line 9 */
|
||||
#define EXTI_Line10 ((uint32_t)0x00000400) /*!< External interrupt line 10 */
|
||||
#define EXTI_Line11 ((uint32_t)0x00000800) /*!< External interrupt line 11 */
|
||||
#define EXTI_Line12 ((uint32_t)0x00001000) /*!< External interrupt line 12 */
|
||||
#define EXTI_Line13 ((uint32_t)0x00002000) /*!< External interrupt line 13 */
|
||||
#define EXTI_Line14 ((uint32_t)0x00004000) /*!< External interrupt line 14 */
|
||||
#define EXTI_Line15 ((uint32_t)0x00008000) /*!< External interrupt line 15 */
|
||||
#define EXTI_Line16 ((uint32_t)0x00010000) /*!< External interrupt line 16 */
|
||||
#define EXTI_Line17 ((uint32_t)0x00020000) /*!< Internal interrupt line 17
|
||||
Connected to the RTC Alarm
|
||||
event */
|
||||
#define EXTI_Line18 ((uint32_t)0x00040000) /*!< Internal interrupt line 18
|
||||
Connected to the USB
|
||||
event*/
|
||||
#define EXTI_Line19 ((uint32_t)0x00080000) /*!< Internal interrupt line 19
|
||||
Connected to the RTC Tamper
|
||||
and Time Stamp events */
|
||||
#define EXTI_Line20 ((uint32_t)0x00100000) /*!< Internal interrupt line 20
|
||||
Connected to the RTC wakeup
|
||||
event */
|
||||
#define EXTI_Line21 ((uint32_t)0x00200000) /*!< Internal interrupt line 21
|
||||
Connected to the Comparator 1
|
||||
event */
|
||||
#define EXTI_Line22 ((uint32_t)0x00400000) /*!< Internal interrupt line 22
|
||||
Connected to the Comparator 2
|
||||
event*/
|
||||
#define EXTI_Line23 ((uint32_t)0x00800000) /*!< Internal interrupt line 23
|
||||
Connected to the I2C1 wakeup
|
||||
event*/
|
||||
#define EXTI_Line25 ((uint32_t)0x02000000) /*!< Internal interrupt line 25
|
||||
Connected to the USART1 wakeup
|
||||
event */
|
||||
#define EXTI_Line26 ((uint32_t)0x04000000) /*!< Internal interrupt line 26
|
||||
Connected to the USART2 wakeup
|
||||
event*/
|
||||
#define EXTI_Line27 ((uint32_t)0x08000000) /*!< Internal interrupt line 27
|
||||
Connected to the CEC wakeup
|
||||
event */
|
||||
#define EXTI_Line31 ((uint32_t)0x80000000) /*!< Internal interrupt line 31
|
||||
Connected to the VDD USB monitor
|
||||
event */
|
||||
#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0x71000000) == 0x00) && ((LINE) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
|
||||
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
|
||||
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
|
||||
((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
|
||||
((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
|
||||
((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
|
||||
((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
|
||||
((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
|
||||
((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
|
||||
((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
|
||||
((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) || \
|
||||
((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23) || \
|
||||
((LINE) == EXTI_Line25) || ((LINE) == EXTI_Line26) || \
|
||||
((LINE) == EXTI_Line27) || ((LINE) == EXTI_Line31))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/* Function used to set the EXTI configuration to the default reset state *****/
|
||||
void EXTI_DeInit(void);
|
||||
|
||||
/* Initialization and Configuration functions *********************************/
|
||||
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
|
||||
|
||||
/* Interrupts and flags management functions **********************************/
|
||||
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
|
||||
void EXTI_ClearFlag(uint32_t EXTI_Line);
|
||||
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
|
||||
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_EXTI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,121 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_iwdg.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the IWDG
|
||||
* firmware library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F030X8_IWDG_H
|
||||
#define __FT32F030X8_IWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
/** @addtogroup IWDG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup IWDG_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_WriteAccess
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
|
||||
#define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
|
||||
#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
|
||||
((ACCESS) == IWDG_WriteAccess_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IWDG_Prescaler_4 ((uint8_t)0x00)
|
||||
#define IWDG_Prescaler_8 ((uint8_t)0x01)
|
||||
#define IWDG_Prescaler_16 ((uint8_t)0x02)
|
||||
#define IWDG_Prescaler_32 ((uint8_t)0x03)
|
||||
#define IWDG_Prescaler_64 ((uint8_t)0x04)
|
||||
#define IWDG_Prescaler_128 ((uint8_t)0x05)
|
||||
#define IWDG_Prescaler_256 ((uint8_t)0x06)
|
||||
#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
|
||||
((PRESCALER) == IWDG_Prescaler_8) || \
|
||||
((PRESCALER) == IWDG_Prescaler_16) || \
|
||||
((PRESCALER) == IWDG_Prescaler_32) || \
|
||||
((PRESCALER) == IWDG_Prescaler_64) || \
|
||||
((PRESCALER) == IWDG_Prescaler_128)|| \
|
||||
((PRESCALER) == IWDG_Prescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IWDG_FLAG_PVU IWDG_SR_PVU
|
||||
#define IWDG_FLAG_RVU IWDG_SR_RVU
|
||||
#define IWDG_FLAG_WVU IWDG_SR_WVU
|
||||
#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU) || \
|
||||
((FLAG) == IWDG_FLAG_WVU))
|
||||
|
||||
#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
|
||||
|
||||
#define IS_IWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0xFFF)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/* Prescaler and Counter configuration functions ******************************/
|
||||
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
|
||||
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
|
||||
void IWDG_SetReload(uint16_t Reload);
|
||||
void IWDG_ReloadCounter(void);
|
||||
void IWDG_SetWindowValue(uint16_t WindowValue);
|
||||
|
||||
/* IWDG activation function ***************************************************/
|
||||
void IWDG_Enable(void);
|
||||
|
||||
/* Flag management function ***************************************************/
|
||||
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_IWDG_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
@@ -0,0 +1,124 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_misc.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the miscellaneous
|
||||
* firmware library functions (add-on to CMSIS functions).
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_MISC_H
|
||||
#define __FT32F0XX_MISC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
|
||||
/** @addtogroup MISC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief NVIC Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
|
||||
This parameter can be a value of @ref IRQn_Type
|
||||
(For the complete FT32 Devices IRQ Channels list,
|
||||
please refer to ft32f0xx.h file) */
|
||||
|
||||
uint8_t NVIC_IRQChannelPriority; /*!< Specifies the priority level for the IRQ channel specified
|
||||
in NVIC_IRQChannel. This parameter can be a value
|
||||
between 0 and 3. */
|
||||
|
||||
FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
|
||||
will be enabled or disabled.
|
||||
This parameter can be set either to ENABLE or DISABLE */
|
||||
} NVIC_InitTypeDef;
|
||||
|
||||
/**
|
||||
*
|
||||
@verbatim
|
||||
|
||||
@endverbatim
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup MISC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_System_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
|
||||
#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
|
||||
#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
|
||||
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
|
||||
((LP) == NVIC_LP_SLEEPDEEP) || \
|
||||
((LP) == NVIC_LP_SLEEPONEXIT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Preemption_Priority_Group
|
||||
* @{
|
||||
*/
|
||||
#define IS_NVIC_PRIORITY(PRIORITY) ((PRIORITY) < 0x04)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_SysTick_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
|
||||
#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
|
||||
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
|
||||
((SOURCE) == SysTick_CLKSource_HCLK_Div8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
|
||||
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
|
||||
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_MISC_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,190 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_pwr.h
|
||||
* @author FMD AE
|
||||
* @brief This file contains all the functions prototypes for the PWR firmware
|
||||
* library.
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F0XX_PWR_H
|
||||
#define __FT32F0XX_PWR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
|
||||
|
||||
/** @addtogroup PWR
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup PWR_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_PVD_detection_level
|
||||
* @brief
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
|
||||
#define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
|
||||
#define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
|
||||
#define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
|
||||
#define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
|
||||
#define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
|
||||
#define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
|
||||
#define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
|
||||
#define PWR_PVDLevel_8 PWR_CR_PLS_LEV8
|
||||
#define PWR_PVDLevel_9 PWR_CR_PLS_LEV9
|
||||
#define PWR_PVDLevel_10 PWR_CR_PLS_LEV10
|
||||
#define PWR_PVDLevel_11 PWR_CR_PLS_LEV11
|
||||
#define PWR_PVDLevel_12 PWR_CR_PLS_LEV12
|
||||
#define PWR_PVDLevel_13 PWR_CR_PLS_LEV13
|
||||
#define PWR_PVDLevel_14 PWR_CR_PLS_LEV14
|
||||
#define PWR_PVDLevel_15 PWR_CR_PLS_LEV15
|
||||
|
||||
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
|
||||
((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
|
||||
((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
|
||||
((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7)|| \
|
||||
((LEVEL) == PWR_PVDLevel_8) || ((LEVEL) == PWR_PVDLevel_9)|| \
|
||||
((LEVEL) == PWR_PVDLevel_10) || ((LEVEL) == PWR_PVDLevel_11)|| \
|
||||
((LEVEL) == PWR_PVDLevel_12) || ((LEVEL) == PWR_PVDLevel_13)|| \
|
||||
((LEVEL) == PWR_PVDLevel_14) || ((LEVEL) == PWR_PVDLevel_15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_WakeUp_Pins
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_WakeUpPin_1 PWR_CSR_EWUP1
|
||||
#define PWR_WakeUpPin_2 PWR_CSR_EWUP2
|
||||
#define PWR_WakeUpPin_3 PWR_CSR_EWUP3
|
||||
#define PWR_WakeUpPin_4 PWR_CSR_EWUP4
|
||||
#define PWR_WakeUpPin_5 PWR_CSR_EWUP5
|
||||
#define PWR_WakeUpPin_6 PWR_CSR_EWUP6
|
||||
#define PWR_WakeUpPin_7 PWR_CSR_EWUP7
|
||||
#define PWR_WakeUpPin_8 PWR_CSR_EWUP8
|
||||
#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUpPin_1) || ((PIN) == PWR_WakeUpPin_2) || \
|
||||
((PIN) == PWR_WakeUpPin_3) || ((PIN) == PWR_WakeUpPin_4) || \
|
||||
((PIN) == PWR_WakeUpPin_5) || ((PIN) == PWR_WakeUpPin_6) || \
|
||||
((PIN) == PWR_WakeUpPin_7) || ((PIN) == PWR_WakeUpPin_8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PWR_Regulator_state_is_Sleep_STOP_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_Regulator_ON ((uint32_t)0x00000000)
|
||||
#define PWR_Regulator_LowPower PWR_CR_LPSDSR
|
||||
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
|
||||
((REGULATOR) == PWR_Regulator_LowPower))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_SLEEP_mode_entry
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_SLEEPEntry_WFI ((uint8_t)0x01)
|
||||
#define PWR_SLEEPEntry_WFE ((uint8_t)0x02)
|
||||
#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPEntry_WFI) || ((ENTRY) == PWR_SLEEPEntry_WFE))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_STOP_mode_entry
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_STOPEntry_WFI ((uint8_t)0x01)
|
||||
#define PWR_STOPEntry_WFE ((uint8_t)0x02)
|
||||
#define PWR_STOPEntry_SLEEPONEXIT ((uint8_t)0x03)
|
||||
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE) ||\
|
||||
((ENTRY) == PWR_STOPEntry_SLEEPONEXIT))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_FLAG_WU PWR_CSR_WUF
|
||||
#define PWR_FLAG_SB PWR_CSR_SBF
|
||||
#define PWR_FLAG_PVDO PWR_CSR_PVDO
|
||||
#define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
|
||||
|
||||
#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
|
||||
((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY))
|
||||
|
||||
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/* Function used to set the PWR configuration to the default reset state ******/
|
||||
void PWR_DeInit(void);
|
||||
|
||||
/* Backup Domain Access function **********************************************/
|
||||
void PWR_BackupAccessCmd(FunctionalState NewState);
|
||||
|
||||
/* PVD configuration functions ************************************************/
|
||||
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
|
||||
void PWR_PVDCmd(FunctionalState NewState);
|
||||
|
||||
/* WakeUp pins configuration functions ****************************************/
|
||||
void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState);
|
||||
|
||||
/* Low Power modes configuration functions ************************************/
|
||||
void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry);
|
||||
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
|
||||
void PWR_EnterSTANDBYMode(void);
|
||||
|
||||
/* Flags management functions *************************************************/
|
||||
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
|
||||
void PWR_ClearFlag(uint32_t PWR_FLAG);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F0XX_PWR_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,91 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f030x8_wwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 2020-06-22
|
||||
* @brief This file contains all the functions prototypes for the WWDG
|
||||
* firmware library.
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FT32F030X8_WWDG_H
|
||||
#define __FT32F030X8_WWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx.h"
|
||||
|
||||
/** @addtogroup FT32F030X8_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup WWDG
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup WWDG_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define WWDG_Prescaler_1 ((uint32_t)0x00000000)
|
||||
#define WWDG_Prescaler_2 ((uint32_t)0x00000080)
|
||||
#define WWDG_Prescaler_4 ((uint32_t)0x00000100)
|
||||
#define WWDG_Prescaler_8 ((uint32_t)0x00000180)
|
||||
#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
|
||||
((PRESCALER) == WWDG_Prescaler_2) || \
|
||||
((PRESCALER) == WWDG_Prescaler_4) || \
|
||||
((PRESCALER) == WWDG_Prescaler_8))
|
||||
#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
|
||||
#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/* Function used to set the WWDG configuration to the default reset state ****/
|
||||
void WWDG_DeInit(void);
|
||||
|
||||
/* Prescaler, Refresh window and Counter configuration functions **************/
|
||||
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
|
||||
void WWDG_SetWindowValue(uint8_t WindowValue);
|
||||
void WWDG_EnableIT(void);
|
||||
void WWDG_SetCounter(uint8_t Counter);
|
||||
|
||||
/* WWDG activation functions **************************************************/
|
||||
void WWDG_Enable(uint8_t Counter);
|
||||
|
||||
/* Interrupts and flags management functions **********************************/
|
||||
FlagStatus WWDG_GetFlagStatus(void);
|
||||
void WWDG_ClearFlag(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FT32F030X8_WWDG_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,82 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_dac.c
|
||||
* @author FMD AE
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of DAC peripheral
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx_dac.h"
|
||||
|
||||
/**
|
||||
*
|
||||
*/
|
||||
void DAC_Ref_Config(uint32_t DAC_RefSel)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
assert_param(IS_DAC_REF_SEL(DAC_RefSel));
|
||||
|
||||
tmpreg = DAC->CTRL;
|
||||
tmpreg &= ~DAC_CTRL_REF_SEL;
|
||||
tmpreg |= DAC_RefSel;
|
||||
|
||||
DAC->CTRL |= tmpreg;
|
||||
}
|
||||
/**
|
||||
* @Parame
|
||||
*/
|
||||
void DAC_Cmd(FunctionalState NewState)
|
||||
{
|
||||
if(NewState != DISABLE)
|
||||
{
|
||||
DAC->CTRL |= DAC_CTRL_EN;
|
||||
}
|
||||
else
|
||||
{
|
||||
DAC->CTRL &= ~DAC_CTRL_EN;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Set the specified data holding register value for DAC channel1.
|
||||
* @param DAC_Align: no use.
|
||||
* @param Data: Data to be loaded in the selected data DAC1DATA register. 7BIT
|
||||
* @retval None
|
||||
*/
|
||||
void DAC_SetChannel1Data(uint32_t DAC_Align, uint8_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DAC_DATA(Data));
|
||||
|
||||
DAC->DATA1 = (uint32_t)Data;
|
||||
}
|
||||
|
||||
void DAC_SetChannel2Data(uint32_t DAC_Align, uint8_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DAC_DATA(Data));
|
||||
|
||||
DAC->DATA2 = (uint32_t)Data;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @Parame
|
||||
*
|
||||
*/
|
||||
uint8_t DAC_Read_Reg(uint8_t DAC_Register)
|
||||
{
|
||||
__IO uint32_t tmp = 0;
|
||||
|
||||
tmp = (uint32_t)DAC_BASE;
|
||||
tmp += DAC_Register;
|
||||
|
||||
/* Return the selected register value */
|
||||
return (uint8_t)(*(__IO uint32_t *) tmp);
|
||||
}
|
||||
@@ -0,0 +1,152 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_debug.c
|
||||
* @author FMD AE
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Debug MCU (DBGMCU) peripheral:
|
||||
* + Device and Revision ID management
|
||||
* + Peripherals Configuration
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx_debug.h"
|
||||
|
||||
|
||||
#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Returns the device revision identifier.
|
||||
* @param None
|
||||
* @retval Device revision identifier
|
||||
*/
|
||||
uint32_t DBGMCU_GetREVID(void)
|
||||
{
|
||||
return(DBGMCU->IDCODE >> 16);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the device identifier.
|
||||
* @param None
|
||||
* @retval Device identifier
|
||||
*/
|
||||
uint32_t DBGMCU_GetDEVID(void)
|
||||
{
|
||||
return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @brief Configures low power mode behavior when the MCU is in Debug mode.
|
||||
* @param DBGMCU_Periph: specifies the low power mode.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DBGMCU_STOP: Keep debugger connection during STOP mode
|
||||
* @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
|
||||
* @param NewState: new state of the specified low power mode in Debug mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
DBGMCU->CR |= DBGMCU_Periph;
|
||||
}
|
||||
else
|
||||
{
|
||||
DBGMCU->CR &= ~DBGMCU_Periph;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
|
||||
* @param DBGMCU_Periph: specifies the APB1 peripheral.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
|
||||
* @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped
|
||||
* when Core is halted.
|
||||
* @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
|
||||
* @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
|
||||
* @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped
|
||||
* when Core is halted
|
||||
* @arg DBGMCU_CAN1_STOP: Debug CAN1 stopped when Core is halted
|
||||
* @param NewState: new state of the specified APB1 peripheral in Debug mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
DBGMCU->APB1FZ |= DBGMCU_Periph;
|
||||
}
|
||||
else
|
||||
{
|
||||
DBGMCU->APB1FZ &= ~DBGMCU_Periph;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
|
||||
* @param DBGMCU_Periph: specifies the APB2 peripheral.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
|
||||
* @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
|
||||
* @param NewState: new state of the specified APB2 peripheral in Debug mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
DBGMCU->APB2FZ |= DBGMCU_Periph;
|
||||
}
|
||||
else
|
||||
{
|
||||
DBGMCU->APB2FZ &= ~DBGMCU_Periph;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,167 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_iwdg.c
|
||||
* @author FMD AE
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Independent watchdog (IWDG) peripheral:
|
||||
* + Prescaler and Counter configuration
|
||||
* + IWDG activation
|
||||
* + Flag management
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx_iwdg.h"
|
||||
|
||||
/* ---------------------- IWDG registers bit mask ----------------------------*/
|
||||
/* KR register bit mask */
|
||||
#define KR_KEY_RELOAD ((uint16_t)0xAAAA)
|
||||
#define KR_KEY_ENABLE ((uint16_t)0xCCCC)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
|
||||
* @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
|
||||
* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
|
||||
IWDG->KR = IWDG_WriteAccess;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets IWDG Prescaler value.
|
||||
* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
|
||||
* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
|
||||
* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
|
||||
* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
|
||||
* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
|
||||
* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
|
||||
* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
|
||||
IWDG->PR = IWDG_Prescaler;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets IWDG Reload value.
|
||||
* @param Reload: specifies the IWDG Reload value.
|
||||
* This parameter must be a number between 0 and 0x0FFF.
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_SetReload(uint16_t Reload)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_RELOAD(Reload));
|
||||
IWDG->RLR = Reload;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reloads IWDG counter with value defined in the reload register
|
||||
* (write access to IWDG_PR and IWDG_RLR registers disabled).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_ReloadCounter(void)
|
||||
{
|
||||
IWDG->KR = KR_KEY_RELOAD;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the IWDG window value.
|
||||
* @param WindowValue: specifies the window value to be compared to the downcounter.
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_SetWindowValue(uint16_t WindowValue)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
|
||||
IWDG->WINR = WindowValue;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Group2 IWDG activation function
|
||||
* @brief IWDG activation function
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### IWDG activation function #####
|
||||
==============================================================================
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void IWDG_Enable(void)
|
||||
{
|
||||
IWDG->KR = KR_KEY_ENABLE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified IWDG flag is set or not.
|
||||
* @param IWDG_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
|
||||
* @arg IWDG_FLAG_RVU: Reload Value Update on going
|
||||
* @arg IWDG_FLAG_WVU: Counter Window Value Update on going
|
||||
* @retval The new state of IWDG_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_FLAG(IWDG_FLAG));
|
||||
if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
|
||||
{
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the flag status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
@@ -0,0 +1,112 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file ft32f0xx_misc.c
|
||||
* @author FMD AE
|
||||
* @brief This file provides all the miscellaneous firmware functions (add-on
|
||||
* to CMSIS functions).
|
||||
* @version V1.0.0
|
||||
* @data 2021-07-01
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "ft32f0xx_misc.h"
|
||||
|
||||
/**
|
||||
* @brief Initializes the NVIC peripheral according to the specified
|
||||
* parameters in the NVIC_InitStruct.
|
||||
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
|
||||
* the configuration information for the specified NVIC peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
|
||||
{
|
||||
uint32_t tmppriority = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
|
||||
assert_param(IS_NVIC_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPriority));
|
||||
|
||||
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
|
||||
{
|
||||
/* Compute the Corresponding IRQ Priority --------------------------------*/
|
||||
tmppriority = NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02];
|
||||
tmppriority &= (uint32_t)(~(((uint32_t)0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8)));
|
||||
tmppriority |= (uint32_t)((((uint32_t)NVIC_InitStruct->NVIC_IRQChannelPriority << 6) & 0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8));
|
||||
|
||||
NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02] = tmppriority;
|
||||
|
||||
/* Enable the Selected IRQ Channels --------------------------------------*/
|
||||
NVIC->ISER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Selected IRQ Channels -------------------------------------*/
|
||||
NVIC->ICER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the condition for the system to enter low power mode.
|
||||
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
|
||||
* @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
|
||||
* @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
|
||||
* @param NewState: new state of LP condition.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_NVIC_LP(LowPowerMode));
|
||||
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
SCB->SCR |= LowPowerMode;
|
||||
}
|
||||
else
|
||||
{
|
||||
SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the SysTick clock source.
|
||||
* @param SysTick_CLKSource: specifies the SysTick clock source.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
|
||||
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
|
||||
* @retval None
|
||||
*/
|
||||
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
|
||||
|
||||
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
|
||||
{
|
||||
SysTick->CTRL |= SysTick_CLKSource_HCLK;
|
||||
}
|
||||
else
|
||||
{
|
||||
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT FMD *****END OF FILE****/
|
||||
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Reference in New Issue
Block a user