Resolve merge conflicts with master branch

Co-authored-by: Rbb666 <64397326+Rbb666@users.noreply.github.com>
2026-02-06 08:52:21 +08:00 · 2026-01-13 05:48:49 +00:00
parent 7179ab2e03
commit 0f0e8c1f34
1322 changed files with 603079 additions and 99576 deletions
--- a/.github/ALL_BSP_COMPILE.json
+++ b/.github/ALL_BSP_COMPILE.json
@@ -73,6 +73,7 @@
        "asm9260t",
        "allwinner_tina",
        "ft32/ft32f072xb-starter",
+        "ft32/ft32f407xe-starter",
        "mini2440",
        "at91/at91sam9g45",
        "at91/at91sam9260",
@@ -248,7 +249,7 @@
        "nxp/mcx/mcxc/frdm-mcxc444",
        "nxp/mcx/mcxa/frdm-mcxa153",
        "nxp/mcx/mcxa/frdm-mcxa156",
-		"nxp/mcx/mcxa/frdm-mcxa346",
+        "nxp/mcx/mcxa/frdm-mcxa346",
        "nxp/mcx/mcxe/frdm-mcxe247",
        "renesas/ebf_qi_min_6m5",
        "renesas/ra6m4-cpk",
@@ -258,12 +259,13 @@
        "renesas/ra6e2-ek",
        "renesas/ra6e2-fpb",
        "renesas/ra4e2-eco",
-		"renesas/ra4m1-ek",
+        "renesas/ra4m1-ek",
        "renesas/ra4m2-eco",
        "renesas/ra2l1-cpk",
        "renesas/ra8m1-ek",
        "renesas/ra8d1-ek",
        "renesas/ra8d1-vision-board",
+        "renesas/ra8p1-titan-board",
        "renesas/rzt2m_rsk",
        "renesas/rzn2l_rsk",
        "renesas/rzn2l_etherkit",
@@ -386,7 +388,8 @@
      "SUB_RTT_BSP": [
        "qemu-virt64-aarch64",
        "raspberry-pi/raspi3-64",
-        "raspberry-pi/raspi4-64"
+        "raspberry-pi/raspi4-64",
+        "nxp/imx/imx91"
      ]
    },
    {
@@ -396,7 +399,8 @@
        "k210",
        "wch/risc-v/ch32v208w-r0",
        "wch/risc-v/ch32v307v-r1",
-        "wch/risc-v/yd-ch32v307vct6"
+        "wch/risc-v/yd-ch32v307vct6",
+        "gd32/risc-v/gd32vw553h-eval"
      ]
    },
    {
--- a/.github/copilot-instructions.md
+++ b/.github/copilot-instructions.md
@@ -6,6 +6,8 @@ RT-Thread is a real-time operating system (RTOS) for embedded devices. When work

 RT-Thread 是一个面向嵌入式设备的实时操作系统（RTOS）。在处理 RT-Thread 代码时，请遵循以下指南以确保高质量的贡献。

+**When reviewing Pull Requests (PRs), you MUST check all items in the PR Review Checklist section and provide feedback according to the PR Review Instructions. / 在审查 Pull Request (PR) 时，必须检查 PR 审查清单部分中的所有项目，并根据 PR 审查指令提供反馈。**
+
 ## Code Review Guidelines / 代码审查指南

 ### Language Requirements / 语言要求
@@ -26,21 +28,162 @@ When reviewing code, provide feedback in **both English and Chinese** to ensure
   - Follow RT-Thread coding standards / 遵循 RT-Thread 编码标准
   - Maintain consistent naming conventions / 保持一致的命名约定
   - Ensure proper code comments (not documentation) / 确保适当的代码注释（而非文档）
-4. **PR Title Naming Guidelines / PR 标题命名规范**
-   - **Specify the module or keyword / 明确模块或关键字**：
-     - 标题需明确指出涉及的具体模块、子系统或关键字，例如具体的 BSP（Board Support Package）或芯片厂商名称（如 STM32, ESP32, NXP 等）。
-     - 示例：[STM32][I2C] Fix Kconfig parsing error 而非 fix:I2C——Kconfig修改。
-   - **Clearly describe the content being repaired or modified / 清晰描述修复或更改内容**：
-     - 标题需简洁清晰地描述修复的问题、添加的功能或修改的内容，避免模糊或过于简略的描述。
-     - 示例：[STM32][SPI] Fix buffer overflow in SPI driver 而非 SPI bug fix。
-   - **Format Recommendations / 格式建议**：
-     - 推荐使用 [模块/厂商][子系统] 具体描述 的格式，确保标题结构化且信息完整。
-     - 使用英文描述问题（除非项目明确要求使用其他语言），以提高国际化可读性。
-     - 示例：[NXP][UART] Add timeout handling for UART receive。
-   - **Issues to Avoid / 避免的问题**：
-     - 不要使用模糊的术语，如“修复问题”或“代码优化”，需具体说明问题或优化的内容。
-     - 避免使用不规范的符号（如 ——），建议使用标准英文字符（如 - 或 :）。
-     - 不要省略关键上下文信息，如 BSP 或芯片厂商。
+4. **PR Review Checklist / PR 审查清单**
+   - **PR Title Review / PR 标题审查**：
+     - Check if PR title has proper prefix format / 检查 PR 标题是否有正确的前缀格式
+     - Verify prefix follows pattern: `[module/vendor][subsystem]` or `[module/vendor]` in lowercase / 验证前缀遵循格式：小写的 `[模块/厂商][子系统]` 或 `[模块/厂商]`
+     - Verify title describes changes based on modified files / 验证标题基于修改的文件描述变更
+     - Check if title is specific enough (avoid vague terms like "fix bug", "optimize code") / 检查标题是否足够具体（避免模糊术语如"修复问题"、"代码优化"）
+     - If title lacks prefix or uses incorrect format, suggest: "PR title should follow format: `[module][subsystem] Description`. Example: `[stm32][drivers] Fix UART interrupt handling issue`" / 如果标题缺少前缀或格式错误，建议："PR 标题应遵循格式：`[模块][子系统] 描述`。示例：`[stm32][drivers] Fix UART interrupt handling issue`"
+   - **PR Description Review / PR 内容审查**：
+     - Check if PR description provides overview of modified files / 检查 PR 描述是否提供了修改文件的总概
+     - Verify description explains: What (what changes), Why (why needed), How (which files modified) / 验证描述是否说明：What（做了什么修改）、Why（为什么需要）、How（修改了哪些文件）
+     - If description is missing or insufficient, suggest adding description with modified files list / 如果描述缺失或不充分，建议添加包含修改文件列表的描述
+   - **PR File Modification Review / PR 修改文件审查**：
+     - Check if PR contains multiple unrelated features / 检查 PR 是否包含多个不相关的特性
+     - If PR mixes multiple features, suggest splitting into separate PRs / 如果 PR 混杂多个特性，建议拆分为多个 PR
+     - Verify all file changes are related to the same feature/bug fix / 验证所有文件修改是否与同一功能/错误修复相关
+   - **PR Commit Review / PR Commit 审查**：
+     - Check commit message format (should follow PR title format) / 检查 commit 消息格式（应遵循 PR 标题格式）
+     - Verify if commits are properly organized / 验证 commit 是否组织得当
+     - If routine changes (style fixes, minor bugs, docs, typos) are split into multiple commits, suggest squashing them / 如果常规修改（风格修复、小错误、文档、拼写）被拆分为多个 commit，建议压缩它们
+     - Important commits (major features, refactoring, critical bugs) can remain separate / 重要提交（主要功能、重构、关键错误）可以保持独立
+     - If commit messages don't follow format, suggest: "Commit message should follow format: `[module][subsystem] Description`. Consider squashing routine changes into one commit." / 如果 commit 消息不符合格式，建议："Commit 消息应遵循格式：`[模块][子系统] 描述`。考虑将常规修改压缩为一个 commit。"
+
+### PR Review Instructions / PR 审查指令
+
+**When reviewing a PR, you MUST systematically check the following items and provide feedback for any violations / 审查 PR 时，必须系统性地检查以下项目，并对任何违规行为提供反馈：**
+
+#### Step 1: PR Title Check / 步骤 1：PR 标题检查
+
+1. **Check prefix format / 检查前缀格式**:
+   - Extract the PR title from the PR / 从 PR 中提取 PR 标题
+   - Verify if it starts with `[module][subsystem]` or `[module]` pattern in lowercase / 验证是否以小写的 `[模块][子系统]` 或 `[模块]` 格式开头
+   - Check if prefix matches the modified files (e.g., if files are in `bsp/stm32/drivers/`, prefix should be `[stm32][drivers]` or similar) / 检查前缀是否与修改的文件匹配（例如，如果文件在 `bsp/stm32/drivers/`，前缀应为 `[stm32][drivers]` 或类似）
+   - If prefix is missing, incorrect case (e.g., `[STM32]`), or doesn't match files, provide feedback / 如果前缀缺失、大小写错误（如 `[STM32]`）或不匹配文件，提供反馈
+   - **Feedback template / 反馈模板**:
+     ```
+     🟡 [PR Title/PR 标题]: Missing or incorrect prefix format / 缺少或错误的前缀格式
+     
+     English: PR title should follow format: `[module][subsystem] Description` in lowercase. 
+     Current title: `{current_title}`. 
+     Based on modified files, suggested title: `{suggested_title}`.
+     
+     中文：PR 标题应遵循格式：小写的 `[模块][子系统] 描述`。
+     当前标题：`{current_title}`。
+     基于修改的文件，建议标题：`{suggested_title}`。
+     ```
+
+2. **Check title specificity / 检查标题具体性**:
+   - Analyze modified files to understand what changes were made / 分析修改的文件以了解所做的更改
+   - Verify if title accurately describes changes based on modified files / 验证标题是否基于修改的文件准确描述更改
+   - Check for vague terms: "fix bug", "optimize code", "update", "modify", etc. / 检查模糊术语："修复问题"、"代码优化"、"更新"、"修改"等
+   - If title is vague or doesn't match modified files, suggest a more specific title / 如果标题模糊或不匹配修改的文件，建议更具体的标题
+   - **Feedback template / 反馈模板**:
+     ```
+     🟡 [PR Title/PR 标题]: Title is too vague or doesn't match modified files / 标题过于模糊或不匹配修改的文件
+     
+     English: PR title should specifically describe changes based on modified files. 
+     Current title: `{current_title}`. 
+     Suggested: `{suggested_title}` based on files: {list_modified_files}.
+     
+     中文：PR 标题应基于修改的文件具体描述更改。
+     当前标题：`{current_title}`。
+     建议：基于文件 {list_modified_files} 的 `{suggested_title}`。
+     ```
+
+#### Step 2: PR Description Check / 步骤 2：PR 内容检查
+
+1. **Check description completeness / 检查描述完整性**:
+   - Read the PR description / 阅读 PR 描述
+   - Verify if it includes: / 验证是否包含：
+     - Overview of modified files / 修改文件的总概
+     - What changes were made / 做了什么修改
+     - Why changes are needed / 为什么需要这些修改
+     - List of modified files (optional but recommended) / 修改文件列表（可选但推荐）
+   - If description is missing, empty, or insufficient, provide feedback / 如果描述缺失、为空或不充分，提供反馈
+   - **Feedback template / 反馈模板**:
+     ```
+     🟢 [PR Description/PR 描述]: Missing or insufficient description / 缺少或不充分的描述
+     
+     English: PR description should include: (1) Overview of modified files, (2) What changes were made, (3) Why changes are needed, (4) List of modified files (optional). 
+     Please add/modify the PR description.
+     
+     中文：PR 描述应包含：(1) 修改文件的总概，(2) 做了什么修改，(3) 为什么需要这些修改，(4) 修改文件列表（可选）。
+     请添加/修改 PR 描述。
+     
+     Example format / 示例格式:
+     ## Description / 描述
+     This PR fixes the UART interrupt handling issue in STM32 serial driver.
+     本次 PR 修复了 STM32 串口驱动中的中断处理问题。
+     
+     ## Modified Files / 修改文件
+     - `bsp/stm32/drivers/drv_usart.c`: Fixed interrupt handler logic
+     - `bsp/stm32/drivers/drv_usart.h`: Updated function declarations
+     ```
+
+#### Step 3: PR File Modification Check / 步骤 3：PR 修改文件检查
+
+1. **Check feature separation / 检查特性分离**:
+   - List all modified files in the PR / 列出 PR 中的所有修改文件
+   - Group files by feature/functionality / 按特性/功能对文件进行分组
+   - Identify if multiple unrelated features are mixed / 识别是否混杂了多个不相关的特性
+   - Unrelated features include: different drivers, different subsystems, unrelated bug fixes, etc. / 不相关的特性包括：不同的驱动、不同的子系统、不相关的错误修复等
+   - If multiple unrelated features are found, provide feedback with specific suggestions / 如果发现多个不相关的特性，提供具体建议的反馈
+   - **Feedback template / 反馈模板**:
+     ```
+     🟡 [PR Structure/PR 结构]: Multiple unrelated features in one PR / 一个 PR 中包含多个不相关的特性
+     
+     English: This PR contains multiple unrelated features: {list_features}. 
+     Please split into separate PRs, each focusing on one feature. 
+     Suggested PRs:
+     - PR 1: `[module1][subsystem1] {feature1_description}` (files: {list_files1})
+     - PR 2: `[module2][subsystem2] {feature2_description}` (files: {list_files2})
+     
+     中文：此 PR 包含多个不相关的特性：{list_features}。
+     请拆分为多个 PR，每个专注于一个特性。
+     建议的 PR：
+     - PR 1: `[模块1][子系统1] {特性1描述}` (文件: {list_files1})
+     - PR 2: `[模块2][子系统2] {特性2描述}` (文件: {list_files2})
+     ```
+
+#### Step 4: PR Commit Check / 步骤 4：PR Commit 检查
+
+1. **Check commit message format / 检查 commit 消息格式**:
+   - Review all commit messages in the PR / 审查 PR 中的所有 commit 消息
+   - Verify if each commit message follows format: `[module][subsystem] Description` / 验证每个 commit 消息是否遵循格式：`[module][subsystem] 描述`
+   - Check if commit message prefix matches PR title prefix / 检查 commit 消息前缀是否与 PR 标题前缀匹配
+   - If commit messages don't follow format, provide feedback / 如果 commit 消息不符合格式，提供反馈
+   - **Feedback template / 反馈模板**:
+     ```
+     🟡 [Commit Message/Commit 消息]: Commit message format violation / Commit 消息格式违规
+     
+     English: Commit message should follow format: `[module][subsystem] Description`. 
+     Invalid commits: {list_invalid_commits}. 
+     Example: `[stm32][drivers] Fix UART interrupt handling issue`.
+     
+     中文：Commit 消息应遵循格式：`[模块][子系统] 描述`。
+     无效的 commit：{list_invalid_commits}。
+     示例：`[stm32][drivers] Fix UART interrupt handling issue`。
+     ```
+
+2. **Check commit organization / 检查 commit 组织**:
+   - Identify routine changes: style fixes, minor bugs, documentation updates, typo corrections / 识别常规修改：风格修复、小错误、文档更新、拼写错误修正
+   - Identify important changes: major features, significant refactoring, critical bug fixes / 识别重要更改：主要功能、重大重构、关键错误修复
+   - Check if routine changes are split into multiple commits / 检查常规修改是否被拆分为多个 commit
+   - If routine changes are split, suggest squashing them / 如果常规修改被拆分，建议压缩它们
+   - **Feedback template / 反馈模板**:
+     ```
+     🟢 [Commit Organization/Commit 组织]: Routine changes should be squashed / 常规修改应压缩
+     
+     English: Routine changes (style fixes, minor bugs, docs, typos) should be squashed into one commit. 
+     Commits to squash: {list_commits_to_squash}. 
+     Please use `git rebase -i` to squash these commits.
+     
+     中文：常规修改（风格修复、小错误、文档、拼写）应压缩为一个 commit。
+     要压缩的 commit：{list_commits_to_squash}。
+     请使用 `git rebase -i` 压缩这些 commit。
+     ```

 ### Review Comment Format / 审查评论格式

@@ -59,6 +202,8 @@ Example/示例:
 // Your code example here / 你的代码示例
 ```
 ```
+
+**For PR-related issues, use severity level 🟡 Minor or 🟢 Suggestion / 对于 PR 相关的问题，使用严重程度级别 🟡 Minor 或 🟢 Suggestion**
 ### Common Issues to Check / 常见问题检查

 1. **Resource Management / 资源管理**
--- a/.github/workflows/bsp_buildings.yml
+++ b/.github/workflows/bsp_buildings.yml
@@ -234,6 +234,8 @@ jobs:
          wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/arm-linux-musleabi_for_x86_64-pc-linux-gnu_stable.tar.bz2
          sudo tar xjf arm-linux-musleabi_for_x86_64-pc-linux-gnu_stable.tar.bz2 -C /opt
          /opt/arm-linux-musleabi_for_x86_64-pc-linux-gnu/bin/arm-linux-musleabi-gcc --version
+          echo "RTT_EXEC_PATH=/opt/arm-linux-musleabi_for_x86_64-pc-linux-gnu/bin" >> $GITHUB_ENV
+          echo "RTT_CC_PREFIX=arm-linux-musleabi-" >> $GITHUB_ENV

      - name: Install Simulator Tools
        if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'gcc' && success() }}
--- a/.github/workflows/utest_auto_run.yml
+++ b/.github/workflows/utest_auto_run.yml
@@ -48,12 +48,12 @@ jobs:

          - { UTEST: "RISCV",         RTT_BSP: "bsp/qemu-virt64-riscv",     QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "None",   KERNEL: "standard", "SMP_RUN":"" }
          - { UTEST: "RISCV-rtsmart", RTT_BSP: "bsp/qemu-virt64-riscv",     QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "None",   KERNEL: "rtsmart",  "SMP_RUN":"" }
-          # - { UTEST: "RISCV-smp",         RTT_BSP: "bsp/qemu-virt64-riscv",     QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "None",   KERNEL: "standard", "SMP_RUN":"smp" }
-          - { UTEST: "XUANTIE-rtsmart",       RTT_BSP: "bsp/xuantie/virt64/c906",   QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "rtsmart",  "SMP_RUN":"" }
+          - { UTEST: "RISCV-smp",     RTT_BSP: "bsp/qemu-virt64-riscv",     QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "None",   KERNEL: "standard", "SMP_RUN":"smp" }
+          - { UTEST: "XUANTIE-rtsmart", RTT_BSP: "bsp/xuantie/virt64/c906", QEMU_ARCH: "riscv64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "rtsmart",  "SMP_RUN":"" }

          - { UTEST: "AARCH64",       RTT_BSP: "bsp/qemu-virt64-aarch64",   QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "standard",  "SMP_RUN":"" }
          - { UTEST: "AARCH64-rtsmart", RTT_BSP: "bsp/qemu-virt64-aarch64", QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "rtsmart",  "SMP_RUN":"" }
-          # - { UTEST: "AARCH64-smp",       RTT_BSP: "bsp/qemu-virt64-aarch64",   QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "standard",  "SMP_RUN":"smp" }
+          - { UTEST: "AARCH64-smp",   RTT_BSP: "bsp/qemu-virt64-aarch64",   QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt",        SD_FILE: "sd.bin", KERNEL: "standard",  "SMP_RUN":"smp" }

        config_file:
          - "default.cfg"
--- a/.gitignore
+++ b/.gitignore
@@ -1,4 +1,6 @@
 *.pyc
+**/Cargo.lock
+**/target/
 *.map
 *.dblite
 *.elf
--- a/bsp/Copyright_Notice.md
+++ b/bsp/Copyright_Notice.md
@@ -325,6 +325,17 @@ Path:

 - bsp/imx6ul/platform

+### imx91
+
+License: bsd-new
+
+Copyright: Copyright 2014-2016 Freescale Semiconductor, Inc.
+           Copyright 2016-2025 NXP
+
+Path:
+
+- bsp/nxp/imx/imx91/drivers/sdk
+
 ### imxrt

 License: clear-bsd
--- a/bsp/README.md
+++ b/bsp/README.md
@@ -33,28 +33,29 @@ This document is based on the RT-Thread mainline repository and categorizes the

 #### 🟢 Renesas

-| BSP Name | GPIO | UART | ADC | CAN | CANFD | DAC | Ethernet | HWTimer | I2C | PWM | RTC | SPI | Soft SPI | Flash | SDHI | SCI | SDRAM | LCD | Other |
-|----------|------|------|-----|-----|-------|-----|----------|---------|-----|-----|-----|-----|----------|-------|------|-----|-------|-----|-------|
-| [ebf_qi_min_6m5](renesas/ebf_qi_min_6m5) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra2a1-ek](renesas/ra2a1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra2e2-ek](renesas/ra2e2-ek) | ✅ | ✅ | ✅ | - | - | - | - | - | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - |
-| [ra2l1-cpk](renesas/ra2l1-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [ra4e2-eco](renesas/ra4e2-eco) | ✅ | ✅ | - | - | - | - | - | - | ✅ | - | - | ✅ | - | - | - | - | - | - | - |
-| [ra4e2-ek](renesas/ra4e2-ek) | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra4m1-ek](renesas/ra4m1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - |
-| [ra4m2-eco](renesas/ra4m2-eco) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra6e2-ek](renesas/ra6e2-ek) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra6e2-fpb](renesas/ra6e2-fpb) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra6m3-ek](renesas/ra6m3-ek) | ✅ | ✅ | - | - | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | ✅ | - |
-| [ra6m3-hmi-board](renesas/ra6m3-hmi-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | ✅ |
-| [ra6m4-cpk](renesas/ra6m4-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | ✅ |
-| [ra6m4-iot](renesas/ra6m4-iot) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - |
-| [ra8d1-ek](renesas/ra8d1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ |
-| [ra8d1-vision-board](renesas/ra8d1-vision-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ |
-| [ra8m1-ek](renesas/ra8m1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzn2l_etherkit](renesas/rzn2l_etherkit) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzn2l_rsk](renesas/rzn2l_rsk) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzt2m_rsk](renesas/rzt2m_rsk) | ✅ | ✅ | ✅ | - | - | - | - | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | ✅ |
+| BSP Name | GPIO | UART | ADC | CAN | CANFD | DAC | Ethernet | HWTimer | I2C | PWM | RTC | SPI | Soft SPI | Flash | SDHI | SCI | SDRAM | LCD | **RS485** | Other |
+|----------|------|------|-----|-----|-------|-----|----------|---------|-----|-----|-----|-----|----------|-------|------|-----|-------|-----|-------|-------|
+| [ebf_qi_min_6m5](renesas/ebf_qi_min_6m5) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra2a1-ek](renesas/ra2a1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra2e2-ek](renesas/ra2e2-ek) | ✅ | ✅ | ✅ | - | - | - | - | - | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra2l1-cpk](renesas/ra2l1-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [ra4e2-eco](renesas/ra4e2-eco) | ✅ | ✅ | - | - | - | - | - | - | ✅ | - | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra4e2-ek](renesas/ra4e2-ek) | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra4m1-ek](renesas/ra4m1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra4m2-eco](renesas/ra4m2-eco) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra6e2-ek](renesas/ra6e2-ek) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra6e2-fpb](renesas/ra6e2-fpb) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra6m3-ek](renesas/ra6m3-ek) | ✅ | ✅ | - | - | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | ✅ | - | - |
+| [ra6m3-hmi-board](renesas/ra6m3-hmi-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | ✅ |
+| [ra6m4-cpk](renesas/ra6m4-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - | ✅ |
+| [ra6m4-iot](renesas/ra6m4-iot) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - | - |
+| [ra8d1-ek](renesas/ra8d1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ |
+| [ra8d1-vision-board](renesas/ra8d1-vision-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ |
+| [ra8p1-titan-board](renesas/ra8p1-titan-board) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ |
+| [ra8m1-ek](renesas/ra8m1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzn2l_etherkit](renesas/rzn2l_etherkit) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzn2l_rsk](renesas/rzn2l_rsk) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzt2m_rsk](renesas/rzt2m_rsk) | ✅ | ✅ | ✅ | - | - | - | - | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |

 #### 🟢 STM32

@@ -88,6 +89,7 @@ This document is based on the RT-Thread mainline repository and categorizes the
 | [stm32f407-atk-explorer](stm32/stm32f407-atk-explorer) | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - | - | ✅ | - | ✅ | ✅ | - | ✅ | - | - | - | - | ✅ | - | ✅ |
 | [stm32f407-fk407m2-zgt6](stm32/stm32f407-fk407m2-zgt6) | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | - | - | - | - | ✅ | - | ✅ |
 | [stm32f407-lckfb-skystar](stm32/stm32f407-lckfb-skystar) | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | - | - | - | ✅ | ✅ | - | - |
+| [stm32f407-micu](stm32/stm32f407-micu) | ✅ | ✅ | - | - | - | - | - | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | - | - | - | - |
 | [stm32f407-robomaster-c](stm32/stm32f407-robomaster-c) | ✅ | ✅ | ✅ | ✅ | - | - | - | - | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
 | [stm32f407-rt-spark](stm32/stm32f407-rt-spark) | ✅ | ✅ | ✅ | ✅ | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | ✅ | - | ✅ |
 | [stm32f407-st-discovery](stm32/stm32f407-st-discovery) | ✅ | ✅ | - | - | - | - | - | - | ✅ | - | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
@@ -340,11 +342,11 @@ This document is based on the RT-Thread mainline repository and categorizes the

 #### 🟡 Rockchip

-| BSP Name | GPIO | UART | ADC | I2C | SPI | WDT |
-|----------|------|------|-----|-----|-----|-----|
-| [rk2108](rockchip/rk2108) | - | ✅ | - | - | - | - |
-| [rk3500](rockchip/rk3500) | - | ✅ | - | - | - | - |
-| [rk3568](rockchip/rk3568) | - | ✅ | - | - | - | - |
+| BSP Name | GPIO | UART | ADC | I2C | SPI | WDT | HWTimer | PWM | RTC | SDIO | CAN | PCI |
+|----------|------|------|-----|-----|-----|-----|---------|-----|-----|------|-----|------|
+| [rk2108](rockchip/rk2108) | - | ✅ | - | - | - | - | - | - | - | - | - | - |
+| [rk3300](rockchip/rk3300) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - |
+| [rk3500](rockchip/rk3500) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |

 #### 🟡 APM32

@@ -415,22 +417,22 @@ This document is based on the RT-Thread mainline repository and categorizes the
 | [swm320-mini](synwit/swm320-mini) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
 | [swm341-mini](synwit/swm341-mini) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |

-#### ⚪ N32G452xx 
+#### ⚪ N32G452xx
 | BSP Name | GPIO | UART | ADC | CAN | DAC | Flash | HWTimer | I2C | PWM | RTC | SDIO | SPI | WDT |
 |----------|------|------|-----|-----|-----|-------|---------|-----|-----|-----|------|-----|-----|
 | [n32g452xx-mini-system](n32g452xx/n32g452xx-mini-system) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ |

-#### ⚪ W60x 
+#### ⚪ W60x
 | BSP Name | GPIO | UART | ADC | Crypto | Flash | HWTimer | WDT | PWM | I2C | SPI |
 |----------|------|------|-----|--------|-------|---------|-----|-----|-----|-----|
 | [w60x](w60x) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |

-#### ⚪ Allwinner Tina 
+#### ⚪ Allwinner Tina
 | BSP Name | GPIO | UART | SPI | SDIO |
 |----------|------|------|-----|------|
 | [allwinner_tina](allwinner_tina) | ✅ | ✅ | ✅ | ✅ |

-#### ⚪ HC321136 
+#### ⚪ HC321136
 | BSP Name | GPIO | UART | I2C |
 |----------|------|------|-----|
 | [hc321136](hc32/hc321136) | ✅ | ✅ | ✅ |
@@ -440,7 +442,7 @@ This document is based on the RT-Thread mainline repository and categorizes the
 |----------|------|------|
 | [hc321196](hc32/hc321196) | ✅ | ✅ |

-#### ⚪ Amebaz 
+#### ⚪ Amebaz
 | BSP Name | GPIO | UART | WLAN |
 |----------|------|------|------|
 | [amebaz](amebaz) | - | ✅ | ✅ |
@@ -541,6 +543,7 @@ This document is based on the RT-Thread mainline repository and categorizes the
 | BSP Name | GPIO | UART |
 |----------|------|------|
 | [ft32f072xb-starter](ft32/ft32f072xb-starter) | ✅ | ✅ |
+| [ft32f407xe-starter](ft32/ft32f407xe-starter) | ✅ | ✅ |

 #### ⚪ Fujitsu

@@ -760,9 +763,9 @@ This document is based on the RT-Thread mainline repository and categorizes the

 #### 🟢 K230 (RT-Smart)

-| BSP Name | GPIO | UART | I2C | RTC | ADC | PWM | SDIO | HWTimer | WDT | SPI |
-|----------|------|------|-----|-----|-----|-----|------|---------|-----|-----|
-| [k230](k230) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
+| BSP Name | GPIO | UART | I2C | RTC | ADC | PWM | SDIO | HWTimer | WDT | SPI | GNNE |
+|----------|------|------|-----|-----|-----|-----|------|---------|-----|-----|------|
+| [k230](k230) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |

 #### 🟢 Xuantie (RT-Smart)

@@ -837,17 +840,17 @@ This document is based on the RT-Thread mainline repository and categorizes the
 |----------|------|------|-----|-------|---------|------|-----|-----|------|----------|-----|
 | [ab32vg1-ab-prougen](bluetrum/ab32vg1-ab-prougen) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |

-#### ⚪ Core-V-MCU 
+#### ⚪ Core-V-MCU
 | BSP Name | UART |
 |----------|------|
 | [core-v-cv32e40p](core-v-mcu/core-v-cv32e40p) | ✅ |

-#### ⚪ HiFive1 
+#### ⚪ HiFive1
 | BSP Name | GPIO | UART |
 |----------|------|------|
 | [hifive1](hifive1) | ✅ | ✅ |

-#### ⚪ Sparkfun-RedV 
+#### ⚪ Sparkfun-RedV
 | BSP Name | GPIO | UART | ADC | I2C | SPI | WDT | Timer | PWM | RTC |
 |----------|------|------|-----|-----|-----|-----|-------|-----|-----|
 | [sparkfun-redv](sparkfun-redv) | ✅ | ✅ | - | - | - | - | ✅ | - | - |
--- a/bsp/ft32/.clang-format-ignore
+++ b/bsp/ft32/.clang-format-ignore
@@ -1,2 +0,0 @@
-# clang-format ignore file  
-/libraries/FT32F0xx/ 
--- a/bsp/ft32/ft32f072xb-starter/.config
+++ b/bsp/ft32/ft32f072xb-starter/.config
@@ -731,6 +731,23 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # HAL & SDK Drivers
 #

+#
+# FT32 Drivers
+#
+CONFIG_PKG_USING_FT32F0_STD_DRIVER=y
+CONFIG_PKG_FT32F0_STD_DRIVER_PATH="/packages/peripherals/hal-sdk/ft32/ft32f0_std_driver"
+CONFIG_PKG_USING_FT32F0_STD_DRIVER_LATEST_VERSION=y
+CONFIG_PKG_FT32F0_STD_DRIVER_VER="latest"
+CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER=y
+CONFIG_PKG_FT32F0_CMSIS_DRIVER_PATH="/packages/peripherals/hal-sdk/ft32/ft32f0_cmsis_driver"
+CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER_LATEST_VERSION=y
+CONFIG_PKG_FT32F0_CMSIS_DRIVER_VER="latest"
+# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set
+# end of FT32 Drivers
+
 #
 # STM32 HAL & SDK Drivers
 #
--- a/bsp/ft32/ft32f072xb-starter/SConstruct
+++ b/bsp/ft32/ft32f072xb-starter/SConstruct
@@ -14,8 +14,27 @@ except:
    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
    print(RTT_ROOT)
    exit(-1)
+    
+def bsp_pkg_check():
+    import subprocess

-TARGET = 'rt-thread_ft32f072.' + rtconfig.TARGET_EXT
+    check_paths = [
+        os.path.join("packages", "ft32f0_cmsis_driver-latest"),
+        os.path.join("packages", "ft32f0_std_driver-latest")
+    ]
+
+    need_update = not all(os.path.exists(p) for p in check_paths)
+
+    if need_update:
+        print("\n===============================================================================")
+        print("Dependency packages missing, please running 'pkgs --update'...")
+        print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
+        print("===============================================================================")
+        exit(1)
+
+RegisterPreBuildingAction(bsp_pkg_check)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT

 DefaultEnvironment(tools=[])
 env = Environment(tools = ['mingw'],
@@ -31,6 +50,7 @@ if rtconfig.PLATFORM in ['iccarm']:
    env.Replace(ARFLAGS = [''])
    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')

+Export('env')
 Export('RTT_ROOT')
 Export('rtconfig')

@@ -41,20 +61,13 @@ if os.path.exists(SDK_ROOT + '/libraries'):
 else:
    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'

-SDK_LIB = libraries_path_prefix
-Export('SDK_LIB')
-
 # prepare building environment
 objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)

-ft32_library = 'FT32F0xx'
-rtconfig.BSP_LIBRARY_TYPE = ft32_library
-
-# include libraries
-objs.extend(SConscript(os.path.join(libraries_path_prefix, ft32_library, 'SConscript')))
+rtconfig.BSP_LIBRARY_TYPE = None

 # include drivers
-objs.extend(SConscript(os.path.join(libraries_path_prefix, 'Drivers', 'SConscript')))
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'STD_Drivers', 'SConscript'), variant_dir='../libraries/Drivers', duplicate=0))

 # make a building
 DoBuilding(TARGET, objs)
--- a/bsp/ft32/ft32f072xb-starter/board/Kconfig
+++ b/bsp/ft32/ft32f072xb-starter/board/Kconfig
@@ -1,5 +1,9 @@
 menu "Hardware Drivers Config"

+config SOC_SERIES_FT32F0
+    bool
+    default y
+
 config SOC_FT32F072RB
    bool
    select SOC_SERIES_FT32F0
@@ -21,27 +25,30 @@ menu "On-chip Peripheral Drivers"
    menuconfig BSP_USING_UART
        bool "Enable UART"
        default y
-        select RT_USING_SERIAL
        if BSP_USING_UART
-            config BSP_USING_UART1
+            choice
+                prompt "Select UART framework version"
+                default BSP_USING_SERIAL_V1
+                
+                config BSP_USING_SERIAL_V1
+                    bool "Use Serial V1 framework"
+                    select RT_USING_SERIAL
+                    
+                config BSP_USING_SERIAL_V2
+                    bool "Use Serial V2 framework"
+                    select RT_USING_SERIAL_V2
+            endchoice
+
+            menuconfig BSP_USING_UART1
                bool "Enable UART1"
                default n

-            config BSP_UART1_RX_USING_DMA
-                bool "Enable UART1 RX DMA"
-                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
-                default n
-
-            config BSP_USING_UART2
+            menuconfig BSP_USING_UART2
                bool "Enable UART2"
                default y
-
-            config BSP_UART2_RX_USING_DMA
-                bool "Enable UART2 RX DMA"
-                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
-                default n
        endif
-    rsource "../../libraries/Drivers/Kconfig"
+
+    source "$(BSP_DIR)/../libraries/Drivers/Kconfig"

 endmenu

--- a/bsp/ft32/ft32f072xb-starter/board/SConscript
+++ b/bsp/ft32/ft32f072xb-starter/board/SConscript
@@ -1,9 +1,6 @@
 import os
-import rtconfig
 from building import *

-Import('SDK_LIB')
-
 cwd = GetCurrentDir()

 # add general drivers
@@ -13,15 +10,6 @@ board.c

 path =  [cwd]

-startup_path_prefix = SDK_LIB
-
-if rtconfig.PLATFORM in ['gcc']:
-    src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/gcc/startup_ft32f072xb.s']
-elif rtconfig.PLATFORM in ['armcc', 'armclang']:
-    src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/arm/startup_ft32f072xb.s']
-elif rtconfig.PLATFORM in ['iccarm']:
-    src += [startup_path_prefix + '/FT32F0xx/CMSIS/FT32F0xx/source/iar/startup_ft32f072xb.s']
-
 # FT32F072x8 || FT32F072xB
 # You can select chips from the list above
 CPPDEFINES = ['FT32F072xB']
--- a/bsp/ft32/ft32f072xb-starter/rtconfig.h
+++ b/bsp/ft32/ft32f072xb-starter/rtconfig.h
@@ -265,6 +265,8 @@

 /* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */

+#define PKG_USING_CMSIS_CORE
+#define PKG_USING_CMSIS_CORE_LATEST_VERSION
 /* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */

 /* Micrium: Micrium software products porting for RT-Thread */
@@ -379,7 +381,10 @@
 /* end of Device Control */

 /* Other */
-
+#define PKG_USING_FT32F0_STD_DRIVER
+#define PKG_USING_FT32F0_STD_DRIVER_LATEST_VERSION
+#define PKG_USING_FT32F0_CMSIS_DRIVER
+#define PKG_USING_FT32F0_CMSIS_DRIVER_LATEST_VERSION
 /* end of Other */

 /* Signal IO */
--- a/bsp/ft32/ft32f407xe-starter/.config
+++ b/bsp/ft32/ft32f407xe-starter/.config
--- a/bsp/ft32/ft32f407xe-starter/.gitignore
+++ b/bsp/ft32/ft32f407xe-starter/.gitignore
@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h
--- a/bsp/ft32/ft32f407xe-starter/Kconfig
+++ b/bsp/ft32/ft32f407xe-starter/Kconfig
@@ -0,0 +1,13 @@
+mainmenu "RT-Thread Configuration"
+
+BSP_DIR := .
+
+RTT_DIR := ../../..
+
+PKGS_DIR := packages
+
+source "$(RTT_DIR)/Kconfig"
+osource "$PKGS_DIR/Kconfig"
+rsource "../libraries/Kconfig"
+rsource "board/Kconfig"
+
--- a/bsp/ft32/ft32f407xe-starter/README.md
+++ b/bsp/ft32/ft32f407xe-starter/README.md
@@ -0,0 +1,53 @@
+# FT32F407xx-StarterKit-32 #
+
+## 1. 简介
+
+[StarterKit-32](https://www.fremontmicro.com/down/demoboard/index.aspx)是辉芒微提供的开发板，使用 Cortex-M4 内核的 FT32F407xE 作为主控制器。提供包括扩展引脚等外设资源。
+
+板载主要资源如下：
+
+| 硬件 | 描述 |
+| -- | -- |
+|CPU| Cortex-M4 |
+|主频| 210MHz |
+|SRAM| 128KB+64KB |
+|Flash| 512KB |
+
+- 常用外设
+  - LED：3个，（PD13、PD14、PD15）
+  - 按键：1个，（PA0或PC13)
+- 常用接口：串口（PA2、PA3）
+
+## 2. 编译说明
+
+StarterKit-32板级包支持 MDK5，以下是具体版本信息：
+
+| IDE/编译器 | 已测试版本 |
+| -- | -- |
+| MDK5(ARM Compiler 5 and 6) | MDK5.38 |
+
+## 3. 烧写及执行
+
+下载程序：使用 CMSIS-DAP或者J-link等工具。
+
+### 3.1 配置和仿真
+
+工程已经默认使能了RT-Thread UART驱动、GPIO驱动。若想进一步配置工程请
+使用ENV工具。
+
+## 4. 驱动支持情况及计划
+
+| 驱动 | 支持情况  |  备注  |
+| ------ | ----  | :------:  |
+| UART | 支持 | USART0/1 |
+| GPIO | 支持 |  |
+
+## 5. 联系人信息
+
+维护人：
+
+- [FMD-AE](https://github.com/FmdAE)
+
+## 6. 参考
+
+* [StarterKit-32](https://www.fremontmicro.com/down/demoboard/index.aspx)
--- a/bsp/ft32/ft32f407xe-starter/SConscript
+++ b/bsp/ft32/ft32f407xe-starter/SConscript
@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
--- a/bsp/ft32/ft32f407xe-starter/SConstruct
+++ b/bsp/ft32/ft32f407xe-starter/SConstruct
@@ -0,0 +1,73 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+    
+def bsp_pkg_check():
+    import subprocess
+
+    check_paths = [
+        os.path.join("packages", "ft32f4_cmsis_driver-latest"),
+        os.path.join("packages", "ft32f4_std_driver-latest")
+    ]
+
+    need_update = not all(os.path.exists(p) for p in check_paths)
+
+    if need_update:
+        print("\n===============================================================================")
+        print("Dependency packages missing, please running 'pkgs --update'...")
+        print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
+        print("===============================================================================")
+        exit(1)
+
+RegisterPreBuildingAction(bsp_pkg_check)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM in ['iccarm']:
+    env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('env')
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+rtconfig.BSP_LIBRARY_TYPE = None
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'STD_Drivers', 'SConscript'), variant_dir='../libraries/Drivers', duplicate=0))
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/ft32/ft32f407xe-starter/applications/SConscript
+++ b/bsp/ft32/ft32f407xe-starter/applications/SConscript
@@ -0,0 +1,9 @@
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/ft32/ft32f407xe-starter/applications/main.c
+++ b/bsp/ft32/ft32f407xe-starter/applications/main.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-03-02     FMD-AE       first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED2 pin: PD13 */
+#define LED2_PIN    GET_PIN(D, 13)
+
+int main(void)
+{
+    /* set LED0 pin mode to output */
+    rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
+
+    while (1)
+    {
+        rt_pin_write(LED2_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED2_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+}
--- a/bsp/ft32/ft32f407xe-starter/board/Kconfig
+++ b/bsp/ft32/ft32f407xe-starter/board/Kconfig
@@ -0,0 +1,59 @@
+menu "Hardware Drivers Config"
+
+config SOC_SERIES_FT32F4
+    bool
+    default y
+
+config SOC_FT32F407VE
+    bool
+    select SOC_SERIES_FT32F4
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "Onboard Peripheral Drivers"
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        default y
+        if BSP_USING_UART
+            choice
+                prompt "Select UART framework version"
+                default BSP_USING_SERIAL_V1
+                
+                config BSP_USING_SERIAL_V1
+                    bool "Use Serial V1 framework"
+                    select RT_USING_SERIAL
+                    
+                config BSP_USING_SERIAL_V2
+                    bool "Use Serial V2 framework"
+                    select RT_USING_SERIAL_V2
+            endchoice
+
+            menuconfig BSP_USING_UART1
+                bool "Enable UART1"
+                default n
+
+            menuconfig BSP_USING_UART2
+                bool "Enable UART2"
+                default y
+        endif
+
+    source "$(BSP_DIR)/../libraries/Drivers/Kconfig"
+
+endmenu
+
+menu "Board extended module Drivers"
+
+endmenu
+
+endmenu
--- a/bsp/ft32/ft32f407xe-starter/board/SConscript
+++ b/bsp/ft32/ft32f407xe-starter/board/SConscript
@@ -0,0 +1,17 @@
+import os
+from building import *
+
+cwd = GetCurrentDir()
+
+# add general drivers
+src = Split('''
+board.c
+''')
+
+path =  [cwd]
+
+# FT32F407xE
+# You can select chips from the list above
+CPPDEFINES = ['FT32F407xE']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+Return('group')
--- a/bsp/ft32/ft32f407xe-starter/board/board.c
+++ b/bsp/ft32/ft32f407xe-starter/board/board.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-03-02     FMD-AE       first version
+ */
+
+#include "board.h"
+
+#ifdef RT_USING_SERIAL
+    #include "drv_usart.h"
+#endif /* RT_USING_SERIAL */
+
+#define DBG_TAG    "drv_common"
+#define DBG_LVL    DBG_INFO
+#include <rtdbg.h>
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+
+static void reboot(uint8_t argc, char **argv)
+{
+    rt_hw_cpu_reset();
+}
+MSH_CMD_EXPORT(reboot, Reboot System);
+#endif /* RT_USING_FINSH */
+
+__IO uint32_t uwTick;
+static uint32_t _systick_ms = 1;
+
+void IncTick(void)
+{
+    uwTick += _systick_ms;
+}
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+        IncTick();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+uint32_t GetTick(void)
+{
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+        IncTick();
+
+    return uwTick;
+}
+
+void SuspendTick(void)
+{
+}
+
+void ResumeTick(void)
+{
+}
+
+void Delay(__IO uint32_t Delay)
+{
+    if (rt_thread_self())
+    {
+        rt_thread_mdelay(Delay);
+    }
+    else
+    {
+        for (rt_uint32_t count = 0; count < Delay; count++)
+        {
+            rt_hw_us_delay(1000);
+        }
+    }
+}
+/**
+ * This function will delay for some us.
+ *
+ * @param us the delay time of us
+ */
+void rt_hw_us_delay(rt_uint32_t us)
+{
+    rt_uint32_t ticks;
+    rt_uint32_t told, tnow, tcnt = 0;
+    rt_uint32_t reload = SysTick->LOAD;
+
+    ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
+    told = SysTick->VAL;
+    while (1)
+    {
+        tnow = SysTick->VAL;
+        if (tnow != told)
+        {
+            if (tnow < told)
+            {
+                tcnt += told - tnow;
+            }
+            else
+            {
+                tcnt += reload - tnow + told;
+            }
+            told = tnow;
+            if (tcnt >= ticks)
+            {
+                break;
+            }
+        }
+    }
+}
+
+/**
+ * This function will initial FT32 board.
+ */
+rt_weak void rt_hw_board_init()
+{
+    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
+    /* Heap initialization */
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+    /* Pin driver initialization is open by default */
+#ifdef RT_USING_PIN
+    rt_hw_pin_init();
+#endif
+
+    /* USART driver initialization is open by default */
+#ifdef RT_USING_SERIAL
+    rt_hw_usart_init();
+#endif
+
+    /* Set the shell console output device */
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+    /* Board underlying hardware initialization */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+}
+
+
--- a/bsp/ft32/ft32f407xe-starter/board/board.h
+++ b/bsp/ft32/ft32f407xe-starter/board/board.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-03-02     FMD-AE       first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include <ft32f4xx.h>
+#include "drv_gpio.h"
+#include <rthw.h>
+#include <ft32f4xx_gpio.h>
+#include <ft32f4xx_exti.h>
+#include <ft32f4xx_usart.h>
+#include <ft32f4xx_dma.h>
+#include <ft32f4xx_rcc.h>
+#include <ft32f4xx_syscfg.h>
+#ifdef RT_USING_DEVICE
+    #include <rtdevice.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FT32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
+#define FT32_FLASH_SIZE             (128 * 1024)
+#define FT32_FLASH_END_ADDRESS      ((uint32_t)(FT32_FLASH_START_ADRESS + FT32_FLASH_SIZE))
+
+/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
+#define FT32_SRAM_SIZE      24
+#define FT32_SRAM_END       (0x20000000 + FT32_SRAM_SIZE * 1024)
+
+#if defined(__ARMCC_VERSION)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      ((void *)&__bss_end)
+#endif
+
+#define HEAP_END        FT32_SRAM_END
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_H__ */
--- a/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.icf
+++ b/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.icf
@@ -0,0 +1,34 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__      = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__      = 0x2001FFFF;
+define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMRAM_end__   = 0x1000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMRAM_region   = mem:[from __ICFEDIT_region_CCMRAM_start__   to __ICFEDIT_region_CCMRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
--- a/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.lds
+++ b/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.lds
@@ -1,111 +1,124 @@
 /*
- * Copyright (c) 2006-2023, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2017-5-30      bernard      first version
+ * linker script for STM32F10x with GNU ld
 */

-OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
-OUTPUT_ARCH(aarch64)
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */
+    RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x400;

 SECTIONS
 {
-    _text_offset = 0x20000000;
-
-    . = 0x20000000;
-    . = ALIGN(4096);
    .text :
    {
-        KEEP(*(.text.entrypoint))       /* The entry point */
-        *(.vectors)
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+
+        . = ALIGN(4);
        *(.text)                        /* remaining code */
        *(.text.*)                      /* remaining code */
-
        *(.rodata)                      /* read-only data (constants) */
        *(.rodata*)
        *(.glue_7)
        *(.glue_7t)
        *(.gnu.linkonce.t*)

-        *(COMMON)
-
        /* section information for finsh shell */
-        . = ALIGN(16);
+        . = ALIGN(4);
        __fsymtab_start = .;
        KEEP(*(FSymTab))
        __fsymtab_end = .;
-        . = ALIGN(16);
+
+        . = ALIGN(4);
        __vsymtab_start = .;
        KEEP(*(VSymTab))
        __vsymtab_end = .;
-        . = ALIGN(16);

        /* section information for initial. */
-        . = ALIGN(16);
+        . = ALIGN(4);
        __rt_init_start = .;
        KEEP(*(SORT(.rti_fn*)))
        __rt_init_end = .;
-        . = ALIGN(16);

-        . = ALIGN(16);
+        . = ALIGN(4);
+
+        PROVIDE(__ctors_start__ = .);
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        PROVIDE(__ctors_end__ = .);
+
+        . = ALIGN(4);
+
        _etext = .;
-    }
+    } > ROM = 0

-    .eh_frame_hdr :
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
    {
-        *(.eh_frame_hdr)
-        *(.eh_frame_entry)
-    }
-    .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)

-    . = ALIGN(16);
-    .data :
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > ROM
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
        *(.data)
        *(.data.*)
+        *(.gnu.linkonce.d*)

-        *(.data1)
-        *(.data1.*)

-        . = ALIGN(16);
-        _gp = ABSOLUTE(.);     /* Base of small data */
-
-        *(.sdata)
-        *(.sdata.*)
-    }
-
-    . = ALIGN(16);
-    .ctors :
-    {
-        PROVIDE(__ctors_start__ = .);
-        /* new GCC version uses .init_array */
-        KEEP(*(SORT(.init_array.*)))
-        KEEP(*(.init_array))
-        PROVIDE(__ctors_end__ = .);
-    }
-
-    .dtors :
-    {
        PROVIDE(__dtors_start__ = .);
        KEEP(*(SORT(.dtors.*)))
        KEEP(*(.dtors))
        PROVIDE(__dtors_end__ = .);
-    }

-    . = ALIGN(16);
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >RAM
+
+    .stack :
+    {
+        . = ALIGN(4);
+        _sstack = .;
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >RAM
+
+    __bss_start = .;
    .bss :
    {
-        PROVIDE(__bss_start = .);
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
        *(.bss)
        *(.bss.*)
-        *(.dynbss)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+
+        *(.bss.init)
+    } > RAM
+    __bss_end = .;

-        . = ALIGN(16);
-        PROVIDE(__bss_end = .);
-    }
    _end = .;

    /* Stabs debugging sections.  */
@@ -142,5 +155,3 @@ SECTIONS
    .debug_typenames 0 : { *(.debug_typenames) }
    .debug_varnames  0 : { *(.debug_varnames) }
 }
-
-__bss_size = SIZEOF(.bss);
--- a/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.sct
+++ b/bsp/ft32/ft32f407xe-starter/board/linker_scripts/link.sct
@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00080000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x00080000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_IRAM1 0x20000000 0x00020000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+
--- a/bsp/ft32/ft32f407xe-starter/figures/ft32f407xe-starter.jpg
+++ b/bsp/ft32/ft32f407xe-starter/figures/ft32f407xe-starter.jpg
--- a/bsp/ft32/ft32f407xe-starter/project.uvprojx
+++ b/bsp/ft32/ft32f407xe-starter/project.uvprojx
--- a/bsp/ft32/ft32f407xe-starter/rtconfig.h
+++ b/bsp/ft32/ft32f407xe-starter/rtconfig.h
@@ -0,0 +1,418 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* RT-Thread Kernel */
+
+/* klibc options */
+
+/* rt_vsnprintf options */
+
+/* end of rt_vsnprintf options */
+
+/* rt_vsscanf options */
+
+/* end of rt_vsscanf options */
+
+/* rt_memset options */
+
+/* end of rt_memset options */
+
+/* rt_memcpy options */
+
+/* end of rt_memcpy options */
+
+/* rt_memmove options */
+
+/* end of rt_memmove options */
+
+/* rt_memcmp options */
+
+/* end of rt_memcmp options */
+
+/* rt_strstr options */
+
+/* end of rt_strstr options */
+
+/* rt_strcasecmp options */
+
+/* end of rt_strcasecmp options */
+
+/* rt_strncpy options */
+
+/* end of rt_strncpy options */
+
+/* rt_strcpy options */
+
+/* end of rt_strcpy options */
+
+/* rt_strncmp options */
+
+/* end of rt_strncmp options */
+
+/* rt_strcmp options */
+
+/* end of rt_strcmp options */
+
+/* rt_strlen options */
+
+/* end of rt_strlen options */
+
+/* rt_strnlen options */
+
+/* end of rt_strnlen options */
+/* end of klibc options */
+#define RT_NAME_MAX 12
+#define RT_CPUS_NR 1
+#define RT_ALIGN_SIZE 8
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_HOOK_USING_FUNC_PTR
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+
+/* kservice options */
+
+/* end of kservice options */
+#define RT_USING_DEBUG
+#define RT_DEBUGING_ASSERT
+#define RT_DEBUGING_COLOR
+#define RT_DEBUGING_CONTEXT
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+/* end of Inter-Thread communication */
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_SMALL_MEM
+#define RT_USING_SMALL_MEM_AS_HEAP
+#define RT_USING_HEAP
+/* end of Memory Management */
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart2"
+#define RT_VER_NUM 0x50201
+#define RT_BACKTRACE_LEVEL_MAX_NR 32
+/* end of RT-Thread Kernel */
+#define ARCH_ARM
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M0
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+#define RT_USING_MSH
+#define RT_USING_FINSH
+#define FINSH_USING_MSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_CMD_SIZE 80
+#define MSH_USING_BUILT_IN_COMMANDS
+#define FINSH_USING_DESCRIPTION
+#define FINSH_ARG_MAX 10
+#define FINSH_USING_OPTION_COMPLETION
+
+/* DFS: device virtual file system */
+
+/* end of DFS: device virtual file system */
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_UNAMED_PIPE_NUMBER 64
+#define RT_USING_SERIAL
+#define RT_USING_SERIAL_V1
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+/* end of Device Drivers */
+
+/* C/C++ and POSIX layer */
+
+/* ISO-ANSI C layer */
+
+/* Timezone and Daylight Saving Time */
+
+#define RT_LIBC_USING_LIGHT_TZ_DST
+#define RT_LIBC_TZ_DEFAULT_HOUR 8
+#define RT_LIBC_TZ_DEFAULT_MIN 0
+#define RT_LIBC_TZ_DEFAULT_SEC 0
+/* end of Timezone and Daylight Saving Time */
+/* end of ISO-ANSI C layer */
+
+/* POSIX (Portable Operating System Interface) layer */
+
+
+/* Interprocess Communication (IPC) */
+
+
+/* Socket is in the 'Network' category */
+
+/* end of Interprocess Communication (IPC) */
+/* end of POSIX (Portable Operating System Interface) layer */
+/* end of C/C++ and POSIX layer */
+
+/* Network */
+
+/* end of Network */
+
+/* Memory protection */
+
+/* end of Memory protection */
+
+/* Utilities */
+
+/* end of Utilities */
+
+/* Using USB legacy version */
+
+/* end of Using USB legacy version */
+/* end of RT-Thread Components */
+
+/* RT-Thread Utestcases */
+
+/* end of RT-Thread Utestcases */
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+/* end of Marvell WiFi */
+
+/* Wiced WiFi */
+
+/* end of Wiced WiFi */
+
+/* CYW43012 WiFi */
+
+/* end of CYW43012 WiFi */
+
+/* BL808 WiFi */
+
+/* end of BL808 WiFi */
+
+/* CYW43439 WiFi */
+
+/* end of CYW43439 WiFi */
+/* end of Wi-Fi */
+
+/* IoT Cloud */
+
+/* end of IoT Cloud */
+/* end of IoT - internet of things */
+
+/* security packages */
+
+/* end of security packages */
+
+/* language packages */
+
+/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+/* XML: Extensible Markup Language */
+
+/* end of XML: Extensible Markup Language */
+/* end of language packages */
+
+/* multimedia packages */
+
+/* LVGL: powerful and easy-to-use embedded GUI library */
+
+/* end of LVGL: powerful and easy-to-use embedded GUI library */
+
+/* u8g2: a monochrome graphic library */
+
+/* end of u8g2: a monochrome graphic library */
+/* end of multimedia packages */
+
+/* tools packages */
+
+/* end of tools packages */
+
+/* system packages */
+
+/* enhanced kernel services */
+
+/* end of enhanced kernel services */
+
+/* acceleration: Assembly language or algorithmic acceleration packages */
+
+/* end of acceleration: Assembly language or algorithmic acceleration packages */
+
+/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
+
+#define PKG_USING_CMSIS_CORE
+#define PKG_USING_CMSIS_CORE_LATEST_VERSION
+/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+/* end of Micrium: Micrium software products porting for RT-Thread */
+/* end of system packages */
+
+/* peripheral libraries and drivers */
+
+/* HAL & SDK Drivers */
+
+/* STM32 HAL & SDK Drivers */
+
+/* end of STM32 HAL & SDK Drivers */
+
+/* Infineon HAL Packages */
+
+/* end of Infineon HAL Packages */
+
+/* Kendryte SDK */
+
+/* end of Kendryte SDK */
+
+/* WCH HAL & SDK Drivers */
+
+/* end of WCH HAL & SDK Drivers */
+
+/* AT32 HAL & SDK Drivers */
+
+/* end of AT32 HAL & SDK Drivers */
+
+/* HC32 DDL Drivers */
+
+/* end of HC32 DDL Drivers */
+
+/* NXP HAL & SDK Drivers */
+
+/* end of NXP HAL & SDK Drivers */
+
+/* NUVOTON Drivers */
+
+/* end of NUVOTON Drivers */
+
+/* GD32 Drivers */
+
+/* end of GD32 Drivers */
+/* end of HAL & SDK Drivers */
+
+/* sensors drivers */
+
+/* end of sensors drivers */
+
+/* touch drivers */
+
+/* end of touch drivers */
+/* end of peripheral libraries and drivers */
+
+/* AI packages */
+
+/* end of AI packages */
+
+/* Signal Processing and Control Algorithm Packages */
+
+/* end of Signal Processing and Control Algorithm Packages */
+
+/* miscellaneous packages */
+
+/* project laboratory */
+
+/* end of project laboratory */
+
+/* samples: kernel and components samples */
+
+/* end of samples: kernel and components samples */
+
+/* entertainment: terminal games and other interesting software packages */
+
+/* end of entertainment: terminal games and other interesting software packages */
+/* end of miscellaneous packages */
+
+/* Arduino libraries */
+
+
+/* Projects and Demos */
+
+/* end of Projects and Demos */
+
+/* Sensors */
+
+/* end of Sensors */
+
+/* Display */
+
+/* end of Display */
+
+/* Timing */
+
+/* end of Timing */
+
+/* Data Processing */
+
+/* end of Data Processing */
+
+/* Data Storage */
+
+/* Communication */
+
+/* end of Communication */
+
+/* Device Control */
+
+/* end of Device Control */
+
+/* Other */
+#define PKG_USING_FT32F4_STD_DRIVER
+#define PKG_USING_FT32F4_STD_DRIVER_LATEST_VERSION
+#define PKG_USING_FT32F4_CMSIS_DRIVER
+#define PKG_USING_FT32F4_CMSIS_DRIVER_LATEST_VERSION
+/* end of Other */
+
+/* Signal IO */
+
+/* end of Signal IO */
+
+/* Uncategorized */
+
+/* end of Arduino libraries */
+/* end of RT-Thread online packages */
+#define SOC_FAMILY_FT32
+#define SOC_SERIES_FT32F4
+
+/* Hardware Drivers Config */
+
+#define SOC_FT32F407VE
+
+/* Onboard Peripheral Drivers */
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART2
+
+/* end of On-chip Peripheral Drivers */
+
+/* Board extended module Drivers */
+
+/* end of Hardware Drivers Config */
+
+#endif
--- a/bsp/ft32/ft32f407xe-starter/rtconfig.py
+++ b/bsp/ft32/ft32f407xe-starter/rtconfig.py
@@ -0,0 +1,185 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m4'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'C:\Users\XXYYZZ'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM    = 'iccarm'
+    EXEC_PATH   = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    CXX = PREFIX + 'g++'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Dgcc'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -g'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    CXX = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M4 '
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
+
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/ARM/ARMCC/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' -std=c99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'armclang':
+    # toolchains
+    CC = 'armclang'
+    CXX = 'armclang'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M4 '
+    CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m4 '
+    CFLAGS += ' -mcpu=cortex-m4 '
+    CFLAGS += ' -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
+    CFLAGS += ' -gdwarf-3 -ffunction-sections '
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
+    LFLAGS += ' --list rt-thread.map '
+    LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
+
+    EXEC_PATH += '/ARM/ARMCLANG/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O1' # armclang recommend
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+        
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' -std=c99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iccarm':
+    # toolchains
+    CC = 'iccarm'
+    CXX = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = '-Dewarm'
+
+    CFLAGS = DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' --cpu=Cortex-M4'
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=None'
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' --silent'
+
+    AFLAGS = DEVICE
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --cpu Cortex-M4'
+    AFLAGS += ' --fpu None'
+    AFLAGS += ' -S'
+
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "board/linker_scripts/link.icf"'
+    LFLAGS += ' --entry __iar_program_start'
+
+    CXXFLAGS = CFLAGS
+
+    EXEC_PATH = EXEC_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
+
--- a/bsp/ft32/ft32f407xe-starter/template.uvprojx
+++ b/bsp/ft32/ft32f407xe-starter/template.uvprojx
@@ -0,0 +1,397 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rt-thread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060528::V5.06 update 5 (build 528)::.\ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>FT32F407VEA2</Device>
+          <Vendor>FMD</Vendor>
+          <PackID>FMD.FT32F4xx_DFP.1.0.0</PackID>
+          <PackURL>https://www.fremontmicro.com/upload/tools/pack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0FT32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:FT32F407VEA2$Flash\FT32F4xx_512.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:FT32F407VEA2$SVD\FT32F407x.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
+          <OutputName>rt-thread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath>.\build\keil\List\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <nBranchProt>0</nBranchProt>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>4</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <ClangAsOpt>4</ClangAsOpt>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Source Group 1</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
--- a/bsp/ft32/libraries/Drivers/drv_config.h
+++ b/bsp/ft32/libraries/Drivers/drv_config.h
@@ -23,6 +23,11 @@ extern "C" {
 #include "uart_config.h"
 #endif

+#if defined(SOC_SERIES_FT32F4)
+#include "dma_config.h"
+#include "uart_config.h"
+#endif
+
 #ifdef __cplusplus
 }
 #endif
--- a/bsp/ft32/libraries/Drivers/drv_dma.h
+++ b/bsp/ft32/libraries/Drivers/drv_dma.h
@@ -22,6 +22,10 @@ extern "C" {
 #define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
 #endif

+#if defined(SOC_SERIES_FT32F4)
+#define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
+#endif
+
 struct dma_config {
    DMA_INSTANCE_TYPE *Instance;
    rt_uint32_t dma_rcc;
--- a/bsp/ft32/libraries/Drivers/drv_gpio.c
+++ b/bsp/ft32/libraries/Drivers/drv_gpio.c
@@ -6,6 +6,7 @@
 * Change Logs:
 * Date           Author       Notes
 * 2022-03-02     FMD-AE       first version
+ * 2025-12-31     FMD-AE       add ft32f4 support
 */

 #include <board.h>
@@ -59,6 +60,24 @@ static const struct pin_irq_map pin_irq_map[] =
    {GPIO_Pin_14, EXTI4_15_IRQn},
    {GPIO_Pin_15, EXTI4_15_IRQn},
 #endif
+#if defined(SOC_SERIES_FT32F4)
+    {GPIO_Pin_0, EXTI0_IRQn},
+    {GPIO_Pin_1, EXTI1_IRQn},
+    {GPIO_Pin_2, EXTI2_IRQn},
+    {GPIO_Pin_3, EXTI3_IRQn},
+    {GPIO_Pin_4, EXTI4_IRQn},
+    {GPIO_Pin_5, EXTI9_5_IRQn},
+    {GPIO_Pin_6, EXTI9_5_IRQn},
+    {GPIO_Pin_7, EXTI9_5_IRQn},
+    {GPIO_Pin_8, EXTI9_5_IRQn},
+    {GPIO_Pin_9, EXTI9_5_IRQn},
+    {GPIO_Pin_10, EXTI15_10_IRQn},
+    {GPIO_Pin_11, EXTI15_10_IRQn},
+    {GPIO_Pin_12, EXTI15_10_IRQn},
+    {GPIO_Pin_13, EXTI15_10_IRQn},
+    {GPIO_Pin_14, EXTI15_10_IRQn},
+    {GPIO_Pin_15, EXTI15_10_IRQn},
+#endif
 };

 static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
@@ -339,12 +358,18 @@ static void rt_gpio_deinit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
            /* Deactivate the Pull-up and Pull-down resistor for the current IO */
            GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));

+#if defined (SOC_SERIES_FT32F0)
            /* Configure the default value IO Output Type */
            GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT_0 << position) ;
-
            /* Configure the default value for IO Speed */
            GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
-
+#endif
+#if defined (SOC_SERIES_FT32F4)
+            /* Configure the default value IO Output Type */
+            GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT0 << position) ;
+            /* Configure the default value for IO Speed */
+            GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << (position * 2u));
+#endif
        }

        position++;
@@ -416,6 +441,7 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
            break;
        }
        GPIO_Init(PIN_FTPORT(pin), &GPIO_InitStruct);
+
        EXTI_Init(&EXTI_InitStructure);

        NVIC_SetPriority(irqmap->irqno, 5);
@@ -438,7 +464,6 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,

        pin_irq_enable_mask &= ~irqmap->pinbit;

-
 #if defined(SOC_SERIES_FT32F0)
        if ((irqmap->pinbit >= GPIO_Pin_0) && (irqmap->pinbit <= GPIO_Pin_1))
        {
@@ -467,6 +492,26 @@ static rt_err_t ft32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
            NVIC_DisableIRQ(irqmap->irqno);
        }

+#endif
+#if defined(SOC_SERIES_FT32F4)
+        if ((irqmap->pinbit >= GPIO_Pin_5) && (irqmap->pinbit <= GPIO_Pin_9))
+        {
+            if (!(pin_irq_enable_mask & (GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9)))
+            {
+                NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else if ((irqmap->pinbit >= GPIO_Pin_10) && (irqmap->pinbit <= GPIO_Pin_15))
+        {
+            if (!(pin_irq_enable_mask & (GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15)))
+            {
+                NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else
+        {
+            NVIC_DisableIRQ(irqmap->irqno);
+        }
 #endif
        rt_hw_interrupt_enable(level);
    }
@@ -546,15 +591,84 @@ void EXTI4_15_IRQHandler(void)
    rt_interrupt_leave();
 }
 #endif
+#if defined(SOC_SERIES_FT32F4)
+void EXTI0_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_0);
+    rt_interrupt_leave();
+}
+
+void EXTI1_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_1);
+    rt_interrupt_leave();
+}
+
+void EXTI2_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_2);
+    rt_interrupt_leave();
+}
+
+void EXTI3_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_3);
+    rt_interrupt_leave();
+}
+
+void EXTI4_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_4);
+    rt_interrupt_leave();
+}
+
+void EXTI5_9_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_5);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_6);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_7);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_8);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_9);
+    rt_interrupt_leave();
+}
+
+void EXTI10_15_Handler(void)
+{
+    rt_interrupt_enter();
+    GPIO_EXTI_IRQHandler(GPIO_Pin_10);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_11);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_12);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_13);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_14);
+    GPIO_EXTI_IRQHandler(GPIO_Pin_15);
+    rt_interrupt_leave();
+}
+#endif

 int rt_hw_pin_init(void)
 {
+#if defined(SOC_SERIES_FT32F0)
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
    return rt_device_pin_register("pin", &_ft32_pin_ops, RT_NULL);
+#endif
+#if defined(SOC_SERIES_FT32F4)
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
+    return rt_device_pin_register("pin", &_ft32_pin_ops, RT_NULL);
+#endif
 }

 #endif /* RT_USING_PIN */
--- a/bsp/ft32/libraries/Drivers/drv_gpio.h
+++ b/bsp/ft32/libraries/Drivers/drv_gpio.h
@@ -6,6 +6,7 @@
 * Change Logs:
 * Date           Author       Notes
 * 2022-03-02     FMD-AE       first version
+ * 2025-12-31     FMD-AE       add ft32f4 support
 */

 #ifndef __DRV_GPIO_H__
@@ -17,11 +18,21 @@
 extern "C" {
 #endif

+#if defined(SOC_SERIES_FT32F0)
 #define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
                                      ((__GPIOx__) == (GPIOB))? 1U :\
                                      ((__GPIOx__) == (GPIOC))? 2U :\
                                      ((__GPIOx__) == (GPIOD))? 3U :\
                                      ((__GPIOx__) == (GPIOF))? 5U : 4U)
+#elif defined(SOC_SERIES_FT32F4)
+#define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
+                                      ((__GPIOx__) == (GPIOB))? 1U :\
+                                      ((__GPIOx__) == (GPIOC))? 2U :\
+                                      ((__GPIOx__) == (GPIOD))? 3U :\
+                                      ((__GPIOx__) == (GPIOE))? 4U : 5U)
+#else
+#error "Unsupported SOC series"
+#endif

 #define __GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))

--- a/bsp/ft32/libraries/Drivers/drv_usart.c
+++ b/bsp/ft32/libraries/Drivers/drv_usart.c
--- a/bsp/ft32/libraries/Drivers/drv_usart.h
+++ b/bsp/ft32/libraries/Drivers/drv_usart.h
@@ -25,6 +25,9 @@ int rt_hw_usart_init(void);
 #if defined(SOC_SERIES_FT32F0)
    #define UART_INSTANCE_CLEAR_FUNCTION    USART_ClearITPendingBit
 #endif
+#if defined(SOC_SERIES_FT32F4)
+    #define UART_INSTANCE_CLEAR_FUNCTION    USART_ClearFlag
+#endif

 #define USART_TX_Pin GPIO_PIN_2
 #define USART_TX_GPIO_Port GPIOA
@@ -46,20 +49,6 @@ struct ft32_uart
 {
    USART_InitTypeDef Init;
    struct ft32_uart_config *config;
-
-#ifdef RT_SERIAL_USING_DMA
-    struct
-    {
-        DMA_InitTypeDef Init;
-        DMA_Channel_TypeDef   *Instance;
-        rt_size_t last_index;
-    } dma_rx;
-    struct
-    {
-        DMA_InitTypeDef Init;
-        DMA_Channel_TypeDef   *Instance;
-    } dma_tx;
-#endif
    rt_uint16_t uart_dma_flag;
    struct rt_serial_device serial;
 };
--- a/bsp/ft32/libraries/Drivers/uart_config.h
+++ b/bsp/ft32/libraries/Drivers/uart_config.h
@@ -28,17 +28,6 @@ extern "C" {
 #endif /* UART1_CONFIG */
 #endif /* BSP_USING_UART1 */

-#if defined(BSP_UART1_RX_USING_DMA)
-#ifndef UART1_DMA_RX_CONFIG
-#define UART1_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART1_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART1_RX_DMA_RCC,                               \
-        .dma_irq  = UART1_RX_DMA_IRQ,                               \
-    }
-#endif /* UART1_DMA_RX_CONFIG */
-#endif /* BSP_UART1_RX_USING_DMA */
-
 #if defined(BSP_USING_UART2)
 #ifndef UART2_CONFIG
 #define UART2_CONFIG                                                \
@@ -50,17 +39,6 @@ extern "C" {
 #endif /* UART2_CONFIG */
 #endif /* BSP_USING_UART2 */

-#if defined(BSP_UART2_RX_USING_DMA)
-#ifndef UART2_DMA_RX_CONFIG
-#define UART2_DMA_RX_CONFIG                                            \
-    {                                                               \
-        .Instance = UART2_RX_DMA_INSTANCE,                          \
-        .dma_rcc  = UART2_RX_DMA_RCC,                               \
-        .dma_irq  = UART2_RX_DMA_IRQ,                               \
-    }
-#endif /* UART2_DMA_RX_CONFIG */
-#endif /* BSP_UART2_RX_USING_DMA */
-
 #ifdef __cplusplus
 }
 #endif
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cm0.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cm0.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cm0plus.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cm0plus.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cmFunc.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cmFunc.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cmInstr.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/core_cmInstr.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f030x6.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f030x6.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f030x8.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f030x8.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f032x6.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f032x6.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f032x8.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f032x8.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f072x8.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f072x8.h
--- a/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f072xb.h
+++ b/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ft32f072xb.h
--- a/Show More
+++ b/Show More