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[UPDATE]添加新驱动、完善 BSP
- [update] 更新 template 工程配置 - [update] 更新 PLATFORM 配置 - [add] 添加 ra icu 驱动文件 - [add] 增加传感器类型 IAQ、EtOH - [add] 添加 CAN 驱动 - [add] 添加 RW007 驱动及使用说明 - [fix] GCC 编译问题 - [fix] flash 驱动 - [fix] 修改 scons 脚本配置
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@@ -0,0 +1,5 @@
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/RTE
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/Listings
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/Objects
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ra_cfg.txt
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+18
-4
@@ -31,7 +31,7 @@
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| **片上外设** | **支持情况** | **备注** |
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| :----------------- | :----------------- | :------------- |
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| UART | 支持 | UART7 |
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| UART | 支持 | UART7 为默认日志输出端口 |
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| GPIO | 支持 | |
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| IIC | 支持 | 软件 |
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| WDT | 支持 | |
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@@ -41,7 +41,12 @@
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| SPI | 支持 | |
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| FLASH | 支持 | |
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| PWM | 支持 | |
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| CAN | 支持 | |
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| 持续更新中... | | |
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| **外接外设** | **支持情况** | **备注** |
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| WiFi | 支持 | [RW007 WiFi 网络模块](https://github.com/RT-Thread-packages/rw007) |
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| 温湿度传感器 | 支持 | [HS300x 温湿度模块](https://github.com/Guozhanxin/hs300x) |
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## 使用说明
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@@ -148,10 +153,10 @@ void hal_entry(void)
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需要修改瑞萨的 BSP 外设配置或添加新的外设端口，需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
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1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)
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1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)，建议使用 FSP 3.1.0
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2. 下载安装完成后，需要添加 CPK-RA6M4 开发板的[官方板级支持包](https://www2.renesas.cn/document/sws/1527176?language=zh&r=1527191)
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3. 如何将 BSP 配置包添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
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4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置，
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4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
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**ENV 配置**
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@@ -165,10 +170,19 @@ void hal_entry(void)
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3. 输入`pkgs --update`命令更新软件包。
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4. 输入`scons --target=mdk5` 命令重新生成工程。
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## FAQ
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### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M33” 怎么办？
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可按照下图操作，修改 Utilities 中的选项：
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## 联系人信息
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在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
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## 贡献代码
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如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github) 。
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如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)。
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@@ -72,11 +72,11 @@ menu "Hardware Drivers Config"
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default y
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if BSP_USING_I2C1
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config BSP_I2C1_SCL_PIN
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int "i2c1 scl pin number"
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hex "i2c1 scl pin number"
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range 0x0000 0x0B0F
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default 0x0512
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config BSP_I2C1_SDA_PIN
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int "I2C1 sda pin number"
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hex "I2C1 sda pin number"
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range 0x0000 0x0B0F
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default 0x0511
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endif
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@@ -181,9 +181,55 @@ menu "Hardware Drivers Config"
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default n
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endif
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menuconfig BSP_USING_CAN
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bool "Enable CAN"
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default n
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select RT_USING_CAN
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if BSP_USING_CAN
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config BSP_USING_CAN0
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bool "Enable CAN0"
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default n
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config BSP_USING_CAN1
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bool "Enable CAN1"
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default n
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endif
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endmenu
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menu "Board extended module Drivers"
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menuconfig BSP_USING_RW007
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bool "Enable RW007"
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default n
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select PKG_USING_RW007
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select BSP_USING_SPI
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if BSP_USING_RW007
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config RA_RW007_SPI_BUS_NAME
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string "RW007 BUS NAME"
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default "spi1"
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config RA_RW007_CS_PIN
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hex "(HEX)CS pin index"
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default 0x040D
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config RA_RW007_BOOT0_PIN
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hex "(HEX)BOOT0 pin index (same as spi clk pin)"
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default 0x040C
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config RA_RW007_BOOT1_PIN
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hex "(HEX)BOOT1 pin index (same as spi cs pin)"
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default 0x040D
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config RA_RW007_INT_BUSY_PIN
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hex "(HEX)INT/BUSY pin index"
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default 0x0506
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config RA_RW007_RST_PIN
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hex "(HEX)RESET pin index"
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default 0x040F
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endif
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endmenu
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endmenu
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@@ -44,6 +44,9 @@ if GetDepend(['BSP_USING_ONCHIP_FLASH']):
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if GetDepend(['BSP_USING_PWM']):
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src += ['drv_pwm.c']
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if GetDepend(['BSP_USING_CAN']):
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src += ['drv_can.c']
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path = [cwd]
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path += [cwd + '/config']
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@@ -25,8 +25,8 @@ extern int Image$$RAM_END$$ZI$$Base;
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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extern int __RAM_segment_used_end__;
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#define HEAP_BEGIN (&__RAM_segment_used_end__)
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#endif
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#define HEAP_END RA_SRAM_END
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@@ -33,6 +33,10 @@ extern "C" {
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#include "ra6m4/pwm_config.h"
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#endif
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#ifdef BSP_USING_CAN
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#include "ra6m4/can_config.h"
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#endif
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#endif/* SOC_SERIES_R7FA6M4AF */
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#ifdef __cplusplus
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@@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-29 mazhiyuan first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "can0", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
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.p_api_ctrl = &g_can0_ctrl, \
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.p_cfg = &g_can0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
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{ \
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.name = "can1", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
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.p_api_ctrl = &g_can1_ctrl, \
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.p_cfg = &g_can1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-29 mazhiyuan first version
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*/
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#ifndef __DRV_CAN_H__
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#define __DRV_CAN_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include <drv_common.h>
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#include <drv_config.h>
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#include <hal_data.h>
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/* renesas config class */
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struct ra_can_config
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{
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const char *name;
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int num_of_mailboxs;
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can_ctrl_t *const p_api_ctrl;
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can_cfg_t const *const p_cfg;
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};
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struct ra_can
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{
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struct rt_can_device can_dev;
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struct ra_can_config *config;
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can_callback_args_t *callback_args;
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};
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struct ra_baud_rate_tab
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{
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rt_uint32_t baud_rate;
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rt_uint32_t sjw;
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rt_uint32_t ts1;
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rt_uint32_t ts2;
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rt_uint32_t prescaler;
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};
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int rt_hw_can_init(void);
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#endif
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@@ -5,7 +5,7 @@
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-5 SummerGift first version
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* 2021-11-30 flybreak first version
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*/
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#include <stdio.h>
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@@ -64,12 +64,6 @@ int _flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
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{
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size_t i;
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if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
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{
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LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -1;
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}
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for (i = 0; i < size; i++, buf++, addr++)
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{
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*buf = *(rt_uint8_t *) addr;
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@@ -96,12 +90,6 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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fsp_err_t err = FSP_SUCCESS;
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size_t written_size = 0;
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if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
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{
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LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -RT_EINVAL;
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}
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if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE)
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{
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LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
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@@ -111,6 +99,7 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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while (written_size < size)
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{
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level = rt_hw_interrupt_disable();
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R_FLASH_HP_Reset(&g_flash_ctrl);
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/* Write code flash data*/
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err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
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rt_hw_interrupt_enable(level);
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@@ -160,6 +149,7 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
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}
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level = rt_hw_interrupt_disable();
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R_FLASH_HP_Reset(&g_flash_ctrl);
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/* Erase Block */
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err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1);
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rt_hw_interrupt_enable(level);
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@@ -174,23 +164,18 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
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return size;
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}
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int _flash_erase_128k(rt_uint32_t addr, size_t size)
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int _flash_erase_32k(rt_uint32_t addr, size_t size)
|
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{
|
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fsp_err_t err = FSP_SUCCESS;
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rt_base_t level;
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|
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if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
|
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{
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LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
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return -RT_EINVAL;
|
||||
}
|
||||
|
||||
if (size < 1)
|
||||
{
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
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level = rt_hw_interrupt_disable();
|
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R_FLASH_HP_Reset(&g_flash_ctrl);
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/* Erase Block */
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err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1);
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rt_hw_interrupt_enable(level);
|
||||
@@ -208,25 +193,25 @@ int _flash_erase_128k(rt_uint32_t addr, size_t size)
|
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#if defined(PKG_USING_FAL)
|
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|
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static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size);
|
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static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
|
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static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size);
|
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|
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static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size);
|
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static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
|
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static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size);
|
||||
|
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static int fal_flash_erase_8k(long offset, size_t size);
|
||||
static int fal_flash_erase_128k(long offset, size_t size);
|
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static int fal_flash_erase_32k(long offset, size_t size);
|
||||
|
||||
const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} };
|
||||
const struct fal_flash_dev _onchip_flash_128k = { "onchip_flash_128k", FLASH_HP_CF_BLOCK_8, 32 * 3 * 1024, (128 * 1024), {_flash_init, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
|
||||
const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} };
|
||||
|
||||
static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_8k.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
|
||||
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_128k.addr + offset, buf, size);
|
||||
return _flash_read(_onchip_flash_32k.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
@@ -234,9 +219,9 @@ static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
return _flash_write(_onchip_flash_8k.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_write(_onchip_flash_128k.addr + offset, buf, size);
|
||||
return _flash_write(_onchip_flash_32k.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_erase_8k(long offset, size_t size)
|
||||
@@ -244,14 +229,14 @@ static int fal_flash_erase_8k(long offset, size_t size)
|
||||
return _flash_erase_8k(_onchip_flash_8k.addr + offset, size);
|
||||
}
|
||||
|
||||
static int fal_flash_erase_128k(long offset, size_t size)
|
||||
static int fal_flash_erase_32k(long offset, size_t size)
|
||||
{
|
||||
return _flash_erase_128k(_onchip_flash_128k.addr + offset, size);
|
||||
return _flash_erase_32k(_onchip_flash_32k.addr + offset, size);
|
||||
}
|
||||
|
||||
int flash_test(void)
|
||||
{
|
||||
#define TEST_OFF 0x10000
|
||||
#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
|
||||
const struct fal_partition *param;
|
||||
uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
|
||||
uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-5 SummerGift first version
|
||||
* 2021-11-30 flybreak first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_FLASH_H__
|
||||
|
||||
@@ -6,6 +6,7 @@
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-08-23 Mr.Tiger first version
|
||||
* 2021-11-04 Sherman ADD complete_event
|
||||
*/
|
||||
/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */
|
||||
|
||||
@@ -22,6 +23,10 @@
|
||||
#endif /* DRV_DEBUG */
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define RA_SPI0_EVENT 0x00
|
||||
#define RA_SPI1_EVENT 0x01
|
||||
static struct rt_event complete_event = {0};
|
||||
|
||||
static struct ra_spi_handle spi_handle[] =
|
||||
{
|
||||
#ifdef BSP_USING_SPI0
|
||||
@@ -40,7 +45,7 @@ void g_spi0_callback(spi_callback_args_t *p_args)
|
||||
rt_interrupt_enter();
|
||||
if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
|
||||
{
|
||||
LOG_D("SPI0 cb");
|
||||
rt_event_send(&complete_event, RA_SPI0_EVENT);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
@@ -50,11 +55,34 @@ void g_spi1_callback(spi_callback_args_t *p_args)
|
||||
rt_interrupt_enter();
|
||||
if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
|
||||
{
|
||||
LOG_D("SPI1 cb");
|
||||
rt_event_send(&complete_event, RA_SPI1_EVENT);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX])
|
||||
{
|
||||
rt_uint32_t recved = 0x00;
|
||||
|
||||
if (bus_name[3] == '0')
|
||||
{
|
||||
return rt_event_recv(event,
|
||||
RA_SPI0_EVENT,
|
||||
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
|
||||
RT_WAITING_FOREVER,
|
||||
&recved);
|
||||
}
|
||||
else if (bus_name[3] == '1')
|
||||
{
|
||||
return rt_event_recv(event,
|
||||
RA_SPI1_EVENT,
|
||||
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
|
||||
RT_WAITING_FOREVER,
|
||||
&recved);
|
||||
}
|
||||
return -RT_EINVAL;
|
||||
}
|
||||
|
||||
static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
|
||||
{
|
||||
RT_ASSERT(device != NULL);
|
||||
@@ -63,13 +91,6 @@ static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_
|
||||
RT_ASSERT(len > 0);
|
||||
rt_err_t err = RT_EOK;
|
||||
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
|
||||
spi_dev->cs_pin = *(rt_uint32_t *)device->parent.user_data;
|
||||
|
||||
/**< Configure Select Line */
|
||||
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
|
||||
|
||||
/* Start a write transfer */
|
||||
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_LOW);
|
||||
|
||||
/**< send msessage */
|
||||
err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, spi_dev->rt_spi_cfg_t->data_width);
|
||||
@@ -78,7 +99,8 @@ static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_
|
||||
LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
|
||||
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
|
||||
return len;
|
||||
}
|
||||
|
||||
@@ -90,13 +112,6 @@ static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, co
|
||||
RT_ASSERT(len > 0);
|
||||
rt_err_t err = RT_EOK;
|
||||
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
|
||||
spi_dev->cs_pin = *(rt_uint32_t *)device->parent.user_data;
|
||||
|
||||
/**< Configure Select Line */
|
||||
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
|
||||
|
||||
/* Start read transfer */
|
||||
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_LOW);
|
||||
|
||||
/**< receive message */
|
||||
err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, spi_dev->rt_spi_cfg_t->data_width);
|
||||
@@ -105,7 +120,8 @@ static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, co
|
||||
LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
|
||||
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
|
||||
return len;
|
||||
}
|
||||
|
||||
@@ -124,7 +140,8 @@ static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_sp
|
||||
LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
|
||||
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
|
||||
return message->length;
|
||||
}
|
||||
|
||||
@@ -148,7 +165,7 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
|
||||
spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
|
||||
|
||||
/**< Configure Select Line */
|
||||
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
|
||||
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
|
||||
|
||||
/**< config bitrate */
|
||||
R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div);
|
||||
@@ -166,15 +183,23 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
|
||||
|
||||
static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||||
{
|
||||
RT_ASSERT(device != NULL);
|
||||
RT_ASSERT(message != NULL);
|
||||
rt_err_t err = RT_EOK;
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
RT_ASSERT(device->bus != RT_NULL);
|
||||
RT_ASSERT(message != RT_NULL);
|
||||
|
||||
if (message->length <= 0)
|
||||
rt_err_t err = RT_EOK;
|
||||
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
|
||||
spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data;
|
||||
|
||||
if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS))
|
||||
{
|
||||
LOG_E("buf length err.");
|
||||
if (device->config.mode & RT_SPI_CS_HIGH)
|
||||
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
|
||||
else
|
||||
rt_pin_write(spi_dev->cs_pin, PIN_LOW);
|
||||
}
|
||||
else
|
||||
|
||||
if (message->length > 0)
|
||||
{
|
||||
if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
|
||||
{
|
||||
@@ -192,6 +217,14 @@ static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_messag
|
||||
err = ra_write_read_message(device, message);
|
||||
}
|
||||
}
|
||||
|
||||
if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS))
|
||||
{
|
||||
if (device->config.mode & RT_SPI_CS_HIGH)
|
||||
rt_pin_write(spi_dev->cs_pin, PIN_LOW);
|
||||
else
|
||||
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -226,9 +259,15 @@ int ra_hw_spi_init(void)
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO))
|
||||
{
|
||||
LOG_E("SPI transfer event init fail!");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(ra_hw_spi_init);
|
||||
|
||||
@@ -26,7 +26,7 @@ extern "C" {
|
||||
#ifdef R_SPI_H
|
||||
struct ra_spi_handle
|
||||
{
|
||||
const char *bus_name;
|
||||
const char bus_name[RT_NAME_MAX];
|
||||
const spi_cfg_t *spi_cfg_t;
|
||||
const spi_instance_ctrl_t *spi_ctrl_t;
|
||||
};
|
||||
|
||||
@@ -10,10 +10,12 @@ src += Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
LOCAL_CCFLAGS = ''
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
if rtconfig.PLATFORM == 'gcc':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
elif rtconfig.PLATFORM == 'armcc':
|
||||
LOCAL_CCFLAGS += ' --c99'
|
||||
elif rtconfig.PLATFORM == 'armclang':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
|
||||
group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS)
|
||||
|
||||
|
||||
@@ -19,21 +19,23 @@
|
||||
#define FAL_FLASH_PORT_DRIVER_SFUD
|
||||
|
||||
extern const struct fal_flash_dev _onchip_flash_8k;
|
||||
extern const struct fal_flash_dev _onchip_flash_128k;
|
||||
extern const struct fal_flash_dev _onchip_flash_32k;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&_onchip_flash_8k, \
|
||||
&_onchip_flash_128k, \
|
||||
&_onchip_flash_32k, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
/* partition table */
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 0, 3 * 128 * 1024, 0}, \
|
||||
/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h".
|
||||
* More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \
|
||||
}
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = []
|
||||
|
||||
src += Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
LOCAL_CCFLAGS = ''
|
||||
|
||||
if rtconfig.PLATFORM == 'gcc':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
elif rtconfig.PLATFORM == 'armcc':
|
||||
LOCAL_CCFLAGS += ' --c99'
|
||||
elif rtconfig.PLATFORM == 'armclang':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
|
||||
group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,67 @@
|
||||
#include <rtthread.h>
|
||||
#include <rtdbg.h>
|
||||
#ifdef BSP_USING_RW007
|
||||
#include <rtdevice.h>
|
||||
#include <drv_spi.h>
|
||||
#include <board.h>
|
||||
#include <spi_wifi_rw007.h>
|
||||
|
||||
extern void spi_wifi_isr(int vector);
|
||||
|
||||
static void rw007_gpio_init(void)
|
||||
{
|
||||
/* Configure IO */
|
||||
rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
|
||||
|
||||
/* Reset rw007 and config mode */
|
||||
rt_pin_write(RA_RW007_RST_PIN, PIN_LOW);
|
||||
rt_thread_delay(rt_tick_from_millisecond(100));
|
||||
rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH);
|
||||
|
||||
/* Wait rw007 ready(exit busy stat) */
|
||||
while (!rt_pin_read(RA_RW007_INT_BUSY_PIN))
|
||||
{
|
||||
rt_thread_delay(5);
|
||||
}
|
||||
|
||||
rt_thread_delay(rt_tick_from_millisecond(200));
|
||||
rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
|
||||
}
|
||||
|
||||
static struct rt_spi_device rw007_dev;
|
||||
|
||||
int wifi_spi_device_init(void)
|
||||
{
|
||||
char sn_version[32];
|
||||
uint32_t cs_pin = RA_RW007_CS_PIN;
|
||||
|
||||
rw007_gpio_init();
|
||||
rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin);
|
||||
rt_hw_wifi_init("wspi");
|
||||
|
||||
rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
|
||||
rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
|
||||
|
||||
rw007_sn_get(sn_version);
|
||||
rt_kprintf("\nrw007 sn: [%s]\n", sn_version);
|
||||
rw007_version_get(sn_version);
|
||||
rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(wifi_spi_device_init);
|
||||
|
||||
static void int_wifi_irq(void *p)
|
||||
{
|
||||
((void)p);
|
||||
spi_wifi_isr(0);
|
||||
}
|
||||
|
||||
void spi_wifi_hw_init(void)
|
||||
{
|
||||
rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
|
||||
rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE);
|
||||
}
|
||||
|
||||
#endif /* BSP_USING_RW007 */
|
||||
@@ -15,13 +15,7 @@ elif rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
|
||||
src += [cwd + '/fsp/src/r_ioport/r_ioport.c']
|
||||
|
||||
if GetDepend(['RT_USING_SERIAL']):
|
||||
src += [cwd + '/fsp/src/r_sci_uart/r_sci_uart.c']
|
||||
|
||||
if GetDepend(['RT_USING_PIN']):
|
||||
src += [cwd + '/fsp/src/r_icu/r_icu.c']
|
||||
src += Glob(cwd + '/fsp/src/r_*/*.c')
|
||||
|
||||
CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include',
|
||||
cwd + '/fsp/inc',
|
||||
@@ -29,4 +23,4 @@ elif rtconfig.CROSS_TOOL == 'gcc':
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
Return('group')
|
||||
@@ -0,0 +1,95 @@
|
||||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup ICU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_ICU_H
|
||||
#define R_ICU_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
#include "r_external_irq_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/** ICU private control block. DO NOT MODIFY. Initialization occurs when R_ICU_ExternalIrqOpen is called. */
|
||||
typedef struct st_icu_instance_ctrl
|
||||
{
|
||||
uint32_t open; ///< Used to determine if channel control block is in use
|
||||
IRQn_Type irq; ///< NVIC interrupt number
|
||||
uint8_t channel; ///< Channel
|
||||
|
||||
#if BSP_TZ_SECURE_BUILD
|
||||
external_irq_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
|
||||
#endif
|
||||
void (* p_callback)(external_irq_callback_args_t * p_args); // Pointer to callback that is called when an edge is detected on the external irq pin.
|
||||
|
||||
/** Placeholder for user data. Passed to the user callback in ::external_irq_callback_args_t. */
|
||||
void const * p_context;
|
||||
} icu_instance_ctrl_t;
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @cond INC_HEADER_DEFS_SEC */
|
||||
/** Filled in Interface API structure for this Instance. */
|
||||
extern const external_irq_api_t g_external_irq_on_icu;
|
||||
|
||||
/** @endcond */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Public APIs
|
||||
**********************************************************************************************************************/
|
||||
fsp_err_t R_ICU_ExternalIrqOpen(external_irq_ctrl_t * const p_api_ctrl, external_irq_cfg_t const * const p_cfg);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqEnable(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqDisable(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqCallbackSet(external_irq_ctrl_t * const p_api_ctrl,
|
||||
void ( * p_callback)(external_irq_callback_args_t *),
|
||||
void const * const p_context,
|
||||
external_irq_callback_args_t * const p_callback_memory);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqClose(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup ICU)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif // R_ICU_H
|
||||
@@ -63,8 +63,12 @@ void Reset_Handler (void)
|
||||
/* Initialize system using BSP. */
|
||||
SystemInit();
|
||||
|
||||
/* Call user application. */
|
||||
#ifdef __ARMCC_VERSION
|
||||
main();
|
||||
#elif defined(__GNUC__)
|
||||
extern int entry(void);
|
||||
entry();
|
||||
#endif
|
||||
|
||||
while (1)
|
||||
{
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,5 @@
|
||||
/* generated configuration header file - do not edit */
|
||||
#ifndef R_ICU_CFG_H_
|
||||
#define R_ICU_CFG_H_
|
||||
#define ICU_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
|
||||
#endif /* R_ICU_CFG_H_ */
|
||||
@@ -17,7 +17,7 @@ if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
PLATFORM = 'armclang'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
@@ -26,7 +26,8 @@ elif CROSS_TOOL == 'iar':
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
# BUILD = 'debug'
|
||||
BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
@@ -54,7 +55,7 @@ if PLATFORM == 'gcc':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g -Wall'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
CFLAGS += ' -Os'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
POST_ACTION += OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
|
||||
@@ -79,7 +80,7 @@ elif PLATFORM == 'armcc':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
CFLAGS += ' -Os'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET \n'
|
||||
POST_ACTION += 'python ./makeimg.py'
|
||||
@@ -152,6 +152,26 @@ SECTIONS
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(FalPartTable))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
|
||||
@@ -179,7 +179,7 @@
|
||||
|
||||
<Group>
|
||||
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
@@ -207,6 +207,30 @@
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\src\mqtt_client.c</PathWithFileName>
|
||||
<FilenameWithoutPath>mqtt_client.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\src\mqtt_client.h</PathWithFileName>
|
||||
<FilenameWithoutPath>mqtt_client.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
|
||||
@@ -10,14 +10,15 @@
|
||||
<TargetName>Target 1</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
|
||||
<uAC6>1</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>R7FA6M4AF</Device>
|
||||
<Device>R7FA6M4AF3CFB</Device>
|
||||
<Vendor>Renesas</Vendor>
|
||||
<PackID>Renesas.RA_DFP.3.1.0</PackID>
|
||||
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
|
||||
<Cpu>CPUTYPE("Cortex-M33") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||
<Cpu>CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
@@ -32,7 +33,7 @@
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:R7FA6M4AF$SVD\R7FA6M4AF.svd</SFDFile>
|
||||
<SFDFile>$$Device:R7FA6M4AF3CFB$SVD\R7FA6M4AF.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
@@ -108,10 +109,10 @@
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<SimDllName></SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDll></SimDlgDll>
|
||||
<SimDlgDllArguments></SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
@@ -129,7 +130,7 @@
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>0</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<UseExternalTool>1</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
@@ -395,6 +396,16 @@
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\src\SConscript</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mqtt_client.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\src\mqtt_client.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mqtt_client.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\src\mqtt_client.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
|
||||
@@ -50,6 +50,8 @@ extern "C" {
|
||||
#define RT_SENSOR_CLASS_GNSS (16) /* GPS/GNSS sensor */
|
||||
#define RT_SENSOR_CLASS_TOF (17) /* TOF sensor */
|
||||
#define RT_SENSOR_CLASS_SPO2 (18) /* SpO2 sensor */
|
||||
#define RT_SENSOR_CLASS_IAQ (19) /* IAQ sensor. */
|
||||
#define RT_SENSOR_CLASS_ETOH (20) /* EtOH sensor. */
|
||||
|
||||
/* Sensor vendor types */
|
||||
|
||||
@@ -90,6 +92,7 @@ extern "C" {
|
||||
#define RT_SENSOR_UNIT_PPB (15) /* Concentration unit: ppb */
|
||||
#define RT_SENSOR_UNIT_DMS (16) /* Coordinates unit: DMS */
|
||||
#define RT_SENSOR_UNIT_DD (17) /* Coordinates unit: DD */
|
||||
#define RT_SENSOR_UNIT_MGM3 (18) /* Concentration unit: mg/m3 */
|
||||
/* Sensor communication interface types */
|
||||
|
||||
#define RT_SENSOR_INTF_I2C (1 << 0)
|
||||
@@ -218,6 +221,8 @@ struct rt_sensor_data
|
||||
rt_uint32_t dust; /* Dust sensor. unit: ug/m3 */
|
||||
rt_uint32_t eco2; /* eCO2 sensor. unit: ppm */
|
||||
rt_uint32_t spo2; /* SpO2 sensor. unit: permillage */
|
||||
rt_uint32_t iaq; /* IAQ sensor. unit: 1 */
|
||||
rt_uint32_t etoh; /* EtOH sensor. unit: ppm */
|
||||
} data;
|
||||
};
|
||||
|
||||
|
||||
@@ -37,7 +37,9 @@ static char *const sensor_name_str[] =
|
||||
"eco2_", /* eCO2 sensor */
|
||||
"gnss_", /* GPS/GNSS sensor */
|
||||
"tof_", /* TOF sensor */
|
||||
"spo2_" /* SpO2 sensor */
|
||||
"spo2_", /* SpO2 sensor */
|
||||
"iaq_", /* IAQ sensor */
|
||||
"etoh_", /* EtOH sensor */
|
||||
};
|
||||
|
||||
/* Sensor interrupt correlation function */
|
||||
@@ -134,7 +136,8 @@ static rt_err_t local_control(struct rt_sensor_device *sensor, int cmd, void *ar
|
||||
LOG_D("Undefined control");
|
||||
return RT_ERROR;
|
||||
}
|
||||
static struct rt_sensor_ops local_ops = {
|
||||
static struct rt_sensor_ops local_ops =
|
||||
{
|
||||
.fetch_data = local_fetch_data,
|
||||
.control = local_control
|
||||
};
|
||||
@@ -145,7 +148,7 @@ static rt_err_t rt_sensor_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
rt_sensor_t sensor = (rt_sensor_t)dev;
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
rt_err_t res = RT_EOK;
|
||||
rt_err_t (*local_ctrl)(struct rt_sensor_device *sensor, int cmd, void *arg) = local_control;
|
||||
rt_err_t (*local_ctrl)(struct rt_sensor_device * sensor, int cmd, void *arg) = local_control;
|
||||
|
||||
if (sensor->module)
|
||||
{
|
||||
@@ -311,7 +314,7 @@ static rt_size_t rt_sensor_read(rt_device_t dev, rt_off_t pos, void *buf, rt_siz
|
||||
if (sensor->ops->fetch_data != RT_NULL)
|
||||
{
|
||||
result = sensor->ops->fetch_data(sensor, buf, len);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (sensor->module)
|
||||
@@ -359,7 +362,7 @@ static rt_err_t rt_sensor_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
sensor->config.range = (rt_int32_t)args;
|
||||
LOG_D("set range %d", sensor->config.range);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RT_SENSOR_CTRL_SET_ODR:
|
||||
/* Configuration data output rate */
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user