mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-02-06 17:12:01 +08:00
add:air105 bsp (#5607)
* add:air105 bsp * add:去掉注释代码 * add:注释修改 * fix:格式化一遍代码格式 * add:main函数添加闪灯 * add:完善bsp * add:添加一些信息 * add:使用工作队列喂狗 * add:整理目录 * add:去掉乱码部分 * add:修改readme * add:更新readme说明 * add:去掉bootloader.bin和soc_download.exe，README.md中添加标注 * fix:去除多余文件 * add:补充license * add:支持scons --dist * add:更新soc_download.exe连接地址
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打盹的消防车
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20
bsp/airm2m/README.md
Normal file
20
bsp/airm2m/README.md
Normal file
@@ -0,0 +1,20 @@
|
||||
### 本文档为 合宙 开发团队为 airm2m bsp 提供的资料、介绍说明。
|
||||
|
||||
**合宙官网：https://openluat.com**
|
||||
|
||||
**wiki教程文档：https://wiki.luatos.com/**
|
||||
|
||||
**luatos仓库：https://gitee.com/openLuat/LuatOS**
|
||||
|
||||
**Luatos RTthread 软件包仓库：https://github.com/openLuat/luatos-soc-rtt**
|
||||
|
||||
**API手册：https://wiki.luatos.com/api/index.html**
|
||||
|
||||
**社区：https://doc.openluat.com/**
|
||||
|
||||
**air105仓库：https://gitee.com/openLuat/luatos-soc-air105**
|
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|
||||
**购买地址：https://luat.taobao.com/index.htm?spm=a1z10.5-c-s.w5002-24045920810.2.457f5bcdtkiPyX**
|
||||
|
||||
**如有问题提问请详细说明现象，提供日志以及最新复现工程,在https://gitee.com/openLuat/LuatOS/issues报问题**
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|
||||
666
bsp/airm2m/air105/.config
Normal file
666
bsp/airm2m/air105/.config
Normal file
File diff suppressed because it is too large
Load Diff
21
bsp/airm2m/air105/Kconfig
Normal file
21
bsp/airm2m/air105/Kconfig
Normal file
@@ -0,0 +1,21 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
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||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "board/Kconfig"
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|
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119
bsp/airm2m/air105/README.md
Normal file
119
bsp/airm2m/air105/README.md
Normal file
@@ -0,0 +1,119 @@
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# AIR105开发板 BSP 说明
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## 简介
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本文档为 合宙 开发团队为 AIR105开发板提供的 BSP (板级支持包) 说明。
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|
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主要内容如下：
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|
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- 开发板资源介绍
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- BSP 快速上手
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- 进阶使用方法
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||||
|
||||
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
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## 开发板介绍
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|
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AIR105 是合宙推出的一款基于 ARM Cortex-M4 内核的10mm x 10mm 大小的MCU，最高主频为 204Mhz，不仅提供UART/GPIO/I2C/ADC/SPI等基础外设，更提供DAC/USB/DCMI/HSPI等高级外设接口，内置充电功能，支持5V/3.3V供电，同时自带5v转3.3V的LDO，4M字节Flash，640K字节RAM。
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||||
|
||||
开发板外观如下图所示：
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||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
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|
||||
- MCU：Air105，主频 204MHz，4M FLASH ，640KB RAM
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- 调试下载接口，UART0 To Type-c USB 接口
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||||
|
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开发板更多详细信息请参考合宙Air105 [合宙Air105开发板介绍](https://wiki.luatos.com/chips/air105/board.html)。
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|
||||
## 外设支持
|
||||
|
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本 BSP 目前对外设的支持情况如下：
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||||
|
||||
| 片上外设 | **支持情况** |
|
||||
| -------- | ------------ |
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||||
| GPIO | 支持 |
|
||||
| UART | 支持 |
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| SPI | 支持 |
|
||||
| I2C | 支持 |
|
||||
| RTC | 支持 |
|
||||
| WDT | 支持 |
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||||
|
||||
|
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## 使用说明
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||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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||||
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
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||||
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为开发者提供 GCC 工程，支持 GCC 开发环境。下面介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线连接开发板到 PC。
|
||||
|
||||
#### 编译下载
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
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2. 输入`menuconfig`。
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3. 输入`scons`进行编译。
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||||
|
||||
编译完成会自动打包bl : bootloader.bin和下载工具:soc_download.exe在bsp目录下生成rtthread_air105.soc，使用[Luatools](http://cdndownload.openluat.com/Luat_tool_src/last_release/Luatools_v2.exe)下载进开发板即可。
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||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（1500000-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
|
||||
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.1.0 build Feb 22 2022 09:53:22
|
||||
2006 - 2022 Copyright by RT-Thread team
|
||||
msh >
|
||||
```
|
||||
### 进阶使用
|
||||
|
||||
此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
|
||||
4. 输入`scons`进行编译。
|
||||
|
||||
|
||||
|
||||
**Luatos同样也上线了RTthread 软件包，仓库：https://github.com/openLuat/luatos-soc-rtt**
|
||||
|
||||
## 注意事项
|
||||
|
||||
**bootloader.bin和soc_download.exe如不存在会自动下载，请保持网络通畅**
|
||||
|
||||
**烧录前请设置波特率为1500000**
|
||||
|
||||
**air105必须启用看门狗，默认启用**
|
||||
|
||||
**更多资料参考[WIKI](https://wiki.luatos.com/)**
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [**合宙Luat**](https://gitee.com/openLuat)
|
||||
- [**淘宝地址**](https://item.taobao.com/item.htm?spm=a1z10.5-c-s.w4002-24045920841.15.29395bcdUExSHR&id=666216389131)
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||||
|
||||
14
bsp/airm2m/air105/SConscript
Normal file
14
bsp/airm2m/air105/SConscript
Normal file
@@ -0,0 +1,14 @@
|
||||
# for module compiling
|
||||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
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||||
51
bsp/airm2m/air105/SConstruct
Normal file
51
bsp/airm2m/air105/SConstruct
Normal file
@@ -0,0 +1,51 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
12
bsp/airm2m/air105/applications/SConscript
Normal file
12
bsp/airm2m/air105/applications/SConscript
Normal file
@@ -0,0 +1,12 @@
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
src = Split("""
|
||||
main.c
|
||||
""")
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
48
bsp/airm2m/air105/applications/main.c
Normal file
48
bsp/airm2m/air105/applications/main.c
Normal file
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include "drv_gpio.h"
|
||||
|
||||
/* defined the LED2 pin: PD14 */
|
||||
#define LED0_PIN GPIOD_14
|
||||
/* defined the LED3 pin: PD15 */
|
||||
#define LED1_PIN GPIOD_15
|
||||
/* defined the LED4 pin: PC3 */
|
||||
#define LED2_PIN GPIOC_03
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint32_t Speed = 200;
|
||||
/* set LED2 pin mode to output */
|
||||
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
|
||||
/* set LED3 pin mode to output */
|
||||
rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
|
||||
/* set LED4 pin mode to output */
|
||||
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED0_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED1_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED0_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED1_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(Speed);
|
||||
}
|
||||
}
|
||||
175
bsp/airm2m/air105/board/Kconfig
Normal file
175
bsp/airm2m/air105/board/Kconfig
Normal file
@@ -0,0 +1,175 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_AIR105
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M4
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
select BSP_USING_WDT
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_SHELL_TO_USART
|
||||
bool "Enable SHELL TO USART (uart0)"
|
||||
select BSP_USING_UART
|
||||
select BSP_USING_UART0
|
||||
default y
|
||||
|
||||
config BSP_USING_SPI_FLASH
|
||||
bool "Enable SPI FLASH (W25Q64 spi1)"
|
||||
select BSP_USING_SPI
|
||||
select RT_USING_SFUD
|
||||
select RT_SFUD_USING_SFDP
|
||||
default n
|
||||
|
||||
config BSP_USING_ETH
|
||||
bool "Enable Ethernet Driver"
|
||||
select PKG_USING_WIZNET
|
||||
select BSP_USING_SPI
|
||||
default n
|
||||
if BSP_USING_ETH
|
||||
config EXTERNAL_PHY_ADDRESS
|
||||
hex
|
||||
default 0x00
|
||||
config WIZ_SPI_BUS
|
||||
string "WIZ SPI bus name"
|
||||
default "spi2"
|
||||
config WIZ_SPI_CS
|
||||
int "WIZ SPI bus cs pin"
|
||||
default 19
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
menuconfig BSP_USING_UART0
|
||||
bool "Enable UART0 (Debugger)"
|
||||
default n
|
||||
if BSP_USING_UART0
|
||||
config BSP_UART0_RX_BUFSIZE
|
||||
int "Set UART0 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART0_TX_BUFSIZE
|
||||
int "Set UART0 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default n
|
||||
if BSP_USING_UART1
|
||||
config BSP_UART1_RX_BUFSIZE
|
||||
int "Set UART1 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART1_TX_BUFSIZE
|
||||
int "Set UART1 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default n
|
||||
if BSP_USING_UART2
|
||||
config BSP_UART2_RX_BUFSIZE
|
||||
int "Set UART2 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART2_TX_BUFSIZE
|
||||
int "Set UART2 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART3
|
||||
bool "Enable UART3"
|
||||
default n
|
||||
if BSP_USING_UART3
|
||||
config BSP_UART3_RX_BUFSIZE
|
||||
int "Set UART3 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART3_TX_BUFSIZE
|
||||
int "Set UART3 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
endif
|
||||
endif
|
||||
|
||||
config BSP_USING_I2C
|
||||
bool "Enable HW I2C"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
if BSP_USING_I2C
|
||||
config I2C_BUS_NAME
|
||||
string "HW I2C bus name"
|
||||
default "i2c"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_HSPI0
|
||||
bool "Enable HSPI0 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI2
|
||||
bool "Enable SPI2 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI0S
|
||||
bool "Enable SPI0S BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_ONCHIP_RTC
|
||||
bool "Enable HW onchip rtc"
|
||||
select RT_USING_ONCHIP_RTC
|
||||
default n
|
||||
|
||||
config BSP_USING_WDT
|
||||
bool "Enable Watchdog Timer"
|
||||
select RT_USING_WDT
|
||||
select RT_USING_DEVICE_IPC
|
||||
select RT_USING_SYSTEM_WORKQUEUE
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
35
bsp/airm2m/air105/board/SConscript
Normal file
35
bsp/airm2m/air105/board/SConscript
Normal file
@@ -0,0 +1,35 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPDEFINES = ['__USE_XTL__']
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
board.c
|
||||
''')
|
||||
|
||||
if GetDepend(['BSP_USING_ETH']):
|
||||
src += Glob('ports/w5500_device.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SPI_FLASH']):
|
||||
src += Glob('ports/spi_flash_init.c')
|
||||
|
||||
if GetDepend(['BSP_USING_WDT']):
|
||||
src += Glob('wdt_feed.c')
|
||||
|
||||
path = [cwd]
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += [startup_path_prefix + '/HAL_Driver/Startup/gcc/startup_gcc.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += [startup_path_prefix + '/HAL_Driver/Startup/arm/startup_gcc.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [startup_path_prefix + '/HAL_Driver/Startup/iar/startup_gcc.s']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
82
bsp/airm2m/air105/board/board.c
Normal file
82
bsp/airm2m/air105/board/board.c
Normal file
@@ -0,0 +1,82 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
uint32_t SystemCoreClock;
|
||||
extern const uint32_t __isr_start_address;
|
||||
|
||||
|
||||
const uint32_t __attribute__((section (".app_info")))
|
||||
g_CAppInfo[256] =
|
||||
{
|
||||
__APP_START_MAGIC__,
|
||||
sizeof(g_CAppInfo),
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
#ifdef __USE_XTL__
|
||||
SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_EXT | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
|
||||
#else
|
||||
SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_INC | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
|
||||
#endif
|
||||
SCB->VTOR = (uint32_t)(&__isr_start_address);
|
||||
SYSCTRL->CG_CTRL1 = SYSCTRL_APBPeriph_ALL;
|
||||
SYSCTRL->SOFT_RST1 = SYSCTRL_APBPeriph_ALL;
|
||||
SYSCTRL->PHER_CTRL &= ~(1 << 20);
|
||||
SYSCTRL->SOFT_RST2 &= ~SYSCTRL_USB_RESET;
|
||||
SYSCTRL->LOCK_R |= SYSCTRL_USB_RESET;
|
||||
__enable_irq();
|
||||
}
|
||||
|
||||
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
|
||||
{
|
||||
SystemCoreClock = HSE_VALUE * (((SYSCTRL->FREQ_SEL & SYSCTRL_FREQ_SEL_XTAL_Mask) >> SYSCTRL_FREQ_SEL_XTAL_Pos) + 1);
|
||||
}
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
GPIO_Config(GPIOC_03, 0, 0);
|
||||
GPIO_Config(GPIOD_14, 0, 0);
|
||||
GPIO_Config(GPIOD_15, 0, 0);
|
||||
__NVIC_SetPriorityGrouping(7 - __NVIC_PRIO_BITS);
|
||||
SystemCoreClockUpdate();
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
rt_hw_systick_init();
|
||||
DMA_GlobalInit();
|
||||
Uart_GlobalInit();
|
||||
DMA_TakeStream(DMA1_STREAM_1);//for qspi
|
||||
CoreTick_Init();
|
||||
#ifdef RT_USING_PIN
|
||||
rt_hw_pin_init();
|
||||
#endif
|
||||
|
||||
/* USART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_usart_init();
|
||||
#endif
|
||||
|
||||
/* Set the shell console output device */
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
/* Board underlying hardware initialization */
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
33
bsp/airm2m/air105/board/board.h
Normal file
33
bsp/airm2m/air105/board/board.h
Normal file
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include "app_inc.h"
|
||||
#include <rtthread.h>
|
||||
#include "rtconfig.h"
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
#define HEAP_END (void*)(0x20000000 + 0xA0000)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
int rt_vbus_do_init(void);
|
||||
|
||||
#endif
|
||||
28
bsp/airm2m/air105/board/linker_scripts/link.icf
Normal file
28
bsp/airm2m/air105/board/linker_scripts/link.icf
Normal file
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x01000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0102FFFF;
|
||||
define symbol __ICFEDIT_region_RAM1_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM1_end__ = 0x2009FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM1_region { readwrite, last block CSTACK };
|
||||
156
bsp/airm2m/air105/board/linker_scripts/link.lds
Normal file
156
bsp/airm2m/air105/board/linker_scripts/link.lds
Normal file
@@ -0,0 +1,156 @@
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K
|
||||
FLASH (rx) : ORIGIN = 0x1010000, LENGTH = 3008K
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x4000;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.app_info :
|
||||
{
|
||||
. = ALIGN(512);
|
||||
KEEP(*(.app_info))
|
||||
. = ALIGN(512);
|
||||
} >FLASH
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__isr_start_address = .;
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*startup_gcc.o(.text .text.*)
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > FLASH
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
15
bsp/airm2m/air105/board/linker_scripts/link.sct
Normal file
15
bsp/airm2m/air105/board/linker_scripts/link.sct
Normal file
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x01010000 0x002F0000 { ; load region size_region
|
||||
ER_IROM1 0x01010000 0x002F0000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x000A0000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
31
bsp/airm2m/air105/board/ports/spi_flash_init.c
Normal file
31
bsp/airm2m/air105/board/ports/spi_flash_init.c
Normal file
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "spi_flash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
#include "drv_spi.h"
|
||||
|
||||
#if defined(BSP_USING_SPI_FLASH)
|
||||
static int rt_hw_spi_flash_init(void)
|
||||
{
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
rt_hw_spi_device_attach("spi1", "spi10", GPIOA, GPIO_PIN_4);
|
||||
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi10"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
};
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
|
||||
#endif
|
||||
|
||||
17
bsp/airm2m/air105/board/ports/w5500_device.c
Normal file
17
bsp/airm2m/air105/board/ports/w5500_device.c
Normal file
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#include "drv_spi.h"
|
||||
#include "board.h"
|
||||
int w5500_spi_device_init(void)
|
||||
{
|
||||
return rt_hw_spi_device_attach(WIZ_SPI_BUS,WIZ_SPI_DEVICE, WIZ_SPI_CS);
|
||||
}
|
||||
INIT_DEVICE_EXPORT(w5500_spi_device_init);
|
||||
53
bsp/airm2m/air105/board/wdt_feed.c
Normal file
53
bsp/airm2m/air105/board/wdt_feed.c
Normal file
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-02-22 airm2m first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
static char device_name[] = "wdt";
|
||||
static rt_device_t wdg_dev;
|
||||
|
||||
static struct rt_work wdt_feed;
|
||||
static void wdt_feed_func(struct rt_work *work, void *work_data)
|
||||
{
|
||||
rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, RT_NULL);
|
||||
rt_work_submit(&wdt_feed, 1200);
|
||||
}
|
||||
|
||||
static int wdt_feed_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
rt_uint32_t timeout = 2;
|
||||
|
||||
wdg_dev = rt_device_find(device_name);
|
||||
if (!wdg_dev)
|
||||
{
|
||||
rt_kprintf("find %s failed!\n", device_name);
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &timeout);
|
||||
if (ret != RT_EOK)
|
||||
{
|
||||
rt_kprintf("set %s timeout failed!\n", device_name);
|
||||
return RT_ERROR;
|
||||
}
|
||||
ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL);
|
||||
if (ret != RT_EOK)
|
||||
{
|
||||
rt_kprintf("start %s failed!\n", device_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
rt_work_init(&wdt_feed, wdt_feed_func, RT_NULL);
|
||||
rt_work_submit(&wdt_feed, 1200);
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(wdt_feed_init);
|
||||
BIN
bsp/airm2m/air105/figures/board.png
Normal file
BIN
bsp/airm2m/air105/figures/board.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 808 KiB |
2087
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105.h
Normal file
2087
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105.h
Normal file
File diff suppressed because it is too large
Load Diff
147
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_adc.h
Normal file
147
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_adc.h
Normal file
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_ADC_H__
|
||||
#define __AIR105_ADC_H__
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Include ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
#define IS_ADC_PERIPH(PERIPH) ((PERIPH) == ADC0)
|
||||
|
||||
#define ADC_CR1_CHANNEL_MASK ((uint32_t)0x07)
|
||||
#define ADC_CR1_SAMPLE_RATE_Pos 3
|
||||
#define ADC_CR1_SAMPLE_RATE_MASK (0x3 << ADC_CR1_SAMPLE_RATE_Pos)
|
||||
#define ADC_CR1_SAMP_ENABLE BIT(6)
|
||||
#define ADC_CR1_POWER_DOWN BIT(8)
|
||||
#define ADC_CR1_IRQ_ENABLE BIT(5)
|
||||
|
||||
#define ADC_SR_DONE_FLAG BIT(0)
|
||||
#define ADC_SR_FIFO_OV_FLAG BIT(1)
|
||||
|
||||
#define ADC_FIFO_OV_INT_ENABLE BIT(2)
|
||||
#define ADC_FIFO_RESET BIT(1)
|
||||
|
||||
#define ADC_FIFO_ENABLE BIT(0)
|
||||
|
||||
#define ADC_CR2_BUFF_ENABLE BIT(14)
|
||||
#define ADC_DIV_RESISTOR_EN_BIT BIT(13)
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ADC_Overflow = 0,
|
||||
ADC_NoOverflow = 1,
|
||||
}ADC_OverflowTypeDef;
|
||||
|
||||
/* ADC Channel select */
|
||||
typedef enum
|
||||
{
|
||||
ADC_CHANNEL_CHARGE_VBAT =0,
|
||||
ADC_CHANNEL_1,
|
||||
ADC_CHANNEL_2,
|
||||
ADC_CHANNEL_3,
|
||||
ADC_CHANNEL_4,
|
||||
ADC_CHANNEL_5,
|
||||
ADC_CHANNEL_6,
|
||||
}ADC_ChxTypeDef;
|
||||
#define IS_ADC_CHANNEL(CHANNEL_NUM) (((CHANNEL_NUM) == ADC_CHANNEL_CHARGE_VBAT) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_1) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_2) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_3) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_4) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_5) || \
|
||||
((CHANNEL_NUM) == ADC_CHANNEL_6))
|
||||
|
||||
/* ADC Samp Select */
|
||||
typedef enum
|
||||
{
|
||||
ADC_SpeedPrescaler_None = 0,
|
||||
ADC_SpeedPrescaler_2,
|
||||
ADC_SpeedPrescaler_4,
|
||||
ADC_SpeedPrescaler_8,
|
||||
}ADC_SampTypeDef;
|
||||
|
||||
#define IS_ADC_SAMP(SAMP) (((SAMP) == ADC_SpeedPrescaler_None) || \
|
||||
((SAMP) == ADC_SpeedPrescaler_2) || \
|
||||
((SAMP) == ADC_SpeedPrescaler_4) || \
|
||||
((SAMP) == ADC_SpeedPrescaler_8))
|
||||
|
||||
|
||||
typedef struct _ADC_InitTypeDef
|
||||
{
|
||||
ADC_ChxTypeDef ADC_Channel; /* ADC Channel select */
|
||||
ADC_SampTypeDef ADC_SampSpeed; /* ADC sampspeed select */
|
||||
FunctionalState ADC_IRQ_EN; /* ADC IRQ/Polling Select */
|
||||
FunctionalState ADC_FIFO_EN; /* ADC FIFO Enable Select */
|
||||
} ADC_InitTypeDef;
|
||||
|
||||
/* Exported constants -------------------------------------------------------*/
|
||||
/* Exported macro -----------------------------------------------------------*/
|
||||
/* Exported functions -------------------------------------------------------*/
|
||||
void ADC_Init(ADC_InitTypeDef *ADC_InitStruct);
|
||||
|
||||
void ADC_StartCmd(FunctionalState NewState);
|
||||
|
||||
void ADC_FIFODeepth(uint32_t FIFO_Deepth);
|
||||
|
||||
void ADC_FIFOReset(void);
|
||||
|
||||
void ADC_ITCmd(FunctionalState NewState);
|
||||
|
||||
void ADC_FIFOOverflowITcmd(FunctionalState NewState);
|
||||
|
||||
void ADC_BuffCmd(FunctionalState NewState);
|
||||
|
||||
void ADC_DivResistorCmd(FunctionalState NewState);
|
||||
|
||||
int32_t ADC_GetFIFOCount(void);
|
||||
|
||||
int32_t ADC_GetResult(void);
|
||||
|
||||
int32_t ADC_GetFIFOResult(uint16_t *ADCdata, uint32_t len);
|
||||
|
||||
uint32_t ADC_CalVoltage(uint32_t u32ADC_Value, uint32_t u32ADC_Ref_Value);
|
||||
|
||||
ADC_ChxTypeDef ADC_GetChannel(void);
|
||||
|
||||
FunctionalState ADC_IsDivResistorEnable(void);
|
||||
|
||||
ADC_OverflowTypeDef ADC_IsFIFOOverflow(void);
|
||||
|
||||
void ADC_ChannelSwitch(ADC_ChxTypeDef Channelx);
|
||||
|
||||
/* Exported variables -------------------------------------------------------*/
|
||||
|
||||
/* Exported types -----------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AIR105_ADC_H__ */
|
||||
|
||||
66
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_bpk.h
Normal file
66
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_bpk.h
Normal file
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_BPK_H
|
||||
#define __AIR105_BPK_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/** @defgroup BPK_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BPK_KEY_REGION_0 ((uint32_t)0x0001)
|
||||
#define BPK_KEY_REGION_1 ((uint32_t)0x0002)
|
||||
#define BPK_KEY_REGION_ALL ((uint32_t)0x0003)
|
||||
#define IS_BPK_KEY_REGION(REGION) ((((REGION) & ~BPK_KEY_REGION_ALL) == 0x00) && ((REGION) != 0x00))
|
||||
|
||||
|
||||
#define IS_BPK_LOCK(LOCK) ((((LOCK) & ~BPK_LR_LOCK_ALL) == 0x00) && ((LOCK) != (uint32_t)0x00))
|
||||
|
||||
|
||||
FlagStatus BPK_IsReady(void);
|
||||
ErrorStatus BPK_WriteKey(uint32_t *Key,uint32_t Key_Len, uint32_t Key_Offset);
|
||||
ErrorStatus BPK_ReadKey(uint32_t *Key,uint32_t Key_Len, uint32_t Key_Offset);
|
||||
void BPK_KeyWriteLock(uint16_t BPK_KEY_Region, FunctionalState NewState);
|
||||
void BPK_KeyReadLock(uint16_t BPK_KEY_Region, FunctionalState NewState);
|
||||
void BPK_KeyClear(uint16_t BPK_KEY_Region);
|
||||
|
||||
void BPK_SetScramber(uint32_t Scram);
|
||||
void BPK_Lock(uint32_t BPK_LOCK, FunctionalState NewState);
|
||||
void BPK_LockSelf(void);
|
||||
FlagStatus BPK_GetLockStatus(uint32_t BPK_LOCK);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
114
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_cache.h
Normal file
114
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_cache.h
Normal file
@@ -0,0 +1,114 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_CACHE_H
|
||||
#define __AIR105_CACHE_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
#define CACHE_REFRESH ((uint32_t)0x80000000)
|
||||
#define CACHE_REFRESH_ALLTAG ((uint32_t)0x40000000)
|
||||
|
||||
#define CACHE_KEY_GEN_START ((uint32_t)0x80000000)
|
||||
|
||||
#define CACHE_IS_BUSY ((uint32_t)0x20000000)
|
||||
|
||||
#define CACHE_SIZE ((uint32_t)0x8000)
|
||||
#define CACHE_PARTICLE_SIZE (0x20)
|
||||
#define CACHE_ADDRESS_START ((uint32_t)0x01000000)
|
||||
#define CACHE_ADDRESS_MAX ((uint32_t)0x00FFFFFF)
|
||||
#define IS_CACHE_ADDR_VALID(addr) (((addr) & CACHE_ADDRESS_START) == CACHE_ADDRESS_START)
|
||||
|
||||
#define CACHE_AES_BYPASS (0xA5)
|
||||
#define CACHE_KEY_GEN (0xA5)
|
||||
#define CACHE_WRAP_ENABLE (0xA5)
|
||||
|
||||
#define CACHE_ZONE_ENCRYPT ((uint32_t)0xA5000000)
|
||||
|
||||
#define CACHE_CODE_BUS_OFFSET_POS (0)
|
||||
#define CACHE_CODE_BUS_OFFSET_WIDTH (5)
|
||||
#define CACHE_CODE_BUS_OFFSET_MASK ((uint32_t)0x001F)
|
||||
|
||||
#define CACHE_CODE_BUS_SET_POS (5)
|
||||
#define CACHE_CODE_BUS_SET_WIDTH (8)
|
||||
#define CACHE_CODE_BUS_SET_MASK ((uint32_t)0x00FF)
|
||||
|
||||
#define CACHE_CODE_BUS_TAG_POS (13)
|
||||
#define CACHE_CODE_BUS_TAG_WIDTH (11)
|
||||
#define CACHE_CODE_BUS_TAG_MASK ((uint32_t)0x07FF)
|
||||
|
||||
#define CHCHE_ALGORITHM_SET_POS (28)
|
||||
|
||||
#define CACHE_BUILD_INDEX_OFFSET(x) (((x) & CACHE_CODE_BUS_OFFSET_MASK) << CACHE_CODE_BUS_OFFSET_POS)
|
||||
#define CACHE_BUILD_INDEX_SET(x) (((x) & CACHE_CODE_BUS_SET_MASK) << CACHE_CODE_BUS_SET_POS)
|
||||
#define CACHE_BUILD_INDEX_TAG(x) (((x) & CACHE_CODE_BUS_TAG_MASK) << CACHE_CODE_BUS_TAG_POS)
|
||||
#define CACHE_ADDRESS_BUILD(base,index_set,tag_way,offset) ((base) | CACHE_BUILD_INDEX_SET(index_set) | CACHE_BUILD_INDEX_TAG(tag_way) | CACHE_BUILD_INDEX_OFFSET(offset))
|
||||
|
||||
#define CACHE_TAG_NUM(x) ((x >> CACHE_CODE_BUS_TAG_POS) & CACHE_CODE_BUS_TAG_MASK)
|
||||
#define CACHE_SET_NUM(x) ((x >> CACHE_CODE_BUS_SET_POS) & CACHE_CODE_BUS_SET_MASK)
|
||||
#define CACHE_OFF_NUM(x) ((x >> CACHE_CODE_BUS_OFFSET_POS) & CACHE_CODE_BUS_OFFSET_MASK)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CACHE_Encrypt_Mode_All = 0x0,
|
||||
CACHE_Encrypt_Mode_Zone,
|
||||
}CACHE_EncryptModeTypeDef;
|
||||
#define IS_CACHE_ENCRYPT_MODE(MODE) (((MODE) == CACHE_Encrypt_Mode_All) || \
|
||||
((MODE) == CACHE_Encrypt_Mode_Zone))
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t I[4];
|
||||
uint32_t K[4];
|
||||
uint32_t AES_CS;
|
||||
uint32_t CONFIG;
|
||||
|
||||
uint32_t aes_enable;
|
||||
uint32_t Address;
|
||||
uint32_t size;
|
||||
uint32_t algorithm;
|
||||
|
||||
uint32_t encrypt_mode;
|
||||
uint32_t encrypt_saddr;
|
||||
uint32_t encrypt_eaddr;
|
||||
}CACHE_InitTypeDef;
|
||||
|
||||
void CACHE_Init(CACHE_TypeDef *Cache, CACHE_InitTypeDef *CACHE_InitStruct);
|
||||
void CACHE_Clean(CACHE_TypeDef *Cache, CACHE_InitTypeDef *CACHE_InitStruct);
|
||||
void CACHE_CleanAll(CACHE_TypeDef *Cache);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
51
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_conf.h
Normal file
51
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_conf.h
Normal file
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AIR105_CONF_H
|
||||
#define __AIR105_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment the line below to enable peripheral header file inclusion */
|
||||
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
#include "string.h"
|
||||
|
||||
#include "air105_cache.h"
|
||||
#include "air105_dcmi.h"
|
||||
#include "air105_dma.h"
|
||||
#include "air105_gpio.h"
|
||||
#include "air105_i2c.h"
|
||||
#include "air105_qspi.h"
|
||||
#include "air105_sysctrl.h"
|
||||
#include "air105_timer.h"
|
||||
#include "air105_uart.h"
|
||||
#include "air105_wdt.h"
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
74
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_crc.h
Normal file
74
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_crc.h
Normal file
@@ -0,0 +1,74 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_CRC_H
|
||||
#define __AIR105_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
typedef enum
|
||||
{
|
||||
CRC_16 = 0x01,
|
||||
CRC_16_Modbus = 0x02,
|
||||
CRC_CCITT_0xffff = 0x03,
|
||||
CRC_CCITT_XModem = 0x04,
|
||||
CRC_32 = 0x05
|
||||
}CRC_Param_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CRC_Poly_16_1021 = 0x01,
|
||||
CRC_Poly_16_8005 = 0x02,
|
||||
CRC_Poly_32_04C11DB7 = 0x03
|
||||
}CRC_Poly_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CRC_PolyMode_Normal = 0x01,
|
||||
CRC_PolyMode_Reversed = 0x02,
|
||||
}CRC_PolyMode_TypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
CRC_Poly_TypeDef CRC_Poly;
|
||||
CRC_PolyMode_TypeDef CRC_PolyMode;
|
||||
uint32_t CRC_Init_Value;
|
||||
uint32_t CRC_Xor_Value;
|
||||
}CRC_ConfigTypeDef;
|
||||
|
||||
|
||||
uint32_t CRC_CalcBlockCRC(uint32_t CRC_type, uint8_t *pData, uint32_t len);
|
||||
uint32_t CRC_Calc(CRC_ConfigTypeDef *CRC_Config, uint8_t *pData, uint32_t len);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
98
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dac.h
Normal file
98
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dac.h
Normal file
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_DAC_H__
|
||||
#define __AIR105_DAC_H__
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Include ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
#define DAC_CR1_IS_RUNNING ((uint32_t)0x20000000)
|
||||
#define DAC_CR1_POWER_DOWN ((uint32_t)0x00000010)
|
||||
#define DAC_CR1_FIFO_RESET ((uint32_t)0x00000008)
|
||||
#define DAC_CR1_DMA_ENABLE ((uint32_t)0x00000004)
|
||||
|
||||
|
||||
#define IS_DAC_DATA(DATA) ((DATA) <= 0x3FF)
|
||||
|
||||
|
||||
#define DAC_CURR_SEL_MASK ((uint32_t)0x00000020)
|
||||
#define DAC_CURR_SEL_20K ((uint32_t)0x00000000)
|
||||
#define DAC_CURR_SEL_2K ((uint32_t)0x00000020)
|
||||
#define IS_DAC_CURR_SEL(CURR) (((CURR) == DAC_CURR_SEL_20K) || \
|
||||
((CURR) == DAC_CURR_SEL_2K))
|
||||
|
||||
#define IS_DAC_FIFO_THR(THR) ((THR) <= 0xF)
|
||||
|
||||
|
||||
typedef struct _DAC_InitTypeDef
|
||||
{
|
||||
uint32_t DAC_CurrSel; /* DAC mode select */
|
||||
uint32_t DAC_TimerExp; /* DAC timer expectation */
|
||||
uint32_t DAC_FIFOThr; /* DAC FIFO Threshold */
|
||||
} DAC_InitTypeDef;
|
||||
|
||||
|
||||
#define DAC_FIFO_DEPTH (16)
|
||||
#define DAC_IT_STATUS_SHIFT (30)
|
||||
|
||||
#define DAC_IT_FIFO_THR ((uint32_t)0x0002)
|
||||
#define DAC_IT_FIFO_OVERFLOW ((uint32_t)0x0001)
|
||||
#define IS_DAC_IT(IT) (((IT) == DAC_IT_FIFO_THR) || \
|
||||
((IT) == DAC_IT_FIFO_OVERFLOW))
|
||||
|
||||
#define DAC_FLAG_RUNNING (DAC_CR1_IS_RUNNING)
|
||||
#define DAC_FLAG_OVERFLOW ((uint32_t)0x40000000)
|
||||
#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_RUNNING) || \
|
||||
((FLAG) == DAC_FLAG_OVERFLOW))
|
||||
|
||||
|
||||
/* Exported functions -------------------------------------------------------*/
|
||||
void DAC_Init(DAC_InitTypeDef *DAC_InitStruct);
|
||||
void DAC_StructInit(DAC_InitTypeDef *DAC_InitStruct);
|
||||
void DAC_FIFOReset(void);
|
||||
|
||||
void DAC_Cmd(FunctionalState NewState);
|
||||
void DAC_DMACmd(FunctionalState NewState);
|
||||
|
||||
void DAC_SetData(uint16_t Data);
|
||||
|
||||
FlagStatus DAC_GetFlagStatus(uint32_t DAC_Flag);
|
||||
void DAC_ClearFlag(uint32_t DAC_Flag);
|
||||
|
||||
void DAC_ITConfig(uint32_t DAC_IT, FunctionalState NewState);
|
||||
ITStatus DAC_GetITStatus(uint32_t DAC_IT);
|
||||
void DAC_ClearITPendingBit(uint32_t DAC_IT);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AIR105_DAC_H__ */
|
||||
360
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dcmi.h
Normal file
360
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dcmi.h
Normal file
@@ -0,0 +1,360 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_DCMI_H
|
||||
#define __AIR105_DCMI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief DCMI Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t DCMI_CaptureMode; /*!< Specifies the Capture Mode: Continuous or Snapshot.
|
||||
This parameter can be a value of @ref DCMI_Capture_Mode */
|
||||
|
||||
uint16_t DCMI_SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
|
||||
This parameter can be a value of @ref DCMI_Synchronization_Mode */
|
||||
|
||||
uint16_t DCMI_PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
|
||||
This parameter can be a value of @ref DCMI_PIXCK_Polarity */
|
||||
|
||||
uint16_t DCMI_VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
|
||||
This parameter can be a value of @ref DCMI_VSYNC_Polarity */
|
||||
|
||||
uint16_t DCMI_HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
|
||||
This parameter can be a value of @ref DCMI_HSYNC_Polarity */
|
||||
|
||||
uint16_t DCMI_CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
|
||||
This parameter can be a value of @ref DCMI_Capture_Rate */
|
||||
|
||||
uint16_t DCMI_ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
|
||||
This parameter can be a value of @ref DCMI_Extended_Data_Mode */
|
||||
uint32_t DCMI_ByteSelectMode; /*!< Specifies the Capture Select Byte Mode: Select All Bytes, 1 of 2, 1 of 4 or 2 of 4
|
||||
This parameter can be a value of @ref DCMI_ByteSelect_Mode */
|
||||
uint32_t DCMI_LineSelectMode; /*!< Specifies the Capture Select Line Mode: Select All Lines, Odd Line or Even Line
|
||||
This parameter can be a value of @ref DCMI_ByteLine_Mode */
|
||||
uint32_t DCMI_ClockDiv; /*!< Specifies the DCMI Slave Clock Div: 2~16 from HCLK
|
||||
This parameter can be a value of @ref DCMI_Clock_Div */
|
||||
} DCMI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief DCMI CROP Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t DCMI_VerticalStartLine; /*!< Specifies the Vertical start line count from which the image capture
|
||||
will start. This parameter can be a value between 0x00 and 0x1FFF */
|
||||
|
||||
uint16_t DCMI_HorizontalOffsetCount; /*!< Specifies the number of pixel clocks to count before starting a capture.
|
||||
This parameter can be a value between 0x00 and 0x3FFF */
|
||||
|
||||
uint16_t DCMI_VerticalLineCount; /*!< Specifies the number of lines to be captured from the starting point.
|
||||
This parameter can be a value between 0x00 and 0x3FFF */
|
||||
|
||||
uint16_t DCMI_CaptureCount; /*!< Specifies the number of pixel clocks to be captured from the starting
|
||||
point on the same line.
|
||||
This parameter can be a value between 0x00 and 0x3FFF */
|
||||
} DCMI_CROPInitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief DCMI Embedded Synchronisation CODE Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DCMI_FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
|
||||
uint8_t DCMI_LineStartCode; /*!< Specifies the code of the line start delimiter. */
|
||||
uint8_t DCMI_LineEndCode; /*!< Specifies the code of the line end delimiter. */
|
||||
uint8_t DCMI_FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
|
||||
} DCMI_CodesInitTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DCMI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DCMI_Capture_Mode
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_CaptureMode_Continuous ((uint16_t)0x0000) /*!< The received data are transferred continuously
|
||||
into the destination memory through the DMA */
|
||||
#define DCMI_CaptureMode_SnapShot ((uint16_t)0x0002) /*!< Once activated, the interface waits for the start of
|
||||
frame and then transfers a single frame through the DMA */
|
||||
#define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_CaptureMode_Continuous) || \
|
||||
((MODE) == DCMI_CaptureMode_SnapShot))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_Synchronization_Mode
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_SynchroMode_Hardware ((uint16_t)0x0000) /*!< Hardware synchronization data capture (frame/line start/stop)
|
||||
is synchronized with the HSYNC/VSYNC signals */
|
||||
#define DCMI_SynchroMode_Embedded ((uint16_t)0x0010) /*!< Embedded synchronization data capture is synchronized with
|
||||
synchronization codes embedded in the data flow */
|
||||
#define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SynchroMode_Hardware) || \
|
||||
((MODE) == DCMI_SynchroMode_Embedded))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_PIXCK_Polarity
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_PCKPolarity_Falling ((uint16_t)0x0000) /*!< Pixel clock active on Falling edge */
|
||||
#define DCMI_PCKPolarity_Rising ((uint16_t)0x0020) /*!< Pixel clock active on Rising edge */
|
||||
#define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPolarity_Falling) || \
|
||||
((POLARITY) == DCMI_PCKPolarity_Rising))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_VSYNC_Polarity
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_VSPolarity_Low ((uint16_t)0x0000) /*!< Vertical synchronization active Low */
|
||||
#define DCMI_VSPolarity_High ((uint16_t)0x0080) /*!< Vertical synchronization active High */
|
||||
#define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPolarity_Low) || \
|
||||
((POLARITY) == DCMI_VSPolarity_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_HSYNC_Polarity
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_HSPolarity_Low ((uint16_t)0x0000) /*!< Horizontal synchronization active Low */
|
||||
#define DCMI_HSPolarity_High ((uint16_t)0x0040) /*!< Horizontal synchronization active High */
|
||||
#define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPolarity_Low) || \
|
||||
((POLARITY) == DCMI_HSPolarity_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_Capture_Rate
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_CaptureRate_All_Frame ((uint16_t)0x0000) /*!< All frames are captured */
|
||||
#define DCMI_CaptureRate_1of2_Frame ((uint16_t)0x0100) /*!< Every alternate frame captured */
|
||||
#define DCMI_CaptureRate_1of4_Frame ((uint16_t)0x0200) /*!< One frame in 4 frames captured */
|
||||
#define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CaptureRate_All_Frame) || \
|
||||
((RATE) == DCMI_CaptureRate_1of2_Frame) ||\
|
||||
((RATE) == DCMI_CaptureRate_1of4_Frame))
|
||||
|
||||
/** @defgroup DCMI_Clock_Div
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_Clock_Div2 ((uint32_t)0x00000000)
|
||||
#define DCMI_Clock_Div4 ((uint32_t)0x20000000)
|
||||
#define DCMI_Clock_Div6 ((uint32_t)0x40000000)
|
||||
#define DCMI_Clock_Div8 ((uint32_t)0x60000000)
|
||||
#define DCMI_Clock_Div10 ((uint32_t)0x80000000)
|
||||
#define DCMI_Clock_Div12 ((uint32_t)0xA0000000)
|
||||
#define DCMI_Clock_Div14 ((uint32_t)0xC0000000)
|
||||
#define DCMI_Clock_Div16 ((uint32_t)0xE0000000)
|
||||
#define IS_DCMI_CLOCK_DIV(DIV) (((DIV) == DCMI_Clock_Div2) ||\
|
||||
((DIV) == DCMI_Clock_Div4) ||\
|
||||
((DIV) == DCMI_Clock_Div6) ||\
|
||||
((DIV) == DCMI_Clock_Div8) ||\
|
||||
((DIV) == DCMI_Clock_Div10) ||\
|
||||
((DIV) == DCMI_Clock_Div12) ||\
|
||||
((DIV) == DCMI_Clock_Div14) ||\
|
||||
((DIV) == DCMI_Clock_Div16))
|
||||
#define DCMI_Clock_Div_MSK ((uint32_t)0xE0000000)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_Extended_Data_Mode
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_ExtendedDataMode_8b ((uint16_t)0x0000) /*!< Interface captures 8-bit data on every pixel clock */
|
||||
#define DCMI_ExtendedDataMode_10b ((uint16_t)0x0400) /*!< Interface captures 10-bit data on every pixel clock */
|
||||
#define DCMI_ExtendedDataMode_12b ((uint16_t)0x0800) /*!< Interface captures 12-bit data on every pixel clock */
|
||||
#define DCMI_ExtendedDataMode_14b ((uint16_t)0x0C00) /*!< Interface captures 14-bit data on every pixel clock */
|
||||
#define IS_DCMI_EXTENDED_DATA(DATA) (((DATA) == DCMI_ExtendedDataMode_8b) || \
|
||||
((DATA) == DCMI_ExtendedDataMode_10b) ||\
|
||||
((DATA) == DCMI_ExtendedDataMode_12b) ||\
|
||||
((DATA) == DCMI_ExtendedDataMode_14b))
|
||||
|
||||
/** @defgroup DCMI_ByteSelectMode
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_ByteSelect_Mode_AllByte ((uint32_t)0x00000000)
|
||||
#define DCMI_ByteSelect_Mode_1of2_OddStart ((uint32_t)0x00010000)
|
||||
#define DCMI_ByteSelect_Mode_1of4_OddStart ((uint32_t)0x00020000)
|
||||
#define DCMI_ByteSelect_Mode_2of4_OddStart ((uint32_t)0x00030000)
|
||||
#define DCMI_ByteSelect_Mode_1of2_EvenStart ((uint32_t)0x00050000)
|
||||
#define DCMI_ByteSelect_Mode_1of4_EvenStart ((uint32_t)0x00060000)
|
||||
#define DCMI_ByteSelect_Mode_2of4_EvenStart ((uint32_t)0x00070000)
|
||||
#define IS_DCMI_BYTESELECT_MODE(MODE) (((MODE) == DCMI_ByteSelect_Mode_AllByte) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_1of2_OddStart) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_1of4_OddStart) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_2of4_OddStart) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_1of2_EvenStart) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_1of4_EvenStart) ||\
|
||||
((MODE) == DCMI_ByteSelect_Mode_2of4_EvenStart))
|
||||
|
||||
/** @defgroup DCMI_ByteSelectMode
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_LineSelect_Mode_AllLine ((uint32_t)0x00000000)
|
||||
#define DCMI_LineSelect_Mode_OddLine ((uint32_t)0x00080000)
|
||||
#define DCMI_LineSelect_Mode_EvenLine ((uint32_t)0x00180000)
|
||||
#define IS_DCMI_LINESELECT_MODE(MODE) (((MODE) == DCMI_LineSelect_Mode_AllLine) ||\
|
||||
((MODE) == DCMI_LineSelect_Mode_OddLine) ||\
|
||||
((MODE) == DCMI_LineSelect_Mode_EvenLine))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_DMA_Request_FIFO_Size
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_DMARequestFIFOSize_1Word ((uint32_t)0x20000000) /*!< DCMI FIFO DMARequest*/
|
||||
#define DCMI_DMARequestFIFOSize_2Word ((uint32_t)0x40000000) /*!< DCMI FIFO DMARequest*/
|
||||
#define DCMI_DMARequestFIFOSize_4Word ((uint32_t)0x80000000) /*!< DCMI FIFO DMARequest*/
|
||||
#define DCMI_DMARequestFIFOSize_MSK ((uint32_t)0xE0000000)
|
||||
#define IS_DCMI_DMAREQUESTFIFO_SIZE(SIZE) (((SIZE) == DCMI_DMARequestFIFOSize_1Word) ||\
|
||||
((SIZE) == DCMI_DMARequestFIFOSize_2Word) ||\
|
||||
((SIZE) == DCMI_DMARequestFIFOSize_4Word))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_interrupt_sources
|
||||
* @{
|
||||
*/
|
||||
#define DCMI_IT_FRAME ((uint16_t)0x0001)
|
||||
#define DCMI_IT_OVF ((uint16_t)0x0002)
|
||||
#define DCMI_IT_ERR ((uint16_t)0x0004)
|
||||
#define DCMI_IT_VSYNC ((uint16_t)0x0008)
|
||||
#define DCMI_IT_LINE ((uint16_t)0x0010)
|
||||
#define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
|
||||
#define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
|
||||
((IT) == DCMI_IT_OVF) || \
|
||||
((IT) == DCMI_IT_ERR) || \
|
||||
((IT) == DCMI_IT_VSYNC) || \
|
||||
((IT) == DCMI_IT_LINE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DCMI_Flags
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief DCMI SR register
|
||||
*/
|
||||
#define DCMI_FLAG_HSYNC ((uint16_t)0x2001)
|
||||
#define DCMI_FLAG_VSYNC ((uint16_t)0x2002)
|
||||
#define DCMI_FLAG_FNE ((uint16_t)0x2004)
|
||||
/**
|
||||
* @brief DCMI RISR register
|
||||
*/
|
||||
#define DCMI_FLAG_FRAMERI ((uint16_t)0x0001)
|
||||
#define DCMI_FLAG_OVFRI ((uint16_t)0x0002)
|
||||
#define DCMI_FLAG_ERRRI ((uint16_t)0x0004)
|
||||
#define DCMI_FLAG_VSYNCRI ((uint16_t)0x0008)
|
||||
#define DCMI_FLAG_LINERI ((uint16_t)0x0010)
|
||||
/**
|
||||
* @brief DCMI MISR register
|
||||
*/
|
||||
#define DCMI_FLAG_FRAMEMI ((uint16_t)0x1001)
|
||||
#define DCMI_FLAG_OVFMI ((uint16_t)0x1002)
|
||||
#define DCMI_FLAG_ERRMI ((uint16_t)0x1004)
|
||||
#define DCMI_FLAG_VSYNCMI ((uint16_t)0x1008)
|
||||
#define DCMI_FLAG_LINEMI ((uint16_t)0x1010)
|
||||
#define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
|
||||
((FLAG) == DCMI_FLAG_VSYNC) || \
|
||||
((FLAG) == DCMI_FLAG_FNE) || \
|
||||
((FLAG) == DCMI_FLAG_FRAMERI) || \
|
||||
((FLAG) == DCMI_FLAG_OVFRI) || \
|
||||
((FLAG) == DCMI_FLAG_ERRRI) || \
|
||||
((FLAG) == DCMI_FLAG_VSYNCRI) || \
|
||||
((FLAG) == DCMI_FLAG_LINERI) || \
|
||||
((FLAG) == DCMI_FLAG_FRAMEMI) || \
|
||||
((FLAG) == DCMI_FLAG_OVFMI) || \
|
||||
((FLAG) == DCMI_FLAG_ERRMI) || \
|
||||
((FLAG) == DCMI_FLAG_VSYNCMI) || \
|
||||
((FLAG) == DCMI_FLAG_LINEMI))
|
||||
|
||||
#define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
|
||||
|
||||
/**
|
||||
* @brief set dcmi input from out signal
|
||||
*/
|
||||
#define DCMI_FROM_OUT (0x1<<13)
|
||||
|
||||
/* Function used to set the DCMI configuration to the default reset state ****/
|
||||
void DCMI_DeInit(void);
|
||||
|
||||
/* Initialization and Configuration functions *********************************/
|
||||
void DCMI_Init(DCMI_InitTypeDef* DCMI_InitStruct);
|
||||
void DCMI_StructInit(DCMI_InitTypeDef* DCMI_InitStruct);
|
||||
void DCMI_CROPConfig(DCMI_CROPInitTypeDef* DCMI_CROPInitStruct);
|
||||
void DCMI_CROPCmd(FunctionalState NewState);
|
||||
void DCMI_JPEGCmd(FunctionalState NewState);
|
||||
void DCMI_SetDMARequsetFIFOSize(uint32_t NewFIFOSize);
|
||||
void DCMI_SetExtInput(void);
|
||||
|
||||
/* Image capture functions ****************************************************/
|
||||
void DCMI_Cmd(FunctionalState NewState);
|
||||
void DCMI_CaptureCmd(FunctionalState NewState);
|
||||
uint32_t DCMI_ReadData(void);
|
||||
uint32_t DCMI_GetFIFODataWordNum(void);
|
||||
|
||||
/* Interrupts and flags management functions **********************************/
|
||||
void DCMI_ITConfig(uint16_t DCMI_IT, FunctionalState NewState);
|
||||
FlagStatus DCMI_GetFlagStatus(uint16_t DCMI_FLAG);
|
||||
void DCMI_ClearFlag(uint16_t DCMI_FLAG);
|
||||
ITStatus DCMI_GetITStatus(uint16_t DCMI_IT);
|
||||
void DCMI_ClearITPendingBit(uint16_t DCMI_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__AIR105_DCMI_H */
|
||||
|
||||
|
||||
219
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dma.h
Normal file
219
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dma.h
Normal file
@@ -0,0 +1,219 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_DMA_H
|
||||
#define __AIR105_DMA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t DMA_Peripheral;
|
||||
|
||||
uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
|
||||
|
||||
uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
|
||||
|
||||
uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
|
||||
This parameter can be a value of @ref DMA_data_transfer_direction */
|
||||
|
||||
uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
|
||||
This parameter can be a value of @ref DMA_incremented_mode */
|
||||
|
||||
uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
|
||||
This parameter can be a value of @ref DMA_incremented_mode */
|
||||
|
||||
uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data item width.
|
||||
This parameter can be a value of @ref DMA_data_size */
|
||||
|
||||
uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data item width.
|
||||
This parameter can be a value of @ref DMA_data_size */
|
||||
|
||||
uint32_t DMA_PeripheralBurstSize; /*!< Specifies the Peripheral Number of data items during per burst transaction.
|
||||
read or write from the Peripheral every time a burst transaction request
|
||||
This parameter can be a value of @ref DMA_burst_size */
|
||||
|
||||
uint32_t DMA_MemoryBurstSize; /*!< Specifies the Memory Number of data items during per burst transaction.
|
||||
read or write from the Memory every time a burst transaction request
|
||||
This parameter can be a value of @ref DMA_burst_size */
|
||||
|
||||
uint32_t DMA_PeripheralHandShake; /*!< Specifies the HandShake to control the DMA transacation.
|
||||
This parameter can be a value of @ref DMA_peripheral_handshake */
|
||||
|
||||
uint32_t DMA_BlockSize; /*!< Specifies the Total Number of data items during the transaction. */
|
||||
|
||||
uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
|
||||
This parameter can be a value of @ref DMA_priority_level */
|
||||
}DMA_InitTypeDef;
|
||||
|
||||
/**
|
||||
* DMA多块传输内存表
|
||||
*
|
||||
*/
|
||||
typedef struct _lli
|
||||
{
|
||||
uint32_t SAR;
|
||||
uint32_t DAR;
|
||||
uint32_t LLP;
|
||||
uint32_t CTL_L;
|
||||
uint32_t CTL_H;
|
||||
uint32_t DSTAT;
|
||||
}LLI;
|
||||
|
||||
/**多块传输模式
|
||||
* @}
|
||||
*/
|
||||
#define Multi_Block_MODE01 (uint8_t)0x00 /*Single-block or last transfer of multi-block*/
|
||||
#define Multi_Block_MODE02 (uint8_t)0x01 /*Auto-reload multi-block transfer with contiguous SAR*/
|
||||
#define Multi_Block_MODE03 (uint8_t)0x02 /*Auto-reload multi-block transfer with contiguous DAR*/
|
||||
#define Multi_Block_MODE04 (uint8_t)0x03 /*Auto-reload multi-block transfer*/
|
||||
#define Multi_Block_MODE05 (uint8_t)0x04 /*Single-block or last transfer of multi-block*/
|
||||
#define Multi_Block_MODE06 (uint8_t)0x05 /*Linked list multi-block transfer with contiguous SAR*/
|
||||
#define Multi_Block_MODE07 (uint8_t)0x06 /*Linked list multi-block transfer with auto-reload SAR*/
|
||||
#define Multi_Block_MODE08 (uint8_t)0x07 /*Linked list multi-block transfer with contiguous DAR*/
|
||||
#define Multi_Block_MODE09 (uint8_t)0x08 /*Linked list multi-block transfer with auto-reload DAR*/
|
||||
#define Multi_Block_MODE10 (uint8_t)0x09 /*Linked list multi-block transfer*/
|
||||
|
||||
/** @defgroup DMA_data_transfer_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DMA_DIR_Memory_To_Memory ((uint32_t)0x0000)
|
||||
#define DMA_DIR_Memory_To_Peripheral ((uint32_t)0x0001)
|
||||
#define DMA_DIR_Peripheral_To_Memory ((uint32_t)0x0002)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_incremented_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DMA_Inc_Increment ((uint32_t)0x00000000)
|
||||
#define DMA_Inc_Decrement ((uint32_t)0x00000001)
|
||||
#define DMA_Inc_Nochange ((uint32_t)0x00000002)
|
||||
#define IS_DMA_INC_STATE(STATE) (((STATE) == DMA_Inc_Increment) || \
|
||||
((STATE) == DMA_Inc_Decrement) || \
|
||||
((STATE) == DMA_Inc_Nochange))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_data_size
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DMA_DataSize_Byte ((uint32_t)0x0000)
|
||||
#define DMA_DataSize_HalfWord ((uint32_t)0x0001)
|
||||
#define DMA_DataSize_Word ((uint32_t)0x0002)
|
||||
#define IS_DMA_DATA_SIZE(SIZE) (((SIZE) == DMA_DataSize_Byte) || \
|
||||
((SIZE) == DMA_DataSize_HalfWord) || \
|
||||
((SIZE) == DMA_DataSize_Word))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_burst_size
|
||||
* @{
|
||||
*/
|
||||
#define DMA_BurstSize_1 ((uint32_t)0x00)
|
||||
#define DMA_BurstSize_4 ((uint32_t)0x01)
|
||||
#define DMA_BurstSize_8 ((uint32_t)0x02)
|
||||
#define DMA_BurstSize_16 ((uint32_t)0x03)
|
||||
#define DMA_BurstSize_32 ((uint32_t)0x04)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_peripheral_handshake
|
||||
* @{
|
||||
*/
|
||||
#define DMA_PeripheralHandShake_Hardware ((uint32_t)0x0000)
|
||||
#define DMA_PeripheralHandShake_Software ((uint32_t)0x0001)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Priority
|
||||
* @{
|
||||
*/
|
||||
#define DMA_Priority_0 ((uint32_t)0x00000000)
|
||||
#define DMA_Priority_1 ((uint32_t)0x00000020)
|
||||
#define DMA_Priority_2 ((uint32_t)0x00000040)
|
||||
#define DMA_Priority_3 ((uint32_t)0x00000060)
|
||||
#define DMA_Priority_4 ((uint32_t)0x00000080)
|
||||
#define DMA_Priority_5 ((uint32_t)0x000000A0)
|
||||
#define DMA_Priority_6 ((uint32_t)0x000000C0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_IT
|
||||
* @{
|
||||
*/
|
||||
#define DMA_IT_BlockTransferComplete ((uint32_t)0x01)
|
||||
#define DMA_IT_DestinationTransactionComplete ((uint32_t)0x02)
|
||||
#define DMA_IT_Error ((uint32_t)0x04)
|
||||
#define DMA_IT_SourceTransactionComplete ((uint32_t)0x08)
|
||||
#define DMA_IT_DMATransferComplete ((uint32_t)0x10)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
void DMA_Init(DMA_TypeDef* DMA_Channelx, DMA_InitTypeDef* DMA_InitStruct);
|
||||
void DMA_ChannelCmd(DMA_TypeDef* DMA_Channelx, FunctionalState NewState);
|
||||
void DMA_Cmd(FunctionalState NewState);
|
||||
void DMA_ChannelConfig(DMA_TypeDef* DMA_Channelx, uint32_t DMA_Peripheral, uint32_t DMA_DIR);
|
||||
void DMA_SetSRCAddress(DMA_TypeDef* DMA_Channelx, uint32_t Address);
|
||||
void DMA_SetDSRAddress(DMA_TypeDef* DMA_Channelx, uint32_t Address);
|
||||
|
||||
void DMA_ITConfig(DMA_TypeDef* DMA_Channelx, uint32_t DMA_IT, FunctionalState NewState);
|
||||
|
||||
FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);
|
||||
void DMA_ClearFlag(uint32_t DMA_FLAG);
|
||||
|
||||
FunctionalState DMA_IsChannelEnabled(DMA_TypeDef* DMA_Channelx);
|
||||
|
||||
ITStatus DMA_GetITStatus(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
|
||||
FlagStatus DMA_GetRawStatus(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
|
||||
void DMA_ClearITPendingBit(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
|
||||
|
||||
void DMA_MultiBlockInit(DMA_TypeDef* DMA_Channelx, DMA_InitTypeDef* DMA_InitStruct ,\
|
||||
LLI *first_lli,uint8_t Multi_Block_Mode);
|
||||
void DMA_InitLLI(DMA_TypeDef* DMA_Channelx,LLI *lli,LLI *next_lli,
|
||||
void *src_addr,void *dest_addr,uint16_t btsize);
|
||||
uint32_t DMA_GetTransferNum(DMA_TypeDef* DMA_Channelx, uint32_t first_adr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
119
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_exti.h
Normal file
119
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_exti.h
Normal file
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_EXTI_H
|
||||
#define __AIR105_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes -----------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/**
|
||||
* @brief EXTI Trigger enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Trigger_Off = (uint32_t)0x00,
|
||||
EXTI_Trigger_Rising = (uint32_t)0x01,
|
||||
EXTI_Trigger_Falling = (uint32_t)0x02,
|
||||
EXTI_Trigger_Rising_Falling = (uint32_t)0x03
|
||||
}EXTI_TriggerTypeDef;
|
||||
|
||||
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Off) || \
|
||||
((TRIGGER) == EXTI_Trigger_Rising) || \
|
||||
((TRIGGER) == EXTI_Trigger_Falling) || \
|
||||
((TRIGGER) == EXTI_Trigger_Rising_Falling))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup EXTI_Lines
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_Line0 ((uint32_t)0x0000) /*!< External interrupt line 0 */
|
||||
#define EXTI_Line1 ((uint32_t)0x0001) /*!< External interrupt line 1 */
|
||||
#define EXTI_Line2 ((uint32_t)0x0002) /*!< External interrupt line 2 */
|
||||
#define EXTI_Line3 ((uint32_t)0x0003) /*!< External interrupt line 3 */
|
||||
#define EXTI_Line4 ((uint32_t)0x0004) /*!< External interrupt line 4 */
|
||||
#define EXTI_Line5 ((uint32_t)0x0005) /*!< External interrupt line 5 */
|
||||
|
||||
#define IS_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
|
||||
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
|
||||
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_PinSource
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_PinSource0 ((uint32_t)0x0001) /*!< Pin 0 selected */
|
||||
#define EXTI_PinSource1 ((uint32_t)0x0002) /*!< Pin 1 selected */
|
||||
#define EXTI_PinSource2 ((uint32_t)0x0004) /*!< Pin 2 selected */
|
||||
#define EXTI_PinSource3 ((uint32_t)0x0008) /*!< Pin 3 selected */
|
||||
#define EXTI_PinSource4 ((uint32_t)0x0010) /*!< Pin 4 selected */
|
||||
#define EXTI_PinSource5 ((uint32_t)0x0020) /*!< Pin 5 selected */
|
||||
#define EXTI_PinSource6 ((uint32_t)0x0040) /*!< Pin 6 selected */
|
||||
#define EXTI_PinSource7 ((uint32_t)0x0080) /*!< Pin 7 selected */
|
||||
#define EXTI_PinSource8 ((uint32_t)0x0100) /*!< Pin 8 selected */
|
||||
#define EXTI_PinSource9 ((uint32_t)0x0200) /*!< Pin 9 selected */
|
||||
#define EXTI_PinSource10 ((uint32_t)0x0400) /*!< Pin 10 selected */
|
||||
#define EXTI_PinSource11 ((uint32_t)0x0800) /*!< Pin 11 selected */
|
||||
#define EXTI_PinSource12 ((uint32_t)0x1000) /*!< Pin 12 selected */
|
||||
#define EXTI_PinSource13 ((uint32_t)0x2000) /*!< Pin 13 selected */
|
||||
#define EXTI_PinSource14 ((uint32_t)0x4000) /*!< Pin 14 selected */
|
||||
#define EXTI_PinSource15 ((uint32_t)0x8000) /*!< Pin 15 selected */
|
||||
#define EXTI_PinSourceAll ((uint32_t)0xffff) /*!< Pin All selected */
|
||||
|
||||
#define IS_EXTI_PIN_SOURCE(PIN) (((((PIN) & ~(uint32_t)0xFFFF)) == 0x00) && ((PIN) != (uint32_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void EXTI_DeInit(void);
|
||||
void EXTI_LineConfig(uint32_t EXTI_Line, uint32_t EXTI_PinSource, EXTI_TriggerTypeDef EXTI_Trigger);
|
||||
uint32_t EXTI_GetITStatus(void);
|
||||
uint32_t EXTI_GetITLineStatus(uint32_t EXTI_Line);
|
||||
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __AIR105_EXTI_H
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
231
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_gpio.h
Normal file
231
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_gpio.h
Normal file
@@ -0,0 +1,231 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_GPIO_H
|
||||
#define __AIR105_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Mode_IN_FLOATING = 0x01,
|
||||
GPIO_Mode_IPU = 0x02,
|
||||
GPIO_Mode_Out_OD = 0x03,
|
||||
GPIO_Mode_Out_OD_PU = 0x04,
|
||||
GPIO_Mode_Out_PP = 0x05
|
||||
}GPIO_ModeTypeDef;
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||
((MODE) == GPIO_Mode_IPU) || \
|
||||
((MODE) == GPIO_Mode_Out_OD) || \
|
||||
((MODE) == GPIO_Mode_Out_PP) || \
|
||||
((MODE) == GPIO_Mode_Out_OD_PU))
|
||||
|
||||
/**
|
||||
* @brief GPIO Remap Type definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Remap_0 = 0x01,
|
||||
GPIO_Remap_1 = 0x02,
|
||||
GPIO_Remap_2 = 0x03,
|
||||
GPIO_Remap_3 = 0x04,
|
||||
}GPIO_RemapTypeDef;
|
||||
#define IS_GET_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_0) || \
|
||||
((REMAP) == GPIO_Remap_1) || \
|
||||
((REMAP) == GPIO_Remap_2) || \
|
||||
((REMAP) == GPIO_Remap_3) )
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
GPIO_ModeTypeDef GPIO_Mode;
|
||||
|
||||
GPIO_RemapTypeDef GPIO_Remap;
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
Bit_RESET = 0,
|
||||
Bit_SET
|
||||
}BitAction;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
#define IS_GPIO_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||
((PERIPH) == GPIOB) || \
|
||||
((PERIPH) == GPIOC) || \
|
||||
((PERIPH) == GPIOD) || \
|
||||
((PERIPH) == GPIOE) || \
|
||||
((PERIPH) == GPIOF))
|
||||
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xffff) /*!< Pin All selected */
|
||||
|
||||
#define IS_GPIO_PIN(PIN) (((((PIN) & ~(uint16_t)0xFFFF)) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||
((PIN) == GPIO_Pin_1) || \
|
||||
((PIN) == GPIO_Pin_2) || \
|
||||
((PIN) == GPIO_Pin_3) || \
|
||||
((PIN) == GPIO_Pin_4) || \
|
||||
((PIN) == GPIO_Pin_5) || \
|
||||
((PIN) == GPIO_Pin_6) || \
|
||||
((PIN) == GPIO_Pin_7) || \
|
||||
((PIN) == GPIO_Pin_8) || \
|
||||
((PIN) == GPIO_Pin_9) || \
|
||||
((PIN) == GPIO_Pin_10) || \
|
||||
((PIN) == GPIO_Pin_11) || \
|
||||
((PIN) == GPIO_Pin_12) || \
|
||||
((PIN) == GPIO_Pin_13) || \
|
||||
((PIN) == GPIO_Pin_14) || \
|
||||
((PIN) == GPIO_Pin_15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define GPIO_PinSource0 0x00
|
||||
#define GPIO_PinSource1 0x01
|
||||
#define GPIO_PinSource2 0x02
|
||||
#define GPIO_PinSource3 0x03
|
||||
#define GPIO_PinSource4 0x04
|
||||
#define GPIO_PinSource5 0x05
|
||||
#define GPIO_PinSource6 0x06
|
||||
#define GPIO_PinSource7 0x07
|
||||
#define GPIO_PinSource8 0x08
|
||||
#define GPIO_PinSource9 0x09
|
||||
#define GPIO_PinSource10 0x0A
|
||||
#define GPIO_PinSource11 0x0B
|
||||
#define GPIO_PinSource12 0x0C
|
||||
#define GPIO_PinSource13 0x0D
|
||||
#define GPIO_PinSource14 0x0E
|
||||
#define GPIO_PinSource15 0x0F
|
||||
|
||||
/** @defgroup GPIO_Port_Sources
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PortSourceGPIOA ((uint32_t)0x00)
|
||||
#define GPIO_PortSourceGPIOB ((uint32_t)0x01)
|
||||
#define GPIO_PortSourceGPIOC ((uint32_t)0x02)
|
||||
#define GPIO_PortSourceGPIOD ((uint32_t)0x03)
|
||||
#define GPIO_PortSourceGPIOE ((uint32_t)0x04)
|
||||
#define GPIO_PortSourceGPIOF ((uint32_t)0x05)
|
||||
|
||||
|
||||
#define IS_GPIO_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOF))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_WakeMode
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_WakeMode_Now = (uint32_t)0x00,
|
||||
GPIO_WakeMode_AfterGlitch = (uint32_t)0x01
|
||||
}GPIO_WakeModeTypeDef;
|
||||
|
||||
#define IS_GPIO_WAKE_MODE(MODE) (((MODE) == GPIO_WakeMode_Now) || \
|
||||
((MODE) == GPIO_WakeMode_AfterGlitch))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void GPIO_DeInit(void);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void GPIO_PullUpCmd(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, FunctionalState NewState);
|
||||
|
||||
void GPIO_PinRemapConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_RemapTypeDef GPIO_Remap);
|
||||
|
||||
void GPIO_WakeEvenDeInit(void);
|
||||
void GPIO_WakeEvenConfig(uint32_t GPIO_PortSource, uint32_t GPIO_Pin, FunctionalState NewState);
|
||||
void GPIO_WakeModeConfig(GPIO_WakeModeTypeDef GPIO_WakeMode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
321
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_hspim.h
Normal file
321
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_hspim.h
Normal file
@@ -0,0 +1,321 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_HSPIM_H
|
||||
#define __AIR105_HSPIM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "air105.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t HSPIM_Enable;
|
||||
uint8_t HSPIM_Mode;
|
||||
uint8_t HSPIM_FirstBit;
|
||||
uint8_t HSPIM_CPOL;
|
||||
uint8_t HSPIM_CPHA;
|
||||
uint8_t HSPIM_DivideEnable;
|
||||
uint8_t HSPIM_BaudRatePrescaler;
|
||||
uint8_t HSPIM_ReceiveDataLength;
|
||||
uint8_t HSPIM_RXFIFOFullThreshold;
|
||||
uint8_t HSPIM_TXFIFOEmptyThreshold;
|
||||
}HSPIM_InitTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t HSPIM_DMAReceiveEnable;
|
||||
uint8_t HSPIM_DMATransmitEnable;
|
||||
uint8_t HSPIM_DMAReceiveLevel;
|
||||
uint8_t HSPIM_DMATransmitLevel;
|
||||
}HSPIM_DMAInitTypeDef;
|
||||
|
||||
|
||||
/** @defgroup HSPIM_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HSPIM_MODE_STANDARD (0x01)
|
||||
#define HSPIM_MODE_DUAL_RECEIVE (0x02)
|
||||
#define HSPIM_MODE_DUAL_TRANSMIT (0x03)
|
||||
#define HSPIM_MODE_QUAD_RECEIVE (0x04)
|
||||
#define HSPIM_MODE_QUAD_TRANSMIT (0x05)
|
||||
#define IS_HSPIM_MODE(MODE) (((MODE) == HSPIM_MODE_STANDARD) || \
|
||||
((MODE) == HSPIM_MODE_DUAL_RECEIVE) || \
|
||||
((MODE) == HSPIM_MODE_DUAL_TRANSMIT) || \
|
||||
((MODE) == HSPIM_MODE_QUAD_RECEIVE) || \
|
||||
((MODE) == HSPIM_MODE_QUAD_TRANSMIT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HSPIM_CPOL_LOW (0x00)
|
||||
#define HSPIM_CPOL_HIGH (0x01)
|
||||
#define IS_HSPIM_CPOL(CPOL) (((CPOL) == HSPIM_CPOL_LOW)|| \
|
||||
((CPOL) == HSPIM_CPOL_HIGH))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup HSPIM_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HSPIM_CPHA_1EDGE (0x00)
|
||||
#define HSPIM_CPHA_2EDGE (0x01)
|
||||
#define IS_HSPIM_CPHA(CPHA) (((CPHA) == HSPIM_CPHA_1EDGE) || \
|
||||
(CPHA) == HSPIM_CPHA_2EDGE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_First_Bit
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HSPIM_FIRST_BIT_MSB (0x00)
|
||||
#define HSPIM_FIRST_BIT_LSB (0x01)
|
||||
#define IS_HSPIM_FIRST_BIT(BIT) (((BIT) == HSPIM_FIRST_BIT_MSB) || \
|
||||
((BIT) == HSPIM_FIRST_BIT_LSB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_BAUDRATE_PRESCALER_2 (0x01)
|
||||
#define HSPIM_BAUDRATE_PRESCALER_4 (0x02)
|
||||
#define HSPIM_BAUDRATE_PRESCALER_8 (0x04)
|
||||
#define HSPIM_BAUDRATE_PRESCALER_16 (0x08)
|
||||
#define HSPIM_BAUDRATE_PRESCALER_32 (0x10)
|
||||
#define IS_HSPIM_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == HSPIM_BAUDRATE_PRESCALER_2) || \
|
||||
((PRESCALER) == HSPIM_BAUDRATE_PRESCALER_4) || \
|
||||
((PRESCALER) == HSPIM_BAUDRATE_PRESCALER_8) || \
|
||||
((PRESCALER) == HSPIM_BAUDRATE_PRESCALER_16) || \
|
||||
((PRESCALER) == HSPIM_BAUDRATE_PRESCALER_32))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_Receive_Data_Length
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_1_BYTE (0x00)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_2_BYTE (0x01)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_3_BYTE (0x02)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_4_BYTE (0x03)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_5_BYTE (0x04)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_6_BYTE (0x05)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_7_BYTE (0x06)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_8_BYTE (0x07)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_9_BYTE (0x08)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_10_BYTE (0x09
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_11_BYTE (0x0A)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_12_BYTE (0x0B)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_13_BYTE (0x0C)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_14_BYTE (0x0D)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_15_BYTE (0x0E)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_16_BYTE (0x0F)
|
||||
#define HSPIM_RECEIVE_DATA_LENGTH_32_BYTE (0x1F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_TXFIFOEmptyThreshold
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_1 ((uint32_t)0x0001)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_2 ((uint32_t)0x0002)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_3 ((uint32_t)0x0003)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_4 ((uint32_t)0x0004)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_5 ((uint32_t)0x0005)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_6 ((uint32_t)0x0006)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_7 ((uint32_t)0x0007)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_8 ((uint32_t)0x0008)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_9 ((uint32_t)0x0009)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_10 ((uint32_t)0x000A)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_11 ((uint32_t)0x000B)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_12 ((uint32_t)0x000C)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_13 ((uint32_t)0x000D)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_14 ((uint32_t)0x000E)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_15 ((uint32_t)0x000F)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_31 ((uint32_t)0x001F)
|
||||
#define HSPIM_TX_FIFO_EMPTY_THRESHOLD_63 ((uint32_t)0x003F)
|
||||
|
||||
#define IS_HSPIM_TX_FIFO_EMPTY_THRESHOLD(THRESHOLD) ((((int32_t)(THRESHOLD)) >= HSPIM_TX_FIFO_EMPTY_THRESHOLD_1) && \
|
||||
(((uint32_t)(THRESHOLD)) <= HSPIM_TX_FIFO_EMPTY_THRESHOLD_63))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup HSPIM_RXFIFOFullThreshold
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_1 ((uint32_t)0x0001)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_2 ((uint32_t)0x0002)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_3 ((uint32_t)0x0003)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_4 ((uint32_t)0x0004)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_5 ((uint32_t)0x0005)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_6 ((uint32_t)0x0006)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_7 ((uint32_t)0x0007)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_8 ((uint32_t)0x0008)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_9 ((uint32_t)0x0009)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_10 ((uint32_t)0x000A)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_11 ((uint32_t)0x000B)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_12 ((uint32_t)0x000C)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_13 ((uint32_t)0x000D)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_14 ((uint32_t)0x000E)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_15 ((uint32_t)0x000F)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_16 ((uint32_t)0x0010)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_32 ((uint32_t)0x0020)
|
||||
#define HSPIM_RX_FIFO_FULL_THRESHOLD_63 ((uint32_t)0x003F)
|
||||
|
||||
|
||||
#define IS_HSPIM_RX_FIFO_FULL_THRESHOLD(THRESHOLD) ((((uint32_t)(THRESHOLD)) >= HSPIM_RX_FIFO_FULL_THRESHOLD_1) && \
|
||||
(((uint32_t)(THRESHOLD)) <= HSPIM_RX_FIFO_FULL_THRESHOLD_63))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_DMAReceiveLevel
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_1 ((uint32_t)0x0001)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_2 ((uint32_t)0x0002)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_3 ((uint32_t)0x0003)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_4 ((uint32_t)0x0004)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_5 ((uint32_t)0x0005)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_6 ((uint32_t)0x0006)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_7 ((uint32_t)0x0007)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_8 ((uint32_t)0x0008)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_9 ((uint32_t)0x0009)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_10 ((uint32_t)0x000A)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_11 ((uint32_t)0x000B)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_12 ((uint32_t)0x000C)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_13 ((uint32_t)0x000D)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_14 ((uint32_t)0x000E)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_15 ((uint32_t)0x000F)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_16 ((uint32_t)0x0010)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_32 ((uint32_t)0x0020)
|
||||
#define HSPIM_DMA_RECEIVE_LEVEL_64 ((uint32_t)0x0040)
|
||||
|
||||
#define IS_HSPIM_DMA_RECEIVE_LEVEL(LEVEL) ((((uint32_t)(LEVEL)) >= HSPIM_DMA_RECEIVE_LEVEL_1) && \
|
||||
(((uint32_t)(LEVEL)) <= HSPIM_DMA_RECEIVE_LEVEL_64))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_DMATransmitLevel
|
||||
* @{
|
||||
*/
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_1 ((uint32_t)0x0001)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_2 ((uint32_t)0x0002)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_3 ((uint32_t)0x0003)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_4 ((uint32_t)0x0004)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_5 ((uint32_t)0x0005)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_6 ((uint32_t)0x0006)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_7 ((uint32_t)0x0007)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_8 ((uint32_t)0x0008)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_9 ((uint32_t)0x0009)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_10 ((uint32_t)0x000A)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_11 ((uint32_t)0x000B)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_12 ((uint32_t)0x000C)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_13 ((uint32_t)0x000D)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_14 ((uint32_t)0x000E)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_15 ((uint32_t)0x000F)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_31 ((uint32_t)0x001F)
|
||||
#define HSPIM_DMA_TRANSMIT_LEVEL_63 ((uint32_t)0x003F)
|
||||
|
||||
#define IS_HSPIM_DMA_TRANSMIT_LEVEL(LEVEL) ((((uint32_t)(LEVEL)) >= HSPIM_DMA_TRANSMIT_LEVEL_1) && \
|
||||
(((uint32_t)(LEVEL)) <= HSPIM_DMA_TRANSMIT_LEVEL_63))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HSPIM_Interrupt Mask and Status Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HSPIM_IT_RX ((uint32_t)0x8000)
|
||||
#define HSPIM_IT_TX ((uint32_t)0x4000)
|
||||
#define HSPIM_IT_EN ((uint32_t)0x2000)
|
||||
|
||||
#define HSPIM_IT_ID_RXF ((uint32_t)0x0080)
|
||||
#define HSPIM_IT_ID_RXTF ((uint32_t)0x0040)
|
||||
#define HSPIM_IT_ID_RXE ((uint32_t)0x0020)
|
||||
|
||||
#define HSPIM_IT_ID_TXF ((uint32_t)0x0008)
|
||||
#define HSPIM_IT_ID_TXE ((uint32_t)0x0002)
|
||||
#define HSPIM_IT_ID_TXTF ((uint32_t)0x0001)
|
||||
|
||||
#define HSPIM_FLAG_TXE ((uint32_t)0x0004)
|
||||
#define HSPIM_FLAG_TXF ((uint32_t)0x0010)
|
||||
#define HSPIM_FLAG_TXTF ((uint32_t)0x0020)
|
||||
|
||||
#define HSPIM_FLAG_RXE ((uint32_t)0x0400)
|
||||
#define HSPIM_FLAG_RXF ((uint32_t)0x1000)
|
||||
#define HSPIM_FLAG_RXTF ((uint32_t)0x2000)
|
||||
|
||||
#define HSPIM_FIFO_TX ((uint32_t)0x0080)
|
||||
#define HSPIM_FIFO_RX ((uint32_t)0x0040)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
void HSPIM_Init(HSPIM_InitTypeDef* HSPIM_InitStruct);
|
||||
void HSPIM_DMAInit(HSPIM_DMAInitTypeDef* HSPIM_DMAInitStruct);
|
||||
void HSPIM_Cmd(FunctionalState NewState);
|
||||
void HSPIM_TransmitCmd(FunctionalState NewState);
|
||||
void HSPIM_DualQuadReceiveCmd(FunctionalState NewState);
|
||||
void HSPIM_SendData(uint8_t Data);
|
||||
uint8_t HSPIM_ReceiveData(void);
|
||||
void HSPIM_ITConfig(uint32_t HSPIM_IT, FunctionalState NewState);
|
||||
void HSPIM_FIFOReset(uint32_t HSPIM_IT);
|
||||
FlagStatus HSPIM_IsTransmitDone(void);
|
||||
FlagStatus HSPIM_IsReady(void);
|
||||
FlagStatus HSPIM_GetFlagStatus(uint32_t HSPIM_Flag);
|
||||
ITStatus HSPIM_GetITStatus(uint32_t HSPIM_IT);
|
||||
|
||||
void HSPIM_ModeSwitch(uint8_t Mode);
|
||||
void HSPIM_WriteBuff(uint8_t Mode, uint16_t Size, uint8_t* Buff);
|
||||
void HSPIM_ReadBuff(uint8_t Mode, uint16_t Size, uint8_t* Buff);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE***********************************************************************/
|
||||
357
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_i2c.h
Normal file
357
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_i2c.h
Normal file
@@ -0,0 +1,357 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_I2C_H
|
||||
#define __AIR105_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/** @defgroup I2C_mode
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_Mode_Master =((uint32_t)0x0001),
|
||||
I2C_Mode_Slave =((uint32_t)0x0002)
|
||||
}I2CMode_TypeDef;
|
||||
|
||||
#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_Master) || \
|
||||
((MODE) == I2C_Mode_Slave))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. */
|
||||
|
||||
I2CMode_TypeDef I2C_Mode;
|
||||
|
||||
uint32_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
||||
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||
uint32_t I2C_SDASetupTime;
|
||||
|
||||
uint32_t I2C_SDAHoldTime;
|
||||
|
||||
uint32_t I2C_TargetAddress;
|
||||
|
||||
uint32_t I2C_TargetAddressMode;
|
||||
|
||||
uint32_t I2C_OwnAddress; /*!< Specifies the slave mode own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */
|
||||
|
||||
uint32_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
|
||||
This parameter can be a value of @ref I2C_acknowledged_address */
|
||||
|
||||
uint32_t I2C_RXFIFOFullThreshold;
|
||||
|
||||
uint32_t I2C_TXFIFOEmptyThreshold;
|
||||
|
||||
FunctionalState I2C_GenerateRestartEnable;
|
||||
}I2C_InitTypeDef;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t I2C_DMAReq;
|
||||
uint32_t I2C_DMAReceiveLevel;
|
||||
uint32_t I2C_DMATransmitLevel;
|
||||
FunctionalState I2C_DMAEnCmd;
|
||||
}I2C_DMAInitTypeDef;
|
||||
|
||||
|
||||
#define I2C_ClockSpeed_100KHz (100000)
|
||||
#define I2C_ClockSpeed_400KHz (400000)
|
||||
|
||||
|
||||
/** @defgroup I2C_duty_cycle_in_fast_mode
|
||||
* @{
|
||||
*/
|
||||
/*Tlow/Thigh = ((I2C_DutyCycle_x_y & 0xFF00) >> 8) / (I2C_DutyCycle_x_y & 0x00FF)*/
|
||||
#define I2C_DutyCycle_1 ((uint16_t)0x0101) /*!< I2C standard mode Tlow/Thigh = 1 */
|
||||
#define I2C_DutyCycle_16_9 ((uint16_t)0x1009) /*!< I2C fast mode Tlow/Thigh = 16/9 */
|
||||
#define I2C_DutyCycle_2 ((uint16_t)0x0201) /*!< I2C fast mode Tlow/Thigh = 2 */
|
||||
#define I2C_DutyCycle_8_3 ((uint16_t)0x0803) /*!< I2C high mode Tlow/Thigh = 8/3 */
|
||||
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
|
||||
((CYCLE) == I2C_DutyCycle_2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define IS_I2C_SDA_SETUP_TIME(TIME) ((TIME) <= 0x000000FF)
|
||||
#define IS_I2C_SDA_HOLD_TIME(TIME) ((TIME) <= 0x0000FFFF)
|
||||
|
||||
/** @defgroup I2C_acknowledged_address
|
||||
* @{
|
||||
*/
|
||||
#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x0001)
|
||||
#define I2C_AcknowledgedAddress_10bit ((uint16_t)0x0002)
|
||||
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
|
||||
((ADDRESS) == I2C_AcknowledgedAddress_10bit))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Target_Address_Bit
|
||||
* @{
|
||||
*/
|
||||
#define I2C_TargetAddressMode_7bit ((uint16_t)0x0001)
|
||||
#define I2C_TargetAddressMode_10bit ((uint16_t)0x0002)
|
||||
#define IS_I2C_TARGET_ADDRESS_MODE(ADDRESS) (((ADDRESS) == I2C_TargetAddressMode_7bit) || \
|
||||
((ADDRESS) == I2C_TargetAddressMode_10bit))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_RXFIFOFullThreshold
|
||||
* @{
|
||||
*/
|
||||
#define I2C_RXFIFOFullThreshold_1 ((uint32_t)0x0000)
|
||||
#define I2C_RXFIFOFullThreshold_2 ((uint32_t)0x0001)
|
||||
#define I2C_RXFIFOFullThreshold_3 ((uint32_t)0x0002)
|
||||
#define I2C_RXFIFOFullThreshold_4 ((uint32_t)0x0003)
|
||||
#define I2C_RXFIFOFullThreshold_5 ((uint32_t)0x0004)
|
||||
#define I2C_RXFIFOFullThreshold_6 ((uint32_t)0x0005)
|
||||
#define I2C_RXFIFOFullThreshold_7 ((uint32_t)0x0006)
|
||||
#define I2C_RXFIFOFullThreshold_8 ((uint32_t)0x0007)
|
||||
|
||||
#define IS_I2C_RX_FIFO_FULL_THRESHOLD(THRESHOLD) (THRESHOLD <= I2C_RXFIFOFullThreshold_8)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TXFIFOEmptyThreshold
|
||||
* @{
|
||||
*/
|
||||
#define I2C_TXFIFOEmptyThreshold_0 ((uint32_t)0x0000)
|
||||
#define I2C_TXFIFOEmptyThreshold_1 ((uint32_t)0x0001)
|
||||
#define I2C_TXFIFOEmptyThreshold_2 ((uint32_t)0x0002)
|
||||
#define I2C_TXFIFOEmptyThreshold_3 ((uint32_t)0x0003)
|
||||
#define I2C_TXFIFOEmptyThreshold_4 ((uint32_t)0x0004)
|
||||
#define I2C_TXFIFOEmptyThreshold_5 ((uint32_t)0x0005)
|
||||
#define I2C_TXFIFOEmptyThreshold_6 ((uint32_t)0x0006)
|
||||
#define I2C_TXFIFOEmptyThreshold_7 ((uint32_t)0x0007)
|
||||
#define I2C_TXFIFOEmptyThreshold_8 ((uint32_t)0x0008)
|
||||
|
||||
#define IS_I2C_TX_FIFO_EMPTY_THRESHOLD(THRESHOLD) (THRESHOLD <= I2C_TXFIFOEmptyThreshold_8)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup I2C_DMAReceiveLevel
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DMAReceiveLevel_1 ((uint32_t)0x0000)
|
||||
#define I2C_DMAReceiveLevel_2 ((uint32_t)0x0001)
|
||||
#define I2C_DMAReceiveLevel_3 ((uint32_t)0x0002)
|
||||
#define I2C_DMAReceiveLevel_4 ((uint32_t)0x0003)
|
||||
#define I2C_DMAReceiveLevel_5 ((uint32_t)0x0004)
|
||||
#define I2C_DMAReceiveLevel_6 ((uint32_t)0x0005)
|
||||
#define I2C_DMAReceiveLevel_7 ((uint32_t)0x0006)
|
||||
#define I2C_DMAReceiveLevel_8 ((uint32_t)0x0007)
|
||||
|
||||
#define IS_I2C_DMA_RECEIVE_LEVEL(LEVEL) (LEVEL <= I2C_DMAReceiveLevel_8)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_DMATransmitLevel
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DMATransmitLevel_0 ((uint32_t)0x0000)
|
||||
#define I2C_DMATransmitLevel_1 ((uint32_t)0x0001)
|
||||
#define I2C_DMATransmitLevel_2 ((uint32_t)0x0002)
|
||||
#define I2C_DMATransmitLevel_3 ((uint32_t)0x0003)
|
||||
#define I2C_DMATransmitLevel_4 ((uint32_t)0x0004)
|
||||
#define I2C_DMATransmitLevel_5 ((uint32_t)0x0005)
|
||||
#define I2C_DMATransmitLevel_6 ((uint32_t)0x0006)
|
||||
#define I2C_DMATransmitLevel_7 ((uint32_t)0x0007)
|
||||
|
||||
#define IS_I2C_DMA_TRANSMIT_LEVEL(LEVEL) (LEVEL <= I2C_DMATransmitLevel_7)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DMAReq_Rx ((uint32_t)0x0001)
|
||||
#define I2C_DMAReq_Tx ((uint32_t)0x0002)
|
||||
#define IS_I2C_DMAREQ(DMAREQ) (((DMAREQ) & I2C_DMAReq_Tx) || \
|
||||
((DMAREQ) & I2C_DMAReq_Rx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define I2C_IT_RXUDF ((uint32_t)0x0001) //clear by hardware
|
||||
#define I2C_IT_RXOVF ((uint32_t)0x0002) //clear by read
|
||||
#define I2C_IT_RXF ((uint32_t)0x0004) //clear by read
|
||||
#define I2C_IT_TXOVF ((uint32_t)0x0008) //clear by read
|
||||
#define I2C_IT_TXE ((uint32_t)0x0010) //clear by hardware
|
||||
#define I2C_IT_RD_REQ ((uint32_t)0x0020) //clear by read
|
||||
#define I2C_IT_TX_ABRT ((uint32_t)0x0040) //clear by read
|
||||
#define I2C_IT_RX_DONE ((uint32_t)0x0080) //clear by read
|
||||
#define I2C_IT_ACTIVITY ((uint32_t)0x0100) //clear by read
|
||||
#define I2C_IT_STOP_DET ((uint32_t)0x0200) //clear by read
|
||||
#define I2C_IT_START_DET ((uint32_t)0x0400)
|
||||
#define I2C_IT_GEN_CALL ((uint32_t)0x0800)
|
||||
#define I2C_IT_ALL ((uint32_t)0x0FFF)
|
||||
|
||||
#define IS_I2C_CONFIG_IT(IT) ((((IT) & (~(uint32_t)0x0FFF)) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_I2C_CLEAR_IT(IT) ((((IT) & (~(uint32_t)0x0FFF)) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_RXUDF) || \
|
||||
((IT) == I2C_IT_RXOVF) || \
|
||||
((IT) == I2C_IT_RXF) || \
|
||||
((IT) == I2C_IT_TXOVF) || \
|
||||
((IT) == I2C_IT_TXE) || \
|
||||
((IT) == I2C_IT_RD_REQ) || \
|
||||
((IT) == I2C_IT_TX_ABRT) || \
|
||||
((IT) == I2C_IT_RX_DONE) || \
|
||||
((IT) == I2C_IT_ACTIVITY) || \
|
||||
((IT) == I2C_IT_STOP_DET) || \
|
||||
((IT) == I2C_IT_START_DET) || \
|
||||
((IT) == I2C_IT_GEN_CALL) || \
|
||||
((IT) == I2C_IT_ALL))
|
||||
|
||||
#define I2C_FLAG_ACTIVITY ((uint32_t)0x0001)
|
||||
#define I2C_FLAG_TXNF ((uint32_t)0x0002)
|
||||
#define I2C_FLAG_TXE ((uint32_t)0x0004)
|
||||
#define I2C_FLAG_RXNE ((uint32_t)0x0008)
|
||||
#define I2C_FLAG_RXF ((uint32_t)0x0010)
|
||||
#define I2C_FLAG_MST_ACTIVITY ((uint32_t)0x0020)
|
||||
#define I2C_FLAG_SLV_ACTIVITY ((uint32_t)0x0040)
|
||||
#define I2C_FLAG_ALL ((uint32_t)0x007F)
|
||||
#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_ACTIVITY) || \
|
||||
((FLAG) == I2C_FLAG_TXNF) || \
|
||||
((FLAG) == I2C_FLAG_TXE) || \
|
||||
((FLAG) == I2C_FLAG_RXNE) || \
|
||||
((FLAG) == I2C_FLAG_RXF) || \
|
||||
((FLAG) == I2C_FLAG_MST_ACTIVITY) || \
|
||||
((FLAG) == I2C_FLAG_SLV_ACTIVITY) || \
|
||||
((FLAG) == I2C_FLAG_ALL))
|
||||
|
||||
#define I2C_TX_ABRT_7BIT_ADDR_NOACK ((uint32_t)0x00000001)
|
||||
#define I2C_TX_ABRT_10BIT_ADDR1_NOACK ((uint32_t)0x00000002)
|
||||
#define I2C_TX_ABRT_10BIT_ADDR2_NOACK ((uint32_t)0x00000004)
|
||||
#define I2C_TX_ABRT_TXDATA_NOACK ((uint32_t)0x00000008)
|
||||
#define I2C_TX_ABRT_GEN_CALL_NOACK ((uint32_t)0x00000010)
|
||||
#define I2C_TX_ABRT_GEN_CALL_READ ((uint32_t)0x00000020)
|
||||
#define I2C_TX_ABRT_HIGH_SPEED_ACKDET ((uint32_t)0x00000040)
|
||||
#define I2C_TX_ABRT_START_BYTE_ACKDET ((uint32_t)0x00000080)
|
||||
#define I2C_TX_ABRT_HIGH_SPEED_NORSTRT ((uint32_t)0x00000100)
|
||||
#define I2C_TX_ABRT_START_BYTE_NORSTRT ((uint32_t)0x00000200)
|
||||
#define I2C_TX_ABRT_10BIT_RD_NORSTRT ((uint32_t)0x00000400)
|
||||
#define I2C_TX_ABRT_LOST_ARB ((uint32_t)0x00000800)
|
||||
#define I2C_TX_ABRT_SLVFLUSH_TXFIFO ((uint32_t)0x00001000)
|
||||
#define I2C_TX_ABRT_SLV_LOST_ARB ((uint32_t)0x00002000)
|
||||
#define I2C_TX_ABRT_SLV_RD_INTX ((uint32_t)0x00004000)
|
||||
#define I2C_TX_ABRT_MASTER_DISABLE ((uint32_t)0x00008000)
|
||||
#define I2C_TX_ABRT_USER_ABRT ((uint32_t)0x00010000)
|
||||
#define I2C_TX_ABRT_TX_FLUSH_CNT ((uint32_t)0x00020000)
|
||||
#define IS_I2C_TX_ABRT(ABRT) (((ABRT) == I2C_TX_ABRT_7BIT_ADDR_NOACK) || \
|
||||
((ABRT) == I2C_TX_ABRT_10BIT_ADDR1_NOACK) || \
|
||||
((FLAG) == I2C_TX_ABRT_10BIT_ADDR2_NOACK) || \
|
||||
((FLAG) == I2C_TX_ABRT_TXDATA_NOACK) || \
|
||||
((FLAG) == I2C_TX_ABRT_GEN_CALL_NOACK) || \
|
||||
((FLAG) == I2C_TX_ABRT_GEN_CALL_READ) || \
|
||||
((FLAG) == I2C_TX_ABRT_HIGH_SPEED_ACKDET) || \
|
||||
((FLAG) == I2C_TX_ABRT_START_BYTE_ACKDET) || \
|
||||
((FLAG) == I2C_TX_ABRT_HIGH_SPEED_NORSTRT) || \
|
||||
((FLAG) == I2C_TX_ABRT_START_BYTE_NORSTRT) || \
|
||||
((FLAG) == I2C_TX_ABRT_10BIT_RD_NORSTRT) || \
|
||||
((FLAG) == I2C_TX_ABRT_LOST_ARB) || \
|
||||
((FLAG) == I2C_TX_ABRT_SLVFLUSH_TXFIFO) || \
|
||||
((FLAG) == I2C_TX_ABRT_SLV_LOST_ARB) || \
|
||||
((FLAG) == I2C_TX_ABRT_SLV_RD_INTX) || \
|
||||
((FLAG) == I2C_TX_ABRT_MASTER_DISABLE) || \
|
||||
((FLAG) == I2C_TX_ABRT_USER_ABRT) || \
|
||||
((FLAG) == I2C_TX_ABRT_TX_FLUSH_CNT))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I2C_DataCMD_Write = (uint32_t)0x01,
|
||||
I2C_DataCMD_Read = (uint32_t)0x02
|
||||
}I2CDataCMD_TypeDef;
|
||||
#define IS_I2C_DATA_CMD(CMD) (((CMD) == I2C_DataCMD_Write) || \
|
||||
((CMD) == I2C_DataCMD_Read))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I2C_DataEndCondition_None = (uint32_t)0x01,
|
||||
I2C_DataEndCondition_Stop = (uint32_t)0x02,
|
||||
I2C_DataEndCondition_Restart = (uint32_t)0x03
|
||||
}I2CDataEndCondition_TypeDef;
|
||||
#define IS_I2C_DATA_END_CONDITION(CONDITION) (((CONDITION) == I2C_DataEndCondition_None) || \
|
||||
((CONDITION) == I2C_DataEndCondition_Stop) || \
|
||||
((CONDITION) == I2C_DataEndCondition_Restart))
|
||||
|
||||
|
||||
void I2C_DeInit(I2C_TypeDef* I2Cx);
|
||||
void I2C_Init(I2C_TypeDef* I2Cx,I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_SetTargetAddress(I2C_TypeDef* I2Cx, uint32_t TargetAddress, uint32_t TargetAddressMode);
|
||||
void I2C_DMAInit(I2C_TypeDef* I2Cx, I2C_DMAInitTypeDef* I2C_DMAInitStruct);
|
||||
void I2C_DMAStructInit(I2C_DMAInitTypeDef* I2C_DMAInitStruct);
|
||||
void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
|
||||
void I2C_SetSDASetupTime(I2C_TypeDef* I2Cx,uint32_t PCLKCycles);
|
||||
void I2C_SetSDAHoldTime(I2C_TypeDef* I2Cx,uint32_t PCLKCycles);
|
||||
|
||||
void I2C_ITConfig(I2C_TypeDef* I2Cx,uint32_t I2C_IT, FunctionalState NewState);
|
||||
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx,uint32_t I2C_IT);
|
||||
ITStatus I2C_GetRawITStatus(I2C_TypeDef* I2Cx,uint32_t I2C_IT);
|
||||
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx,uint32_t I2C_IT);
|
||||
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx,uint32_t I2C_FLAG);
|
||||
uint32_t I2C_GetFlagStatusReg(I2C_TypeDef* I2Cx);
|
||||
FlagStatus I2C_GetTXAbortSource(I2C_TypeDef* I2Cx,uint32_t I2C_TX_ABRT);
|
||||
uint32_t I2C_GetTXAbortSourceReg(I2C_TypeDef* I2Cx);
|
||||
I2CMode_TypeDef I2C_GetI2CMode(I2C_TypeDef* I2Cx);
|
||||
|
||||
void I2C_MasterGenerateReceiveSCL(I2C_TypeDef* I2Cx, I2CDataEndCondition_TypeDef DataCondition);
|
||||
uint16_t I2C_ExtendData(uint8_t Data, I2CDataCMD_TypeDef DataCMD, I2CDataEndCondition_TypeDef DataCondition);
|
||||
void I2C_WriteDataToDR(I2C_TypeDef* I2Cx, uint16_t ExtendData);
|
||||
uint8_t I2C_ReadDataFromDR(I2C_TypeDef* I2Cx);
|
||||
void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data, I2CDataEndCondition_TypeDef DataCondition);
|
||||
uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx, I2CDataEndCondition_TypeDef DataCondition);
|
||||
void I2C_SendBytes(I2C_TypeDef* I2Cx, uint8_t* Data, uint32_t DataLen, I2CDataEndCondition_TypeDef DataCondition);
|
||||
void I2C_ReceiveBytes(I2C_TypeDef* I2Cx, uint8_t* Data, uint32_t DataLen, I2CDataEndCondition_TypeDef DataCondition);
|
||||
|
||||
void I2C_SlaveGeneralNACKOnlyCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
|
||||
FlagStatus I2C_IsEnable(I2C_TypeDef* I2Cx);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
52
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_it.h
Normal file
52
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_it.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __AIR105_IT_H
|
||||
#define __AIR105_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
72
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_kcu.h
Normal file
72
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_kcu.h
Normal file
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_KCU_H
|
||||
#define __AIR105_KCU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/**
|
||||
* @brief KCU Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t KCU_DebounceTimeLevel;
|
||||
uint32_t KCU_PortInput;
|
||||
uint32_t KCU_PortOutput;
|
||||
uint32_t KCU_Rand;
|
||||
}KCU_InitTypeDef;
|
||||
|
||||
|
||||
#define KCU_IT_PUSH (KCU_CTRL1_PUSH_IT)
|
||||
#define KCU_IT_RELEASE (KCU_CTRL1_RELEASE_IT)
|
||||
#define KCU_IT_OVERRUN (KCU_CTRL1_OVERRUN_IT)
|
||||
|
||||
void KCU_DeInit(void);
|
||||
|
||||
void KCU_Init(KCU_InitTypeDef *KCU_InitStruct);
|
||||
void KCU_StructInit(KCU_InitTypeDef *KCU_InitStruct);
|
||||
|
||||
void KCU_Cmd(FunctionalState NewState);
|
||||
|
||||
uint32_t KCU_SetRand(uint32_t rand);
|
||||
|
||||
void KCU_ITConfig(uint32_t KCU_IT, FunctionalState NewState);
|
||||
FlagStatus KCU_GetITStatus(uint32_t KCU_IT);
|
||||
void KCU_ClearITPending(void);
|
||||
|
||||
uint32_t KCU_GetEvenReg(void);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
140
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_lcdi.h
Normal file
140
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_lcdi.h
Normal file
@@ -0,0 +1,140 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_LCDI_H
|
||||
#define __AIR105_LCDI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
#define LCDI_CMD (0)
|
||||
#define LCDI_DAT (1)
|
||||
|
||||
#define LCDI_MODE_6800 (0)
|
||||
#define LCDI_MODE_8080 (1)
|
||||
|
||||
#define LCD_CMD_BUFF_SIZE (64)
|
||||
#define LCD_READ_BUFF_SIZE (512)
|
||||
#define LCD_WRITE_BUFF_SIZE (512)
|
||||
|
||||
//LCD module
|
||||
#define LCDI_FIFO_OV_IE (1 << 12)
|
||||
#define LCDI_FIFO_RST (1 << 11)
|
||||
#define LCDI_WR_DMA_EN (1 << 10)
|
||||
#define LCDI_WR_FIFO_EN (1 << 9)
|
||||
|
||||
#define LCDI_CTRL_AUTO_READ (1 << 8)
|
||||
#define LCDI_CTRL_TYPE_8080 (1 << 7)
|
||||
#define LCDI_CTRL_EN_RD (1 << 6)
|
||||
#define LCDI_CTRL_RW_WR (1 << 5)
|
||||
#define LCDI_CTRL_CD (1 << 4)
|
||||
#define LCDI_CTRL_WIDTH_4BIT (1 << 3)
|
||||
#define LCDI_CTRL_AUTO (1 << 2)
|
||||
#define LCDI_CTRL_RD_IE (1 << 1)
|
||||
#define LCDI_CTRL_WR_IE (1 << 0)
|
||||
|
||||
#define LCDI_STATUS_READY (1 << 2)
|
||||
#define LCDI_STATUS_RD_IS (1 << 1)
|
||||
#define LCDI_STATUS_WR_IS (1 << 0)
|
||||
|
||||
#define RNG_BUF_IS_FULL(pBuf) ((pBuf)->u32Tail == (pBuf)->u32Head)
|
||||
#define RNG_BUF_NEXT_HEAD(pBuf) (((pBuf)->u32Head + 1) % ((pBuf)->u32BuffSize))
|
||||
#define RNG_BUF_NEXT_TAIL(pBuf) (((pBuf)->u32Tail + 1) % ((pBuf)->u32BuffSize))
|
||||
#define RNG_BUF_LEN(pBuf) (((pBuf)->u32Tail + (pBuf)->u32BuffSize - 1 - (pBuf)->u32Head) % (pBuf)->u32BuffSize)
|
||||
#define RNG_BUF_PERI_TAIL(pBuf) (((pBuf)->u32Tail + (pBuf)->u32BuffSize - 1) % ((pBuf)->u32BuffSize))
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t volatile u32Head;
|
||||
uint32_t volatile u32Tail;
|
||||
uint32_t volatile u32BuffSize;
|
||||
uint32_t volatile u32Stat;
|
||||
uint8_t volatile *pu8Buff;
|
||||
} RNG_BUF8, *RNG_BUF8_ID;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t volatile u32Head;
|
||||
uint32_t volatile u32Tail;
|
||||
uint32_t volatile u32BuffSize;
|
||||
uint32_t volatile u32Stat;
|
||||
uint32_t volatile *pu32Buff;
|
||||
} RNG_BUF32, *RNG_BUF32_ID;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t lcd_ReadBuff[LCD_READ_BUFF_SIZE];
|
||||
uint8_t lcd_WriteBuff[LCD_WRITE_BUFF_SIZE];
|
||||
uint32_t lcd_CmdBuff[LCD_CMD_BUFF_SIZE];
|
||||
RNG_BUF8 rbRead;
|
||||
RNG_BUF8 rbWrite;
|
||||
RNG_BUF32 rbCmd;
|
||||
RNG_BUF32_ID prbCmd;
|
||||
RNG_BUF8_ID prbRead;
|
||||
RNG_BUF8_ID prbWrite;
|
||||
volatile uint32_t u32OpCount;
|
||||
} RING_BUF;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t LCD_BusMode; //Bus mode(8080/6800)
|
||||
uint8_t LCD_IntRead; //Read interrupt Enable
|
||||
uint8_t LCD_IntWrite; //Read interrupt Enable
|
||||
uint8_t fifo_level;
|
||||
uint32_t LCD_MaxQTR; //Max qaurter cylce of read/write.
|
||||
uint32_t fifo_ov_ie_enable;
|
||||
uint32_t fifo_rst_enable;
|
||||
uint32_t wr_dma_enable;
|
||||
uint32_t wr_fifo_enable;
|
||||
uint32_t opt;
|
||||
RING_BUF ring_buf;
|
||||
} LCD_InitTypeDef;
|
||||
|
||||
//Operate the bus signal
|
||||
void LCD_BusRead(LCD_TypeDef *LCDx,uint8_t u8CD);
|
||||
void LCD_BusWrite(LCD_TypeDef *LCDx,uint8_t u8CD, uint8_t value);
|
||||
|
||||
void LCD_Read(LCD_TypeDef *LCDx,uint8_t u8CD, uint8_t *dat);
|
||||
void LCD_Write(LCD_TypeDef *LCDx,uint8_t u8CD, uint8_t u8Value);
|
||||
|
||||
//Buffer mode only can used in interrupt mode.
|
||||
int32_t LCD_ReadBuff(LCD_TypeDef *LCDx, LCD_InitTypeDef *pLcdInit, uint8_t *pu8Buff, uint32_t u32BuffLen);
|
||||
int32_t LCD_WriteBuff(LCD_TypeDef *LCDx, LCD_InitTypeDef *pLcdInit, uint8_t *pu8Buff, uint32_t u32BuffLen);
|
||||
|
||||
void LCD_Init(LCD_TypeDef *LCDx, LCD_InitTypeDef *pLcdInit);
|
||||
void LCD_FIFODMAconfig(LCD_TypeDef *LCDx, LCD_InitTypeDef *LCD_InitType);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
80
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_otp.h
Normal file
80
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_otp.h
Normal file
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_OTP_H
|
||||
#define __AIR105_OTP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
typedef enum
|
||||
{
|
||||
OTP_Complete = 0,
|
||||
OTP_ReadOnProgramOrSleep, //<2F>ڱ<EFBFBD>̡<EFBFBD><CCA1><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>¶<EFBFBD>OTP<54><50><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
OTP_ProgramIn_HiddenOrRO_Block, //<2F><>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD><D0B1>
|
||||
OTP_ProgramOutOfAddr, //<2F><>̷<EFBFBD>Χ<EFBFBD><CEA7><EFBFBD><EFBFBD>OTP<54><50>Χ
|
||||
OTP_ProgramOnSleep, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD>б<EFBFBD>̲<EFBFBD><CCB2><EFBFBD>
|
||||
OTP_WakeUpOnNoSleep, //<2F>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>½<EFBFBD><C2BD>л<EFBFBD><D0BB>Ѳ<EFBFBD><D1B2><EFBFBD>
|
||||
OTP_TimeOut, //OTP<54><50>ɱ<EFBFBD>־λ<D6BE><CEBB>ʱû<CAB1><C3BB><EFBFBD><EFBFBD>λ
|
||||
OTP_DataWrong,
|
||||
}OTP_StatusTypeDef;
|
||||
|
||||
#define IS_OTP_ADDRESS(ADDRESS) (((ADDRESS) > AIR105_OTP_SIZE - 1) && ((ADDRESS) < AIR105_OTP_BASE + AIR105_OTP_SIZE))
|
||||
|
||||
|
||||
void OTP_WakeUp(void);
|
||||
void OTP_Unlock(void);
|
||||
void OTP_Lock(void);
|
||||
void OTP_ClearStatus(void);
|
||||
void OTP_SetLatency(uint8_t u8_1UsClk, uint8_t u8_10NsCLK);
|
||||
void OTP_TimCmd(FunctionalState NewState);
|
||||
|
||||
void OTP_SetProtect(uint32_t u32Addr);
|
||||
void OTP_SetProtectLock(uint32_t u32Addr);
|
||||
void OTP_UnProtect(uint32_t u32Addr);
|
||||
uint32_t OTP_GetProtect(void);
|
||||
uint32_t OTP_GetProtectLock(void);
|
||||
|
||||
void OTP_PowerOn(void);
|
||||
|
||||
Boolean OTP_IsReadReady(void);
|
||||
Boolean OTP_IsWriteDone(void);
|
||||
|
||||
OTP_StatusTypeDef OTP_GetFlag(void);
|
||||
|
||||
Boolean OTP_IsProtect(uint32_t u32Addr);
|
||||
Boolean OTP_IsProtectLock(uint32_t u32Addr);
|
||||
|
||||
OTP_StatusTypeDef OTP_WriteWord(uint32_t addr, uint32_t w);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
155
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_qspi.h
Normal file
155
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_qspi.h
Normal file
@@ -0,0 +1,155 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef AIRMCU_FLASH
|
||||
#define AIRMCU_FLASH
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
/* Size of the flash */
|
||||
#define X25Q_PAGE_SIZE 0x100
|
||||
|
||||
// Identification Operations
|
||||
/***Command Definitions***/
|
||||
|
||||
// Program Operations
|
||||
#define PAGE_PROG_CMD 0x02
|
||||
#define QUAD_INPUT_PAGE_PROG_CMD 0x32
|
||||
|
||||
|
||||
// Erase Operations
|
||||
#define SECTOR_ERASE_CMD 0x20
|
||||
#define CHIP_ERASE_CMD 0xC7
|
||||
|
||||
#define PROG_ERASE_RESUME_CMD 0x7A
|
||||
#define PROG_ERASE_SUSPEND_CMD 0x75
|
||||
|
||||
#define SET_BURST_WITH_WRAP 0x77
|
||||
#define RELEASE_FROM_DEEP_POWER_DOWN 0xAB
|
||||
#define DEEP_POWER_DOWN 0xB9
|
||||
|
||||
/***End Cmd***/
|
||||
|
||||
|
||||
#define QSPI_DEVICE_PARA_SAMPLE_DLY_Pos 15
|
||||
#define QSPI_DEVICE_PARA_SAMPLE_PHA_Pos 14
|
||||
#define QSPI_DEVICE_PARA_PROTOCOL_Pos 8
|
||||
#define QSPI_DEVICE_PARA_DUMMY_CYCLE_Pos 4
|
||||
|
||||
|
||||
#define ROM_QSPI_Init (*((void (*)(QSPI_InitTypeDef *))(*(uint32_t *)0x8010)))
|
||||
#define ROM_QSPI_ReadID (*((uint32_t (*)(QSPI_CommandTypeDef *))(*(uint32_t *)0x8014)))
|
||||
#define ROM_QSPI_WriteParam (*((uint8_t (*)(QSPI_CommandTypeDef *, uint16_t))(*(uint32_t *)0x8018)))
|
||||
#define ROM_QSPI_EraseSector (*((uint8_t (*)(QSPI_CommandTypeDef *, uint32_t))(*(uint32_t *)0x801C)))
|
||||
#define ROM_QSPI_ProgramPage (*((uint8_t (*)(QSPI_CommandTypeDef *, DMA_TypeDef *, uint32_t, uint32_t, uint8_t *))(*(uint32_t *)0x8024)))
|
||||
#define ROM_QSPI_ReleaseDeepPowerDown (*((uint8_t (*)(QSPI_CommandTypeDef *))(*(uint32_t *)0x802C)))
|
||||
#define ROM_QSPI_StatusReg (*((uint16_t (*)(QSPI_CommandTypeDef *))(*(uint32_t *)0x8034)))
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
QSPI_BUSMODE_111 = 0x00, //CMD-ADDR-DATA = 1-1-1
|
||||
QSPI_BUSMODE_114 = 0x01, //CMD-ADDR-DATA = 1-1-4
|
||||
QSPI_BUSMODE_144 = 0x02, //CMD-ADDR-DATA = 1-4-4
|
||||
QSPI_BUSMODE_444 = 0x03, //CMD-ADDR-DATA = 4-4-4
|
||||
}QSPI_BusModeTypeDef;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
QSPI_CMDFORMAT_CMD8 = 0x00,
|
||||
QSPI_CMDFORMAT_CMD8_RREG8 = 0x01,
|
||||
QSPI_CMDFORMAT_CMD8_RREG16 = 0x02,
|
||||
QSPI_CMDFORMAT_CMD8_RREG24 = 0x03,
|
||||
QSPI_CMDFORMAT_CMD8_DMY24_WREG8 = 0x04,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_RREG8 = 0x05,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_RREG16 = 0x06,
|
||||
QSPI_CMDFORMAT_CMD8_WREG8 = 0x07,
|
||||
QSPI_CMDFORMAT_CMD8_WREG16 = 0x08,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24 = 0x09,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_RDAT = 0x0A,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_DMY_RDAT = 0x0B,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_M8_DMY_RDAT = 0x0C,
|
||||
QSPI_CMDFORMAT_CMD8_ADDR24_PDAT = 0x0D
|
||||
}QSPI_CmdFormatTypeDef;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
QSPI_PROTOCOL_CLPL = 0x00,
|
||||
QSPI_PROTOCOL_CHPH = 0x03
|
||||
}QSPI_ProtocolTypedef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
QSPI_FREQSEL_HCLK_DIV2 = 0x01,
|
||||
QSPI_FREQSEL_HCLK_DIV3 = 0x02,
|
||||
QSPI_FREQSEL_HCLK_DIV4 = 0x03
|
||||
}QSPI_FreqSelTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
//Device Para
|
||||
uint8_t SampleDly; //Default:0
|
||||
uint8_t SamplePha; //Default:0
|
||||
uint8_t ProToCol; //Defualt: QSPI_PROTOCOL_CLPL
|
||||
uint8_t DummyCycles; //Include M7:0 Defualt: 6
|
||||
uint8_t FreqSel; //Defualt: QSPI_FREQSEL_HCLK_DIV4
|
||||
|
||||
//Setting Cache
|
||||
uint8_t Cache_Cmd_ReleaseDeepInstruction; //Defualt: 0xAB
|
||||
uint8_t Cache_Cmd_DeepInstruction; //Defualt: 0xB9
|
||||
uint8_t Cache_Cmd_ReadBusMode; //Defualt: QSPI_BUSMODE_144
|
||||
uint8_t Cache_Cmd_ReadFormat; //Defualt: QSPI_CMDFORMAT_CMD8_ADDR24_DMY_RDAT
|
||||
uint8_t Cache_Cmd_ReadInstruction; //Defualt: 0xEB
|
||||
|
||||
}QSPI_InitTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Instruction;
|
||||
uint32_t BusMode;
|
||||
uint32_t CmdFormat;
|
||||
|
||||
}QSPI_CommandTypeDef;
|
||||
|
||||
|
||||
void QSPI_Init(QSPI_InitTypeDef *mhqspi);
|
||||
void QSPI_SetLatency(uint32_t u32UsClk);
|
||||
|
||||
uint8_t FLASH_EraseSector(uint32_t sectorAddress);
|
||||
uint8_t FLASH_ProgramPage(uint32_t addr, uint32_t size, uint8_t *buffer);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
67
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_rtc.h
Normal file
67
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_rtc.h
Normal file
@@ -0,0 +1,67 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_RTC_H
|
||||
#define __AIR105_RTC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
#define RTC_32K_EXT_INC_SELECT (0x00000400U)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SELECT_EXT32K,
|
||||
SELECT_INC32K
|
||||
} RTCCLK_SOURCE_TypeDef;
|
||||
#define IS_RTCCLK_SOURCE(FREQ) (((FREQ) == SELECT_EXT32K) || \
|
||||
((FREQ) == SELECT_INC32K))
|
||||
|
||||
FlagStatus RTC_IsReady(void);
|
||||
|
||||
void RTC_ResetCounter(void);
|
||||
uint32_t RTC_GetCounter(void);
|
||||
|
||||
void RTC_SetRefRegister(uint32_t RefValue);
|
||||
uint32_t RTC_GetRefRegister(void);
|
||||
|
||||
void RTC_SetAlarm(uint32_t AlarmValue);
|
||||
|
||||
uint32_t RTC_GetAttrackTime(void);
|
||||
|
||||
void RTC_ITConfig(FunctionalState NewState);
|
||||
void RTC_ClearITPendingBit(void);
|
||||
ITStatus RTC_GetITStatus(void);
|
||||
void RTC_CLKSourceSelect(RTCCLK_SOURCE_TypeDef source);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
54
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sci.h
Normal file
54
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sci.h
Normal file
@@ -0,0 +1,54 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_SCI_H
|
||||
#define __AIR105_SCI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "air105.h"
|
||||
#include <arm_math.h>
|
||||
|
||||
|
||||
#define SCI_UNCONFIG (-1)
|
||||
#define SCI_ICC_CLOCK_ERR (-2)
|
||||
#define SCI_REF_CLOCK_ERR (-3)
|
||||
#define SCI_IMPRECISION_CLK (-4)
|
||||
#define SCI_EMV_F_D_ERR (-5)
|
||||
#define SCI_EMV_TS_ERR (-6)
|
||||
#define SCI_EMV_ATR_ERR (-7)
|
||||
#define SCI_CARD_OUT_ERR (-8)
|
||||
|
||||
|
||||
int32_t SCI_ConfigEMV(uint8_t SCI_Bitmap, uint32_t SCIx_Clk);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif ///< __AIR105_SCI_H
|
||||
|
||||
229
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sensor.h
Normal file
229
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sensor.h
Normal file
@@ -0,0 +1,229 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_SENSOR_H
|
||||
#define __AIR105_SENSOR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SENSOR_Port_Pull;
|
||||
uint32_t SENSOR_Port_Static;
|
||||
uint32_t SENSOR_Port_Dynamic;
|
||||
FunctionalState SENSOR_Port_Enable;
|
||||
uint32_t SENSOR_DynamicFrequency;
|
||||
FunctionalState SENSOR_GlitchEnable;
|
||||
uint32_t SENSOR_PUPU_Frequency;
|
||||
uint32_t SENSOR_PUPU_DetectTime;
|
||||
uint32_t SENSOR_PUPU_HoldTime;
|
||||
FunctionalState SENSOR_PUPU_Enable;
|
||||
FunctionalState SENSOR_Trig_Hold_Enable;
|
||||
uint32_t SENSOR_Dynamic_Sample;
|
||||
uint32_t SENSOR_Static_Sample;
|
||||
|
||||
}SENSOR_EXTInitTypeDef;
|
||||
|
||||
#define SENSOR_Port_S0 ((uint32_t)0x0001)
|
||||
#define SENSOR_Port_S1 ((uint32_t)0x0002)
|
||||
#define SENSOR_Port_S2 ((uint32_t)0x0004)
|
||||
#define SENSOR_Port_S3 ((uint32_t)0x0008)
|
||||
#define SENSOR_Port_S4 ((uint32_t)0x0010)
|
||||
#define SENSOR_Port_S5 ((uint32_t)0x0020)
|
||||
#define SENSOR_Port_S6 ((uint32_t)0x0040)
|
||||
#define SENSOR_Port_S7 ((uint32_t)0x0080)
|
||||
#define SENSOR_Port_All ((uint32_t)0x00FF)
|
||||
|
||||
#define SENSOR_Port_S01 (SENSOR_Port_S0 | SENSOR_Port_S1)
|
||||
#define SENSOR_Port_S23 (SENSOR_Port_S2 | SENSOR_Port_S3)
|
||||
#define SENSOR_Port_S45 (SENSOR_Port_S4 | SENSOR_Port_S5)
|
||||
#define SENSOR_Port_S67 (SENSOR_Port_S6 | SENSOR_Port_S7)
|
||||
#define IS_SENSOR_PORT(PORT) ((((PORT) & (uint32_t)0xFFFFFF00) == 0x00) && ((PORT) != (uint32_t)0x00))
|
||||
|
||||
/* <20>ⲿ<EFBFBD><E2B2BF>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5> */
|
||||
#define SENSOR_PUPU_Frequency_Default ((uint32_t)0x0000)
|
||||
#define SENSOR_PUPU_Frequency_500ms ((uint32_t)0x0000)
|
||||
#define SENSOR_PUPU_Frequency_1s ((uint32_t)0x0001)
|
||||
#define IS_SENSOR_EXT_PUPU_FREQ(FREQ) ((FREQ) == SENSOR_PUPU_Frequency_500ms ||\
|
||||
(FREQ) == SENSOR_PUPU_Frequency_1s)
|
||||
|
||||
/* <20>ⲿ<EFBFBD><E2B2BF>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define SENSOR_STATIC_SAMPLE_Default ((uint32_t)0x0001)
|
||||
#define SENSOR_STATIC_SAMPLE_1 ((uint32_t)0x0000)
|
||||
#define SENSOR_STATIC_SAMPLE_2 ((uint32_t)0x0001)
|
||||
#define SENSOR_STATIC_SAMPLE_3 ((uint32_t)0x0002)
|
||||
#define SENSOR_STATIC_SAMPLE_4 ((uint32_t)0x0003)
|
||||
#define IS_SENSOR_EXT_STATIC_SAMPLE(COUNT) ((COUNT) >= SENSOR_STATIC_SAMPLE_1 &&\
|
||||
(COUNT) <= SENSOR_STATIC_SAMPLE_4)
|
||||
|
||||
/* <20>ⲿ<EFBFBD><E2B2BF>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||
#define SENSOR_DYNAMIC_SAMPLE_Default ((uint32_t)0x0002)
|
||||
#define SENSOR_DYNAMIC_SAMPLE_1 ((uint32_t)0x0000)
|
||||
#define SENSOR_DYNAMIC_SAMPLE_2 ((uint32_t)0x0001)
|
||||
#define SENSOR_DYNAMIC_SAMPLE_3 ((uint32_t)0x0002)
|
||||
#define SENSOR_DYNAMIC_SAMPLE_4 ((uint32_t)0x0003)
|
||||
#define IS_SENSOR_EXT_DYNAMIC_SAMPLE(COUNT) ((COUNT) >= SENSOR_DYNAMIC_SAMPLE_1 &&\
|
||||
(COUNT) <= SENSOR_DYNAMIC_SAMPLE_4)
|
||||
|
||||
|
||||
/* <20>ⲿ<EFBFBD><E2B2BF>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>裬<EFBFBD><E8A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чʱ<D0A7><CAB1> */
|
||||
#define SENSOR_PUPU_HoldTime_Default ((uint32_t)0x0002)
|
||||
#define SENSOR_PUPU_HoldTime_1_2 ((uint32_t)0x0000)
|
||||
#define SENSOR_PUPU_HoldTime_1_4 ((uint32_t)0x0001)
|
||||
#define SENSOR_PUPU_HoldTime_1_8 ((uint32_t)0x0002)
|
||||
#define SENSOR_PUPU_HoldTime_1_16 ((uint32_t)0x0003)
|
||||
#define IS_SENSOR_EXT_PUPU_HOLD_TIME(TIME) ((TIME) == SENSOR_PUPU_HoldTime_1_2 ||\
|
||||
(TIME) == SENSOR_PUPU_HoldTime_1_4 ||\
|
||||
(TIME) == SENSOR_PUPU_HoldTime_1_8 ||\
|
||||
(TIME) == SENSOR_PUPU_HoldTime_1_16)
|
||||
|
||||
/* <20><>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5> */
|
||||
#define SENSOR_DynamicFrequency_Default ((uint32_t)0x0003)
|
||||
#define SENSOR_DynamicFrequency_31_25ms ((uint32_t)0x0000)
|
||||
#define SENSOR_DynamicFrequency_125ms ((uint32_t)0x0001)
|
||||
#define SENSOR_DynamicFrequency_500ms ((uint32_t)0x0002)
|
||||
#define SENSOR_DynamicFrequency_1s ((uint32_t)0x0003)
|
||||
#define IS_SENSOR_EXT_DYNAMIC_FREQ(FREQ) ((FREQ) == SENSOR_DynamicFrequency_Default ||\
|
||||
(FREQ) == SENSOR_DynamicFrequency_31_25ms ||\
|
||||
(FREQ) == SENSOR_DynamicFrequency_125ms ||\
|
||||
(FREQ) == SENSOR_DynamicFrequency_500ms ||\
|
||||
(FREQ) == SENSOR_DynamicFrequency_1s)
|
||||
|
||||
|
||||
#define SENSOR_ANA_VOL_HIGH ((uint32_t)0x00000001)
|
||||
#define SENSOR_ANA_VOL_LOW ((uint32_t)0x00000002)
|
||||
#define SENSOR_ANA_TEMPER_HIGH ((uint32_t)0x00000004)
|
||||
#define SENSOR_ANA_TEMPER_LOW ((uint32_t)0x00000008)
|
||||
#define SENSOR_ANA_XTAL32K ((uint32_t)0x00000010)
|
||||
#define SENSOR_ANA_MESH ((uint32_t)0x00000020)
|
||||
#define SENSOR_ANA_VOLGLITCH ((uint32_t)0x00000040)
|
||||
#define SENSOR_ANA_ALL ((uint32_t)0x0000007F)
|
||||
#define IS_SENSOR_ANA(ANA) ((((ANA) & (uint32_t)0xFFFFFF80) == 0x00) && ((ANA) != (uint32_t)0x00))
|
||||
|
||||
#define SENSOR_LOCK_EXTS ((uint32_t)0x00000001)
|
||||
#define SENSOR_LOCK_VOL_HIGH ((uint32_t)0x00000002)
|
||||
#define SENSOR_LOCK_VOL_LOW ((uint32_t)0x00000004)
|
||||
#define SENSOR_LOCK_TEMPER_HIGH ((uint32_t)0x00000008)
|
||||
#define SENSOR_LOCK_TEMPER_LOW ((uint32_t)0x00000010)
|
||||
#define SENSOR_LOCK_VOLGLITCH ((uint32_t)0x00000020)
|
||||
#define SENSOR_LOCK_XTAL32K ((uint32_t)0x00000040)
|
||||
#define SENSOR_LOCK_MESH ((uint32_t)0x00000080)
|
||||
#define IS_SENSOR_LOCK(LOCK) ((((LOCK) & (uint32_t)0xFFFFFF00) == 0x00) && ((LOCK) != (uint32_t)0x00))
|
||||
|
||||
|
||||
#define SENSOR_IT_EXTS ((uint32_t)0x00000FFF)
|
||||
#define SENSOR_IT_VOL_HIGH ((uint32_t)0x00001000)
|
||||
#define SENSOR_IT_VOL_LOW ((uint32_t)0x00002000)
|
||||
#define SENSOR_IT_TEMPER_HIGH ((uint32_t)0x00004000)
|
||||
#define SENSOR_IT_TEMPER_LOW ((uint32_t)0x00008000)
|
||||
#define SENSOR_IT_GLITCH ((uint32_t)0x00010000)
|
||||
#define SENSOR_IT_XTAL32K ((uint32_t)0x00020000)
|
||||
#define SENSOR_IT_MESH ((uint32_t)0x00040000)
|
||||
#define SENSOR_IT_SSC ((uint32_t)0x00100000)
|
||||
#define IS_SENSOR_IT(IT) ((IT) == SENSOR_IT_EXTS || \
|
||||
(IT) == SENSOR_IT_VOL_HIGH || \
|
||||
(IT) == SENSOR_IT_VOL_LOW || \
|
||||
(IT) == SENSOR_IT_TEMPER_HIGH || \
|
||||
(IT) == SENSOR_IT_TEMPER_LOW || \
|
||||
(IT) == SENSOR_IT_GLITCH || \
|
||||
(IT) == SENSOR_IT_XTAL32K || \
|
||||
(IT) == SENSOR_IT_MESH || \
|
||||
(IT) == SENSOR_IT_SSC)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SENSOR_CPUReset = 0,
|
||||
SENSOR_Interrupt = 1
|
||||
}SENSOR_RespModeTypeDef;
|
||||
#define IS_SENSOR_RESP_MODE(Mode) ((Mode) == SENSOR_CPUReset ||\
|
||||
(Mode) == SENSOR_Interrupt)
|
||||
|
||||
uint32_t SENSOR_SetRand(uint32_t Rand);
|
||||
uint32_t SENSOR_EXTInit(SENSOR_EXTInitTypeDef *SENSOR_EXTInitStruct);
|
||||
uint32_t SENSOR_EXTPortCmd(uint32_t SENSOR_Port, FunctionalState NewState);
|
||||
uint32_t SENSOR_EXTCmd(FunctionalState NewState);
|
||||
FlagStatus SENSOR_EXTIsRuning(void);
|
||||
uint32_t SENSOR_ANACmd(uint32_t SENSOR_ANA, FunctionalState NewState);
|
||||
void SENSOR_Lock(uint32_t SENSOR_LOCK);
|
||||
void SENSOR_AttackRespMode(SENSOR_RespModeTypeDef SENSOR_RespMode);
|
||||
|
||||
int32_t SENSOR_GetITStatus(uint32_t ITState);
|
||||
int32_t SENSOR_GetITStatusReg(void);
|
||||
void SENSOR_ClearITPendingBit(void);
|
||||
|
||||
|
||||
FunctionalState SENSOR_GetEXTTrigPull(void);
|
||||
FunctionalState SENSOR_SetEXTTrigPull(FunctionalState NewState);
|
||||
|
||||
FunctionalState SENSOR_GetEXTFilter(void);
|
||||
FunctionalState SENSOR_SetEXTFilter(FunctionalState NewState);
|
||||
|
||||
|
||||
#define SENSOR_STATIC_PULSE_PERIOD_500MS (0)
|
||||
#define SENSOR_STATIC_PULSE_PERIOD_1S (1)
|
||||
|
||||
uint32_t SENSOR_GetEXTPulsePeriod(void);
|
||||
uint32_t SENSOR_SetEXTPulsePeriod(uint32_t u32Period);
|
||||
|
||||
|
||||
|
||||
#define SENSOR_STATIC_PULSE_HOLD_1_2 (0)
|
||||
#define SENSOR_STATIC_PULSE_HOLD_1_4 (1)
|
||||
#define SENSOR_STATIC_PULSE_HOLD_1_8 (2)
|
||||
#define SENSOR_STATIC_PULSE_HOLD_1_16 (3)
|
||||
|
||||
uint32_t SENSOR_GetEXTPulseHold(void);
|
||||
uint32_t SENSOR_SetEXTPulseHold(uint32_t u32Hold);
|
||||
|
||||
|
||||
FunctionalState SENSOR_GetEXTPulsePull(void);
|
||||
FunctionalState SENSOR_SetEXTPulsePull(FunctionalState NewState);
|
||||
|
||||
|
||||
#define SENSOR_SAMPLE_COUNT_1 (0)
|
||||
#define SENSOR_SAMPLE_COUNT_2 (1)
|
||||
#define SENSOR_SAMPLE_COUNT_3 (2)
|
||||
#define SENSOR_SAMPLE_COUNT_4 (3)
|
||||
|
||||
|
||||
uint32_t SENSOR_GetEXTStaticSample(void);
|
||||
uint32_t SENSOR_SetEXTStaticSample(uint32_t u32Count);
|
||||
uint32_t SENSOR_GetEXTDynamicSample(void);
|
||||
uint32_t SENSOR_SetEXTDynamicSample(uint32_t u32Count);
|
||||
|
||||
|
||||
uint32_t SENSOR_GetEXTDynamicFreq(void);
|
||||
uint32_t SENSOR_SetEXTDynamicFreq(uint32_t u32Freq);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
497
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_spi.h
Normal file
497
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_spi.h
Normal file
@@ -0,0 +1,497 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_SPI_H
|
||||
#define __AIR105_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
#define SPI_DMACR_RDMAE_Pos (0)
|
||||
#define SPI_DMACR_RDMAE_Mask (0x01U << SPI_DMACR_RDMAE_Pos)
|
||||
|
||||
#define SPI_DMACR_TDMAE_Pos (1)
|
||||
#define SPI_DMACR_TDMAE_Mask (0x01U << SPI_DMACR_TDMAE_Pos)
|
||||
|
||||
|
||||
/** @defgroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be a value of @ref SPI_data_direction */
|
||||
uint32_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
uint32_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint32_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
uint32_t SPI_RXFIFOFullThreshold;
|
||||
|
||||
uint32_t SPI_TXFIFOEmptyThreshold;
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Texas Instruments Synchronous Serial Protocol (SSP) Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SSP_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be a value of @ref SPI_data_direction */
|
||||
|
||||
uint32_t SSP_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint32_t SSP_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t SSP_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint32_t SSP_RXFIFOFullThreshold;
|
||||
|
||||
uint32_t SSP_TXFIFOEmptyThreshold;
|
||||
}SSP_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief National Semiconductor Microwire (NSM) Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t NSM_Direction;
|
||||
|
||||
uint32_t NSM_TransferMode;
|
||||
|
||||
uint32_t NSM_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
uint32_t NSM_ControlDataSize;
|
||||
|
||||
uint32_t NSM_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t NSM_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
FunctionalState NSM_HandShakingCmd;
|
||||
|
||||
uint32_t NSM_RXFIFOFullThreshold;
|
||||
|
||||
uint32_t NSM_TXFIFOEmptyThreshold;
|
||||
}NSM_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SPI DMA Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SPI_DMAReq;
|
||||
uint32_t SPI_DMAReceiveLevel;
|
||||
uint32_t SPI_DMATransmitLevel;
|
||||
FunctionalState SPI_DMAEnCmd;
|
||||
}SPI_DMAInitTypeDef;
|
||||
|
||||
|
||||
/** @defgroup SPI_data_direction
|
||||
* @{
|
||||
*/
|
||||
#define SPI_Direction_2Lines_FullDuplex ((uint32_t)0x0000)
|
||||
#define SPI_Direction_1Line_Tx ((uint32_t)0x0100)
|
||||
#define SPI_Direction_1Line_Rx ((uint32_t)0x0200)
|
||||
#define SPI_Direction_EEPROM_Read ((uint32_t)0x0300)
|
||||
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||
((MODE) == SPI_Direction_1Line_Tx) || \
|
||||
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||
((MODE) == SPI_Direction_EEPROM_Read))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define SPI_Mode_Master ((uint32_t)0x0001)
|
||||
#define SPI_Mode_Slave ((uint32_t)0x0000)
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||
((MODE) == SPI_Mode_Slave))
|
||||
|
||||
/** @defgroup SPI_data_size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DataSize_8b ((uint32_t)0x0007)
|
||||
#define SPI_DataSize_16b ((uint32_t)0x000F)
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||
((DATASIZE) == SPI_DataSize_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPOL_Low ((uint32_t)0x0000)
|
||||
#define SPI_CPOL_High ((uint32_t)0x0080)
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||
((CPOL) == SPI_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CPHA_1Edge ((uint32_t)0x0000)
|
||||
#define SPI_CPHA_2Edge ((uint32_t)0x0040)
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||
((CPHA) == SPI_CPHA_2Edge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define SPI_NSS_0 ((uint32_t)0x0001)
|
||||
#define SPI_NSS_Null ((uint32_t)0x0000)
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_0) || \
|
||||
((NSS) == SPI_NSS_Null))
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BaudRatePrescaler_2 ((uint32_t)0x0002)
|
||||
#define SPI_BaudRatePrescaler_4 ((uint32_t)0x0004)
|
||||
#define SPI_BaudRatePrescaler_8 ((uint32_t)0x0008)
|
||||
#define SPI_BaudRatePrescaler_16 ((uint32_t)0x0010)
|
||||
#define SPI_BaudRatePrescaler_32 ((uint32_t)0x0020)
|
||||
#define SPI_BaudRatePrescaler_64 ((uint32_t)0x0040)
|
||||
#define SPI_BaudRatePrescaler_128 ((uint32_t)0x0080)
|
||||
#define SPI_BaudRatePrescaler_256 ((uint32_t)0x0100)
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_RXFIFOFullThreshold
|
||||
* @{
|
||||
*/
|
||||
#define SPI_RXFIFOFullThreshold_1 ((uint32_t)0x0000)
|
||||
#define SPI_RXFIFOFullThreshold_2 ((uint32_t)0x0001)
|
||||
#define SPI_RXFIFOFullThreshold_3 ((uint32_t)0x0002)
|
||||
#define SPI_RXFIFOFullThreshold_4 ((uint32_t)0x0003)
|
||||
#define SPI_RXFIFOFullThreshold_5 ((uint32_t)0x0004)
|
||||
#define SPI_RXFIFOFullThreshold_6 ((uint32_t)0x0005)
|
||||
#define SPI_RXFIFOFullThreshold_7 ((uint32_t)0x0006)
|
||||
#define SPI_RXFIFOFullThreshold_8 ((uint32_t)0x0007)
|
||||
#define SPI_RXFIFOFullThreshold_9 ((uint32_t)0x0008)
|
||||
#define SPI_RXFIFOFullThreshold_10 ((uint32_t)0x0009)
|
||||
#define SPI_RXFIFOFullThreshold_11 ((uint32_t)0x000A)
|
||||
#define SPI_RXFIFOFullThreshold_12 ((uint32_t)0x000B)
|
||||
#define SPI_RXFIFOFullThreshold_13 ((uint32_t)0x000C)
|
||||
#define SPI_RXFIFOFullThreshold_14 ((uint32_t)0x000D)
|
||||
#define SPI_RXFIFOFullThreshold_15 ((uint32_t)0x000E)
|
||||
#define SPI_RXFIFOFullThreshold_16 ((uint32_t)0x000F)
|
||||
|
||||
#define IS_SPI_RX_FIFO_FULL_THRESHOLD(THRESHOLD) (((THRESHOLD) == SPI_RXFIFOFullThreshold_1) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_2) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_3) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_4) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_5) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_6) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_7) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_8) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_9) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_10) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_11) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_12) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_13) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_14) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_15) || \
|
||||
((THRESHOLD) == SPI_RXFIFOFullThreshold_16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TXFIFOEmptyThreshold
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TXFIFOEmptyThreshold_0 ((uint32_t)0x0000)
|
||||
#define SPI_TXFIFOEmptyThreshold_1 ((uint32_t)0x0001)
|
||||
#define SPI_TXFIFOEmptyThreshold_2 ((uint32_t)0x0002)
|
||||
#define SPI_TXFIFOEmptyThreshold_3 ((uint32_t)0x0003)
|
||||
#define SPI_TXFIFOEmptyThreshold_4 ((uint32_t)0x0004)
|
||||
#define SPI_TXFIFOEmptyThreshold_5 ((uint32_t)0x0005)
|
||||
#define SPI_TXFIFOEmptyThreshold_6 ((uint32_t)0x0006)
|
||||
#define SPI_TXFIFOEmptyThreshold_7 ((uint32_t)0x0007)
|
||||
#define SPI_TXFIFOEmptyThreshold_8 ((uint32_t)0x0008)
|
||||
#define SPI_TXFIFOEmptyThreshold_9 ((uint32_t)0x0009)
|
||||
#define SPI_TXFIFOEmptyThreshold_10 ((uint32_t)0x000A)
|
||||
#define SPI_TXFIFOEmptyThreshold_11 ((uint32_t)0x000B)
|
||||
#define SPI_TXFIFOEmptyThreshold_12 ((uint32_t)0x000C)
|
||||
#define SPI_TXFIFOEmptyThreshold_13 ((uint32_t)0x000D)
|
||||
#define SPI_TXFIFOEmptyThreshold_14 ((uint32_t)0x000E)
|
||||
#define SPI_TXFIFOEmptyThreshold_15 ((uint32_t)0x000F)
|
||||
|
||||
#define IS_SPI_TX_FIFO_EMPTY_THRESHOLD(THRESHOLD) (((THRESHOLD) == SPI_TXFIFOEmptyThreshold_0) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_1) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_2) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_3) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_4) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_5) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_6) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_7) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_8) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_9) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_10) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_11) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_12) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_13) || \
|
||||
((THRESHOLD) == SPI_TXFIFOEmptyThreshold_14) || \
|
||||
((THRESHOLD) <= SPI_TXFIFOEmptyThreshold_15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_DMAReceiveLevel
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DMAReceiveLevel_1 ((uint32_t)0x0000)
|
||||
#define SPI_DMAReceiveLevel_2 ((uint32_t)0x0001)
|
||||
#define SPI_DMAReceiveLevel_3 ((uint32_t)0x0002)
|
||||
#define SPI_DMAReceiveLevel_4 ((uint32_t)0x0003)
|
||||
#define SPI_DMAReceiveLevel_5 ((uint32_t)0x0004)
|
||||
#define SPI_DMAReceiveLevel_6 ((uint32_t)0x0005)
|
||||
#define SPI_DMAReceiveLevel_7 ((uint32_t)0x0006)
|
||||
#define SPI_DMAReceiveLevel_8 ((uint32_t)0x0007)
|
||||
#define SPI_DMAReceiveLevel_9 ((uint32_t)0x0008)
|
||||
#define SPI_DMAReceiveLevel_10 ((uint32_t)0x0009)
|
||||
#define SPI_DMAReceiveLevel_11 ((uint32_t)0x000A)
|
||||
#define SPI_DMAReceiveLevel_12 ((uint32_t)0x000B)
|
||||
#define SPI_DMAReceiveLevel_13 ((uint32_t)0x000C)
|
||||
#define SPI_DMAReceiveLevel_14 ((uint32_t)0x000D)
|
||||
#define SPI_DMAReceiveLevel_15 ((uint32_t)0x000E)
|
||||
#define SPI_DMAReceiveLevel_16 ((uint32_t)0x000F)
|
||||
|
||||
#define IS_SPI_DMA_RECEIVE_LEVEL(LEVEL) ((((int32_t)(LEVEL)) >= SPI_DMAReceiveLevel_1) && \
|
||||
(((int32_t)(LEVEL)) <= SPI_DMAReceiveLevel_16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_DMATransmitLevel
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DMATransmitLevel_0 ((uint32_t)0x0000)
|
||||
#define SPI_DMATransmitLevel_1 ((uint32_t)0x0001)
|
||||
#define SPI_DMATransmitLevel_2 ((uint32_t)0x0002)
|
||||
#define SPI_DMATransmitLevel_3 ((uint32_t)0x0003)
|
||||
#define SPI_DMATransmitLevel_4 ((uint32_t)0x0004)
|
||||
#define SPI_DMATransmitLevel_5 ((uint32_t)0x0005)
|
||||
#define SPI_DMATransmitLevel_6 ((uint32_t)0x0006)
|
||||
#define SPI_DMATransmitLevel_7 ((uint32_t)0x0007)
|
||||
#define SPI_DMATransmitLevel_8 ((uint32_t)0x0008)
|
||||
#define SPI_DMATransmitLevel_9 ((uint32_t)0x0009)
|
||||
#define SPI_DMATransmitLevel_10 ((uint32_t)0x000A)
|
||||
#define SPI_DMATransmitLevel_11 ((uint32_t)0x000B)
|
||||
#define SPI_DMATransmitLevel_12 ((uint32_t)0x000C)
|
||||
#define SPI_DMATransmitLevel_13 ((uint32_t)0x000D)
|
||||
#define SPI_DMATransmitLevel_14 ((uint32_t)0x000E)
|
||||
#define SPI_DMATransmitLevel_15 ((uint32_t)0x000F)
|
||||
|
||||
#define IS_SPI_DMA_TRANSMIT_LEVEL(LEVEL) ((((int32_t)(LEVEL)) >= SPI_DMATransmitLevel_0) && \
|
||||
(((int32_t)(LEVEL)) <= SPI_DMATransmitLevel_15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DMAReq_Rx ((uint32_t)0x0001)
|
||||
#define SPI_DMAReq_Tx ((uint32_t)0x0002)
|
||||
#define IS_SPI_DMAREQ(DMAREQ) ((((DMAREQ) & (uint32_t)0xFFFC) == (uint32_t)0x00) && \
|
||||
((DMAREQ) != (uint32_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt Mask and Status Flag
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE ((uint32_t)0x0001) //clear by hardware
|
||||
#define SPI_IT_TXOVF ((uint32_t)0x0002) //clear by read TXOICR register
|
||||
#define SPI_IT_RXF ((uint32_t)0x0010) //clear by hardware
|
||||
#define SPI_IT_RXOVF ((uint32_t)0x0008) //clear by read RXOICR register
|
||||
#define SPI_IT_RXUDF ((uint32_t)0x0004) //clear by read RXURCR register
|
||||
#define SPI_IT_MMC ((uint32_t)0x0020) //clear by read MSTICR register
|
||||
#define SPI_IT_All ((uint32_t)0x002E)
|
||||
#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_TXE) || \
|
||||
((IT) == SPI_IT_TXOVF) || \
|
||||
((IT) == SPI_IT_RXF) || \
|
||||
((IT) == SPI_IT_RXUDF) || \
|
||||
((IT) == SPI_IT_RXOVF) || \
|
||||
((IT) == SPI_IT_MMC))
|
||||
|
||||
#define SPI_FLAG_BSY ((uint32_t)0x0001)
|
||||
#define SPI_FLAG_TXNF ((uint32_t)0x0002) //clear by hardware
|
||||
#define SPI_FLAG_TXE ((uint32_t)0x0004) //clear by hardware
|
||||
#define SPI_FLAG_RXNE ((uint32_t)0x0008) //clear by hardware
|
||||
#define SPI_FLAG_RXF ((uint32_t)0x0010) //clear by hardware
|
||||
#define SPI_FLAG_TXERR ((uint32_t)0x0020) //read clear
|
||||
#define SPI_FLAG_DCERR ((uint32_t)0x0040) //read clear
|
||||
#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_SR_RFNE) || \
|
||||
((FLAG) == SPI_SR_RFF) || \
|
||||
((FLAG) == SPI_SR_TFE) || \
|
||||
((FLAG) == SPI_SR_TFNF) || \
|
||||
((FLAG) == SPI_SR_BUSY))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup NSM_Direction
|
||||
* @{
|
||||
*/
|
||||
#define NSM_Direction_Data_Transmit ((uint32_t)(0x0001))
|
||||
#define NSM_Direction_Data_Receive ((uint32_t)(0x0002))
|
||||
#define IS_NSM_DIRECTION_MODE(MODE) (((MODE) == NSM_Direction_Data_Transmit) || \
|
||||
((MODE) == NSM_Direction_Data_Receive))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup NSM_TransferMode
|
||||
* @{
|
||||
*/
|
||||
#define NSM_TransferMode_Non_Sequential ((uint32_t)(0x0001))
|
||||
#define NSM_TransferMode_Sequential ((uint32_t)(0x0002))
|
||||
#define IS_NSM_TRANSFER_MODE(MODE) (((MODE) == NSM_TransferMode_Non_Sequential) || \
|
||||
((MODE) == NSM_TransferMode_Sequential))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup NSM_DataSize
|
||||
* @{
|
||||
*/
|
||||
#define NSM_DataSize_8b ((uint32_t)0x0007)
|
||||
#define NSM_DataSize_16b ((uint32_t)0x000F)
|
||||
#define IS_NSM_DATASIZE(DATASIZE) (((DATASIZE) == NSM_DataSize_8b) || \
|
||||
((DATASIZE) == NSM_DataSize_16b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup NSM_ControlDataSize
|
||||
* @{
|
||||
*/
|
||||
#define NSM_ControlDataSize_8b ((uint32_t)0x0007)
|
||||
#define NSM_ControlDataSize_16b ((uint32_t)0x000F)
|
||||
#define IS_NSM_CONTROL_DATASIZE(DATASIZE) (((DATASIZE) == NSM_ControlDataSize_8b) || \
|
||||
((DATASIZE) == NSM_ControlDataSize_16b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
void SPI_DeInit(SPI_TypeDef* SPIx);
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
|
||||
void SPI_DMAInit(SPI_TypeDef* SPIx, SPI_DMAInitTypeDef* SPI_DMAInitStruct);
|
||||
void SPI_DMAStructInit(SPI_DMAInitTypeDef* SPI_DMAInitStruct);
|
||||
void SPI_DMACmd(SPI_TypeDef* SPIx, uint32_t SPI_DMAReq, FunctionalState NewState);
|
||||
|
||||
void SPI_ITConfig(SPI_TypeDef* SPIx, uint32_t SPI_IT, FunctionalState NewState);
|
||||
void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint32_t SPI_DataSize);
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint32_t SPI_Direction);
|
||||
|
||||
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint32_t SPI_IT);
|
||||
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint32_t SPI_IT);
|
||||
|
||||
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint32_t SPI_FLAG);
|
||||
uint32_t SPI_GetFlagStatusReg(SPI_TypeDef* SPIx);
|
||||
|
||||
FlagStatus SPI_IsBusy(SPI_TypeDef* SPIx);
|
||||
FlagStatus SPI_IsTXErr(SPI_TypeDef* SPIx);
|
||||
FlagStatus SPI_IsDataCollisionErr(SPI_TypeDef* SPIx);
|
||||
|
||||
void SSP_Init(SPI_TypeDef* SPIx, SSP_InitTypeDef* SSP_InitStruct);
|
||||
void SSP_StructInit(SSP_InitTypeDef* SSP_InitStruct);
|
||||
|
||||
void NSM_Init(SPI_TypeDef* SPIx, NSM_InitTypeDef* NSM_InitStruct);
|
||||
void NSM_StructInit(NSM_InitTypeDef* NSM_InitStruct);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /*__MSSCPU_SPI_H */
|
||||
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
159
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_ssc.h
Normal file
159
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_ssc.h
Normal file
@@ -0,0 +1,159 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_SSC_H
|
||||
#define __AIR105_SSC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
|
||||
#define SSC_ITSysXTAL12M BIT(18) //ϵͳ<CFB5><CDB3>12Mʱ<4D>ӱ<EFBFBD>־
|
||||
#define SSC_ITSysGlitch BIT(17) //<2F><><EFBFBD><EFBFBD>Դë<D4B4>̱<EFBFBD>־
|
||||
#define SSC_ITSysVolHigh BIT(16) //<2F><><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ѹ<EFBFBD><D1B9>־
|
||||
#define SSC_ITSysVolLow BIT(15) //<2F><><EFBFBD><EFBFBD>ԴǷѹ<C7B7><D1B9>־
|
||||
|
||||
typedef struct
|
||||
{
|
||||
FunctionalState ParityCheck; //<2F><>żУ<C5BC><D0A3>ʹ<EFBFBD><CAB9>
|
||||
}SSC_InitTypeDef;
|
||||
|
||||
|
||||
/*
|
||||
* <20><>BPK<50><4B>Ϊ4<CEAA><34>ÿ<EFBFBD><C3BF>256<35><36><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>λ<EFBFBD><CEBB><EFBFBD>ö<EFBFBD>дȨ<D0B4><C8A8>
|
||||
* SSC_BPKAccessCtrBlock_0Ϊ<30><CEAA>ʼ0<CABC><30>ַ<EFBFBD><D6B7>
|
||||
*/
|
||||
#define SSC_BPKAccessCtrBlock_0 (0x01)
|
||||
#define SSC_BPKAccessCtrBlock_1 (0x02)
|
||||
#define SSC_BPKAccessCtrBlock_All (0x03)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SSC_BPKReadOnly = 0x01, //BPK<50><4B>ֻ<EFBFBD><D6BB>
|
||||
SSC_BPKWriteOnly = 0x02, //BPK<50><4B>ֻд
|
||||
SSC_BPKReadWrite = 0x03 //BPK<50><4B><EFBFBD>д
|
||||
}SSC_BPKAccessCtrlTypeDef;
|
||||
#define IS_BPK_ACCESS_CTRL(CTRL) (((CTRL) == SSC_BPKReadOnly) || ((CTRL) == SSC_BPKWriteOnly) || \
|
||||
((CTRL) == SSC_BPKReadWrite))
|
||||
|
||||
#define SSC_SENSOR_XTAL12M ((uint32_t)0x00000001)
|
||||
#define SSC_SENSOR_VOL_LOW ((uint32_t)0x00000002)
|
||||
#define SSC_SENSOR_VOL_HIGH ((uint32_t)0x00000004)
|
||||
#define SSC_SENSOR_VOLGLITCH ((uint32_t)0x00000008)
|
||||
#define IS_SSC_SENSOR(SENSOR) ((((SENSOR) & (uint32_t)0xFFFFFFF0) == 0x00) && ((SENSOR) != (uint32_t)0x00))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SSC_SENSOR_CPUReset = 0,
|
||||
SSC_SENSOR_Interrupt = 1
|
||||
}SSC_SENSOR_RespModeTypeDef;
|
||||
#define IS_SSC_SENSOR_RESP_MODE(Mode) ((Mode) == SSC_SENSOR_CPUReset ||\
|
||||
(Mode) == SSC_SENSOR_Interrupt)
|
||||
|
||||
/**
|
||||
* @method SSC_Init
|
||||
* @brief SSC<53><43>ȫ<EFBFBD><C8AB><EFBFBD>Գ<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
* @param SSC_InitTypeDef SSC_InitStruct
|
||||
* @retval void
|
||||
*/
|
||||
void SSC_Init(SSC_InitTypeDef *SSC_InitStruct);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_GetITStatus
|
||||
* @brief SSC<53><43>ȫ<EFBFBD>ж<EFBFBD>״̬
|
||||
* @param uint32_t SSC_IT
|
||||
* @retval ITStatus
|
||||
*/
|
||||
ITStatus SSC_GetITStatus(uint32_t SSC_IT);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_ClearITPendingBit
|
||||
* @brief SSC<53><43>ȫ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>
|
||||
* @param uint32_t SSC_IT
|
||||
* @retval void
|
||||
*/
|
||||
void SSC_ClearITPendingBit( uint32_t SSC_IT);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_SetDataRAMScrambler
|
||||
* @brief <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RAM<41><4D><EFBFBD><EFBFBD>
|
||||
* @param uint32_t Scrambler
|
||||
* @retval void
|
||||
*/
|
||||
void SSC_SetDataRAMScrambler(uint32_t Scrambler);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_BPKAccessCtrConfig
|
||||
* @brief <20><><EFBFBD><EFBFBD>BPK<50><4B><EFBFBD><EFBFBD>Ȩ<EFBFBD><C8A8>
|
||||
* @param uint32_t SSC_BPKAccessCtrBlock
|
||||
* @param SSC_BPKAccessCtrlTypeDef SSC_BPKAccessCtr
|
||||
* @retval void
|
||||
*/
|
||||
void SSC_BPKAccessCtrlConfig(uint32_t SSC_BPKAccessCtrBlock, SSC_BPKAccessCtrlTypeDef SSC_BPKAccessCtr);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_SENSOR_Enable
|
||||
* @brief <20><><EFBFBD><EFBFBD>ϵͳSensor
|
||||
* @param SSC_SENSOR
|
||||
* @retval
|
||||
*/
|
||||
uint32_t SSC_SENSORCmd(uint32_t SSC_SENSOR, FunctionalState NewState);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_SENSORLock
|
||||
* @brief <20><><EFBFBD><EFBFBD>ϵͳSensor<6F><72><EFBFBD><EFBFBD>״̬
|
||||
* @param SSC_SENSOR
|
||||
* @retval
|
||||
*/
|
||||
void SSC_SENSORLock(uint32_t SSC_SENSOR);
|
||||
|
||||
|
||||
/**
|
||||
* @method SSC_SENSOR_AttackRespMode
|
||||
* @brief ϵͳSensor<6F><72>Ӧ<EFBFBD><D3A6>ʽ
|
||||
* @param SSC_SENSOR_RespMode
|
||||
* @retval
|
||||
*/
|
||||
void SSC_SENSORAttackRespMode(SSC_SENSOR_RespModeTypeDef SSC_SENSOR_RespMode);
|
||||
|
||||
|
||||
void SSC_SENSORKeyClearCmd(uint32_t SSC_SENSOR, FunctionalState KeyClearEn);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
138
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sysctrl.h
Normal file
138
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_sysctrl.h
Normal file
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_SYSCTRL_H
|
||||
#define __AIR105_SYSCTRL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
#define SYSCTRL_FREQ_SEL_POWERMODE_Pos (24)
|
||||
#define SYSCTRL_FREQ_SEL_POWERMODE_Mask (0x07 << SYSCTRL_FREQ_SEL_POWERMODE_Pos)
|
||||
#define SYSCTRL_FREQ_SEL_POWERMODE_CLOSE_CPU (0x00 << SYSCTRL_FREQ_SEL_POWERMODE_Pos)
|
||||
#define SYSCTRL_FREQ_SEL_POWERMODE_CLOSE_CPU_MEM (0x01 << SYSCTRL_FREQ_SEL_POWERMODE_Pos)
|
||||
|
||||
|
||||
/** @defgroup SYSCTRL_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t PLL_Frequency; /*!< returns PLL frequency expressed in Hz */
|
||||
uint32_t CPU_Frequency; /*!< returns CPU frequency expressed in Hz */
|
||||
uint32_t HCLK_Frequency; /*!< returns HCLK frequency expressed in Hz */
|
||||
uint32_t PCLK_Frequency; /*!< returns PCLK frequency expressed in Hz */
|
||||
}SYSCTRL_ClocksTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SleepMode_CpuOff = 0, /*!< CPU Sleep */
|
||||
SleepMode_DeepSleep, /*!< Deep Sleep */
|
||||
SleepMode_Invalid
|
||||
}SleepMode_TypeDef;
|
||||
#define IS_ALL_SLEEP_MODE(MODE) ((MODE) < SleepMode_Invalid)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SELECT_EXT12M,
|
||||
SELECT_INC12M
|
||||
} SYSCLK_SOURCE_TypeDef;
|
||||
#define IS_SYSCLK_SOURCE(FREQ) (((FREQ) == SELECT_EXT12M) || \
|
||||
((FREQ) == SELECT_INC12M))
|
||||
typedef enum
|
||||
{
|
||||
SYSCTRL_PLL_108MHz = (uint32_t)0x01,
|
||||
SYSCTRL_PLL_120MHz = (uint32_t)0x02,
|
||||
SYSCTRL_PLL_132MHz = (uint32_t)0x03,
|
||||
SYSCTRL_PLL_144MHz = (uint32_t)0x04,
|
||||
SYSCTRL_PLL_156MHz = (uint32_t)0x05,
|
||||
SYSCTRL_PLL_168MHz = (uint32_t)0x06,
|
||||
SYSCTRL_PLL_180MHz = (uint32_t)0x07,
|
||||
SYSCTRL_PLL_192MHz = (uint32_t)0x08,
|
||||
SYSCTRL_PLL_204MHz = (uint32_t)0x09
|
||||
}SYSCTRL_PLL_TypeDef;
|
||||
#define IS_PLL_FREQ(FREQ) (((FREQ) == SYSCTRL_PLL_108MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_120MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_132MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_144MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_156MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_168MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_180MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_192MHz) || \
|
||||
((FREQ) == SYSCTRL_PLL_204MHz))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define SYSCTRL_PLL_Div_None ((uint32_t)0x00)
|
||||
#define SYSCTRL_PLL_Div2 ((uint32_t)0x01)
|
||||
#define SYSCTRL_PLL_Div4 ((uint32_t)0x10)
|
||||
#define IS_GET_SYSCTRL_PLL_DIV(DIV) (((DIV) == SYSCTRL_PLL_Div_None) || \
|
||||
((DIV) == SYSCTRL_PLL_Div2) || \
|
||||
((DIV) == SYSCTRL_PLL_Div4))
|
||||
|
||||
#define SYSCTRL_HCLK_Div_None ((uint32_t)0x00)
|
||||
#define SYSCTRL_HCLK_Div2 ((uint32_t)0x01)
|
||||
#define IS_GET_SYSCTRL_HCLK_DIV(DIV) (((DIV) == SYSCTRL_HCLK_Div_None) || \
|
||||
((DIV) == SYSCTRL_HCLK_Div2))
|
||||
|
||||
#define SYSCTRL_PCLK_Div2 ((uint32_t)0x01)
|
||||
#define SYSCTRL_PCLK_Div4 ((uint32_t)0x02)
|
||||
#define IS_GET_SYSCTRL_PCLK_DIV(DIV) (((DIV) == SYSCTRL_PCLK_Div2) || \
|
||||
((DIV) == SYSCTRL_PCLK_Div4))
|
||||
|
||||
#define SYSCTRL_CHIP_SN_ADDR ((uint32_t)0x40008804)
|
||||
#define SYSCTRL_CHIP_SN_LEN ((uint32_t)0x10)
|
||||
|
||||
#define SYSCTRL_USB_DOWNLOAD_FLAG ((uint32_t)0X55)
|
||||
|
||||
void SYSCTRL_AHBPeriphClockCmd(uint32_t SYSCTRL_AHBPeriph, FunctionalState NewState);
|
||||
void SYSCTRL_AHBPeriphResetCmd(uint32_t SYSCTRL_AHBPeriph, FunctionalState NewState);
|
||||
void SYSCTRL_APBPeriphClockCmd(uint32_t SYSCTRL_APBPeriph, FunctionalState NewState);
|
||||
void SYSCTRL_APBPeriphResetCmd(uint32_t SYSCTRL_APBPeriph, FunctionalState NewState);
|
||||
|
||||
void SYSCTRL_EnterSleep(SleepMode_TypeDef SleepMode);
|
||||
|
||||
void SYSCTRL_SYSCLKSourceSelect(SYSCLK_SOURCE_TypeDef source_select);
|
||||
void SYSCTRL_PLLConfig(SYSCTRL_PLL_TypeDef PLL_Freq);
|
||||
void SYSCTRL_PLLDivConfig(uint32_t PLL_Div);
|
||||
void SYSCTRL_HCLKConfig(uint32_t HCLK_Div);
|
||||
void SYSCTRL_PCLKConfig(uint32_t PCLK_Div);
|
||||
|
||||
void SYSCTRL_GetClocksFreq(SYSCTRL_ClocksTypeDef* SYSCTRL_Clocks);
|
||||
void SYSCTRL_GetChipSN(unsigned char *ChipSN);
|
||||
|
||||
void SYSCTRL_SoftReset(void);
|
||||
void SYSCTRL_EnterUSBDownload(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
96
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_timer.h
Normal file
96
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_timer.h
Normal file
@@ -0,0 +1,96 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_TIMER_H
|
||||
#define __AIR105_TIMER_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
typedef enum
|
||||
{
|
||||
TIM_0 = 0,
|
||||
TIM_1,
|
||||
TIM_2,
|
||||
TIM_3,
|
||||
TIM_4,
|
||||
TIM_5,
|
||||
TIM_6,
|
||||
TIM_7,
|
||||
}TIM_NumTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
TIM_NumTypeDef TIMx;
|
||||
uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
||||
Auto-Reload Register at the next update event.
|
||||
This parameter must be a number between 0x0000 and 0xFFFFFFFF. */
|
||||
}TIM_InitTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
TIM_NumTypeDef TIMx;
|
||||
uint32_t TIM_LowLevelPeriod;
|
||||
uint32_t TIM_HighLevelPeriod;
|
||||
}TIM_PWMInitTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TIM_Mode_General = 0,
|
||||
TIM_Mode_PWM = 1
|
||||
}TIM_ModeTypeDef;
|
||||
#define IS_TIM_MODE(MODE) (MODE == TIM_Mode_General || MODE == TIM_Mode_PWM)
|
||||
|
||||
|
||||
void TIM_DeInit(TIM_Module_TypeDef *TIMMx);
|
||||
void TIM_Init(TIM_Module_TypeDef* TIMMx, TIM_InitTypeDef* TIM_InitStruct);
|
||||
|
||||
void TIM_PWMInit(TIM_Module_TypeDef* TIMMx, TIM_PWMInitTypeDef* TIM_PWMInitStruct);
|
||||
void TIM_Cmd(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, FunctionalState NewState);
|
||||
void TIM_ModeConfig(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, TIM_ModeTypeDef TIM_Mode);
|
||||
void TIM_SetPeriod(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, uint32_t Period);
|
||||
void TIM_SetPWMPeriod(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, uint32_t PWM_LowLevelPeriod, uint32_t PWM_HighLevelPeriod);
|
||||
void TIM_ITConfig(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, FunctionalState NewState);
|
||||
void TIM_ClearITPendingBit(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx);
|
||||
void TIM_PWMSinglePulseConfig(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx, FunctionalState NewState);
|
||||
void TIM_PWMReloadSinglePulse(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx);
|
||||
|
||||
ITStatus TIM_GetITStatus(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx);
|
||||
uint32_t TIM_GetAllITStatus(TIM_Module_TypeDef* TIMMx);
|
||||
ITStatus TIM_GetRawITStatus(TIM_Module_TypeDef* TIMMx, TIM_NumTypeDef TIMx);
|
||||
uint32_t TIM_GetAllRawITStatus(TIM_Module_TypeDef* TIMMx);
|
||||
|
||||
uint32_t TIM_GetCounter(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
68
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_trng.h
Normal file
68
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_trng.h
Normal file
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_TRNG_H
|
||||
#define __AIR105_TRNG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/** @defgroup RNG_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum{
|
||||
TRNG0
|
||||
} TRNG_ChannelTypeDef;
|
||||
#define IS_TRNG_CHANNEL(CHANNEL) (((CHANNEL) == TRNG0))
|
||||
|
||||
|
||||
#define TRNG_IT_RNG0_S128 ((uint32_t)0x00000001)
|
||||
#define TRNG_IT_RNG0_ATTACK ((uint32_t)0x00000004)
|
||||
#define IS_TRNG_GET_IT(IT) (((IT) == TRNG_IT_RNG0_S128) || \
|
||||
((IT) == TRNG_IT_RNG0_ATTACK))
|
||||
|
||||
/** @defgroup RNG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void TRNG_Start(TRNG_ChannelTypeDef TRNGx);
|
||||
void TRNG_Stop(TRNG_ChannelTypeDef TRNGx);
|
||||
uint32_t TRNG_Get(uint32_t rand[4], TRNG_ChannelTypeDef TRNGx);
|
||||
void TRNG_SetPseudoRandom(uint32_t PseudoRandom);
|
||||
void TRNG_DirectOutANA(TRNG_ChannelTypeDef TRNGx, FunctionalState NewState);
|
||||
|
||||
void TRNG_ITConfig(FunctionalState NewState);
|
||||
ITStatus TRNG_GetITStatus(uint32_t TRNG_IT);
|
||||
void TRNG_ClearITPendingBit(uint32_t TRNG_IT);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
299
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_uart.h
Normal file
299
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_uart.h
Normal file
@@ -0,0 +1,299 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AIR105_UART_H
|
||||
#define __AIR105_UART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
/**
|
||||
* @brief UART Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t UART_BaudRate; /*!< This member configures the UART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (16 * (UART_InitStruct->UART_BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||
|
||||
uint32_t UART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref UART_Word_Length */
|
||||
|
||||
uint32_t UART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref UART_Stop_Bits */
|
||||
|
||||
uint32_t UART_Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref UART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
} UART_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define IS_UART_PERIPH(PERIPH) (((PERIPH) == UART0) || \
|
||||
((PERIPH) == UART1) || \
|
||||
((PERIPH) == UART2) || \
|
||||
((PERIPH) == UART3))
|
||||
|
||||
/**
|
||||
* @brief UART FIFO Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
FunctionalState FIFO_Enable;
|
||||
uint32_t FIFO_DMA_Mode;
|
||||
uint32_t FIFO_RX_Trigger;
|
||||
uint32_t FIFO_TX_Trigger;
|
||||
uint32_t FIFO_TX_TriggerIntEnable;
|
||||
}UART_FIFOInitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Word_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_WordLength_5b (0x00000000)
|
||||
#define UART_WordLength_6b (0x00000001)
|
||||
#define UART_WordLength_7b (0x00000002)
|
||||
#define UART_WordLength_8b (0x00000003)
|
||||
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WordLength_5b) || \
|
||||
((LENGTH) == UART_WordLength_6b) || \
|
||||
((LENGTH) == UART_WordLength_7b) || \
|
||||
((LENGTH) == UART_WordLength_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Stop_Bits
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_StopBits_1 (0x00000000)
|
||||
#define UART_StopBits_1_5 (0x00000004)
|
||||
#define UART_StopBits_2 (0x00000004)
|
||||
#define IS_UART_STOPBITS(STOPBITS, DATALENGTH) (((STOPBITS) == UART_StopBits_1) || \
|
||||
((STOPBITS) == UART_StopBits_1_5 && DATALENGTH == UART_WordLength_5b) || \
|
||||
((STOPBITS) == UART_StopBits_2 && DATALENGTH != UART_WordLength_5b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Parity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_Parity_No (0x00000000)
|
||||
#define UART_Parity_Even (0x00000018)
|
||||
#define UART_Parity_Odd (0x00000008)
|
||||
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_Parity_No) || \
|
||||
((PARITY) == UART_Parity_Even) || \
|
||||
((PARITY) == UART_Parity_Odd))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_Mode_Rx ((uint16_t)0x0001)
|
||||
#define UART_Mode_Tx ((uint16_t)0x0002)
|
||||
#define IS_UART_MODE(MODE) ((((MODE) & (uint16_t)0xFFFC) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Set_Check_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_UART_DATA(DATA) ((DATA) <= 0x000001FF)
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_IT_RX_RECVD (UART_IER_ERBFI)
|
||||
#define UART_IT_TX_EMPTY (UART_IER_ETBEI)
|
||||
#define UART_IT_LINE_STATUS (UART_IER_ELSI)
|
||||
#define UART_IT_MODEM_STATUS (UART_IER_EDSSI)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UART_Interrupt_identity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_IT_ID_MODEM_STATUS ((uint32_t)0x0000)
|
||||
#define UART_IT_ID_NO_INTERRUPT ((uint32_t)0x0001)
|
||||
#define UART_IT_ID_TX_EMPTY ((uint32_t)0x0002)
|
||||
#define UART_IT_ID_RX_RECVD ((uint32_t)0x0004)
|
||||
#define UART_IT_ID_LINE_STATUS ((uint32_t)0x0006)
|
||||
#define UART_IT_ID_BUSY_DETECT ((uint32_t)0x0007)
|
||||
#define UART_IT_ID_CHAR_TIMEOUT ((uint32_t)0x000C)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UART_FIFO_Control_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_FIFO_DEPTH (16)
|
||||
|
||||
#define UART_FIFO_RX ((uint32_t)0x0000)
|
||||
#define UART_FIFO_TX ((uint32_t)0x0001)
|
||||
|
||||
#define UART_FIFO_DMA_Mode_0 ((uint32_t)0x0000)
|
||||
#define UART_FIFO_DMA_Mode_1 ((uint32_t)0x0001)
|
||||
|
||||
#define UART_FIFO_RX_Trigger_1_Char ((uint32_t)0x0000)
|
||||
#define UART_FIFO_RX_Trigger_1_4_Full ((uint32_t)0x0001)
|
||||
#define UART_FIFO_RX_Trigger_1_2_Full ((uint32_t)0x0002)
|
||||
#define UART_FIFO_RX_Trigger_2_CharLessFull ((uint32_t)0x0003)
|
||||
|
||||
#define UART_FIFO_TX_Trigger_Empty ((uint32_t)0x0000)
|
||||
#define UART_FIFO_TX_Trigger_2_Chars ((uint32_t)0x0001)
|
||||
#define UART_FIFO_TX_Trigger_1_4_Full ((uint32_t)0x0002)
|
||||
#define UART_FIFO_TX_Trigger_1_2_Full ((uint32_t)0x0003)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UART_Line_Status_Flag_define
|
||||
* @{
|
||||
*/
|
||||
#define UART_LINE_STATUS_RX_RECVD (UART_LSR_DR)
|
||||
#define UART_LINE_STATUS_RX_OVERRUN_ERROR (UART_LSR_OE)
|
||||
#define UART_LINE_STATUS_RX_PARITY_ERROR (UART_LSR_PE)
|
||||
#define UART_LINE_STATUS_RX_FRAMING_ERROR (UART_LSR_FE)
|
||||
#define UART_LINE_STATUS_RX_BREAK_INTERRUPT (UART_LSR_BI)
|
||||
#define UART_LINE_STATUS_TX_HOLDING_REGISTER_EMPTY (UART_LSR_THRE)
|
||||
#define UART_LINE_STATUS_TX_EMPTY (UART_LSR_TEMT)
|
||||
#define UART_LINE_STATUS_RX_FIFO_ERROR (UART_LSR_PFE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UART_Modem_Status_Flag_define
|
||||
* @{
|
||||
*/
|
||||
#define UART_MODEM_STATUS_CTS_CHANGED (UART_MSR_DCTS)
|
||||
#define UART_MODEM_STATUS_DSR_CHANGED (UART_MSR_DDSR)
|
||||
#define UART_MODEM_STATUS_RI_CHANGED (UART_MSR_TERI)
|
||||
#define UART_MODEM_STATUS_DCD_CHANGED (UART_MSR_DDCD)
|
||||
#define UART_MODEM_STATUS_CTS (UART_MSR_CTS)
|
||||
#define UART_MODEM_STATUS_DSR (UART_MSR_DSR)
|
||||
#define UART_MODEM_STATUS_RI (UART_MSR_RI)
|
||||
#define UART_MODEM_STATUS_DCD (UART_MSR_DCD)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UART_Status_Flag_define
|
||||
* @{
|
||||
*/
|
||||
#define UART_STATUS_BUSY (UART_USR_BUSY)
|
||||
#define UART_STATUS_TX_FIFO_NOT_FULL (UART_USR_TFNF)
|
||||
#define UART_STATUS_TX_FIFO_EMPTY (UART_USR_TFE)
|
||||
#define UART_STATUS_RX_FIFO_NOT_EMPTY (UART_USR_RFNE)
|
||||
#define UART_STATUS_RX_FIFO_FULL (UART_USR_RFF)
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
void UART_DeInit(UART_TypeDef* UARTx);
|
||||
void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct);
|
||||
void UART_StructInit(UART_InitTypeDef* UART_InitStruct);
|
||||
void UART_ITConfig(UART_TypeDef* UARTx, uint32_t UART_IT, FunctionalState NewState);
|
||||
void UART_SendData(UART_TypeDef* UARTx, uint8_t Data);
|
||||
uint8_t UART_ReceiveData(UART_TypeDef* UARTx);
|
||||
void UART_FIFOInit(UART_TypeDef* UARTx, UART_FIFOInitTypeDef* UART_FIFOInitStruct);
|
||||
void UART_FIFOStructInit(UART_FIFOInitTypeDef* UART_FIFOInitStruct);
|
||||
void UART_FIFOReset(UART_TypeDef* UARTx, uint32_t UART_FIFO);
|
||||
void UART_FIFOCmd(UART_TypeDef* UARTx,FunctionalState NewState);
|
||||
void UART_SetRTS(UART_TypeDef* UARTx);
|
||||
void UART_ResetRTS(UART_TypeDef* UARTx);
|
||||
void UART_SetDTR(UART_TypeDef* UARTx);
|
||||
void UART_ResetDTR(UART_TypeDef* UARTx);
|
||||
void UART_SendBreak(UART_TypeDef* UARTx);
|
||||
void UART_AutoFlowCtrlCmd(UART_TypeDef* UARTx, FunctionalState NewState);
|
||||
void UART_IrDACmd(UART_TypeDef* UARTx, FunctionalState NewState);
|
||||
|
||||
uint32_t UART_GetLineStatus(UART_TypeDef* UARTx);
|
||||
uint32_t UART_GetModemStatus(UART_TypeDef* UARTx);
|
||||
uint32_t UART_GetITIdentity(UART_TypeDef* UARTx);
|
||||
|
||||
Boolean UART_IsTXEmpty(UART_TypeDef* UARTx);
|
||||
Boolean UART_IsTXHoldingRegisterEmpty(UART_TypeDef* UARTx);
|
||||
|
||||
Boolean UART_IsRXFIFOFull(UART_TypeDef* UARTx);
|
||||
Boolean UART_IsRXFIFONotEmpty(UART_TypeDef* UARTx);
|
||||
Boolean UART_IsTXFIFOEmpty(UART_TypeDef* UARTx);
|
||||
Boolean UART_IsTXFIFONotFull(UART_TypeDef* UARTx);
|
||||
Boolean UART_IsBusy(UART_TypeDef* UARTx);
|
||||
|
||||
void UART_DMAGenerateSoftAck(UART_TypeDef* UARTx);
|
||||
|
||||
void UART_TXHaltCmd(UART_TypeDef* UARTx, FunctionalState NewStatus);
|
||||
void UART_FIFOAccessModeCmd(UART_TypeDef* UARTx, FunctionalState NewStatus);
|
||||
uint8_t UART_FIFOTxRead(UART_TypeDef* UARTx);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __AIR105_UART_H
|
||||
|
||||
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
|
||||
53
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_wdt.h
Normal file
53
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_wdt.h
Normal file
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef __AIR105_WDT_H
|
||||
#define __AIR105_WDT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "air105.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
WDT_Mode_CPUReset = 0,
|
||||
WDT_Mode_Interrupt = 1
|
||||
}WDT_ModeTypeDef;
|
||||
|
||||
void WDT_SetReload(uint32_t Reload);
|
||||
void WDT_ReloadCounter(void);
|
||||
void WDT_Enable(void);
|
||||
void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode);
|
||||
|
||||
ITStatus WDT_GetITStatus(void);
|
||||
void WDT_ClearITPendingBit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
36
bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h
Normal file
36
bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h
Normal file
@@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (c) 2022 OpenLuat & AirM2M
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __APP_INC_H__
|
||||
#define __APP_INC_H__
|
||||
#include "bl_inc.h"
|
||||
|
||||
#include "core_hwtimer.h"
|
||||
#include "core_spi.h"
|
||||
#include "core_adc.h"
|
||||
#include "core_dac.h"
|
||||
#include "core_wdt.h"
|
||||
#include "core_usb_ll_driver.h"
|
||||
#include "core_keyboard.h"
|
||||
#include "core_dcmi.h"
|
||||
#include "core_rng.h"
|
||||
|
||||
#endif
|
||||
136
bsp/airm2m/air105/libraries/HAL_Driver/Inc/arm_common_tables.h
Normal file
136
bsp/airm2m/air105/libraries/HAL_Driver/Inc/arm_common_tables.h
Normal file
@@ -0,0 +1,136 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. October 2015
|
||||
* $Revision: V.1.4.5 a
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
*
|
||||
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_H
|
||||
#define _ARM_COMMON_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
extern const uint16_t armBitRevTable[1024];
|
||||
extern const q15_t armRecipTableQ15[64];
|
||||
extern const q31_t armRecipTableQ31[64];
|
||||
/* extern const q31_t realCoefAQ31[1024]; */
|
||||
/* extern const q31_t realCoefBQ31[1024]; */
|
||||
extern const float32_t twiddleCoef_16[32];
|
||||
extern const float32_t twiddleCoef_32[64];
|
||||
extern const float32_t twiddleCoef_64[128];
|
||||
extern const float32_t twiddleCoef_128[256];
|
||||
extern const float32_t twiddleCoef_256[512];
|
||||
extern const float32_t twiddleCoef_512[1024];
|
||||
extern const float32_t twiddleCoef_1024[2048];
|
||||
extern const float32_t twiddleCoef_2048[4096];
|
||||
extern const float32_t twiddleCoef_4096[8192];
|
||||
#define twiddleCoef twiddleCoef_4096
|
||||
extern const q31_t twiddleCoef_16_q31[24];
|
||||
extern const q31_t twiddleCoef_32_q31[48];
|
||||
extern const q31_t twiddleCoef_64_q31[96];
|
||||
extern const q31_t twiddleCoef_128_q31[192];
|
||||
extern const q31_t twiddleCoef_256_q31[384];
|
||||
extern const q31_t twiddleCoef_512_q31[768];
|
||||
extern const q31_t twiddleCoef_1024_q31[1536];
|
||||
extern const q31_t twiddleCoef_2048_q31[3072];
|
||||
extern const q31_t twiddleCoef_4096_q31[6144];
|
||||
extern const q15_t twiddleCoef_16_q15[24];
|
||||
extern const q15_t twiddleCoef_32_q15[48];
|
||||
extern const q15_t twiddleCoef_64_q15[96];
|
||||
extern const q15_t twiddleCoef_128_q15[192];
|
||||
extern const q15_t twiddleCoef_256_q15[384];
|
||||
extern const q15_t twiddleCoef_512_q15[768];
|
||||
extern const q15_t twiddleCoef_1024_q15[1536];
|
||||
extern const q15_t twiddleCoef_2048_q15[3072];
|
||||
extern const q15_t twiddleCoef_4096_q15[6144];
|
||||
extern const float32_t twiddleCoef_rfft_32[32];
|
||||
extern const float32_t twiddleCoef_rfft_64[64];
|
||||
extern const float32_t twiddleCoef_rfft_128[128];
|
||||
extern const float32_t twiddleCoef_rfft_256[256];
|
||||
extern const float32_t twiddleCoef_rfft_512[512];
|
||||
extern const float32_t twiddleCoef_rfft_1024[1024];
|
||||
extern const float32_t twiddleCoef_rfft_2048[2048];
|
||||
extern const float32_t twiddleCoef_rfft_4096[4096];
|
||||
|
||||
|
||||
/* floating-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
|
||||
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
|
||||
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
|
||||
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
|
||||
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
|
||||
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
|
||||
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
|
||||
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
|
||||
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
|
||||
|
||||
/* fixed-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
|
||||
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
|
||||
|
||||
/* Tables for Fast Math Sine and Cosine */
|
||||
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
|
||||
|
||||
#endif /* ARM_COMMON_TABLES_H */
|
||||
@@ -0,0 +1,79 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015
|
||||
* $Revision: V.1.4.5
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
*
|
||||
* Description: This file has constant structs that are initialized for
|
||||
* user convenience. For example, some can be given as
|
||||
* arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user