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Sync upstream (#6793)

Browse Source 
Co-authored-by: Wayne Lin <wclin@nuvoton.com>
This commit is contained in:
Wayne
2022-12-29 15:15:13 +08:00
committed by GitHub
co-authored by Wayne Lin
parent 882a0af94e
commit 0d1c709fa5
203 changed files with 11994 additions and 34486 deletions
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bsp/nuvoton/README.md
+1
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@@ -14,3 +14,4 @@ Current supported BSP shown in below table:
| NuMaker-M467HJ | CORTEX-M4 | [numaker-m467hj](numaker-m467hj) |
| NuMaker-IoT-M467 | CORTEX-M4 | [numaker-iot-m467](numaker-iot-m467) |
| NuMaker-HMI-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-hmi-ma35d1](numaker-hmi-ma35d1), [ma35-rtp](ma35-rtp) |
| NuMaker-IOT-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-iot-ma35d1](numaker-iot-ma35d1), [ma35-rtp](ma35-rtp) |
bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c
-12
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@@ -154,12 +154,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] =
{ PDMA_SPI9_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_SPI10_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C0_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C1_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C2_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C3_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C4_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2S0_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2S1_TX, eMemCtl_SrcInc_DstFix },
@@ -215,12 +209,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] =
{ PDMA_EPWM1_P2_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_EPWM1_P3_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C0_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C1_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C2_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C3_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C4_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2S0_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2S1_RX, eMemCtl_SrcFix_DstInc },
bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c
+46 -46
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/ma35d1.h
+5 -3
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@@ -239,9 +239,9 @@ typedef enum IRQn
/****** Platform Exceptions Numbers ***************************************************/
LVD_IRQn = 32, /*!< Low Voltage detection Interrupt */
A35PMU_IRQn = 33, /*!< A35 PMU Interrupt */
HSEM_IRQn = 34, /*!< Hardware Semaphore Interrupt */
HWSEM0_IRQn = 34, /*!< Hardware Semaphore Interrupt */
CKFAIL_IRQn = 35, /*!< Clock failed Interrupt */
WRHO_IRQn = 36, /*!< Wormhole Interrupt */
WHC0_IRQn = 36, /*!< Wormhole Interrupt */
RTC_IRQn = 37, /*!< Real Time Clock Interrupt */
TAMPER_IRQn = 38, /*!< Tamper detection Interrupt */
WDT0_IRQn = 39, /*!< Watchdog timer 0 Interrupt */
@@ -266,7 +266,7 @@ typedef enum IRQn
SSPCC_IRQn = 58, /*!< SSPCC Interrupt */
GFX_IRQn = 59, /*!< GFX GC520L Interrupt (Graphic Engine) */
VDE_IRQn = 60, /*!< Video Decoder (VC8000) Interrupt */
WRHO1_IRQn = 61, /*!< WRHO 1 Interrupt */
WHC1_IRQn = 61, /*!< WRHO 1 Interrupt */
SDH0_IRQn = 62, /*!< SDH 0 Interrupt */
SDH1_IRQn = 63, /*!< SDH 1 Interrupt */
HSUSBD_IRQn = 64, /*!< USB 2.0 High-Speed Device Interrupt */
@@ -468,6 +468,7 @@ typedef enum IRQn
#include "sdh_reg.h"
#include "ccap_reg.h"
#include "nfi_reg.h"
/** @addtogroup PERIPHERAL_MEM_MAP Peripheral Memory Base
Memory Mapped Structure for Peripherals
@@ -781,6 +782,7 @@ typedef enum IRQn
#define CCAP0 ((CCAP_T*) CCAP0_BASE)
#define CCAP1 ((CCAP_T*) CCAP1_BASE)
#define NFI ((NFI_T*) NAND_BASE)
/*@}*/ /* end of group ERIPHERAL_DECLARATION */
/** @addtogroup IO_ROUTINE I/O Routines
bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/nfi_reg.h
+52 -861
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/StdDriver/SConscript
+15 -1
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@@ -8,6 +8,20 @@ src = Glob('*src/*.c') + Glob('src/*.cpp')
cpppath = [cwd + '/inc']
libpath = [cwd + '/lib']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath)
if not GetDepend('BSP_USE_STDDRIVER_SOURCE'):
if rtconfig.CROSS_TOOL == 'keil':
if GetOption('target') == 'mdk5' and os.path.isfile('./lib/libstddriver_keil.lib'):
libs += ['libstddriver_keil']
elif rtconfig.CROSS_TOOL == 'gcc' and os.path.isfile('./lib/libstddriver_gcc_CM4.a') and GetDepend('USE_MA35D1_SUBM'):
libs += ['libstddriver_gcc_CM4']
elif rtconfig.CROSS_TOOL == 'gcc' and os.path.isfile('./lib/libstddriver_gcc_CA35.a') and GetDepend('USE_MA35D1_AARCH32'):
libs += ['libstddriver_gcc_CA35']
if not libs:
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath)
else:
src = []
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
Return('group')
bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h
+3 -3
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@@ -363,9 +363,9 @@ extern "C"
#define PDMA1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< PDMA1 Module \hideinitializer */
#define PDMA2_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< PDMA2 Module \hideinitializer */
#define PDMA3_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< PDMA3 Module \hideinitializer */
#define WH0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< WH0 Module \hideinitializer */
#define WH1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< WH1 Module \hideinitializer */
#define HWS_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< HWS Module \hideinitializer */
#define WHC0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< WH0 Module \hideinitializer */
#define WHC1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< WH1 Module \hideinitializer */
#define HWSEM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< HWS Module \hideinitializer */
#define EBI_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< EBI Module \hideinitializer */
#define SRAM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(8UL<<0)) /*!< SRAM0 Module \hideinitializer */
#define SRAM1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(9UL<<0)) /*!< SRAM1 Module \hideinitializer */
bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_disp.h
+1
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@@ -190,6 +190,7 @@ void DISP_SetBlendValue(uint32_t u32GloAV_Src, uint32_t u32GloAV_Dst);
void DISP_SetColorKeyValue(uint32_t u32ColorKeyLow, uint32_t u32ColorKeyHigh);
int DISP_SetFBAddr(E_DISP_LAYER eLayer, uint32_t u32DMAFBStartAddr);
int DISP_SetFBFmt(E_DISP_LAYER eLayer, E_FB_FMT eFbFmt, uint32_t u32Pitch);
uint32_t DISP_LCDTIMING_GetFPS(const DISP_LCD_TIMING* psDispLCDTiming);
/*@}*/ /* end of group DISP_EXPORTED_FUNCTIONS */
bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_hwsem.h
+37 -6
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@@ -13,6 +13,11 @@ extern "C"
{
#endif
#ifdef __has_include
#if __has_include("rtconfig.h")
#include "rtconfig.h"
#endif
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
@@ -26,9 +31,23 @@ extern "C"
@{
*/
#define HWSEM_CNT 8ul /*!<HWSEM count \hideinitializer */
#define HWSEM_NOLOCK 0ul /*!<Semaphore is non-lock \hideinitializer */
#define HWSEM_LOCK_BY_A35 1ul /*!<Semaphore lock by A35 \hideinitializer */
#define HWSEM_LOCK_BY_M4 2ul /*!<Semaphore lock by M4 \hideinitializer */
#if defined(USE_MA35D1_SUBM)
#define HWSEM_LOCK_BY_OWNER HWSEM_LOCK_BY_M4
#define INTSTS_CORE INTSTSM4
#define INTEN_CORE INTENM4
#else
#define HWSEM_LOCK_BY_OWNER HWSEM_LOCK_BY_A35
#define INTSTS_CORE INTSTSA35
#define INTEN_CORE INTENA35
#endif
#define HWSEM_INTSTS_SEM0IF_Pos 0
#define HWSEM_INTSTS_SEM0IF_Msk (1<<HWSEM_INTSTS_SEM0IF_Pos)
#define HWSEM_INTEN_SEM0IEN_Pos 0
#define HWSEM_INTEN_SEM0IEN_Msk (1<<HWSEM_INTEN_SEM0IEN_Pos)
/*@}*/ /* end of group HWSEM_EXPORTED_CONSTANTS */
@@ -58,6 +77,17 @@ extern "C"
*/
#define HWSEM_IS_LOCKED(hwsem, u32Num) ((hwsem)->SEM[(u32Num)] & (HWSEM_SEM_ID_Msk))
/**
* @brief
*
* @param[in] hwsem The pointer of the specified HWSEM module.
* @param[in] u32Num HWSEM number, valid values are between 0~7
*
* @retval 0 The key of specified semaphore.
* \hideinitializer
*/
#define HWSEM_GET_KEY(hwsem, u32Num) (((hwsem)->SEM[(u32Num)]&HWSEM_SEM_KEY_Msk) >> HWSEM_SEM_KEY_Pos)
/**
* @brief Enable specified HWSEM interrupt
*
@@ -67,7 +97,7 @@ extern "C"
*
* \hideinitializer
*/
#define HWSEM_ENABLE_INT(hwsem, u32Num) ((hwsem)->INTENM4 |= (HWSEM_INTENM4_SEM0IEN_Msk << (u32Num)))
#define HWSEM_ENABLE_INT(hwsem, u32Num) ((hwsem)->INTEN_CORE |= (HWSEM_INTEN_SEM0IEN_Msk << (u32Num)))
/**
@@ -79,7 +109,7 @@ extern "C"
*
* \hideinitializer
*/
#define HWSEM_DISABLE_INT(hwsem, u32Num) ((hwsem)->INTENM4 &= ~(HWSEM_INTENM4_SEM0IEN_Msk << (u32Num)))
#define HWSEM_DISABLE_INT(hwsem, u32Num) ((hwsem)->INTEN_CORE &= ~(HWSEM_INTEN_SEM0IEN_Msk << (u32Num)))
/**
* @brief Get specified interrupt flag
@@ -91,7 +121,7 @@ extern "C"
* Otherwise The specified interrupt is happened.
* \hideinitializer
*/
#define HWSEM_GET_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTSM4 & (HWSEM_INTSTSM4_SEM0IF_Msk << (u32Num)))
#define HWSEM_GET_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTS_CORE & (HWSEM_INTSTS_SEM0IF_Msk << (u32Num)))
/**
@@ -102,7 +132,7 @@ extern "C"
*
* \hideinitializer
*/
#define HWSEM_CLR_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTSM4 = (HWSEM_INTSTSM4_SEM0IF_Msk << (u32Num)))
#define HWSEM_CLR_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTS_CORE = (HWSEM_INTSTS_SEM0IF_Msk << (u32Num)))
/**
@@ -115,6 +145,7 @@ extern "C"
* \hideinitializer
*/
#define HWSEM_UNLOCK(hwsem, u32Num, u8Key) ((hwsem)->SEM[(u32Num)] = ((u8Key) << HWSEM_SEM_KEY_Pos) & HWSEM_SEM_KEY_Msk)
#define HWSEM_LOCK HWSEM_UNLOCK
/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
__STATIC_INLINE int32_t HWSEM_Try_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8Key);
@@ -133,7 +164,7 @@ __STATIC_INLINE void HWSEM_Spin_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8
__STATIC_INLINE int32_t HWSEM_Try_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8Key)
{
hwsem->SEM[u32Num] = (u8Key << HWSEM_SEM_KEY_Pos);
if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_M4 &&
if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_OWNER &&
(hwsem->SEM[u32Num] & HWSEM_SEM_KEY_Msk) == (u8Key << HWSEM_SEM_KEY_Pos))
return 0;
else
@@ -154,7 +185,7 @@ __STATIC_INLINE void HWSEM_Spin_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8
while (1)
{
hwsem->SEM[u32Num] = (u8Key << HWSEM_SEM_KEY_Pos);
if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_M4 &&
if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_OWNER &&
(hwsem->SEM[u32Num] & HWSEM_SEM_KEY_Msk) == (u8Key << HWSEM_SEM_KEY_Pos))
break;
}
bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sdh.h
+8
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@@ -8,6 +8,10 @@
#ifndef __NU_SDH_H__
#define __NU_SDH_H__
#if defined ( __CC_ARM )
#pragma anon_unions
#endif
#ifdef __cplusplus
extern "C"
{
@@ -116,6 +120,10 @@ void SDH_SetPower(SDH_T *sdh, uint32_t u32OnOff);
}
#endif
#if defined ( __CC_ARM )
#pragma no_anon_unions
#endif
#endif
bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sys.h
+55 -55
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_clk.c
+4 -4
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@@ -558,7 +558,7 @@ void CLK_DisableXtalRC(uint32_t u32ClkMask)
* - \ref PDMA3_MODULE
* - \ref WH0_MODULE
* - \ref WH1_MODULE
* - \ref HWS_MODULE
* - \ref HWSEM0_MODULE
* - \ref EBI_MODULE
* - \ref SRAM0_MODULE
* - \ref SRAM1_MODULE
@@ -692,7 +692,7 @@ void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
* - \ref PDMA3_MODULE
* - \ref WH0_MODULE
* - \ref WH1_MODULE
* - \ref HWS_MODULE
* - \ref HWSEM0_MODULE
* - \ref EBI_MODULE
* - \ref SRAM0_MODULE
* - \ref SRAM1_MODULE
@@ -1471,7 +1471,7 @@ uint64_t CLK_SetPLLFreq(uint32_t u32PllIdx, uint32_t u32OpMode, uint64_t PllSrcC
* - \ref PDMA3_MODULE
* - \ref WH0_MODULE
* - \ref WH1_MODULE
* - \ref HWS_MODULE
* - \ref HWSEM0_MODULE
* - \ref EBI_MODULE
* - \ref SRAM0_MODULE
* - \ref SRAM1_MODULE
@@ -1611,7 +1611,7 @@ uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
* - \ref PDMA3_MODULE
* - \ref WH0_MODULE
* - \ref WH1_MODULE
* - \ref HWS_MODULE
* - \ref HWSEM0_MODULE
* - \ref EBI_MODULE
* - \ref SRAM0_MODULE
* - \ref SRAM1_MODULE
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_disp.c
+17
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@@ -258,6 +258,23 @@ int DISP_SetTransparencyMode(E_DISP_LAYER eLayer, E_TRANSPARENCY_MODE eTM)
return 0;
}
uint32_t DISP_LCDTIMING_GetFPS(const DISP_LCD_TIMING* psDispLCDTiming)
{
static uint32_t u32FPS = 0;
if ( psDispLCDTiming != NULL )
{
uint32_t u32HTotal, u32VTotal;
u32HTotal = psDispLCDTiming->u32HA + psDispLCDTiming->u32HBP + psDispLCDTiming->u32HFP + psDispLCDTiming->u32HSL;
u32VTotal = psDispLCDTiming->u32VA + psDispLCDTiming->u32VBP + psDispLCDTiming->u32VFP + psDispLCDTiming->u32VSL;
u32FPS = psDispLCDTiming->u32PCF / u32HTotal / u32VTotal;
}
return u32FPS;
}
int DISP_Trigger(E_DISP_LAYER eLayer, uint32_t u32Action)
{
switch (eLayer)
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_i2s.c
+2 -4
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@@ -28,10 +28,8 @@ static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s);
* @param[in] i2s The pointer of the specified I2S module.
* @return Source clock frequency of I2S peripheral.
* @details
* 0: _HXT
* 1: APLL
* 2: PCLK0
* 3: HIRC
* 0: APLL
* 1: SYSCLK1_DIV2
*/
static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_pdma.c
+1 -1
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@@ -240,8 +240,8 @@ void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral,
if (u32ScatterEn)
{
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
pdma->DSCT[u32Ch].NEXT = u32DescAddr;
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
}
else
{
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_rtc.c
+5 -5
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@@ -65,12 +65,12 @@ static volatile uint32_t g_u32hiHour, g_u32loHour, g_u32hiMin, g_u32loMin, g_u32
int32_t RTC_Open(S_RTC_TIME_DATA_T *sPt)
{
RTC->INIT = RTC_INIT_KEY;
if (RTC->INIT != RTC_INIT_ACTIVE_Msk)
if ((RTC->INIT & RTC_INIT_ACTIVE_Msk) != RTC_INIT_ACTIVE_Msk)
{
uint32_t u32Timeout = 10000000ul;
uint32_t volatile u32Timeout = 10000000ul;
RTC->INIT = RTC_INIT_KEY;
while ((u32Timeout > 0) && (RTC->INIT != RTC_INIT_ACTIVE_Msk))
while ((u32Timeout > 0) && ((RTC->INIT & RTC_INIT_ACTIVE_Msk) != RTC_INIT_ACTIVE_Msk))
{
u32Timeout--;
}
@@ -317,7 +317,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt)
{
uint32_t u32RegCAL, u32RegTIME;
if (sPt == 0ul)
if (sPt == NULL)
{
}
else
@@ -396,7 +396,7 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt)
{
uint32_t u32RegCALM, u32RegTALM;
if (sPt == 0)
if (sPt == NULL)
{
}
else
bsp/nuvoton/libraries/ma35/StdDriver/src/nu_sys.c
+1 -1
View File
@@ -42,7 +42,7 @@ extern "C"
* - \ref WRHO1_RST
* - \ref GMAC0_RST
* - \ref GMAC1_RST
* - \ref HWSEM_RST
* - \ref HWSEM0_RST
* - \ref EBI_RST
* - \ref HSUSBH0_RST
* - \ref HSUSBH1_RST
bsp/nuvoton/libraries/ma35/UsbHostLib/inc/config.h
+3 -5
View File
@@ -25,8 +25,6 @@
#define HCLK_MHZ 700 /* used for loop-delay. must be larger than
true HCLK clock MHz */
#define NON_CACHE_MASK (0xC0000000)
static __inline void ENABLE_OHCI_IRQ(void)
{
rt_hw_interrupt_umask(USBH0_IRQn);
@@ -87,7 +85,7 @@ static __inline void DISABLE_EHCI_IRQ(void)
limited. */
#define MAX_UDEV_DRIVER 8 /*!< Maximum number of registered drivers */
#define MAX_ALT_PER_IFACE 8 /*!< maximum number of alternative interfaces per interface */
#define MAX_ALT_PER_IFACE 32 /*!< maximum number of alternative interfaces per interface */
#define MAX_EP_PER_IFACE 6 /*!< maximum number of endpoints per interface */
#define MAX_HUB_DEVICE 8 /*!< Maximum number of hub devices */
@@ -95,8 +93,8 @@ static __inline void DISABLE_EHCI_IRQ(void)
are all allocated from this pool. Allocated unit size is determined by MEM_POOL_UNIT_SIZE.
May allocate one or more units depend on hardware descriptor type. */
#define MEM_POOL_UNIT_SIZE 64 /*!< A fixed hard coding setting. Do not change it! */
#define MEM_POOL_UNIT_NUM 256 /*!< Increase this or heap size if memory allocate failed. */
#define MEM_POOL_UNIT_SIZE 256 /*!< A fixed hard coding setting. Do not change it! */
#define MEM_POOL_UNIT_NUM 64 /*!< Increase this or heap size if memory allocate failed. */
/*----------------------------------------------------------------------------------------*/
/* Re-defined staff for various compiler */
bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ehci.c_
+35 -26
View File
@@ -11,15 +11,15 @@
/// @cond HIDDEN_SYMBOLS
static QH_T *_H_qh; /* head of reclamation list */
static qTD_T *_ghost_qtd; /* used as a terminator qTD */
static QH_T *qh_remove_list;
static QH_T *_H_qh __attribute__((section(".usbhostlib._H_qh"))); /* head of reclamation list */
static qTD_T *_ghost_qtd __attribute__((section(".usbhostlib._ghost_qtd"))); /* used as a terminator qTD */
static QH_T *qh_remove_list __attribute__((section(".usbhostlib.qh_remove_list")));
static uint32_t _PFList_mem[FL_SIZE] __attribute__((aligned(4096))); /* Periodic frame list */
static uint32_t _PFList_mem[FL_SIZE] __attribute__((section(".usbhostlib._PFList_mem"))) __attribute__((aligned(4096))); /* Periodic frame list */
static uint32_t *_PFList;
static uint32_t *_PFList __attribute__((section(".usbhostlib._PFList")));
static QH_T *_Iqh[NUM_IQH];
static QH_T *_Iqh[NUM_IQH] __attribute__((section(".usbhostlib.QH_T"))) __attribute__((aligned(32)));;
static int ehci_quit_iso_xfer(UTR_T *utr, EP_INFO_T *ep);
static void scan_isochronous_list(void);
@@ -29,24 +29,25 @@ static void scan_isochronous_list(void);
static void dump_ehci_regs(void)
{
USB_debug("Dump HSUSBH(0x%x) registers:\n", ptr_to_u32(&_ehci->EHCVNR));
USB_debug(" EHCVNR = 0x%x\n", _ehci->EHCVNR);
USB_debug(" EHCSPR = 0x%x\n", _ehci->EHCSPR);
USB_debug(" EHCCPR = 0x%x\n", _ehci->EHCCPR);
USB_debug(" UCMDR = 0x%x\n", _ehci->UCMDR);
USB_debug(" USTSR = 0x%x\n", _ehci->USTSR);
USB_debug(" UIENR = 0x%x\n", _ehci->UIENR);
USB_debug(" UFINDR = 0x%x\n", _ehci->UFINDR);
USB_debug(" UPFLBAR = 0x%x\n", _ehci->UPFLBAR);
USB_debug(" UCALAR = 0x%x\n", _ehci->UCALAR);
USB_debug(" UCFGR = 0x%x\n", _ehci->UCFGR);
USB_debug(" UPSCR0 = 0x%x\n", _ehci->UPSCR);
USB_debug(" EHCVNR = 0x%08x\n", _ehci->EHCVNR);
USB_debug(" EHCSPR = 0x%08x\n", _ehci->EHCSPR);
USB_debug(" EHCCPR = 0x%08x\n", _ehci->EHCCPR);
USB_debug(" UCMDR = 0x%08x\n", _ehci->UCMDR);
USB_debug(" USTSR = 0x%08x\n", _ehci->USTSR);
USB_debug(" UIENR = 0x%08x\n", _ehci->UIENR);
USB_debug(" UFINDR = 0x%08x\n", _ehci->UFINDR);
USB_debug(" UPFLBAR = 0x%08x\n", _ehci->UPFLBAR);
USB_debug(" UCALAR = 0x%08x\n", _ehci->UCALAR);
USB_debug(" UCFGR = 0x%08x\n", _ehci->UCFGR);
USB_debug(" UPSCR0 = 0x%08x\n", _ehci->UPSCR[0]);
// USB_debug(" UPSCR1 = 0x%08x\n", _ehci->UPSCR[1]);
// USB_debug(" PHYCTL0 = 0x%x\n", _ehci->USBPCR0);
// USB_debug(" PHYCTL1 = 0x%x\n", _ehci->USBPCR1);
}
static void dump_ehci_ports()
{
USB_debug("_ehci port0=0x%x\n", _ehci->UPSCR);
USB_debug("_ehci port0=0x%x, port1=0x%x\n", _ehci->UPSCR[0], _ehci->UPSCR[1]);
}
static void dump_ehci_qtd(qTD_T *qtd)
@@ -150,7 +151,7 @@ static void init_periodic_frame_list()
QH_T *qh_p;
int i, idx, interval;
_PFList = (uint32_t *)((uint32_t)_PFList_mem | NON_CACHE_MASK);
_PFList = (uint32_t *)((uint32_t)&_PFList_mem[0]);
memset(_PFList, 0, sizeof(_PFList_mem));
iso_ep_list = NULL;
@@ -281,6 +282,8 @@ static int ehci_init(void)
else
return USBH_ERR_EHCI_INIT; /* Invalid FL_SIZE setting! */
_ehci->UPFLBAR = (uint32_t)_PFList;
/*------------------------------------------------------------------------------------*/
/* start run */
/*------------------------------------------------------------------------------------*/
@@ -295,8 +298,8 @@ static int ehci_init(void)
init_periodic_frame_list();
_ehci->UPFLBAR = (uint32_t)_PFList;
usbh_delay_ms(10); /* delay 10 ms */
//usbh_delay_ms(10); /* delay 10 ms */
//dump_ehci_regs();
return 0;
}
@@ -611,6 +614,7 @@ static int ehci_ctrl_xfer(UTR_T *utr)
_H_qh->HLink = QH_HLNK_QH(qh);
}
//dump_ehci_regs();
/* Start transfer */
_ehci->UCMDR |= HSUSBH_UCMDR_ASEN_Msk; /* start asynchronous transfer */
return 0;
@@ -1098,8 +1102,13 @@ void EHCI_IRQHandler(int vector, void *param)
USB_error("Transfer error!\n");
}
if (intsts & HSUSBH_USTSR_USBINT_Msk)
if (intsts & (HSUSBH_USTSR_USBINT_Msk | HSUSBH_USTSR_UERRINT_Msk))
{
if (intsts & HSUSBH_USTSR_UERRINT_Msk)
{
USB_error("Transfer error!\n");
}
/* some transfers completed, travel asynchronous */
/* and periodic lists to find and reclaim them. */
scan_asynchronous_list();
@@ -1140,12 +1149,12 @@ static int ehci_rh_port_reset(int port)
_ehci->UPSCR[port] = (_ehci->UPSCR[port] | HSUSBH_UPSCR_PRST_Msk) & ~HSUSBH_UPSCR_PE_Msk;
t0 = usbh_get_ticks();
while (usbh_get_ticks() - t0 < (reset_time) + 1) ; /* wait at least 50 ms */
while (usbh_get_ticks() - t0 < (reset_time/10) + 1) ; /* wait at least 50 ms */
_ehci->UPSCR[port] &= ~HSUSBH_UPSCR_PRST_Msk;
t0 = usbh_get_ticks();
while (usbh_get_ticks() - t0 < (reset_time) + 1)
while (usbh_get_ticks() - t0 < (reset_time/10) + 1)
{
if (!(_ehci->UPSCR[port] & HSUSBH_UPSCR_CCS_Msk) ||
((_ehci->UPSCR[port] & (HSUSBH_UPSCR_CCS_Msk | HSUSBH_UPSCR_PE_Msk)) == (HSUSBH_UPSCR_CCS_Msk | HSUSBH_UPSCR_PE_Msk)))
@@ -1174,7 +1183,7 @@ static int ehci_rh_polling(void)
int port;
int connect_status, t0, debounce_tick;
for (port = 0; port < EHCI_PORT_CNT; port++)
for (port = 0; port < 1; port++)
{
if (!(_ehci->UPSCR[port] & HSUSBH_UPSCR_CSC_Msk))
continue;
@@ -1197,7 +1206,7 @@ static int ehci_rh_polling(void)
/* Port de-bounce */
/*--------------------------------------------------------------------------------*/
t0 = usbh_get_ticks();
debounce_tick = usbh_tick_from_millisecond(HUB_DEBOUNCE_TIME);
debounce_tick = usbh_tick_from_millisecond(HUB_DEBOUNCE_TIME/10);
connect_status = _ehci->UPSCR[port] & HSUSBH_UPSCR_CCS_Msk;
while (usbh_get_ticks() - t0 < debounce_tick)
{
bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ohci.c_
+22 -24
View File
@@ -17,11 +17,9 @@
#define PORT_CNT (_ohci->HcRhDescriptorA & 0xf)
static uint8_t _hcca_mem[256] __attribute__((aligned(256)));
static HCCA_T _hcca __attribute__((section(".usbhostlib._hcca"))) __attribute__((aligned(256)));
static HCCA_T *_hcca;
static ED_T *_Ied[6];
static ED_T * _Ied[6] __attribute__((section(".usbhostlib._Ied")));
static ED_T *ed_remove_list;
@@ -97,7 +95,7 @@ static void init_hcca_int_table()
ED_T *ed_p;
int i, idx, interval;
memset(_hcca->int_table, 0, sizeof(_hcca->int_table));
memset(_hcca.int_table, 0, sizeof(_hcca.int_table));
for (i = 5; i >= 0; i--) /* interval = i^2 */
{
@@ -108,13 +106,13 @@ static void init_hcca_int_table()
for (idx = interval - 1; idx < 32; idx += interval)
{
if (_hcca->int_table[idx] == 0) /* is empty list, insert directly */
if (_hcca.int_table[idx] == 0) /* is empty list, insert directly */
{
_hcca->int_table[idx] = (uint32_t)_Ied[i];
_hcca.int_table[idx] = (uint32_t)_Ied[i];
}
else
{
ed_p = (ED_T *)_hcca->int_table[idx];
ed_p = (ED_T *)_hcca.int_table[idx];
while (1)
{
@@ -133,7 +131,7 @@ static void init_hcca_int_table()
}
}
static ED_T *get_int_tree_head_node(int interval)
static ED_T * get_int_tree_head_node(int interval)
{
int i;
@@ -166,8 +164,6 @@ static int ohci_init(void)
uint32_t fminterval;
volatile int i;
_hcca = (HCCA_T *)((uint32_t)_hcca_mem | NON_CACHE_MASK);
if (ohci_reset() < 0)
return -1;
@@ -180,11 +176,11 @@ static int ohci_init(void)
_ohci->HcControlHeadED = 0; /* control ED list head */
_ohci->HcBulkHeadED = 0; /* bulk ED list head */
_ohci->HcHCCA = (uint32_t)_hcca; /* HCCA area */
_ohci->HcHCCA = (uint32_t)&_hcca; /* HCCA area */
/* periodic start 90% of frame interval */
fminterval = 0x2edf; /* 11,999 */
_ohci->HcPeriodicStart = (fminterval * 9) / 10;
_ohci->HcPeriodicStart = (fminterval*9)/10;
/* set FSLargestDataPacket, 10,104 for 0x2edf frame interval */
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
@@ -342,7 +338,7 @@ static uint32_t ed_make_info(UDEV_T *udev, EP_INFO_T *ep)
static void write_td(TD_T *td, uint32_t info, uint8_t *buff, uint32_t data_len)
{
uint32_t baddr = ptr_to_u32(buff);
td->Info = info;
td->CBP = (((baddr == 0) || !data_len) ? 0 : baddr);
td->BE = (((baddr == 0) || !data_len) ? 0 : baddr + data_len - 1);
@@ -661,7 +657,7 @@ static int ohci_int_xfer(UTR_T *utr)
info = (TD_CC | TD_R | TD_DP_IN | TD_TYPE_INT);
/* Keep data toggle */
info = (info & ~(1 << 25)) | (td->Info & (1 << 25));
info = (info & ~(1<<25)) | (td->Info & (1<<25));
/* fill this TD */
write_td(td, info, utr->buff, utr->data_len);
@@ -735,7 +731,7 @@ static int ohci_iso_xfer(UTR_T *utr)
/* Prepare TDs */
/*------------------------------------------------------------------------------------*/
if (utr->bIsoNewSched) /* Is the starting of isochronous streaming? */
ed->next_sf = _hcca->frame_no + OHCI_ISO_DELAY;
ed->next_sf = _hcca.frame_no + OHCI_ISO_DELAY;
utr->td_cnt = 0;
utr->iso_sf = ed->next_sf;
@@ -759,7 +755,7 @@ static int ohci_iso_xfer(UTR_T *utr)
td->PSW[0] = 0xE000 | (buff_addr & 0xFFF);
td->ed = ed;
utr->td_cnt++; /* increase TD count, for recalim counter */
utr->td_cnt++; /* increase TD count, for reclaim counter */
/* chain to end of TD list */
if (td_list == NULL)
@@ -841,7 +837,7 @@ static int ohci_rh_port_reset(int port)
_ohci->HcRhPortStatus[port] = USBH_HcRhPortStatus_PRS_Msk;
t0 = usbh_get_ticks();
while (usbh_get_ticks() - t0 < (reset_time) + 1)
while (usbh_get_ticks() - t0 < (reset_time/10) + 1)
{
/*
* If device is disconnected or port enabled, we can stop port reset.
@@ -853,7 +849,7 @@ static int ohci_rh_port_reset(int port)
reset_time += PORT_RESET_RETRY_INC_MS;
}
USB_debug("OHCI port %d - port reset failed!\n", port + 1);
USB_debug("OHCI port %d - port reset failed!\n", port+1);
return USBH_ERR_PORT_RESET;
port_reset_done:
@@ -871,7 +867,7 @@ static int ohci_rh_polling(void)
UDEV_T *udev;
int ret;
for (i = 0; i < OHCI_PORT_CNT; i++)
for (i = 0; i < 1; i++)
{
/* clear unwanted port change status */
_ohci->HcRhPortStatus[i] = USBH_HcRhPortStatus_OCIC_Msk | USBH_HcRhPortStatus_PRSC_Msk |
@@ -1183,8 +1179,8 @@ void OHCI_IRQHandler(int vector, void *param)
/*
* reverse done list
*/
td = (TD_T *)(_hcca->done_head & TD_ADDR_MASK);
_hcca->done_head = 0;
td = (TD_T *)(_hcca.done_head & TD_ADDR_MASK);
_hcca.done_head = 0;
td_prev = NULL;
_ohci->HcInterruptStatus = USBH_HcInterruptStatus_WDH_Msk;
@@ -1232,7 +1228,7 @@ static void dump_ohci_int_table()
{
USB_debug("%02d: ", i);
ed = (ED_T *)_hcca->int_table[i];
ed = (ED_T *)_hcca.int_table[i];
while (ed != NULL)
{
@@ -1268,12 +1264,14 @@ static void dump_ohci_regs()
USB_debug(" HcRhDescriptorB = 0x%x\n", _ohci->HcRhDescriptorB);
USB_debug(" HcRhStatus = 0x%x\n", _ohci->HcRhStatus);
USB_debug(" HcRhPortStatus0 = 0x%x\n", _ohci->HcRhPortStatus[0]);
USB_debug(" HcRhPortStatus1 = 0x%x\n", _ohci->HcRhPortStatus[1]);
USB_debug(" HcPhyControl = 0x%x\n", _ohci->HcPhyControl);
USB_debug(" HcMiscControl = 0x%x\n", _ohci->HcMiscControl);
}
static void dump_ohci_ports()
{
USB_debug("_ohci port0=0x%x\n", _ohci->HcRhPortStatus[0]);
USB_debug("_ohci port0=0x%x, port1=0x%x\n", _ohci->HcRhPortStatus[0], _ohci->HcRhPortStatus[1]);
}
#endif // ENABLE_DEBUG_MSG
bsp/nuvoton/libraries/ma35/UsbHostLib/src/mem_alloc.c
+31 -68
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/UsbHostLib/src/support.c
+2 -3
View File
@@ -39,8 +39,7 @@ typedef struct USB_mhdr
uint32_t reserved;
} USB_MHDR_T;
uint8_t _USBMemoryPool[USB_MEMORY_POOL_SIZE] __attribute__((aligned(USB_MEM_BLOCK_SIZE)));
uint8_t _USBMemoryPool[USB_MEMORY_POOL_SIZE] __attribute__((section(".usbhostlib.USBMemoryPool"))) __attribute__((aligned(USB_MEM_BLOCK_SIZE)));
static USB_MHDR_T *_pCurrent;
uint32_t *_USB_pCurrent = (uint32_t *) &_pCurrent;
@@ -50,7 +49,7 @@ static uint32_t _MemoryPoolBase, _MemoryPoolEnd;
void USB_InitializeMemoryPool()
{
_MemoryPoolBase = (uint32_t)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolBase = (uint32_t)&_USBMemoryPool[0];
_MemoryPoolEnd = _MemoryPoolBase + USB_MEMORY_POOL_SIZE;
_FreeMemorySize = _MemoryPoolEnd - _MemoryPoolBase;
_AllocatedMemorySize = 0;
bsp/nuvoton/libraries/ma35/UsbHostLib/src/usb_core.c
+2
View File
@@ -103,6 +103,7 @@ int usbh_polling_root_hubs(void)
int ret, change = 0;
#ifdef ENABLE_EHCI0
//_ehci0->UPSCR[1] = HSUSBH_UPSCR_PP_Msk | HSUSBH_UPSCR_PO_Msk; /* set port 2 owner to OHCI */
do
{
ret = ehci0_driver.rthub_polling();
@@ -114,6 +115,7 @@ int usbh_polling_root_hubs(void)
#endif
#ifdef ENABLE_EHCI1
//_ehci1->UPSCR[1] = HSUSBH_UPSCR_PP_Msk | HSUSBH_UPSCR_PO_Msk; /* set port 2 owner to OHCI */
do
{
ret = ehci1_driver.rthub_polling();
bsp/nuvoton/libraries/ma35/rtt_port/Kconfig
+65
View File
@@ -5,6 +5,32 @@
select RT_USING_USER_MAIN
default y
config BSP_USING_SSPCC
bool
depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM
default y
config BSP_USING_SSMCC
bool
depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM
default y
config BSP_USING_UMCTL2
bool
depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM
default y
config BSP_USING_RTP
bool
depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM
default y
if BSP_USING_RTP
config RTP_USING_AT_STARTUP
bool "Enable RTP Executation at startup"
default y
endif
config USE_MA35D1_AARCH32
bool
select ARCH_ARM_CORTEX_A
@@ -17,6 +43,15 @@
bool
select ARCH_ARMV8
if USE_MA35D1_AARCH64
config BSP_USING_GIC
bool
default y
config BSP_USING_GICV2
bool
default y
endif
config USE_MA35D1_SUBM
bool
select ARCH_ARM_CORTEX_M4
@@ -1098,6 +1133,36 @@
default n
endif
config BSP_USING_HWSEM
bool "Enable Hardware semaphore(HWSEM)"
default y
if BSP_USING_HWSEM
config BSP_USING_HWSEM0
bool "Enable HWSEM0"
default y
endif
config BSP_USING_WHC
bool "Enable Wormhole(WHC)"
default y
if BSP_USING_WHC
config BSP_USING_WHC0
bool "Enable WHC0"
default y
config BSP_USING_WHC1
bool "Enable WHC1"
depends on !USE_MA35D1_SUBM
default n
endif
config BSP_USING_NFI
bool "Enable Raw NAND flash Interface(NFI)"
depends on !USE_MA35D1_SUBM
default y
config BSP_USING_EBI
bool "Enable External Bus Interface(EBI)"
default n
bsp/nuvoton/libraries/ma35/rtt_port/drv_common.h
+9 -18
View File
@@ -21,7 +21,9 @@
#include "gic.h"
#include "mmu.h"
#include "cp15.h"
#if defined(USE_MA35D1_AARCH32)
#include "cp15.h"
#endif
#include "gtimer.h"
#define __REG32(x) (*((volatile unsigned int*)((rt_ubase_t)x)))
@@ -35,21 +37,6 @@
#define DDR_LIMIT_SIZE 0xC0000000u
#define UNCACHEABLE 0x40000000u
#define SSPCC_SET_REALM(IP, REALM) \
do { \
rt_kprintf("Set %s realm to %s(%d)\n", #IP, #REALM, REALM); \
SSPCC_SetRealm(IP, REALM); \
rt_kprintf("Get %s realm is %d ....%s\n", #IP, SSPCC_GetRealm(IP), (SSPCC_GetRealm(IP)==REALM)?"Success":"Failure"); \
} while(0)
#define SSPCC_SET_GPIO_REALM(PORT, PIN, REALM) \
do { \
rt_kprintf("Set %s%s realm to %s(%d)\n", #PORT, #PIN, #REALM, REALM); \
SSPCC_SetRealm_GPIO((uint32_t)PORT, PIN, REALM); \
rt_kprintf("Get %s%s realm is %d ....%s\n", #PORT, #PIN, SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN), (SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN)==REALM)?"Success":"Failure"); \
} while(0)
/* the basic constants needed by gic */
rt_inline rt_uint32_t platform_get_gic_dist_base(void)
{
@@ -72,12 +59,16 @@ rt_inline rt_uint32_t nu_cpu_dcache_line_size(void)
return 4 << ((ctr >> 16) & 0xF);
}
extern void rt_hw_cpu_dcache_clean(void *addr, int size);
extern void rt_hw_cpu_dcache_clean_inv(void *addr, int size);
extern void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size);
extern void rt_hw_cpu_dcache_invalidate(void *addr, int size);
#else
#define UNCACHEABLE 0
#endif
void nu_clock_init(void);
#define REGION_ADDR_SRAM0 0x24000000
#define REGION_ADDR_DDR (0x80020000|UNCACHEABLE)
#define REGION_MAXSIZE_SRAM0 (128*1024)
#define REGION_MAXSIZE_DDR (4*1024*1024-REGION_MAXSIZE_SRAM0)
#define REGION_MAXSIZE_LIMIT (REGION_MAXSIZE_SRAM0+REGION_MAXSIZE_DDR)
#endif /* __DRV_COMMON_H__ */
bsp/nuvoton/libraries/ma35/rtt_port/drv_common.c → bsp/nuvoton/libraries/ma35/rtt_port/drv_common_aarch32.c
+50 -220
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/rtt_port/drv_common_subm.c
+144
View File
@@ -0,0 +1,144 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-07-14 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(USE_MA35D1_SUBM)
#include <rthw.h>
#include <stdio.h>
#include "drv_common.h"
#include "board.h"
#include "drv_uart.h"
#define LOG_TAG "drv.common"
#undef DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL LOG_LVL_DBG
#define DBG_COLOR
#include <rtdbg.h>
extern void nu_clock_init(void);
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
int rt_hw_systick_init(void)
{
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
SystemCoreClockUpdate();
/* Configure SysTick */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
return 0;
}
/**
* The time delay function.
*
* @param microseconds.
*/
void rt_hw_us_delay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = SysTick->LOAD;
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
told = SysTick->VAL;
while (1)
{
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
void idle_wfi(void)
{
__WFI();
}
rt_weak void nutool_pincfg_init(void)
{
}
/**
* This function will initial board.
*/
rt_weak void rt_hw_board_init(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* initialize base clock */
nu_clock_init();
/* initialize peripheral pin function */
nutool_pincfg_init();
/* initialize hardware interrupt */
rt_hw_interrupt_init();
#if defined(RT_USING_HEAP)
rt_system_heap_init((void *)BOARD_HEAP_START, (void *)BOARD_HEAP_END);
#endif
/* initialize uart */
rt_hw_uart_init();
#if defined(RT_USING_CONSOLE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#if defined(RT_USING_HEAP)
/* Dump heap information */
rt_kprintf("Heap: Begin@%08x, END@%08x, SIZE: %d KiB\n", BOARD_HEAP_START, BOARD_HEAP_END, ((rt_uint32_t)BOARD_HEAP_END - (rt_uint32_t)BOARD_HEAP_START) / 1024);
#endif
/* initialize systick */
rt_hw_systick_init();
rt_thread_idle_sethook(idle_wfi);
#if defined(RT_USING_COMPONENTS_INIT)
rt_components_board_init();
#endif
}
#endif
bsp/nuvoton/libraries/ma35/rtt_port/drv_disp.c
+31 -5
View File
@@ -53,6 +53,10 @@ typedef struct nu_disp *nu_disp_t;
static volatile uint32_t g_u32VSyncBlank = 0;
static struct rt_completion vsync_wq;
#if defined(DISP_USING_OVERLAY)
static rt_mutex_t disp_lock;
#endif
static struct nu_disp nu_fbdev[eLayer_Cnt] =
{
{
@@ -69,9 +73,9 @@ static struct nu_disp nu_fbdev[eLayer_Cnt] =
#endif
};
rt_weak void nu_lcd_backlight_on(void) { }
RT_WEAK void nu_lcd_backlight_on(void) { }
rt_weak void nu_lcd_backlight_off(void) { }
RT_WEAK void nu_lcd_backlight_off(void) { }
static void nu_disp_isr(int vector, void *param)
{
@@ -88,6 +92,10 @@ static rt_err_t disp_layer_open(rt_device_t dev, rt_uint16_t oflag)
nu_disp_t psDisp = (nu_disp_t)dev;
RT_ASSERT(psDisp != RT_NULL);
#if defined(DISP_USING_OVERLAY)
rt_mutex_take(disp_lock, RT_WAITING_FOREVER);
#endif
psDisp->ref_count++;
#if defined(DISP_USING_OVERLAY)
@@ -112,6 +120,10 @@ static rt_err_t disp_layer_open(rt_device_t dev, rt_uint16_t oflag)
}
#endif
#if defined(DISP_USING_OVERLAY)
rt_mutex_release(disp_lock);
#endif
return RT_EOK;
}
@@ -120,6 +132,10 @@ static rt_err_t disp_layer_close(rt_device_t dev)
nu_disp_t psDisp = (nu_disp_t)dev;
RT_ASSERT(psDisp != RT_NULL);
#if defined(DISP_USING_OVERLAY)
rt_mutex_take(disp_lock, RT_WAITING_FOREVER);
#endif
psDisp->ref_count--;
#if defined(DISP_USING_OVERLAY)
@@ -140,6 +156,10 @@ static rt_err_t disp_layer_close(rt_device_t dev)
DISP_Trigger(eLayer_Video, 0);
}
#if defined(DISP_USING_OVERLAY)
rt_mutex_release(disp_lock);
#endif
return RT_EOK;
}
@@ -208,8 +228,6 @@ static rt_err_t disp_layer_control(rt_device_t dev, int cmd, void *args)
/* Initial LCD */
DISP_SetFBFmt(psDisp->layer, eFBFmt, psDisp->info.pitch);
}
break;
@@ -243,7 +261,7 @@ static rt_err_t disp_layer_control(rt_device_t dev, int cmd, void *args)
if (psDisp->last_commit >= g_u32VSyncBlank)
{
rt_completion_init(&vsync_wq);
rt_completion_wait(&vsync_wq, RT_TICK_PER_SECOND / 60);
rt_completion_wait(&vsync_wq, RT_TICK_PER_SECOND / DISP_LCDTIMING_GetFPS(RT_NULL));
}
}
break;
@@ -331,12 +349,20 @@ int rt_hw_disp_init(void)
rt_kprintf("%s's fbdev video memory at 0x%08x.\n", psDisp->name, psDisp->info.framebuffer);
}
#if defined(DISP_USING_OVERLAY)
/* Initial display lock */
disp_lock = rt_mutex_create("displock", RT_IPC_FLAG_FIFO);
RT_ASSERT(disp_lock);
#endif
/* Register ISR */
rt_hw_interrupt_install(DISP_IRQn, nu_disp_isr, RT_NULL, "DISP");
/* Enable interrupt. */
rt_hw_interrupt_umask(DISP_IRQn);
rt_kprintf("LCD panel timing is %d FPS.\n", DISP_LCDTIMING_GetFPS(&psDispLcdInstance->sLcdTiming));
return (int)ret;
}
INIT_DEVICE_EXPORT(rt_hw_disp_init);
bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.c
+310
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.h
+43
View File
@@ -0,0 +1,43 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-5 Wayne First version
*
******************************************************************************/
#ifndef __DRV_HWSEM_H__
#define __DRV_HWSEM_H__
#include <rtdevice.h>
typedef enum
{
evHWSEM0 = 0,
evHWSEM1,
evHWSEM2,
evHWSEM3,
evHWSEM4,
evHWSEM5,
evHWSEM6,
evHWSEM7,
evHWSEM_CNT,
} E_HWSEM_ID;
struct nu_mutex
{
E_HWSEM_ID id;
};
typedef struct nu_mutex *nu_mutex_t;
nu_mutex_t nu_mutex_init(struct rt_device *device, E_HWSEM_ID id);
rt_err_t nu_mutex_take(nu_mutex_t mutex, rt_int32_t timeout);
rt_err_t nu_mutex_release(nu_mutex_t mutex);
void nu_mutex_deinit(struct rt_device *device, E_HWSEM_ID id);
#endif /* __DRV_HWSEM_H__ */
bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.c
+70 -39
View File
@@ -328,22 +328,6 @@ static inline void nu_pdma_channel_reset(int i32ChannID)
while ((PDMA->CHCTL & (1 << u32ModChannId)));
}
void nu_pdma_channel_terminate(int i32ChannID)
{
if (nu_pdma_check_is_nonallocated(i32ChannID))
goto exit_pdma_channel_terminate;
/* Reset specified channel. */
nu_pdma_channel_reset(i32ChannID);
/* Enable specified channel after reset. */
nu_pdma_channel_enable(i32ChannID);
exit_pdma_channel_terminate:
return;
}
static rt_err_t nu_pdma_timeout_set(int i32ChannID, int i32Timeout_us)
{
rt_err_t ret = RT_EINVAL;
@@ -396,6 +380,25 @@ exit_nu_pdma_timeout_set:
return -(ret);
}
void nu_pdma_channel_terminate(int i32ChannID)
{
if (nu_pdma_check_is_nonallocated(i32ChannID))
goto exit_pdma_channel_terminate;
/* Disable timeout function of specified channel. */
nu_pdma_timeout_set(i32ChannID, 0);
/* Reset specified channel. */
nu_pdma_channel_reset(i32ChannID);
/* Enable specified channel after reset. */
nu_pdma_channel_enable(i32ChannID);
exit_pdma_channel_terminate:
return;
}
int nu_pdma_channel_allocate(int32_t i32PeripType)
{
int ChnId, i32PeripCtlIdx, j;
@@ -595,6 +598,22 @@ exit_nu_pdma_transferred_byte_get:
return -1;
}
nu_pdma_desc_t nu_pdma_get_channel_desc(int32_t i32ChannID)
{
PDMA_T *PDMA;
if (nu_pdma_check_is_nonallocated(i32ChannID))
goto exit_nu_pdma_get_srcaddr;
PDMA = NU_PDMA_GET_BASE(i32ChannID);
return &PDMA->DSCT[NU_PDMA_GET_MOD_CHIDX(i32ChannID)];
exit_nu_pdma_get_srcaddr:
return RT_NULL;
}
nu_pdma_memctrl_t nu_pdma_channel_memctrl_get(int i32ChannID)
{
nu_pdma_memctrl_t eMemCtrl = eMemCtl_Undefined;
@@ -727,31 +746,31 @@ exit_nu_pdma_desc_setup:
rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num)
{
int i;
nu_pdma_desc_t psSgTblHead;
RT_ASSERT(ppsSgtbls != NULL);
RT_ASSERT(num > 0);
psSgTblHead = (nu_pdma_desc_t) rt_malloc_align(RT_ALIGN(sizeof(DSCT_T) * num, 64), 64);
RT_ASSERT(psSgTblHead != RT_NULL);
rt_memset((void *)psSgTblHead, 0, sizeof(DSCT_T) * num);
for (i = 0; i < num; i++)
ppsSgtbls[i] = &psSgTblHead[i];
{
ppsSgtbls[i] = (nu_pdma_desc_t) rt_malloc_align(RT_ALIGN(sizeof(DSCT_T), 64), 64);
RT_ASSERT(ppsSgtbls[i] != RT_NULL);
rt_memset((void *)ppsSgtbls[i], 0, RT_ALIGN(sizeof(DSCT_T), 64));
}
return RT_EOK;
}
void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num)
{
nu_pdma_desc_t psSgTblHead;
int i;
RT_ASSERT(ppsSgtbls != NULL);
psSgTblHead = *ppsSgtbls;
RT_ASSERT(psSgTblHead != NULL);
RT_ASSERT(num > 0);
rt_free_align(psSgTblHead);
for (i = 0; i < num; i++)
{
rt_free_align(ppsSgtbls[i]);
}
}
static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_desc_t head, uint32_t u32IdleTimeout_us)
@@ -781,18 +800,20 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de
rt_kprintf("[%s] u32SrcCtl=0x%08x\n", __func__, u32SrcCtl);
rt_kprintf("[%s] u32DstCtl=0x%08x\n", __func__, u32DstCtl);
rt_kprintf("[%s] u32FlushLen=%d\n", __func__, u32FlushLen);
rt_kprintf("[%s] DA=%08x\n", __func__, next->DA);
rt_kprintf("[%s] SA=%08x\n", __func__, next->SA);
#endif
/* Flush Src buffer into memory. */
if ((u32SrcCtl == PDMA_SAR_INC)) // for M2P, M2M
rt_hw_cpu_dcache_clean_inv((void *)next->SA, u32FlushLen);
rt_hw_cpu_dcache_clean_and_invalidate((void *)next->SA, u32FlushLen);
/* Flush Dst buffer into memory. */
if ((u32DstCtl == PDMA_DAR_INC)) // for P2M, M2M
rt_hw_cpu_dcache_clean_inv((void *)next->DA, u32FlushLen);
rt_hw_cpu_dcache_clean_and_invalidate((void *)next->DA, u32FlushLen);
/* Flush descriptor into memory */
rt_hw_cpu_dcache_clean_inv((void *)next, sizeof(DSCT_T));
rt_hw_cpu_dcache_clean_and_invalidate((void *)next, sizeof(DSCT_T));
if (bNonCacheAlignedWarning)
{
@@ -806,7 +827,7 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de
Source, destination, DMA descriptor address and length should be aligned at len(CACHE_LINE_SIZE)
*/
bNonCacheAlignedWarning = 0;
rt_kprintf("[PDMA-W]\n");
//rt_kprintf("[PDMA-W]\n");
}
}
@@ -817,19 +838,29 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de
}
#endif
nu_pdma_desc_t psDesc = nu_pdma_get_channel_desc(i32ChannID);
PDMA_DisableTimeout(PDMA, 1 << NU_PDMA_GET_MOD_CHIDX(i32ChannID));
PDMA_EnableInt(PDMA, NU_PDMA_GET_MOD_CHIDX(i32ChannID), PDMA_INT_TRANS_DONE);
nu_pdma_timeout_set(i32ChannID, u32IdleTimeout_us);
/* Set scatter-gather mode and head */
/* Take care the head structure, you should make sure cache-coherence. */
PDMA_SetTransferMode(PDMA,
NU_PDMA_GET_MOD_CHIDX(i32ChannID),
u32Peripheral,
(head->NEXT != 0) ? 1 : 0,
(uint32_t)head);
NU_PDMA_GET_MOD_CHIDX(i32ChannID),
u32Peripheral,
(head->NEXT != 0) ? 1 : 0,
(uint32_t)head);
/* PDMA fetchs description on-demand if SG enabled. We check it valid in here. */
if ( (u32Peripheral != PDMA_MEM) &&
(head->NEXT != 0) &&
(head->DA != psDesc->DA) )
{
RT_ASSERT(0);
}
PDMA_EnableInt(PDMA, NU_PDMA_GET_MOD_CHIDX(i32ChannID), PDMA_INT_TRANS_DONE);
nu_pdma_timeout_set(i32ChannID, u32IdleTimeout_us);
/* If peripheral is M2M, trigger it. */
if (u32Peripheral == PDMA_MEM)
bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.h
+1
View File
@@ -73,6 +73,7 @@ rt_err_t nu_pdma_channel_memctrl_set(int i32ChannID, nu_pdma_memctrl_t eMemCtrl)
nu_pdma_cb_handler_t nu_pdma_callback_hijack(int i32ChannID, nu_pdma_cbtype_t eCBType, nu_pdma_chn_cb_t psChnCb_Hijack);
rt_err_t nu_pdma_filtering_set(int i32ChannID, uint32_t u32EventFilter);
uint32_t nu_pdma_filtering_get(int i32ChannID);
nu_pdma_desc_t nu_pdma_get_channel_desc(int32_t i32ChannID);
// For scatter-gather DMA
rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u32DataWidth, uint32_t u32AddrSrc, uint32_t u32AddrDst, int32_t TransferCnt, nu_pdma_desc_t next, uint32_t u32BeSilent);
bsp/nuvoton/libraries/ma35/rtt_port/drv_qspi.c
+1 -1
View File
@@ -402,7 +402,7 @@ static int rt_hw_qspi_init(void)
return 0;
}
INIT_DEVICE_EXPORT(rt_hw_qspi_init);
INIT_PREV_EXPORT(rt_hw_qspi_init);
rt_err_t nu_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
{
bsp/nuvoton/libraries/ma35/rtt_port/drv_rtp.c
+11 -17
View File
@@ -11,12 +11,11 @@
#include <rtconfig.h>
#if !defined(USE_MA35D1_SUBM)
#if defined(BSP_USING_RTP) && defined(RT_USING_DFS)
#define LOG_TAG "drv.rtp"
#undef DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL LOG_LVL_DBG
#define DBG_LEVEL LOG_LVL_INFO
#define DBG_COLOR
#include <rtdbg.h>
@@ -28,17 +27,12 @@
#include <sys/stat.h>
#include <sys/statfs.h>
#define RTP_USING_AT_STARTUP
#include "drv_sspcc.h"
/* Link to rtthread.bin in ma35-rtp folder. */
#define PATH_RTP_INCBIN "..//ma35-rtp//rtthread.bin"
#define READ_BLOCK_SIZE 128
#define REGION_ADDR_SRAM0 0x24000000
#define REGION_ADDR_DDR (0x80020000|UNCACHEABLE)
#define REGION_MAXSIZE_SRAM0 (128*1024)
#define REGION_MAXSIZE_DDR (4*1024*1024-REGION_MAXSIZE_SRAM0)
#define REGION_MAXSIZE_LIMIT (REGION_MAXSIZE_SRAM0+REGION_MAXSIZE_DDR)
#if !defined(PATH_RTP_FW_FILE)
#define PATH_RTP_FW_FILE "/mnt/sd1p0/rtp.bin"
@@ -106,7 +100,7 @@ exit_nu_rtp_load_from_memory:
}
#endif
rt_weak void nu_rtp_sspcc_setup(void)
RT_WEAK void nu_rtp_sspcc_setup(void)
{
SSPCC_SET_REALM(SSPCC_UART16, SSPCC_SSET_SUBM);
@@ -216,7 +210,7 @@ int nu_rtp_load_run(int argc, char *argv[])
if (!szFilePath || nu_rtp_load_from_file(szFilePath) < 0)
return -1;
rt_kprintf("Loaded %s, then run...\n", szFilePath);
LOG_I("Loaded %s, then run...", szFilePath);
nu_rtp_start();
@@ -227,11 +221,11 @@ MSH_CMD_EXPORT(nu_rtp_load_run, load rtp code then run);
int rt_hw_rtp_init(void)
{
int fw_size;
fw_size = (int)((char *)&incbin_rtp_end - (char *)&incbin_rtp_start);
rt_kprintf("INCBIN RTP Start = %p\n", &incbin_rtp_start);
rt_kprintf("INCBIN RTP Size = %p\n", fw_size);
#if defined(RTP_USING_AT_STARTUP)
int fw_size = (int)((char *)&incbin_rtp_end - (char *)&incbin_rtp_start);
LOG_I("INCBIN RTP Start = %p", &incbin_rtp_start);
LOG_I("INCBIN RTP Size = %p", fw_size);
#endif
/* Enable RTP and reset M4 reset */
nu_rtp_init();
@@ -247,4 +241,4 @@ int rt_hw_rtp_init(void)
}
INIT_BOARD_EXPORT(rt_hw_rtp_init);
#endif //#if defined(USE_MA35D1_SUBM)
#endif //#if defined(BSP_USING_RTP)
bsp/nuvoton/libraries/ma35/rtt_port/drv_sdio.c
+4 -4
View File
@@ -59,12 +59,12 @@ typedef struct nu_sdh *nu_sdh_t;
/* Private variables ------------------------------------------------------------*/
#if defined(BSP_USING_SDH0)
rt_align(SDH_ALIGN_LEN)
ALIGN(SDH_ALIGN_LEN)
static uint8_t g_au8CacheBuf_SDH0[SDH_BUFF_SIZE];
#endif
#if defined(BSP_USING_SDH1)
rt_align(SDH_ALIGN_LEN)
ALIGN(SDH_ALIGN_LEN)
static uint8_t g_au8CacheBuf_SDH1[SDH_BUFF_SIZE];
#endif
@@ -481,7 +481,7 @@ static void nu_sdh_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
}
}
rt_hw_cpu_dcache_clean_inv((void *)data.dest, size);
rt_hw_cpu_dcache_clean_and_invalidate((void *)data.dest, size);
req->cmd->err = nu_sdh_send_command(sdh->base, &cmd, &data);
rt_hw_cpu_dcache_invalidate((void *)data.dest, size);
@@ -766,7 +766,7 @@ void nu_sdh_host_initial(nu_sdh_t sdh)
nu_sdh_irq_update(host, 1);
/* ready to change */
mmcsd_change(host);
//mmcsd_change(host);
}
void nu_sd_attach(void)
bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.c
+29
View File
@@ -0,0 +1,29 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#include "rtthread.h"
#if defined(BSP_USING_SSMCC)
#include "drv_common.h"
rt_err_t nu_ssmcc_init(void)
{
CLK->APBCLK2 |= CLK_APBCLK2_SSMCCEN_Msk;
/* set region 0 to secure region, non-secure and m4 all can access */
SSMCC_SetRegion0(SSMCC_SECURE_READ | SSMCC_SECURE_WRITE | SSMCC_NONSECURE_READ | SSMCC_NONSECURE_WRITE | SSMCC_M4NS_READ | SSMCC_M4NS_WRITE);
return RT_EOK;
}
#endif //#if defined(BSP_USING_SSMCC)
bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.h
+18
View File
@@ -0,0 +1,18 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#ifndef __DRV_SSMCC_H__
#define __DRV_SSMCC_H__
rt_err_t nu_ssmcc_init(void);
#endif /* __DRV_SSMCC_H__ */
bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.c
+41
View File
@@ -0,0 +1,41 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#include "rtthread.h"
#if defined(BSP_USING_SSPCC)
#include "drv_common.h"
rt_err_t nu_sspcc_init(void)
{
int i, j;
/* Enable SSPCC clock. */
CLK->APBCLK2 |= CLK_APBCLK2_SSPCCEN_Msk;
/* Assign all SRAM1 capacity to TZNS. */
SSPCC->SRAMSB = 0;
/* Set all GPIO security set to TZNS. */
for (i = 0; i < 16; i++)
{
for (j = 0; j < 14; j++)
{
SSPCC_SetRealm_GPIO(GPIO_BASE + (j * 0x40), i, SSPCC_SSET_TZNS);
}
}
return RT_EOK;
}
#endif //#if defined(BSP_USING_SSPCC)
bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.h
+34
View File
@@ -0,0 +1,34 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#ifndef __DRV_SSPCC_H__
#define __DRV_SSPCC_H__
#include "rtthread.h"
#define SSPCC_SET_REALM(IP, REALM) \
do { \
rt_kprintf("Set %s realm to %s(%d)\n", #IP, #REALM, REALM); \
SSPCC_SetRealm(IP, REALM); \
rt_kprintf("Get %s realm is %d ....%s\n", #IP, SSPCC_GetRealm(IP), (SSPCC_GetRealm(IP)==REALM)?"Success":"Failure"); \
} while(0)
#define SSPCC_SET_GPIO_REALM(PORT, PIN, REALM) \
do { \
rt_kprintf("Set %s%s realm to %s(%d)\n", #PORT, #PIN, #REALM, REALM); \
SSPCC_SetRealm_GPIO((uint32_t)PORT, PIN, REALM); \
rt_kprintf("Get %s%s realm is %d ....%s\n", #PORT, #PIN, SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN), (SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN)==REALM)?"Success":"Failure"); \
} while(0)
rt_err_t nu_sspcc_init(void);
#endif /* __DRV_SSPCC_H__ */
bsp/nuvoton/libraries/ma35/rtt_port/drv_sys.c
+133 -34
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/rtt_port/drv_uart.c
+331 -188
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.c
+34
View File
@@ -0,0 +1,34 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#include "rtthread.h"
#if defined(BSP_USING_UMCTL2)
#include "drv_common.h"
rt_err_t nu_umctl2_init(void)
{
UMCTL2->PCTRL_0 = UMCTL2_PCTRL_0_port_en_Msk; //[0x0490]
UMCTL2->PCTRL_1 = UMCTL2_PCTRL_1_port_en_Msk; //[0x0540]
UMCTL2->PCTRL_2 = UMCTL2_PCTRL_2_port_en_Msk; //[0x05f0]
UMCTL2->PCTRL_3 = UMCTL2_PCTRL_3_port_en_Msk; //[0x06a0]
UMCTL2->PCTRL_4 = UMCTL2_PCTRL_4_port_en_Msk; //[0x0750]
UMCTL2->PCTRL_5 = UMCTL2_PCTRL_5_port_en_Msk; //[0x0800]
UMCTL2->PCTRL_6 = UMCTL2_PCTRL_6_port_en_Msk; //[0x08b0]
UMCTL2->PCTRL_7 = UMCTL2_PCTRL_7_port_en_Msk; //[0x0960]
return RT_EOK;
}
#endif //#if defined(BSP_USING_UMCTL2)
bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.h
+18
View File
@@ -0,0 +1,18 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-20 Wayne First version
*
******************************************************************************/
#ifndef __DRV_UMCTL2_H__
#define __DRV_UMCTL2_H__
rt_err_t nu_umctl2_init(void);
#endif /* __DRV_UMCTL2_H__*/
bsp/nuvoton/libraries/ma35/rtt_port/drv_usbhost.c
+1 -1
View File
@@ -517,7 +517,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_OUT)
{
rt_memcpy(buffer_nonch, buffer, nbytes);
rt_hw_cpu_dcache_clean_inv((void *)buffer_nonch, nbytes);
rt_hw_cpu_dcache_clean_and_invalidate((void *)buffer_nonch, nbytes);
}
}
bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.c
+268
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.h
+24
View File
@@ -0,0 +1,24 @@
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-5 Wayne First version
*
******************************************************************************/
#ifndef __DRV_WHC_H__
#define __DRV_WHC_H__
#include "drv_common.h"
typedef struct
{
uint32_t content[WHC_BUFFER_LEN];
} nu_whc_msg;
typedef nu_whc_msg *nu_whc_msg_t;
#endif /* __DRV_WHC_H__ */
bsp/nuvoton/libraries/ma35/rtt_port/nu_clock_init.c
+21 -2
View File
@@ -191,11 +191,11 @@ static void nu_clock_i2s_init(void)
{
#if defined(BSP_USING_I2S0)
CLK_EnableModuleClock(I2S0_MODULE);
CLK_SetModuleClock(I2S0_MODULE, CLK_CLKSEL4_I2S0SEL_SYSCLK1_DIV2, MODULE_NoMsk);
CLK_SetModuleClock(I2S0_MODULE, CLK_CLKSEL4_I2S0SEL_APLL, MODULE_NoMsk);
#endif
#if defined(BSP_USING_I2S1)
CLK_EnableModuleClock(I2S1_MODULE);
CLK_SetModuleClock(I2S1_MODULE, CLK_CLKSEL4_I2S1SEL_SYSCLK1_DIV2, MODULE_NoMsk);
CLK_SetModuleClock(I2S1_MODULE, CLK_CLKSEL4_I2S1SEL_APLL, MODULE_NoMsk);
#endif
}
@@ -365,6 +365,23 @@ void nu_clock_base_init(void)
}
#endif
static void nu_clock_hwsem_init(void)
{
#if defined(BSP_USING_HWSEM0)
CLK_EnableModuleClock(HWSEM0_MODULE);
#endif
}
static void nu_clock_whc_init(void)
{
#if defined(BSP_USING_WHC0)
CLK_EnableModuleClock(WHC0_MODULE);
#endif
#if defined(BSP_USING_WHC1)
CLK_EnableModuleClock(WHC1_MODULE);
#endif
}
void nu_clock_init(void)
{
#if !defined(USE_MA35D1_SUBM)
@@ -377,6 +394,8 @@ void nu_clock_init(void)
nu_clock_disp_init();
#endif
nu_clock_whc_init();
nu_clock_hwsem_init();
nu_clock_pdma_init();
nu_clock_gpio_init();
nu_clock_uart_init();
bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig
+1
View File
@@ -12,6 +12,7 @@ config SOC_SERIES_N9H30
config BSP_USING_MMU
bool "Enable MMU"
select ARCH_ARM_MMU
default y
config BSP_USING_GPIO
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c
+7 -3
View File
@@ -370,9 +370,13 @@ static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Val
break;
case AUDIO_MIXER_VOLUME:
{
uint8_t u8DACGAIN = 256 * ui32Value / 100;
I2C_WriteNAU8822(11, u8DACGAIN);
I2C_WriteNAU8822(12, u8DACGAIN);
uint8_t u8GAIN = 256 * ui32Value / 100;
I2C_WriteNAU8822(11, 0x100 | u8GAIN);
I2C_WriteNAU8822(12, 0x100 | u8GAIN);
u8GAIN = 0x3F * ui32Value / 100;
I2C_WriteNAU8822(54, 0x100 | u8GAIN);
I2C_WriteNAU8822(55, 0x100 | u8GAIN);
}
break;
case AUDIO_MIXER_QUERY:
bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMG160_driver/bmg160.h
+1 -1
View File
@@ -1570,7 +1570,7 @@ FOR THE AUTO OFFSET INTERRUPT */
/***********************************************/
/**\name NUMERIC DEFINITIONS*/
/**********************************************/
#define BMG160_INIT_VALUE ((u8)0)
#define BMG160_INIT_VALUE (0)
#define BMG160_GEN_READ_WRITE_DATA_LENGTH ((u8)1)
#define BMG160_X_DATA_LENGTH ((u8)2)
#define BMG160_Y_DATA_LENGTH ((u8)2)
bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMM050_driver/bmm050.h
+1 -1
View File
@@ -709,7 +709,7 @@ delay_func(delay_in_msec)
#define E_BMM050_NULL_PTR ((s8)-127)
#define ERROR ((s8)-1)
#define E_BMM050_OUT_OF_RANGE ((s8)-2)
#define BMM050_NULL ((u8)0)
#define BMM050_NULL (0)
#define E_BMM050_UNDEFINED_MODE (0)
/********************************************/
bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.c
+54 -53
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.h
+2 -1
View File
@@ -13,7 +13,8 @@
#ifndef __SENSOR_BMX055_H__
#define __SENSOR_BMX055_H__
#include "sensor.h"
#include "rtdevice.h"
#include "bma2x2.h"
#include "bmm050.h"
#include "bmg160.h"
bsp/nuvoton/libraries/nu_packages/Demo/SConscript
+2 -6
View File
@@ -1,13 +1,9 @@
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
src = Split("""
usbd_hid_dance_mouse.c
slcd_show_tick.c
usbd_cdc_vcom_echo.c
atdev_utils.c
""")
group = DefineGroup('nu_pkgs_demo', src, depend = ['NU_PKG_USING_DEMO'], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nu_packages/CCAP_Sensors/ccap_demo.c → bsp/nuvoton/libraries/nu_packages/Demo/ccap_demo.c
+7 -2
View File
@@ -12,6 +12,8 @@
#include <rtthread.h>
#if defined(BSP_USING_CCAP)
#include "drv_ccap.h"
#include <dfs_posix.h>
@@ -504,7 +506,9 @@ static void ccap_grabber(void *parameter)
exit_ccap_grabber:
ccap_sensor_fini(rt_device_find(psGrabberParam->devname_ccap), rt_device_find(psGrabberParam->devname_sensor));
rt_device_close(psDevLcd);
if (psDevLcd != RT_NULL)
rt_device_close(psDevLcd);
return;
}
@@ -539,4 +543,5 @@ int ccap_demo(void)
return 0;
}
MSH_CMD_EXPORT(ccap_demo, camera capture demo);
//INIT_APP_EXPORT(ccap_demo);
//INIT_ENV_EXPORT(ccap_demo);
#endif
bsp/nuvoton/libraries/nu_packages/Demo/ccap_saver.c
+409
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/nu_packages/Demo/hwsem_counter.c
+93
View File
@@ -0,0 +1,93 @@
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-5 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(BSP_USING_HWSEM)
#include "drv_common.h"
#include "drv_hwsem.h"
#define DEF_COUNTER_ADDR_RTP (3*1024*1024)
#define DEF_COUNTER_ADDR_A35 ((0x80000000+DEF_COUNTER_ADDR_RTP)|UNCACHEABLE)
#if defined(USE_MA35D1_SUBM)
#define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_RTP
#else
#define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_A35
#endif
static void hwsem_counter_go(void *parameter)
{
rt_err_t ret;
rt_device_t psNuHwSem = (rt_device_t)parameter;
uint32_t *pu32Counter = (uint32_t *)DEF_COUNTER_ADDR;
nu_mutex_t psNuMutex = nu_mutex_init(psNuHwSem, evHWSEM0);
if (psNuMutex == RT_NULL)
return;
*pu32Counter = 0;
while (1)
{
ret = nu_mutex_take(psNuMutex, RT_WAITING_FOREVER);
if (ret != RT_EOK)
continue;
if (*pu32Counter >= 10)
{
nu_mutex_release(psNuMutex);
break;
}
else
*pu32Counter = *pu32Counter + 1;
#ifdef RT_USING_SMP
rt_kprintf("[%08x@CPU-%d] ->Inc %d@%08x\n", rt_thread_self(), rt_hw_cpu_id(), *pu32Counter, DEF_COUNTER_ADDR);
#else
rt_kprintf("[%08x]-> Inc %d@%08x\n", rt_thread_self(), *pu32Counter, DEF_COUNTER_ADDR);
#endif /* RT_USING_SMP */
nu_mutex_release(psNuMutex);
/* Relax, fair to get the mutex. */
rt_thread_mdelay(500);
}
nu_mutex_deinit(psNuHwSem, evHWSEM0);
}
static int hwsem_counter_app(void)
{
rt_err_t result = 0;
rt_thread_t thread;
rt_device_t psNuHwSem = rt_device_find("hwsem0");
if (psNuHwSem == RT_NULL)
return -1;
thread = rt_thread_create("hwsa35", hwsem_counter_go, (void *)psNuHwSem, 2048, 25, 20);
if (thread != RT_NULL)
{
#ifdef RT_USING_SMP
rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)0);
#endif
result = rt_thread_startup(thread);
RT_ASSERT(result == RT_EOK);
}
return 0;
}
INIT_APP_EXPORT(hwsem_counter_app);
MSH_CMD_EXPORT(hwsem_counter_app, demo hwsem);
#endif /* #if defined(BSP_USING_HWSEM)*/
bsp/nuvoton/libraries/nu_packages/Demo/smp_demo.c
+177
View File
@@ -0,0 +1,177 @@
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-8-16 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(RT_USING_SMP)
#include "drv_common.h"
#define DEF_COUNTER_ADDR_RTP (3*1024*1024)
#define DEF_COUNTER_ADDR_A35 ((0x80000000+DEF_COUNTER_ADDR_RTP)|UNCACHEABLE)
#if defined(USE_MA35D1_SUBM)
#define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_RTP
#else
#define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_A35
#endif
void happy_counter(void *pdata)
{
uint32_t counter = 0;
while (1)
{
rt_kprintf("cpu-%d %d\r\n", rt_hw_cpu_id(), counter++);
rt_thread_mdelay(1000);
}
}
void go_happy_counter(void)
{
rt_thread_t tid = rt_thread_create("cpu-1", happy_counter, RT_NULL, 2048, 10, 20);
RT_ASSERT(tid != RT_NULL);
rt_thread_control(tid, RT_THREAD_CTRL_BIND_CPU, (void *)1);
rt_thread_startup(tid);
}
MSH_CMD_EXPORT(go_happy_counter, go happy counter);
void happy_memcpy(void *pdata)
{
volatile uint32_t counter = 0;
void *srcbuf, *dstbuf;
rt_tick_t last, now;
#define DEF_BUF_SIZE 4096
#define DEF_TIMES 500000
srcbuf = rt_malloc_align(DEF_BUF_SIZE, nu_cpu_dcache_line_size());
dstbuf = rt_malloc_align(DEF_BUF_SIZE, nu_cpu_dcache_line_size());
now = rt_tick_get();
while (counter < DEF_TIMES)
{
rt_memcpy(dstbuf, srcbuf, DEF_BUF_SIZE);
counter++;
}
last = rt_tick_get();
if (rt_hw_cpu_id() == 1)
rt_thread_mdelay(1000);
rt_kprintf("%d Bytes copied by cpu-%d in %d ms\n", DEF_TIMES * DEF_BUF_SIZE, rt_hw_cpu_id(), last - now);
rt_free_align(srcbuf);
rt_free_align(dstbuf);
}
void go_happy_memcpy_0_1(void)
{
rt_thread_t tid0, tid1;
tid0 = rt_thread_create("cpu-0", happy_memcpy, RT_NULL, 2048, 10, 20);
RT_ASSERT(tid0 != RT_NULL);
rt_thread_control(tid0, RT_THREAD_CTRL_BIND_CPU, (void *)0);
tid1 = rt_thread_create("cpu-1", happy_memcpy, RT_NULL, 2048, 10, 20);
RT_ASSERT(tid1 != RT_NULL);
rt_thread_control(tid1, RT_THREAD_CTRL_BIND_CPU, (void *)1);
rt_thread_startup(tid0);
rt_thread_startup(tid1);
}
MSH_CMD_EXPORT(go_happy_memcpy_0_1, go happy memcpy on dual - core);
void go_happy_memcpy_0(void)
{
rt_thread_t tid0;
tid0 = rt_thread_create("cpu-0", happy_memcpy, RT_NULL, 2048, 10, 20);
RT_ASSERT(tid0 != RT_NULL);
rt_thread_control(tid0, RT_THREAD_CTRL_BIND_CPU, (void *)0);
rt_thread_startup(tid0);
}
MSH_CMD_EXPORT(go_happy_memcpy_0, go happy memcpy on core0);
void go_happy_memcpy_1(void)
{
rt_thread_t tid1;
tid1 = rt_thread_create("cpu-1", happy_memcpy, RT_NULL, 2048, 10, 20);
RT_ASSERT(tid1 != RT_NULL);
rt_thread_control(tid1, RT_THREAD_CTRL_BIND_CPU, (void *)1);
rt_thread_startup(tid1);
}
MSH_CMD_EXPORT(go_happy_memcpy_1, go happy memcpy on core1);
static void happy_mutex(void *parameter)
{
rt_err_t ret;
rt_mutex_t psMutex = (rt_mutex_t)parameter;
uint32_t *pu32Counter = (uint32_t *)DEF_COUNTER_ADDR;
*pu32Counter = 0;
while (1)
{
ret = rt_mutex_take(psMutex, RT_WAITING_FOREVER);
if (ret != RT_EOK)
continue;
if (*pu32Counter >= 1000)
{
rt_mutex_release(psMutex);
break;
}
else
*pu32Counter = *pu32Counter + 1;
#ifdef RT_USING_SMP
rt_kprintf("[%08x@CPU-%d] ->Inc %d@%08x\n", rt_thread_self(), rt_hw_cpu_id(), *pu32Counter, DEF_COUNTER_ADDR);
#else
rt_kprintf("[%08x]-> Inc %d@%08x\n", rt_thread_self(), *pu32Counter, DEF_COUNTER_ADDR);
#endif /* RT_USING_SMP */
rt_mutex_release(psMutex);
}
}
static int go_happy_mutex(void)
{
rt_thread_t thread;
rt_mutex_t sem = rt_mutex_create("mutexsem", RT_IPC_FLAG_PRIO);
thread = rt_thread_create("mutex0", happy_mutex, (void *)sem, 2048, 25, 20);
if (thread != RT_NULL)
{
#ifdef RT_USING_SMP
rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)0);
#endif
rt_thread_startup(thread);
}
thread = rt_thread_create("mutex1", happy_mutex, (void *)sem, 2048, 25, 20);
if (thread != RT_NULL)
{
#ifdef RT_USING_SMP
rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)1);
#endif
rt_thread_startup(thread);
}
return 0;
}
MSH_CMD_EXPORT(go_happy_mutex, demo mutex);
#endif
bsp/nuvoton/libraries/nu_packages/Demo/wormhole_demo.c
+325
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/libraries/nu_packages/Kconfig
-4
View File
@@ -7,10 +7,6 @@ menu "Nuvoton Packages Config"
bool "Enable demos"
default y
config NU_PKG_USING_LVGL
bool "Enable LVGL demos"
default n
config NU_PKG_USING_BMX055
bool "BMX055 9-axis sensor."
select RT_USING_I2C
bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.c
+3 -4
View File
@@ -15,8 +15,7 @@
#if defined(NU_PKG_USING_MAX31875)
#include <sys/time.h>
#include "sensor.h"
#include "max31875_c.h"
#include "sensor_max31875.h"
#define DBG_ENABLE
#define DBG_LEVEL DBG_LOG
@@ -65,9 +64,9 @@ static int max31875_i2c_read_reg(int address, const char *reg, int reg_length, c
return RT_EOK;
}
static rt_size_t max31875_fetch_data(struct rt_sensor_device *sensor, void *buf, rt_size_t len)
static rt_ssize_t max31875_fetch_data(rt_sensor_t sensor, rt_sensor_data_t data, rt_size_t len)
{
struct rt_sensor_data *data = (struct rt_sensor_data *)buf;
RT_ASSERT(data);
if (sensor->info.type == RT_SENSOR_CLASS_TEMP)
{
bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.h
+2 -1
View File
@@ -13,7 +13,8 @@
#ifndef __SENSOR_MAX31875_H__
#define __SENSOR_MAX31875_H__
#include "sensor.h"
#include "rtdevice.h"
#include "max31875_c.h"
int rt_hw_max31875_init(const char *name, struct rt_sensor_config *cfg);
bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.c
+15 -16
View File
@@ -13,7 +13,6 @@
#include <rtthread.h>
#include <sys/time.h>
#include "sensor.h"
#include "sensor_nct7717u.h"
#define DBG_ENABLE
@@ -116,19 +115,19 @@ static rt_err_t nct7717u_ldt_readout(struct rt_i2c_bus_device *i2c_bus_dev, uint
return nct7717u_i2c_read_reg(i2c_bus_dev, (const char *)&u8Reg, sizeof(u8Reg), (char *)u8Temp, sizeof(uint8_t));
}
static rt_size_t nct7717u_fetch_data(struct rt_sensor_device *sensor, void *buf, rt_size_t len)
static rt_ssize_t nct7717u_fetch_data(rt_sensor_t sensor, rt_sensor_data_t data, rt_size_t len)
{
struct rt_sensor_data *data = (struct rt_sensor_data *)buf;
RT_ASSERT(data);
if (sensor->info.type == RT_SENSOR_CLASS_TEMP)
if (sensor->info.type == RT_SENSOR_TYPE_TEMP)
{
rt_int8_t i8Temp;
struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.user_data;
struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.arg;
if (nct7717u_ldt_readout(i2c_bus_dev, (uint8_t *)&i8Temp) == RT_EOK)
{
rt_int32_t i32TempValue = i8Temp;
data->type = RT_SENSOR_CLASS_TEMP;
data->type = RT_SENSOR_TYPE_TEMP;
data->data.temp = i32TempValue * 10;
data->timestamp = rt_sensor_get_ts();
return 1;
@@ -143,7 +142,7 @@ static rt_err_t nct7717u_control(struct rt_sensor_device *sensor, int cmd, void
{
case RT_SENSOR_CTRL_GET_ID:
{
struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.user_data;
struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.arg;
uint8_t u8Did;
RT_ASSERT(args);
@@ -174,14 +173,14 @@ int rt_hw_nct7717u_temp_init(const char *name, struct rt_sensor_config *cfg)
if (sensor == RT_NULL)
return -(RT_ENOMEM);
sensor->info.type = RT_SENSOR_CLASS_TEMP;
sensor->info.vendor = RT_SENSOR_VENDOR_UNKNOWN;
sensor->info.model = "nct7717u_temp";
sensor->info.unit = RT_SENSOR_UNIT_DCELSIUS;
sensor->info.intf_type = RT_SENSOR_INTF_I2C;
sensor->info.range_max = 127;
sensor->info.range_min = -128;
sensor->info.period_min = 100; //100ms
sensor->info.type = RT_SENSOR_TYPE_TEMP;
sensor->info.vendor = RT_SENSOR_VENDOR_UNKNOWN;
sensor->info.name = "nct7717u_temp";
sensor->info.unit = RT_SENSOR_UNIT_CELSIUS;
sensor->info.intf_type = RT_SENSOR_INTF_I2C;
sensor->info.scale.range_max = 127;
sensor->info.scale.range_min = -128;
sensor->info.acquire_min = 100; //100ms
rt_memcpy(&sensor->config, cfg, sizeof(struct rt_sensor_config));
sensor->ops = &sensor_ops;
@@ -213,7 +212,7 @@ int rt_hw_nct7717u_init(const char *name, struct rt_sensor_config *cfg)
{
goto exit_rt_hw_nct7717u_init;
}
intf->user_data = i2c_bus_dev;
intf->arg = i2c_bus_dev;
if (nct7717u_probe(i2c_bus_dev) != RT_EOK)
goto exit_rt_hw_nct7717u_init;
bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.h
+1 -1
View File
@@ -13,7 +13,7 @@
#ifndef __SENSOR_NCT7717U_H__
#define __SENSOR_NCT7717U_H__
#include "sensor.h"
#include "rtdevice.h"
int rt_hw_nct7717u_init(const char *name, struct rt_sensor_config *cfg);
bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c
+9 -9
View File
@@ -864,14 +864,14 @@ static int nid(int argc, char **argv)
*/
#include "drv_spi.h"
static int find_valid_window(const char* pcDevName)
static int find_valid_window(const char *pcDevName)
{
rt_device_t psRtDev;
nu_spi_t psNuSpiBus;
int i, j, k;
psRtDev = rt_device_find(pcDevName);
if (!psRtDev || (psRtDev->type != RT_Device_Class_SPIDevice) )
if (!psRtDev || (psRtDev->type != RT_Device_Class_SPIDevice))
{
LOG_E("Usage %s: %s <spi device name>.\n", __func__, __func__);
return -1;
@@ -887,21 +887,21 @@ static int find_valid_window(const char* pcDevName)
LOG_I("Probe JEDEC[%08X] on %s bus.", u32JedecId, psNuSpiBus->name);
rt_kprintf(" ");
for (i=0; i<8; i++) // Pin driving
for (i = 0; i < 8; i++) // Pin driving
rt_kprintf("%d ", i);
rt_kprintf("\n");
for (j=0; j<0xC; j++) // Master RX delay cycle
for (j = 0; j < 0xC; j++) // Master RX delay cycle
{
rt_kprintf("%X: ", j);
for (i=0; i<8; i++) // Pin driving
for (i = 0; i < 8; i++) // Pin driving
{
SPI_SET_MRXPHASE(psNuSpiBus->spi_base, j);
GPIO_SetDrivingCtl(PD, (BIT0|BIT1|BIT2|BIT3|BIT4|BIT5), i);
GPIO_SetDrivingCtl(PD, (BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5), i);
spinand_jedecid_get((struct rt_qspi_device *)psRtDev, &id);
if ( id==u32JedecId )
if (id == u32JedecId)
{
rt_kprintf("O ");
}
@@ -934,9 +934,9 @@ static int nprobe(int argc, char **argv)
static int nprobe_auto(int argc, char **argv)
{
int count=0;
int count = 0;
while( count++ < 100 )
while (count++ < 100)
find_valid_window("qspi01");
return 0;
bsp/nuvoton/libraries/nu_packages/TPC/ft5446.c
+5 -5
View File
@@ -318,11 +318,11 @@ int rt_hw_ft5446_init(const char *name, struct rt_touch_config *cfg)
ft5446_init(&ft5446_client);
rt_memset(&pre_x[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_y[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_w[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t));
rt_memset(&s_tp_dowm[0], 0, FT_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_id[0], 0xff, FT_MAX_TOUCH * sizeof(int8_t));
rt_memset(&pre_x[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_y[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_w[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&s_tp_dowm[0], 0, FT_MAX_TOUCH * sizeof(rt_int8_t));
rt_memset(&pre_id[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int8_t));
/* register touch device */
touch_device->info.type = RT_TOUCH_TYPE_CAPACITANCE;
bsp/nuvoton/libraries/nu_packages/TPC/gt911.c
+1 -1
View File
@@ -471,7 +471,7 @@ int rt_hw_gt911_init(const char *name, struct rt_touch_config *cfg)
rt_memset(&pre_x[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_y[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_w[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&s_tp_dowm[0], 0, GT911_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&s_tp_dowm[0], 0, GT911_MAX_TOUCH * sizeof(rt_int8_t));
rt_memset(&pre_id[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_uint8_t));
/* register touch device */
bsp/nuvoton/libraries/nu_packages/TPC/ili.c
+5 -5
View File
@@ -615,11 +615,11 @@ int rt_hw_ili_tpc_init(const char *name, struct rt_touch_config *cfg)
goto exit_rt_hw_ili_tpc_init;
}
rt_memset(&pre_x[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_y[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_w[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t));
rt_memset(&s_tp_dowm[0], 0, ILI_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_id[0], 0xff, ILI_MAX_TOUCH * sizeof(int8_t));
rt_memset(&pre_x[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_y[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_w[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&s_tp_dowm[0], 0, ILI_MAX_TOUCH * sizeof(rt_uint8_t));
rt_memset(&pre_id[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_uint8_t));
/* register touch device */
rt_memcpy(&touch_device->config, cfg, sizeof(struct rt_touch_config));
bsp/nuvoton/libraries/nu_packages/TPC/st1663i.c
+5 -5
View File
@@ -313,11 +313,11 @@ int rt_hw_st1663i_init(const char *name, struct rt_touch_config *cfg)
st1663i_init(&st1663i_client);
rt_memset(&pre_x[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_y[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_w[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t));
rt_memset(&s_tp_dowm[0], 0, ST_MAX_TOUCH * sizeof(int16_t));
rt_memset(&pre_id[0], 0xff, ST_MAX_TOUCH * sizeof(int8_t));
rt_memset(&pre_x[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_y[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&pre_w[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t));
rt_memset(&s_tp_dowm[0], 0, ST_MAX_TOUCH * sizeof(rt_int8_t));
rt_memset(&pre_id[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int8_t));
/* register touch device */
touch_device->info.type = RT_TOUCH_TYPE_CAPACITANCE;
bsp/nuvoton/libraries/nuc980/Driver/Source/nu_rtc.c
+1 -1
View File
@@ -349,7 +349,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt)
{
uint32_t u32RegCAL, u32RegTIME;
if (sPt == 0ul)
if (sPt == NULL)
{
}
else
bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig
+1
View File
@@ -12,6 +12,7 @@ config SOC_SERIES_NUC980
config BSP_USING_MMU
bool "Enable MMU"
select ARCH_ARM_MMU
default y
menuconfig BSP_USING_PDMA
bsp/nuvoton/ma35-rtp/.config
+314 -19
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/ma35-rtp/rtthread.bin
BIN
View File
Binary file not shown.
bsp/nuvoton/nk-980iot/.config
+316 -31
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-980iot/applications/lvgl/lv_demo.c
+3 -4
View File
@@ -17,16 +17,15 @@ void lv_user_gui_init(void)
#if LV_USE_DEMO_BENCHMARK
extern void lv_demo_benchmark(void);
lv_demo_benchmark();
#endif
#if LV_USE_DEMO_WIDGETS
#elif LV_USE_DEMO_WIDGETS
extern void lv_demo_widgets(void);
lv_demo_widgets();
#endif
#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC
#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC)
extern void lv_demo_music(void);
lv_demo_music();
#endif
}
bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.c
+5 -1
View File
@@ -16,6 +16,10 @@
#define DBG_COLOR
#include <rtdbg.h>
#if !defined(NU_PKG_LVGL_RENDERING_LAYER)
#define NU_PKG_LVGL_RENDERING_LAYER "lcd"
#endif
/*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf;
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
@@ -47,7 +51,7 @@ void lv_port_disp_init(void)
rt_err_t result;
void *buf1 = RT_NULL;
lcd_device = rt_device_find("lcd");
lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER);
if (lcd_device == 0)
{
LOG_E("error!");
bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.h
-23
View File
@@ -1,23 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_DISP_H
#define LV_PORT_DISP_H
#ifdef __cplusplus
extern "C" {
#endif
void lv_port_disp_init(void);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_indev.h
-28
View File
@@ -1,28 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_INDEV_H
#define LV_PORT_INDEV_H
#ifdef __cplusplus
extern "C" {
#endif
#include <lv_hal_indev.h>
extern lv_indev_t *button_indev;
void lv_port_indev_init(void);
void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
bsp/nuvoton/nk-980iot/project.uvproj
-2133
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-980iot/rtconfig.h
-442
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-n9h30/.config
+342 -31
View File
File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-n9h30/applications/SConscript
-4
View File
@@ -1,15 +1,11 @@
from building import *
import os
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
list = os.listdir(cwd)
for item in list:
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
group = group + SConscript(os.path.join(item, 'SConscript'))
Return('group')
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_conf.h
+3 -6
View File
@@ -14,9 +14,8 @@
#include "rtconfig.h"
#if defined(SOC_SERIES_N9H30)
#define LV_USE_GPU_N9H30_GE2D 1
//#define LV_USE_ANTI_TEARING 1
//#define LV_DISP_DEF_REFR_PERIOD 16
//#define LV_DISP_DEF_REFR_PERIOD 30
#ifndef BIT31
#define BIT31 (0x80000000) ///< Bit 31 mask of an 32 bit integer
@@ -25,8 +24,6 @@
#define IS_CACHEABLE_VRAM(addr) !((uint32_t)addr & BIT31)
#endif
#define LV_VERSION_EQUAL(x,y,z) (x == LVGL_VERSION_MAJOR && y==LVGL_VERSION_MINOR && z==LVGL_VERSION_PATCH )
#define LV_COLOR_DEPTH BSP_LCD_BPP
#define LV_HOR_RES_MAX BSP_LCD_WIDTH
#define LV_VER_RES_MAX BSP_LCD_HEIGHT
@@ -36,7 +33,7 @@
#define LV_USE_PERF_MONITOR 1
//#define CONFIG_LV_LOG_LEVEL LV_LOG_LEVEL_TRACE
//#define LV_USE_DEMO_RTT_MUSIC 1
#define LV_USE_DEMO_RTT_MUSIC 1
#if LV_USE_DEMO_RTT_MUSIC
#define LV_COLOR_SCREEN_TRANSP 1
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
@@ -46,7 +43,7 @@
#endif
/* Please comment LV_USE_DEMO_RTT_MUSIC declaration before un-comment below */
#define LV_USE_DEMO_WIDGETS 1
//#define LV_USE_DEMO_WIDGETS 1
//#define LV_USE_DEMO_BENCHMARK 1
#endif
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_demo.c
+3 -4
View File
@@ -17,16 +17,15 @@ void lv_user_gui_init(void)
#if LV_USE_DEMO_BENCHMARK
extern void lv_demo_benchmark(void);
lv_demo_benchmark();
#endif
#if LV_USE_DEMO_WIDGETS
#elif LV_USE_DEMO_WIDGETS
extern void lv_demo_widgets(void);
lv_demo_widgets();
#endif
#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC
#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC)
extern void lv_demo_music(void);
lv_demo_music();
#endif
}
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.c
+40 -24
View File
@@ -17,8 +17,6 @@
*********************/
#include <lvgl.h>
#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)
#include "lv_gpu_n9h30_ge2d.h"
#include "nu_2d.h"
#include "mmu.h"
@@ -119,7 +117,10 @@ void lv_draw_n9h30_ge2d_blend(lv_draw_ctx_t *draw_ctx, const lv_draw_sw_blend_ds
}
}
if (!done) lv_draw_sw_blend_basic(draw_ctx, dsc);
if (!done)
{
lv_draw_sw_blend_basic(draw_ctx, dsc);
}
}
static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_stride, const lv_area_t *fill_area,
@@ -130,7 +131,7 @@ static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_
lv_color_t *start_buf = dest_buf - (fill_area->y1 * dest_stride) - fill_area->x1;
//rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 );
// rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 );
if (IS_CACHEABLE_VRAM(dest_buf))
mmu_clean_invalidated_dcache((uint32_t)dest_buf, sizeof(lv_color_t) * (dest_stride * fill_area_h + fill_area_w));
@@ -153,34 +154,51 @@ static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_
static void lv_draw_n9h30_ge2d_blend_map(lv_color_t *dest_buf, const lv_area_t *dest_area, lv_coord_t dest_stride,
const lv_color_t *src_buf, lv_coord_t src_stride, lv_opa_t opa)
{
/*Simple copy*/
int32_t dest_x = dest_area->x1;
int32_t dest_y = dest_area->y1;
int32_t dest_w = lv_area_get_width(dest_area);
int32_t dest_h = lv_area_get_height(dest_area);
const lv_color_t *dest_start_buf = dest_buf - (dest_area->y1 * dest_stride) - dest_area->x1;
//rt_kprintf("[blend_map %d %08x -> %08x] (x:%d y:%d, %dx%d) <stride src:%d dst:%d>\n", lv_area_get_size(dest_area), src_buf, dest_buf, dest_x, dest_y, dest_w, dest_h, src_stride, dest_stride);
// Enter GE2D ->
ge2dInit(sizeof(lv_color_t) * 8, dest_stride, dest_area->y2, (void *)dest_start_buf);
if (opa >= LV_OPA_MAX)
if (!IS_CACHEABLE_VRAM(dest_buf))
{
ge2dBitblt_SetAlphaMode(0, 0, 0);
ge2dBitblt_SetDrawMode(0, 0, 0);
const lv_color_t *dest_start_buf = dest_buf - (dest_area->y1 * dest_stride) - dest_area->x1;
int32_t dest_x = dest_area->x1;
int32_t dest_y = dest_area->y1;
// Enter GE2D ->
ge2dInit(sizeof(lv_color_t) * 8, dest_stride, dest_area->y2, (void *)dest_start_buf);
if (opa >= LV_OPA_MAX)
{
ge2dBitblt_SetAlphaMode(0, 0, 0);
ge2dBitblt_SetDrawMode(0, 0, 0);
}
else
{
ge2dBitblt_SetAlphaMode(1, opa, opa);
}
if (IS_CACHEABLE_VRAM(src_buf))
mmu_clean_dcache((uint32_t)src_buf, sizeof(lv_color_t) * (src_stride * dest_h + dest_w));
ge2dSpriteBlt_Screen(dest_x, dest_y, dest_w, dest_h, (void *)src_buf);
// -> Leave GE2D
}
else
{
ge2dBitblt_SetAlphaMode(1, opa, opa);
int32_t x, y;
/*Simple copy*/
for (y = 0; y < dest_h; y++)
{
for (x = 0; x < dest_w; x++)
{
dest_buf[x] = src_buf[x];
}
dest_buf += dest_stride;
src_buf += src_stride;
}
}
// flush
mmu_clean_dcache((uint32_t)src_buf, sizeof(lv_color_t) * (src_stride * dest_h + dest_w));
ge2dSpriteBlt_Screen(dest_x, dest_y, dest_w, dest_h, (void *)src_buf);
// -> Leave GE2D
}
void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx)
@@ -191,5 +209,3 @@ void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx)
/**********************
* STATIC FUNCTIONS
**********************/
#endif // #if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0))
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.h
-4
View File
@@ -21,8 +21,6 @@ extern "C" {
#include "../../hal/lv_hal_disp.h"
#include "../sw/lv_draw_sw.h"
#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)
/*********************
* DEFINES
*********************/
@@ -54,8 +52,6 @@ void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx);
* MACROS
**********************/
#endif /*#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)*/
#ifdef __cplusplus
} /*extern "C"*/
#endif
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c
+32 -87
View File
@@ -8,20 +8,20 @@
* 2021-12-17 Wayne The first version
*/
#include <lvgl.h>
#include "nu_2d.h"
#include "mmu.h"
#if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0))
#include "lv_gpu_n9h30_ge2d.h"
#endif
#include "lv_gpu_n9h30_ge2d.h"
#define LOG_TAG "lvgl.disp"
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_ERROR
#define DBG_LEVEL DBG_INFO
#define DBG_COLOR
#include <rtdbg.h>
#if !defined(NU_PKG_LVGL_RENDERING_LAYER)
#define NU_PKG_LVGL_RENDERING_LAYER "lcd"
#endif
/*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf;
static rt_device_t lcd_device = 0;
@@ -32,6 +32,8 @@ static void *buf3_next = RT_NULL;
static uint32_t u32FirstFlush = 0;
static uint32_t LV_USE_GPU_N9H30_GE2D = 1;
static void nu_antitearing(lv_disp_draw_buf_t *draw_buf, lv_color_t *color_p)
{
if (buf3_next)
@@ -74,11 +76,15 @@ static void nu_flush_full_refresh(lv_disp_drv_t *disp_drv, const lv_area_t *area
static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
{
#if (LV_USE_GPU_N9H30_GE2D==1)
int32_t area_w = lv_area_get_width(area);
int32_t area_h = lv_area_get_height(area);
lv_draw_sw_blend_dsc_t blend_flush = {0};
lv_draw_ctx_t draw_flush = {0};
lv_area_t flush_area = {0, 0, info.width - 1, info.height - 1 };
//rt_kprintf("[nu_flush %d %08x] %dx%d %d %d\n", lv_area_get_size(area), color_p, area_w, area_h, area->x1, area->y1 );
blend_flush.blend_area = area;
blend_flush.src_buf = color_p;
blend_flush.mask_buf = NULL;
@@ -91,23 +97,6 @@ static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t
lv_draw_n9h30_ge2d_blend(&draw_flush, (const lv_draw_sw_blend_dsc_t *)&blend_flush);
#else
int32_t flush_area_w = lv_area_get_width(area);
int32_t flush_area_h = lv_area_get_height(area);
//if ( flush_area_w&0x3 != 0 )
// rt_kprintf("[%s %08x] %dx%d %d %d\n", __func__, color_p, flush_area_w, flush_area_h, area->x1, area->y1 );
/* Update dirty region. */
// Enter GE2D ->
ge2dInit(sizeof(lv_color_t) * 8, info.width, info.height, (void *)info.framebuffer);
ge2dBitblt_SetAlphaMode(-1, 0, 0);
ge2dBitblt_SetDrawMode(-1, 0, 0);
ge2dSpriteBlt_Screen(area->x1, area->y1, flush_area_w, flush_area_h, (void *)color_p);
// -> Leave GE2D
#endif
if (!u32FirstFlush)
{
/* Enable backlight at first flushing. */
@@ -118,52 +107,9 @@ static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t
lv_disp_flush_ready(disp_drv);
}
#if LV_VERSION_EQUAL(8, 1, 0)
static void nu_fill_cb(struct _lv_disp_drv_t *disp_drv, lv_color_t *dest_buf, lv_coord_t dest_width,
const lv_area_t *fill_area, lv_color_t color)
{
int32_t fill_area_w = lv_area_get_width(fill_area);
int32_t fill_area_h = lv_area_get_height(fill_area);
if (lv_area_get_size(fill_area) < 3600)
{
/*Software filling*/
int y;
lv_color_t *disp_buf_first = dest_buf + dest_width * fill_area->y1 + fill_area->x1;
for (y = 0; y < fill_area_h; y++)
{
lv_color_fill(disp_buf_first, color, fill_area_w);
disp_buf_first += dest_width;
}
}
else
{
//rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 );
if (IS_CACHEABLE_VRAM(dest_buf))
mmu_clean_invalidated_dcache((uint32_t)dest_buf, sizeof(lv_color_t) * (dest_width * fill_area_h + fill_area_w));
/*Hardware filling*/
// Enter GE2D ->
ge2dInit(sizeof(lv_color_t) * 8, fill_area_w, fill_area_h, (void *)dest_buf);
ge2dClip_SetClip(fill_area->x1, fill_area->y1, fill_area->x2, fill_area->y2);
if (sizeof(lv_color_t) == 4)
ge2dFill_Solid(fill_area->x1, fill_area->y1, fill_area_w, fill_area_h, color.full);
else if (sizeof(lv_color_t) == 2)
ge2dFill_Solid_RGB565(fill_area->x1, fill_area->y1, fill_area_w, fill_area_h, color.full);
ge2dClip_SetClip(-1, 0, 0, 0);
// -> Leave GE2D
}
}
#endif
void nu_perf_monitor(struct _lv_disp_drv_t *disp_drv, uint32_t time, uint32_t px)
{
rt_kprintf("Elapsed: %dms, Pixel: %d, Bytes:%d, %d%\n", time, px, px * sizeof(lv_color_t), px * 100 / disp_drv->draw_buf->size);
LOG_I("Elapsed: %dms, Pixel: %d, Bytes:%d, %d%\n", time, px, px * sizeof(lv_color_t), px * 100 / disp_drv->draw_buf->size);
}
void lv_port_disp_init(void)
@@ -173,13 +119,19 @@ void lv_port_disp_init(void)
void *buf2 = RT_NULL;
uint32_t u32FBSize;
lcd_device = rt_device_find("lcd");
if (lcd_device == 0)
lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER);
if (lcd_device == RT_NULL)
{
LOG_E("error!");
return;
}
if (!LV_VERSION_CHECK(8, 3, 0))
{
LV_USE_GPU_N9H30_GE2D = 0;
}
LOG_I("LVGL: %s drawing using 2DGE", LV_USE_GPU_N9H30_GE2D ? "Enabled" : "Disabled");
/* get framebuffer address */
result = rt_device_control(lcd_device, RTGRAPHIC_CTRL_GET_INFO, &info);
if (result != RT_EOK)
@@ -205,25 +157,22 @@ void lv_port_disp_init(void)
#if (LV_USE_ANTI_TEARING==1)
disp_drv.full_refresh = 1;
#endif
LOG_I("LVGL: %s anti-tearing", disp_drv.full_refresh ? "Enabled" : "Disabled");
if (disp_drv.full_refresh)
{
#if (LV_USE_GPU_N9H30_GE2D==1)
buf1 = (void *)info.framebuffer; // Use Non-cacheable VRAM
#else
buf1 = (void *)((uint32_t)info.framebuffer & ~BIT31); // Use Cacheable VRAM
#endif
buf2 = (void *)((uint32_t)buf1 + u32FBSize);
buf3_next = (void *)((uint32_t)buf2 + u32FBSize);
rt_kprintf("LVGL: Use triple screen-sized buffers(full_refresh) - buf1@%08x, buf2@%08x, buf3_next@%08x\n", buf1, buf2, buf3_next);
LOG_I("LVGL: Use triple screen-sized buffers(full_refresh) - buf1@%08x, buf2@%08x, buf3_next@%08x", buf1, buf2, buf3_next);
disp_drv.flush_cb = nu_flush_full_refresh;
}
else
{
buf1 = (void *)(((uint32_t)info.framebuffer) + u32FBSize);
buf1 = (void *)(((uint32_t)info.framebuffer & ~BIT31) + u32FBSize); // Use Cacheable VRAM
buf2 = (void *)((uint32_t)buf1 + u32FBSize);
rt_kprintf("LVGL: Use two screen-sized buffers - buf1@%08x, buf2@%08x\n", buf1, buf2);
LOG_I("LVGL: Use two screen-sized buffers - buf1@%08x, buf2@%08x", buf1, buf2);
rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, info.framebuffer);
disp_drv.flush_cb = nu_flush;
@@ -242,16 +191,12 @@ void lv_port_disp_init(void)
/*Set a display buffer*/
disp_drv.draw_buf = &disp_buf;
#if LV_VERSION_EQUAL(8, 1, 0)
/*Fill a memory with a color (GPU only)*/
disp_drv.gpu_fill_cb = nu_fill_cb;
#endif
#if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0))
disp_drv.draw_ctx_init = lv_draw_n9h30_ge2d_ctx_init;
disp_drv.draw_ctx_deinit = lv_draw_n9h30_ge2d_ctx_init;
disp_drv.draw_ctx_size = sizeof(lv_draw_n9h30_ge2d_ctx_t);
#endif
if (LV_USE_GPU_N9H30_GE2D)
{
disp_drv.draw_ctx_init = lv_draw_n9h30_ge2d_ctx_init;
disp_drv.draw_ctx_deinit = lv_draw_n9h30_ge2d_ctx_init;
disp_drv.draw_ctx_size = sizeof(lv_draw_n9h30_ge2d_ctx_t);
}
/*Called after every refresh cycle to tell the rendering and flushing time + the number of flushed pixels*/
//disp_drv.monitor_cb = nu_perf_monitor;
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.h
-23
View File
@@ -1,23 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_DISP_H
#define LV_PORT_DISP_H
#ifdef __cplusplus
extern "C" {
#endif
void lv_port_disp_init(void);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_indev.h
-28
View File
@@ -1,28 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_INDEV_H
#define LV_PORT_INDEV_H
#ifdef __cplusplus
extern "C" {
#endif
#include <lv_hal_indev.h>
extern lv_indev_t *button_indev;
void lv_port_indev_init(void);
void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
bsp/nuvoton/nk-n9h30/applications/mnt.c
+20 -5
View File
@@ -12,6 +12,8 @@
#include <rtthread.h>
#if defined(RT_USING_DFS)
#define LOG_TAG "mnt"
#define DBG_ENABLE
#define DBG_SECTION_NAME "mnt"
@@ -160,9 +162,10 @@ exit_mkdir_p:
#if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE)
#include "yaffs_guts.h"
void yaffs_dev_init(void)
int yaffs_dev_init(void)
{
int i;
for (i = 0; i < sizeof(mount_table) / sizeof(struct dfs_mount_tbl); i++)
{
if (mount_table[i].filesystemtype && !rt_strcmp(mount_table[i].filesystemtype, "yaffs"))
@@ -170,11 +173,26 @@ void yaffs_dev_init(void)
struct rt_mtd_nand_device *psMtdNandDev = RT_MTD_NAND_DEVICE(rt_device_find(mount_table[i].device_name));
if (psMtdNandDev)
{
LOG_I("yaffs start [%s].", mount_table[i].device_name);
yaffs_start_up(psMtdNandDev, (const char *)mount_table[i].path);
LOG_I("dfs mount [%s].", mount_table[i].device_name);
if (dfs_mount(mount_table[i].device_name,
mount_table[i].path,
mount_table[i].filesystemtype,
mount_table[i].rwflag,
mount_table[i].data) != 0)
{
LOG_E("mount fs[%s] on %s failed.", mount_table[i].filesystemtype, mount_table[i].path);
}
}
}
}
return 0;
}
INIT_APP_EXPORT(yaffs_dev_init);
#endif
/* Initialize the filesystem */
@@ -246,13 +264,10 @@ int filesystem_init(void)
}
#endif
#if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE)
yaffs_dev_init();
#endif
exit_filesystem_init:
return -result;
}
INIT_ENV_EXPORT(filesystem_init);
#endif
#endif
bsp/nuvoton/nk-n9h30/linking_scripts/n9h30.ld
+5
View File
@@ -53,6 +53,11 @@ SECTIONS
. = ALIGN(4);
}
. = ALIGN(4);
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
__exidx_end = .;
. = ALIGN(4);
.rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) *(.eh_frame) }
bsp/nuvoton/nk-n9h30/project.uvproj
-6990
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File diff suppressed because one or more lines are too long
bsp/nuvoton/nk-n9h30/rtconfig.h
-422
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-n9h30/rtconfig.py
+2 -2
View File
@@ -23,8 +23,8 @@ elif CROSS_TOOL == 'keil':
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
#BUILD = ''
#BUILD = 'debug'
BUILD = ''
CORE = 'arm926ej-s'
MAP_FILE = 'rtthread_n9h30.map'
bsp/nuvoton/nk-rtu980/.config
+315 -21
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-rtu980/project.uvproj
-2284
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-rtu980/rtconfig.h
-427
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/nk-rtu980/rtconfig.py
+1 -1
View File
@@ -16,7 +16,7 @@ if os.getenv('RTT_ROOT'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q1-update\bin'
elif CROSS_TOOL == 'keil':
if CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:\Keil_v5'
bsp/nuvoton/numaker-hmi-ma35d1/.config
+343 -38
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File diff suppressed because it is too large Load Diff
bsp/nuvoton/numaker-hmi-ma35d1/README.md
+8 -8
View File
@@ -88,10 +88,10 @@ Support GCC compiler. More information of these compiler version as following:
| Compiler | Tested version |
| -- | -- |
| GCC | 6-2017-q1-update|
| GCC | Arm Embedded Toolchain 10.3-2021.10 (Env 1.3.5 embedded version)|
## **Build RT-Thread**
You can build rt-thread.bin for NuMaker-HMI-MA35D1 board. Steps as following. Notice, the building will include **ma35-rtp/rtthread.bin** file into **NuMaker-HMI-MA35D1/rtthread.bin** for heterogeneous multi-core demonstration.
You can build rt-thread.bin for NuMaker-HMI-MA35D1 board. Steps as following. Notice, the building will include **ma35-rtp/rtthread.bin** file into **numaker-hmi-ma35d1/rtthread.bin** for heterogeneous multi-core demonstration.
```bash
# cd rt-thread/bsp/nuvoton/numaker-hmi-ma35d1
@@ -194,8 +194,8 @@ You can run windows batch script to download rtthread.bin into Raw NAND flash, t
|Connector on board|Wiring|Usage|
|-|-|-|
|VCOM(CON21)|Use an USB line| rt-thread@RTP Console |
|RS232_16(CON14)|Using an USB to RS232 convert| rt-thread@CA35 Console |
|VCOM(CON21)|Use an USB line| rt-thread@CA35 Console |
|RS232_16(CON14)|Using an USB to RS232 convert| rt-thread@RTP Console |
You can use Tera Term terminate emulator (or other software) to type commands of RTT. All parameters of serial communication are shown in below image. Here, you can find out the corresponding port number of Nuvoton Virtual Com Port in window device manager.
@@ -206,11 +206,11 @@ You can use Tera Term terminate emulator (or other software) to type commands of
## **Purchase**
* [Nuvoton Direct](https://ComingSoon)
* [Nuvoton Direct](https://direct.nuvoton.com/en/numaker-hmi-ma35d1-s1)
## **Resources**
* [Download Board Schematics](https://ComingSoon)
* [Download Quick Start Guide](https://ComingSoon)
* [Download TRM](https://ComingSoon)
* [Download Board Schematics](https://www.nuvoton.com/resource-download.jsp?tp_GUID=HL102022102107140870)
* [Download User Manual](https://www.nuvoton.com/resource-download.jsp?tp_GUID=UG132022101900252882)
* [Download Datasheet](https://www.nuvoton.com/resource-download.jsp?tp_GUID=DA00-MA35D16)
* [Download NuWriter](https://github.com/OpenNuvoton/MA35D1_NuWriter)

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