mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-02-07 01:44:41 +08:00
Merge pull request #1766 from RT-Thread/rm_tm4c129x-dk
[BSP] remove tm4c129x-dk bsp
This commit is contained in:
Bernard Xiong
GitHub
@@ -1,219 +0,0 @@
|
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#
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# Automatically generated file; DO NOT EDIT.
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# RT-Thread Configuration
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#
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#
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# RT-Thread Kernel
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#
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CONFIG_RT_NAME_MAX=8
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CONFIG_RT_ALIGN_SIZE=4
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=100
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CONFIG_RT_DEBUG=y
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_DEBUG_INIT=0
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# CONFIG_RT_DEBUG_THREAD is not set
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CONFIG_RT_USING_HOOK=y
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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CONFIG_RT_USING_TIMER_SOFT=y
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CONFIG_RT_TIMER_THREAD_PRIO=4
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CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
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#
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# Inter-Thread communication
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#
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CONFIG_RT_USING_SEMAPHORE=y
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CONFIG_RT_USING_MUTEX=y
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CONFIG_RT_USING_EVENT=y
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CONFIG_RT_USING_MAILBOX=y
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CONFIG_RT_USING_MESSAGEQUEUE=y
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# CONFIG_RT_USING_SIGNALS is not set
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#
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# Memory Management
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#
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CONFIG_RT_USING_MEMPOOL=y
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CONFIG_RT_USING_MEMHEAP=y
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CONFIG_RT_USING_HEAP=y
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CONFIG_RT_USING_SMALL_MEM=y
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# CONFIG_RT_USING_SLAB is not set
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#
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# Kernel Device Object
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#
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CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
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# CONFIG_RT_USING_MODULE is not set
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#
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# RT-Thread Components
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#
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CONFIG_RT_USING_COMPONENTS_INIT=y
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CONFIG_RT_USING_USER_MAIN=y
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#
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# C++ features
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#
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# CONFIG_RT_USING_CPLUSPLUS is not set
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#
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# Command shell
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#
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CONFIG_RT_USING_FINSH=y
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CONFIG_FINSH_USING_HISTORY=y
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CONFIG_FINSH_USING_SYMTAB=y
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CONFIG_FINSH_USING_DESCRIPTION=y
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=4096
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CONFIG_FINSH_CMD_SIZE=80
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# CONFIG_FINSH_USING_AUTH is not set
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# CONFIG_FINSH_USING_MSH is not set
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#
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# Device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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#
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# Device Drivers
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_USING_SERIAL=y
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_I2C is not set
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# CONFIG_RT_USING_PIN is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_SDIO is not set
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# CONFIG_RT_USING_SPI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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#
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# POSIX layer and C standard library
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#
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# CONFIG_RT_USING_LIBC is not set
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# CONFIG_RT_USING_PTHREADS is not set
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#
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# Network stack
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#
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#
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# light weight TCP/IP stack
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#
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CONFIG_RT_USING_LWIP=y
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CONFIG_RT_USING_LWIP141=y
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# CONFIG_RT_USING_LWIP202 is not set
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# CONFIG_RT_LWIP_IGMP is not set
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CONFIG_RT_LWIP_ICMP=y
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# CONFIG_RT_LWIP_SNMP is not set
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CONFIG_RT_LWIP_DNS=y
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CONFIG_RT_LWIP_DHCP=y
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CONFIG_IP_SOF_BROADCAST=1
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CONFIG_IP_SOF_BROADCAST_RECV=1
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# CONFIG_LWIP_USING_DHCPD is not set
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#
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# Static IPv4 Address
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#
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CONFIG_RT_LWIP_IPADDR="192.168.1.30"
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CONFIG_RT_LWIP_GWADDR="192.168.1.1"
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CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
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CONFIG_RT_LWIP_UDP=y
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CONFIG_RT_LWIP_TCP=y
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# CONFIG_RT_LWIP_RAW is not set
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# CONFIG_RT_LWIP_PPP is not set
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# CONFIG_RT_LWIP_PPPOE is not set
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# CONFIG_RT_LWIP_PPPOS is not set
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CONFIG_RT_LWIP_PBUF_NUM=16
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CONFIG_RT_LWIP_RAW_PCB_NUM=4
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CONFIG_RT_LWIP_UDP_PCB_NUM=4
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CONFIG_RT_LWIP_TCP_PCB_NUM=4
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CONFIG_RT_LWIP_TCP_SEG_NUM=40
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CONFIG_RT_LWIP_TCP_SND_BUF=8196
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CONFIG_RT_LWIP_TCP_WND=8196
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CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
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CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
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CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
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CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
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CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
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CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
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# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
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CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
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CONFIG_SO_REUSE=1
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CONFIG_LWIP_SO_RCVTIMEO=1
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CONFIG_LWIP_SO_SNDTIMEO=1
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CONFIG_LWIP_SO_RCVBUF=1
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#
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# Modbus master and slave stack
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#
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# CONFIG_RT_USING_MODBUS is not set
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# CONFIG_RT_USING_NETUTILS is not set
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#
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# RT-Thread UI Engine
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#
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# CONFIG_PKG_USING_GUIENGINE is not set
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#
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# RT-Thread online packages
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#
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#
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# system packages
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#
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# CONFIG_PKG_USING_PARTITION is not set
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# CONFIG_PKG_USING_SQLITE is not set
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#
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# IoT - internet of things
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#
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# CONFIG_PKG_USING_PAHOMQTT is not set
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# CONFIG_PKG_USING_WEBCLIENT is not set
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# CONFIG_PKG_USING_MONGOOSE is not set
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# CONFIG_PKG_USING_WEBTERMINAL is not set
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# CONFIG_PKG_USING_CJSON is not set
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# CONFIG_PKG_USING_EZXML is not set
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#
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# Marvell WiFi
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#
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# CONFIG_PKG_USING_MARVELLWIFI is not set
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#
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# security packages
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#
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# CONFIG_PKG_USING_MBEDTLS is not set
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#
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# language packages
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#
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# CONFIG_PKG_USING_JERRYSCRIPT is not set
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#
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# multimedia packages
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#
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#
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# tools packages
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#
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# CONFIG_PKG_USING_CMBACKTRACE is not set
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# CONFIG_PKG_USING_EASYLOGGER is not set
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#
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# miscellaneous packages
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#
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# CONFIG_PKG_USING_HELLO is not set
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#
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# BSP_SPECIAL CONFIG
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#
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CONFIG_RT_USING_UART0=y
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@@ -1,24 +0,0 @@
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mainmenu "RT-Thread Configuration"
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config $BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config $RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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config $PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config RT_USING_UART0
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bool "Using RT_USING_UART0"
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default y
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@@ -1,65 +0,0 @@
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# TM4C129X-Development Board
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http://www.ti.com/tool/dk-tm4c129x
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## 1. 简介
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TM4C129X-DK是TI官方的开发板，此为其中一款开发板，带屏幕，配置更高。
|
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TI官方提供了详细的SDK支持，含USB，LWIP，甚至图形库。
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核心板板载主要资源如下：
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| 硬件 | 描述 |
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| -- | -- |
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|芯片型号| TM4C129XNCZAD |
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|CPU| ARM Cortex-M4F |
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|主频| 120MHz |
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|片内Flash| 1024B |
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|片内SRAM| 256KB |
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## 2. 编译说明
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TM4C129X-DK板级包目前仅支持MDK5编译器，以下是具体版本信息：
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| IDE/编译器 | 已测试版本 |
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| ---------- | ---------------------------- |
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| MDK5 | MDK521a |
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## 3. 烧写及执行
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TM4C129X-DK本身提供了一个烧录接口，是Stellaris ICDI，keil本身不提供该驱动，需自行下载。
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http://www.ti.com.cn/tool/cn/stellaris_icdi_drivers
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供电方式：使用ICDI接口即可供电
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### 3.1 运行结果
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如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 3.0.3 build Feb 28 2018
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2006 - 2018 Copyright by rt-thread team
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finsh />
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```
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## 4. 驱动支持情况及计划
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| 驱动 | 支持情况 | 备注 |
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| ------ | ---- | :------: |
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### 4.1 IO在板级支持包中的映射情况
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| IO号 | 板级包中的定义 |
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| -- | -- |
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## 5. 联系人信息
|
||||
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维护人：[zero](https://github.com/Zero-Sky)
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## 6. 参考
|
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@@ -1,14 +0,0 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -1,29 +0,0 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
|
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else:
|
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -1,11 +0,0 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = os.path.join(str(Dir('#')), 'applications')
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd, str(Dir('#'))]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* File : application.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2014, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2014-07-18 ArdaFu the first version for TM4C129X
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* user app entry */
|
||||
}
|
||||
|
||||
@@ -1,96 +0,0 @@
|
||||
/*
|
||||
* File : board.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2013 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard first implementation
|
||||
* 2014-07-18 ArdaFu Port to TM4C129X
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include "board.h"
|
||||
|
||||
|
||||
#include "driverlib/interrupt.h"
|
||||
#include "driverlib/sysctl.h"
|
||||
#include "driverlib/systick.h"
|
||||
#include "driverlib/fpu.h"
|
||||
#include "driverlib/rom_map.h"
|
||||
|
||||
#define SYS_CLOCK_DEFAULT 120000000
|
||||
uint32_t SystemCoreClock;
|
||||
#define FAULT_NMI 2 // NMI fault
|
||||
#define FAULT_HARD 3 // Hard fault
|
||||
#define FAULT_MPU 4 // MPU fault
|
||||
#define FAULT_BUS 5 // Bus fault
|
||||
#define FAULT_USAGE 6 // Usage fault
|
||||
#define FAULT_SVCALL 11 // SVCall
|
||||
#define FAULT_DEBUG 12 // Debug monitor
|
||||
#define FAULT_PENDSV 14 // PendSV
|
||||
#define FAULT_SYSTICK 15 // System Tick
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
extern void PendSV_Handler(void);
|
||||
extern void HardFault_Handler(void);
|
||||
|
||||
/**
|
||||
* This function will initial LPC40xx board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
//init low level drivers. e.g. cpu uart etc.
|
||||
rt_components_board_init();
|
||||
//redirect RTT stdio to CONSOLE device
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
}
|
||||
|
||||
int rt_hw_cpu_init(void)
|
||||
{
|
||||
MAP_IntMasterDisable();
|
||||
IntRegister(FAULT_HARD, HardFault_Handler);
|
||||
IntRegister(FAULT_PENDSV, PendSV_Handler);
|
||||
IntRegister(FAULT_SYSTICK, SysTick_Handler);
|
||||
|
||||
// Enable lazy stacking for interrupt handlers. This allows floating-point
|
||||
// instructions to be used within interrupt handlers, but at the expense of
|
||||
// extra stack usage.
|
||||
MAP_FPULazyStackingEnable();
|
||||
|
||||
// Set the clocking to run directly from the external crystal/oscillator.
|
||||
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
|
||||
// crystal on your board.
|
||||
SystemCoreClock = MAP_SysCtlClockFreqSet(
|
||||
(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),
|
||||
SYS_CLOCK_DEFAULT);
|
||||
|
||||
MAP_SysTickDisable();
|
||||
MAP_SysTickPeriodSet(SystemCoreClock/ RT_TICK_PER_SECOND - 1);
|
||||
MAP_SysTickIntEnable();
|
||||
MAP_SysTickEnable();
|
||||
|
||||
return 0;
|
||||
}
|
||||
// rt_hw_cpu_init should be run before any other INIT_BOARD_EXPORT
|
||||
// We use INIT_EXPORT here and set the sequence index to "0.xxxx"
|
||||
INIT_EXPORT(rt_hw_cpu_init, "0.post");
|
||||
@@ -1,41 +0,0 @@
|
||||
/*
|
||||
* File : board.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-09-22 Bernard add board.h to this bsp
|
||||
* 2010-02-04 Magicoe add board.h to LPC176x bsp
|
||||
* 2014-07-18 ArdaFu port it to TM4C129X bsp
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include "tm4c1294ncpdt.h"
|
||||
#include <rtthread.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern uint32_t SystemCoreClock;
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int _ebss;
|
||||
#define HEAP_BEGIN ((void *)&_ebss)
|
||||
#endif
|
||||
#define HEAP_END (0x20000000 + 256*1024)
|
||||
|
||||
#define FINSH_DEVICE_NAME RT_CONSOLE_DEVICE_NAME
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,14 +0,0 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
|
||||
# remove no need file.
|
||||
if GetDepend('RT_USING_LWIP') == False:
|
||||
SrcRemove(src, 'drv_emac.c')
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,20 +0,0 @@
|
||||
/*
|
||||
* File : drv_eth.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2014-07-25 ArdaFu Port to TM4C129X
|
||||
*/
|
||||
|
||||
#ifndef __TIVA_ETH_H__
|
||||
#define __TIVA_ETH_H__
|
||||
|
||||
int rt_hw_tiva_eth_init(void);
|
||||
|
||||
#endif
|
||||
@@ -1,222 +0,0 @@
|
||||
/*
|
||||
* File : drv_uart.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2013-05-18 Bernard The first version for LPC40xx
|
||||
* 2014-07-18 ArdaFu Port to TM4C129X
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
#include "driverlib/sysctl.h"
|
||||
#include "driverlib/gpio.h"
|
||||
#include "driverlib/uart.h"
|
||||
#include "driverlib/pin_map.h"
|
||||
#include "driverlib/interrupt.h"
|
||||
#include "driverlib/rom_map.h"
|
||||
typedef struct hw_uart_device
|
||||
{
|
||||
uint32_t hw_base; // base address
|
||||
}hw_uart_t;
|
||||
|
||||
#define mUartGetHwPtr(serial) ((hw_uart_t*)(serial->parent.user_data))
|
||||
|
||||
static rt_err_t hw_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
uint32_t config = 0;
|
||||
hw_uart_t* uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = mUartGetHwPtr(serial);
|
||||
|
||||
MAP_UARTDisable(uart->hw_base);
|
||||
// build UART Configuration parameter structure
|
||||
switch(cfg->data_bits)
|
||||
{
|
||||
case DATA_BITS_9:
|
||||
// enable 9bit address mode and set DATA_BIT_8
|
||||
MAP_UART9BitEnable(uart->hw_base);
|
||||
case DATA_BITS_8:
|
||||
config |= UART_CONFIG_WLEN_8;
|
||||
break;
|
||||
case DATA_BITS_7:
|
||||
config |= UART_CONFIG_WLEN_7;
|
||||
break;
|
||||
case DATA_BITS_6:
|
||||
config |= UART_CONFIG_WLEN_6;
|
||||
break;
|
||||
case DATA_BITS_5:
|
||||
config |= UART_CONFIG_WLEN_5;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
switch(cfg->parity)
|
||||
{
|
||||
case PARITY_ODD:
|
||||
config |= UART_CONFIG_PAR_ODD;
|
||||
break;
|
||||
case PARITY_EVEN:
|
||||
config |= UART_CONFIG_PAR_EVEN;
|
||||
break;
|
||||
case PARITY_NONE:
|
||||
config |= UART_CONFIG_PAR_NONE;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
switch(cfg->stop_bits)
|
||||
{
|
||||
case STOP_BITS_1:
|
||||
config |= UART_CONFIG_STOP_ONE;
|
||||
break;
|
||||
case STOP_BITS_2:
|
||||
config |= UART_CONFIG_STOP_TWO;
|
||||
break;
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
|
||||
// Initialize UART0 peripheral with given to corresponding parameter
|
||||
MAP_UARTConfigSetExpClk(uart->hw_base, SystemCoreClock, cfg->baud_rate, config);
|
||||
MAP_UARTFIFOEnable(uart->hw_base);
|
||||
|
||||
// Enable the UART.
|
||||
MAP_UARTEnable(uart->hw_base);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t hw_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||
{
|
||||
hw_uart_t* uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = mUartGetHwPtr(serial);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
MAP_UARTIntDisable(uart->hw_base, UART_INT_RX | UART_INT_RT);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
MAP_UARTIntEnable(uart->hw_base, UART_INT_RX | UART_INT_RT);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int hw_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
hw_uart_t* uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = mUartGetHwPtr(serial);
|
||||
|
||||
MAP_UARTCharPut(uart->hw_base, *((uint8_t *)&c));
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int hw_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
hw_uart_t* uart;
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = mUartGetHwPtr(serial);
|
||||
|
||||
return MAP_UARTCharGetNonBlocking(uart->hw_base);
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops hw_uart_ops =
|
||||
{
|
||||
hw_configure,
|
||||
hw_control,
|
||||
hw_putc,
|
||||
hw_getc,
|
||||
};
|
||||
|
||||
#if defined(RT_USING_UART0)
|
||||
/* UART0 device driver structure */
|
||||
struct rt_serial_device serial0;
|
||||
hw_uart_t uart0 =
|
||||
{
|
||||
UART0_BASE,
|
||||
};
|
||||
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
uint32_t intsrc;
|
||||
hw_uart_t *uart = &uart0;
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
/* Determine the interrupt source */
|
||||
intsrc = MAP_UARTIntStatus(uart->hw_base, true);
|
||||
|
||||
// Receive Data Available or Character time-out
|
||||
if (intsrc & (UART_INT_RX | UART_INT_RT))
|
||||
{
|
||||
MAP_UARTIntClear(uart->hw_base, intsrc);
|
||||
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
hw_uart_t* uart;
|
||||
struct serial_configure config;
|
||||
|
||||
config.baud_rate = BAUD_RATE_115200;
|
||||
config.bit_order = BIT_ORDER_LSB;
|
||||
config.data_bits = DATA_BITS_8;
|
||||
config.parity = PARITY_NONE;
|
||||
config.stop_bits = STOP_BITS_1;
|
||||
config.invert = NRZ_NORMAL;
|
||||
config.bufsz = RT_SERIAL_RB_BUFSZ;
|
||||
|
||||
#ifdef RT_USING_UART0
|
||||
uart = &uart0;
|
||||
serial0.ops = &hw_uart_ops;
|
||||
serial0.config = config;
|
||||
|
||||
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
|
||||
MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
|
||||
MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
|
||||
|
||||
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
|
||||
|
||||
/* preemption = 1, sub-priority = 1 */
|
||||
//IntPrioritySet(INT_UART0, ((0x01 << 5) | 0x01));
|
||||
|
||||
/* Enable Interrupt for UART channel */
|
||||
UARTIntRegister(uart->hw_base, UART0_IRQHandler);
|
||||
MAP_IntEnable(INT_UART0);
|
||||
MAP_UARTEnable(uart->hw_base);
|
||||
|
||||
/* register UART0 device */
|
||||
rt_hw_serial_register(&serial0, "uart0",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_uart_init);
|
||||
@@ -1,20 +0,0 @@
|
||||
/*
|
||||
* File : drv_uart.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2013-05-18 Bernard The first version for LPC40xx
|
||||
* 2014-07-18 ArdaFu Port to TM4C129X
|
||||
*/
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
void rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
@@ -1,26 +0,0 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('driverlib/*.c')
|
||||
SrcRemove(src, 'onewire.c')
|
||||
CCFLAGS = ''
|
||||
|
||||
# add for startup script
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += ['startup/startup_gcc.c']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += ['startup/startup_rvmdk.S']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += ['startup/startup_ewarm.c']
|
||||
CCFLAGS += ' --diag_suppress=pe177'
|
||||
|
||||
CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib']
|
||||
|
||||
|
||||
CPPDEFINES = [rtconfig.PART_TYPE]
|
||||
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES, CCFLAGS = CCFLAGS)
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,327 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// adc.h - ADC headers for using the ADC driver functions.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_ADC_H__
|
||||
#define __DRIVERLIB_ADC_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCSequenceConfigure as the ui32Trigger
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_TRIGGER_PROCESSOR 0x00000000 // Processor event
|
||||
#define ADC_TRIGGER_COMP0 0x00000001 // Analog comparator 0 event
|
||||
#define ADC_TRIGGER_COMP1 0x00000002 // Analog comparator 1 event
|
||||
#define ADC_TRIGGER_COMP2 0x00000003 // Analog comparator 2 event
|
||||
#define ADC_TRIGGER_EXTERNAL 0x00000004 // External event
|
||||
#define ADC_TRIGGER_TIMER 0x00000005 // Timer event
|
||||
#define ADC_TRIGGER_PWM0 0x00000006 // PWM0 event
|
||||
#define ADC_TRIGGER_PWM1 0x00000007 // PWM1 event
|
||||
#define ADC_TRIGGER_PWM2 0x00000008 // PWM2 event
|
||||
#define ADC_TRIGGER_PWM3 0x00000009 // PWM3 event
|
||||
#define ADC_TRIGGER_NEVER 0x0000000E // Never Trigger
|
||||
#define ADC_TRIGGER_ALWAYS 0x0000000F // Always event
|
||||
#define ADC_TRIGGER_PWM_MOD0 0x00000000 // PWM triggers from PWM0
|
||||
#define ADC_TRIGGER_PWM_MOD1 0x00000010 // PWM triggers from PWM1
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCSequenceStepConfigure as the ui32Config
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_CTL_TS 0x00000080 // Temperature sensor select
|
||||
#define ADC_CTL_IE 0x00000040 // Interrupt enable
|
||||
#define ADC_CTL_END 0x00000020 // Sequence end select
|
||||
#define ADC_CTL_D 0x00000010 // Differential select
|
||||
#define ADC_CTL_CH0 0x00000000 // Input channel 0
|
||||
#define ADC_CTL_CH1 0x00000001 // Input channel 1
|
||||
#define ADC_CTL_CH2 0x00000002 // Input channel 2
|
||||
#define ADC_CTL_CH3 0x00000003 // Input channel 3
|
||||
#define ADC_CTL_CH4 0x00000004 // Input channel 4
|
||||
#define ADC_CTL_CH5 0x00000005 // Input channel 5
|
||||
#define ADC_CTL_CH6 0x00000006 // Input channel 6
|
||||
#define ADC_CTL_CH7 0x00000007 // Input channel 7
|
||||
#define ADC_CTL_CH8 0x00000008 // Input channel 8
|
||||
#define ADC_CTL_CH9 0x00000009 // Input channel 9
|
||||
#define ADC_CTL_CH10 0x0000000A // Input channel 10
|
||||
#define ADC_CTL_CH11 0x0000000B // Input channel 11
|
||||
#define ADC_CTL_CH12 0x0000000C // Input channel 12
|
||||
#define ADC_CTL_CH13 0x0000000D // Input channel 13
|
||||
#define ADC_CTL_CH14 0x0000000E // Input channel 14
|
||||
#define ADC_CTL_CH15 0x0000000F // Input channel 15
|
||||
#define ADC_CTL_CH16 0x00000100 // Input channel 16
|
||||
#define ADC_CTL_CH17 0x00000101 // Input channel 17
|
||||
#define ADC_CTL_CH18 0x00000102 // Input channel 18
|
||||
#define ADC_CTL_CH19 0x00000103 // Input channel 19
|
||||
#define ADC_CTL_CH20 0x00000104 // Input channel 20
|
||||
#define ADC_CTL_CH21 0x00000105 // Input channel 21
|
||||
#define ADC_CTL_CH22 0x00000106 // Input channel 22
|
||||
#define ADC_CTL_CH23 0x00000107 // Input channel 23
|
||||
#define ADC_CTL_CMP0 0x00080000 // Select Comparator 0
|
||||
#define ADC_CTL_CMP1 0x00090000 // Select Comparator 1
|
||||
#define ADC_CTL_CMP2 0x000A0000 // Select Comparator 2
|
||||
#define ADC_CTL_CMP3 0x000B0000 // Select Comparator 3
|
||||
#define ADC_CTL_CMP4 0x000C0000 // Select Comparator 4
|
||||
#define ADC_CTL_CMP5 0x000D0000 // Select Comparator 5
|
||||
#define ADC_CTL_CMP6 0x000E0000 // Select Comparator 6
|
||||
#define ADC_CTL_CMP7 0x000F0000 // Select Comparator 7
|
||||
#define ADC_CTL_SHOLD_4 0x00000000 // Sample and hold 4 ADC clocks
|
||||
#define ADC_CTL_SHOLD_8 0x00200000 // Sample and hold 8 ADC clocks
|
||||
#define ADC_CTL_SHOLD_16 0x00400000 // Sample and hold 16 ADC clocks
|
||||
#define ADC_CTL_SHOLD_32 0x00600000 // Sample and hold 32 ADC clocks
|
||||
#define ADC_CTL_SHOLD_64 0x00800000 // Sample and hold 64 ADC clocks
|
||||
#define ADC_CTL_SHOLD_128 0x00A00000 // Sample and hold 128 ADC clocks
|
||||
#define ADC_CTL_SHOLD_256 0x00C00000 // Sample and hold 256 ADC clocks
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCComparatorConfigure as part of the
|
||||
// ui32Config parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_COMP_TRIG_NONE 0x00000000 // Trigger Disabled
|
||||
#define ADC_COMP_TRIG_LOW_ALWAYS \
|
||||
0x00001000 // Trigger Low Always
|
||||
#define ADC_COMP_TRIG_LOW_ONCE 0x00001100 // Trigger Low Once
|
||||
#define ADC_COMP_TRIG_LOW_HALWAYS \
|
||||
0x00001200 // Trigger Low Always (Hysteresis)
|
||||
#define ADC_COMP_TRIG_LOW_HONCE 0x00001300 // Trigger Low Once (Hysteresis)
|
||||
#define ADC_COMP_TRIG_MID_ALWAYS \
|
||||
0x00001400 // Trigger Mid Always
|
||||
#define ADC_COMP_TRIG_MID_ONCE 0x00001500 // Trigger Mid Once
|
||||
#define ADC_COMP_TRIG_HIGH_ALWAYS \
|
||||
0x00001C00 // Trigger High Always
|
||||
#define ADC_COMP_TRIG_HIGH_ONCE 0x00001D00 // Trigger High Once
|
||||
#define ADC_COMP_TRIG_HIGH_HALWAYS \
|
||||
0x00001E00 // Trigger High Always (Hysteresis)
|
||||
#define ADC_COMP_TRIG_HIGH_HONCE \
|
||||
0x00001F00 // Trigger High Once (Hysteresis)
|
||||
|
||||
#define ADC_COMP_INT_NONE 0x00000000 // Interrupt Disabled
|
||||
#define ADC_COMP_INT_LOW_ALWAYS \
|
||||
0x00000010 // Interrupt Low Always
|
||||
#define ADC_COMP_INT_LOW_ONCE 0x00000011 // Interrupt Low Once
|
||||
#define ADC_COMP_INT_LOW_HALWAYS \
|
||||
0x00000012 // Interrupt Low Always
|
||||
// (Hysteresis)
|
||||
#define ADC_COMP_INT_LOW_HONCE 0x00000013 // Interrupt Low Once (Hysteresis)
|
||||
#define ADC_COMP_INT_MID_ALWAYS \
|
||||
0x00000014 // Interrupt Mid Always
|
||||
#define ADC_COMP_INT_MID_ONCE 0x00000015 // Interrupt Mid Once
|
||||
#define ADC_COMP_INT_HIGH_ALWAYS \
|
||||
0x0000001C // Interrupt High Always
|
||||
#define ADC_COMP_INT_HIGH_ONCE 0x0000001D // Interrupt High Once
|
||||
#define ADC_COMP_INT_HIGH_HALWAYS \
|
||||
0x0000001E // Interrupt High Always
|
||||
// (Hysteresis)
|
||||
#define ADC_COMP_INT_HIGH_HONCE \
|
||||
0x0000001F // Interrupt High Once (Hysteresis)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be used to modify the sequence number passed to
|
||||
// ADCProcessorTrigger in order to get cross-module synchronous processor
|
||||
// triggers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_TRIGGER_WAIT 0x08000000 // Wait for the synchronous trigger
|
||||
#define ADC_TRIGGER_SIGNAL 0x80000000 // Signal the synchronous trigger
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCPhaseDelaySet as the ui32Phase parameter and
|
||||
// returned from ADCPhaseDelayGet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_PHASE_0 0x00000000 // 0 degrees
|
||||
#define ADC_PHASE_22_5 0x00000001 // 22.5 degrees
|
||||
#define ADC_PHASE_45 0x00000002 // 45 degrees
|
||||
#define ADC_PHASE_67_5 0x00000003 // 67.5 degrees
|
||||
#define ADC_PHASE_90 0x00000004 // 90 degrees
|
||||
#define ADC_PHASE_112_5 0x00000005 // 112.5 degrees
|
||||
#define ADC_PHASE_135 0x00000006 // 135 degrees
|
||||
#define ADC_PHASE_157_5 0x00000007 // 157.5 degrees
|
||||
#define ADC_PHASE_180 0x00000008 // 180 degrees
|
||||
#define ADC_PHASE_202_5 0x00000009 // 202.5 degrees
|
||||
#define ADC_PHASE_225 0x0000000A // 225 degrees
|
||||
#define ADC_PHASE_247_5 0x0000000B // 247.5 degrees
|
||||
#define ADC_PHASE_270 0x0000000C // 270 degrees
|
||||
#define ADC_PHASE_292_5 0x0000000D // 292.5 degrees
|
||||
#define ADC_PHASE_315 0x0000000E // 315 degrees
|
||||
#define ADC_PHASE_337_5 0x0000000F // 337.5 degrees
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCReferenceSet as the ui32Ref parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_REF_INT 0x00000000 // Internal reference
|
||||
#define ADC_REF_EXT_3V 0x00000001 // External 3V reference
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCIntDisableEx(), ADCIntEnableEx(),
|
||||
// ADCIntClearEx() and ADCIntStatusEx().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_INT_SS0 0x00000001
|
||||
#define ADC_INT_SS1 0x00000002
|
||||
#define ADC_INT_SS2 0x00000004
|
||||
#define ADC_INT_SS3 0x00000008
|
||||
#define ADC_INT_DMA_SS0 0x00000100
|
||||
#define ADC_INT_DMA_SS1 0x00000200
|
||||
#define ADC_INT_DMA_SS2 0x00000400
|
||||
#define ADC_INT_DMA_SS3 0x00000800
|
||||
#define ADC_INT_DCON_SS0 0x00010000
|
||||
#define ADC_INT_DCON_SS1 0x00020000
|
||||
#define ADC_INT_DCON_SS2 0x00040000
|
||||
#define ADC_INT_DCON_SS3 0x00080000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCClockConfigSet() and ADCClockConfigGet().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_CLOCK_RATE_FULL 0x00000070
|
||||
#define ADC_CLOCK_RATE_HALF 0x00000050
|
||||
#define ADC_CLOCK_RATE_FOURTH 0x00000030
|
||||
#define ADC_CLOCK_RATE_EIGHTH 0x00000010
|
||||
#define ADC_CLOCK_SRC_PLL 0x00000000
|
||||
#define ADC_CLOCK_SRC_PIOSC 0x00000001
|
||||
#define ADC_CLOCK_SRC_ALTCLK 0x00000001
|
||||
#define ADC_CLOCK_SRC_MOSC 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void ADCIntRegister(uint32_t ui32Base, uint32_t ui32SequenceNum,
|
||||
void (*pfnHandler)(void));
|
||||
extern void ADCIntUnregister(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCIntDisable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCIntEnable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern uint32_t ADCIntStatus(uint32_t ui32Base, uint32_t ui32SequenceNum,
|
||||
bool bMasked);
|
||||
extern void ADCIntClear(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceEnable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceDisable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum,
|
||||
uint32_t ui32Trigger, uint32_t ui32Priority);
|
||||
extern void ADCSequenceStepConfigure(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum,
|
||||
uint32_t ui32Step, uint32_t ui32Config);
|
||||
extern int32_t ADCSequenceOverflow(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceOverflowClear(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern int32_t ADCSequenceUnderflow(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceUnderflowClear(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern int32_t ADCSequenceDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum,
|
||||
uint32_t *pui32Buffer);
|
||||
extern void ADCProcessorTrigger(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCSoftwareOversampleConfigure(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum,
|
||||
uint32_t ui32Factor);
|
||||
extern void ADCSoftwareOversampleStepConfigure(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum,
|
||||
uint32_t ui32Step,
|
||||
uint32_t ui32Config);
|
||||
extern void ADCSoftwareOversampleDataGet(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum,
|
||||
uint32_t *pui32Buffer,
|
||||
uint32_t ui32Count);
|
||||
extern void ADCHardwareOversampleConfigure(uint32_t ui32Base,
|
||||
uint32_t ui32Factor);
|
||||
extern void ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config,
|
||||
uint32_t ui32ClockDiv);
|
||||
extern uint32_t ADCClockConfigGet(uint32_t ui32Base, uint32_t *pui32ClockDiv);
|
||||
|
||||
extern void ADCComparatorConfigure(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
uint32_t ui32Config);
|
||||
extern void ADCComparatorRegionSet(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
uint32_t ui32LowRef, uint32_t ui32HighRef);
|
||||
extern void ADCComparatorReset(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
bool bTrigger, bool bInterrupt);
|
||||
extern void ADCComparatorIntDisable(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern void ADCComparatorIntEnable(uint32_t ui32Base,
|
||||
uint32_t ui32SequenceNum);
|
||||
extern uint32_t ADCComparatorIntStatus(uint32_t ui32Base);
|
||||
extern void ADCComparatorIntClear(uint32_t ui32Base, uint32_t ui32Status);
|
||||
extern void ADCIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void ADCIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern uint32_t ADCIntStatusEx(uint32_t ui32Base, bool bMasked);
|
||||
extern void ADCIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void ADCSequenceDMAEnable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern void ADCSequenceDMADisable(uint32_t ui32Base, uint32_t ui32SequenceNum);
|
||||
extern bool ADCBusy(uint32_t ui32Base);
|
||||
extern void ADCReferenceSet(uint32_t ui32Base, uint32_t ui32Ref);
|
||||
extern uint32_t ADCReferenceGet(uint32_t ui32Base);
|
||||
extern void ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase);
|
||||
extern uint32_t ADCPhaseDelayGet(uint32_t ui32Base);
|
||||
extern void ADCSampleRateSet(uint32_t ui32Base, uint32_t ui32ADCClock,
|
||||
uint32_t ui32Rate);
|
||||
extern uint32_t ADCSampleRateGet(uint32_t ui32Base);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_ADC_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,218 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// aes.h - Defines and Macros for the AES module.
|
||||
//
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_AES_H__
|
||||
#define __DRIVERLIB_AES_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the operation direction in the
|
||||
// ui32Config argument in the AESConfig function. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_DIR_ENCRYPT 0x00000004
|
||||
#define AES_CFG_DIR_DECRYPT 0x00000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the key size in the ui32Config
|
||||
// argument in the AESConfig function. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_KEY_SIZE_128BIT 0x00000008
|
||||
#define AES_CFG_KEY_SIZE_192BIT 0x00000010
|
||||
#define AES_CFG_KEY_SIZE_256BIT 0x00000018
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the mode of operation in the
|
||||
// ui32Config argument in the AESConfig function. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_MODE_M 0x2007fe60
|
||||
#define AES_CFG_MODE_ECB 0x00000000
|
||||
#define AES_CFG_MODE_CBC 0x00000020
|
||||
#define AES_CFG_MODE_CTR 0x00000040
|
||||
#define AES_CFG_MODE_ICM 0x00000200
|
||||
#define AES_CFG_MODE_CFB 0x00000400
|
||||
#define AES_CFG_MODE_XTS_TWEAKJL \
|
||||
0x00000800
|
||||
#define AES_CFG_MODE_XTS_K2IJL \
|
||||
0x00001000
|
||||
#define AES_CFG_MODE_XTS_K2ILJ0 \
|
||||
0x00001800
|
||||
#define AES_CFG_MODE_F8 0x00002000
|
||||
#define AES_CFG_MODE_F9 0x20004000
|
||||
#define AES_CFG_MODE_CBCMAC 0x20008000
|
||||
#define AES_CFG_MODE_GCM_HLY0ZERO \
|
||||
0x20010000
|
||||
#define AES_CFG_MODE_GCM_HLY0CALC \
|
||||
0x20020040
|
||||
#define AES_CFG_MODE_GCM_HY0CALC \
|
||||
0x20030040
|
||||
#define AES_CFG_MODE_CCM 0x20040040
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the counter width in the
|
||||
// ui32Config argument in the AESConfig function. It is only required to
|
||||
// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_CTR_WIDTH_32 0x00000000
|
||||
#define AES_CFG_CTR_WIDTH_64 0x00000080
|
||||
#define AES_CFG_CTR_WIDTH_96 0x00000100
|
||||
#define AES_CFG_CTR_WIDTH_128 0x00000180
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to define the width of the length field for
|
||||
// CCM operation through the ui32Config argument in the AESConfig function.
|
||||
// This value is also known as L. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_CCM_L_1 0x00000000
|
||||
#define AES_CFG_CCM_L_2 0x00080000
|
||||
#define AES_CFG_CCM_L_3 0x00100000
|
||||
#define AES_CFG_CCM_L_4 0x00180000
|
||||
#define AES_CFG_CCM_L_5 0x00200000
|
||||
#define AES_CFG_CCM_L_6 0x00280000
|
||||
#define AES_CFG_CCM_L_7 0x00300000
|
||||
#define AES_CFG_CCM_L_8 0x00380000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to define the length of the authentication
|
||||
// field for CCM operations through the ui32Config argument in the AESConfig
|
||||
// function. This value is also known as M. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_CFG_CCM_M_4 0x00400000
|
||||
#define AES_CFG_CCM_M_6 0x00800000
|
||||
#define AES_CFG_CCM_M_8 0x00c00000
|
||||
#define AES_CFG_CCM_M_10 0x01000000
|
||||
#define AES_CFG_CCM_M_12 0x01400000
|
||||
#define AES_CFG_CCM_M_14 0x01800000
|
||||
#define AES_CFG_CCM_M_16 0x01c00000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
|
||||
// AESIntStatus functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_INT_CONTEXT_IN 0x00000001
|
||||
#define AES_INT_CONTEXT_OUT 0x00000008
|
||||
#define AES_INT_DATA_IN 0x00000002
|
||||
#define AES_INT_DATA_OUT 0x00000004
|
||||
#define AES_INT_DMA_CONTEXT_IN 0x00010000
|
||||
#define AES_INT_DMA_CONTEXT_OUT 0x00080000
|
||||
#define AES_INT_DMA_DATA_IN 0x00020000
|
||||
#define AES_INT_DMA_DATA_OUT 0x00040000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines used when enabling and disabling DMA requests in the
|
||||
// AESEnableDMA and AESDisableDMA functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES_DMA_DATA_IN 0x00000020
|
||||
#define AES_DMA_DATA_OUT 0x00000040
|
||||
#define AES_DMA_CONTEXT_IN 0x00000080
|
||||
#define AES_DMA_CONTEXT_OUT 0x00000100
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Function prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AESAuthLengthSet(uint32_t ui32Base, uint32_t ui32Length);
|
||||
extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void AESDataRead(uint32_t ui32Base, uint32_t *pui32Dest);
|
||||
extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint32_t *pui32Dest);
|
||||
extern bool AESDataProcess(uint32_t ui32Base, uint32_t *pui32Src,
|
||||
uint32_t *pui32Dest, uint32_t ui32Length);
|
||||
extern bool AESDataAuth(uint32_t ui32Base, uint32_t *pui32Src,
|
||||
uint32_t ui32Length, uint32_t *pui32Tag);
|
||||
extern bool AESDataProcessAuth(uint32_t ui32Base, uint32_t *pui32Src,
|
||||
uint32_t *pui32Dest, uint32_t ui32Length,
|
||||
uint32_t *pui32AuthSrc,
|
||||
uint32_t ui32AuthLength, uint32_t *pui32Tag);
|
||||
extern void AESDataWrite(uint32_t ui32Base, uint32_t *pui32Src);
|
||||
extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint32_t *pui32Src);
|
||||
extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
|
||||
extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
|
||||
extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void AESIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
|
||||
extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
|
||||
extern void AESIntUnregister(uint32_t ui32Base);
|
||||
extern void AESIVSet(uint32_t ui32Base, uint32_t *pui32IVdata);
|
||||
extern void AESIVRead(uint32_t ui32Base, uint32_t *pui32IVdata);
|
||||
extern void AESKey1Set(uint32_t ui32Base, uint32_t *pui32Key,
|
||||
uint32_t ui32Keysize);
|
||||
extern void AESKey2Set(uint32_t ui32Base, uint32_t *pui32Key,
|
||||
uint32_t ui32Keysize);
|
||||
extern void AESKey3Set(uint32_t ui32Base, uint32_t *pui32Key);
|
||||
extern void AESLengthSet(uint32_t ui32Base, uint64_t ui64Length);
|
||||
extern void AESReset(uint32_t ui32Base);
|
||||
extern void AESTagRead(uint32_t ui32Base, uint32_t *pui32TagData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_AES_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,449 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// can.h - Defines and Macros for the CAN controller.
|
||||
//
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_CAN_H__
|
||||
#define __DRIVERLIB_CAN_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup can_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Miscellaneous defines for Message ID Types
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These are the flags used by the tCANMsgObject.ui32Flags value when calling
|
||||
// the CANMessageSet() and CANMessageGet() functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
//! This indicates that transmit interrupts are enabled.
|
||||
//
|
||||
#define MSG_OBJ_TX_INT_ENABLE 0x00000001
|
||||
|
||||
//
|
||||
//! This indicates that receive interrupts are enabled.
|
||||
//
|
||||
#define MSG_OBJ_RX_INT_ENABLE 0x00000002
|
||||
|
||||
//
|
||||
//! This indicates that a message object is using an extended identifier.
|
||||
//
|
||||
#define MSG_OBJ_EXTENDED_ID 0x00000004
|
||||
|
||||
//
|
||||
//! This indicates that a message object is using filtering based on the
|
||||
//! object's message identifier.
|
||||
//
|
||||
#define MSG_OBJ_USE_ID_FILTER 0x00000008
|
||||
|
||||
//
|
||||
//! This indicates that new data was available in the message object.
|
||||
//
|
||||
#define MSG_OBJ_NEW_DATA 0x00000080
|
||||
|
||||
//
|
||||
//! This indicates that data was lost since this message object was last
|
||||
//! read.
|
||||
//
|
||||
#define MSG_OBJ_DATA_LOST 0x00000100
|
||||
|
||||
//
|
||||
//! This indicates that a message object uses or is using filtering
|
||||
//! based on the direction of the transfer. If the direction filtering is
|
||||
//! used, then ID filtering must also be enabled.
|
||||
//
|
||||
#define MSG_OBJ_USE_DIR_FILTER (0x00000010 | MSG_OBJ_USE_ID_FILTER)
|
||||
|
||||
//
|
||||
//! This indicates that a message object uses or is using message
|
||||
//! identifier filtering based on the extended identifier. If the extended
|
||||
//! identifier filtering is used, then ID filtering must also be enabled.
|
||||
//
|
||||
#define MSG_OBJ_USE_EXT_FILTER (0x00000020 | MSG_OBJ_USE_ID_FILTER)
|
||||
|
||||
//
|
||||
//! This indicates that a message object is a remote frame.
|
||||
//
|
||||
#define MSG_OBJ_REMOTE_FRAME 0x00000040
|
||||
|
||||
//
|
||||
//! This indicates that this message object is part of a FIFO structure and
|
||||
//! not the final message object in a FIFO.
|
||||
//
|
||||
#define MSG_OBJ_FIFO 0x00000200
|
||||
|
||||
//
|
||||
//! This indicates that a message object has no flags set.
|
||||
//
|
||||
#define MSG_OBJ_NO_FLAGS 0x00000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used with the flag values to allow checking only status
|
||||
//! flags and not configuration flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MSG_OBJ_STATUS_MASK (MSG_OBJ_NEW_DATA | MSG_OBJ_DATA_LOST)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! The structure used for encapsulating all the items associated with a CAN
|
||||
//! message object in the CAN controller.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! The CAN message identifier used for 11 or 29 bit identifiers.
|
||||
//
|
||||
uint32_t ui32MsgID;
|
||||
|
||||
//
|
||||
//! The message identifier mask used when identifier filtering is enabled.
|
||||
//
|
||||
uint32_t ui32MsgIDMask;
|
||||
|
||||
//
|
||||
//! This value holds various status flags and settings specified by
|
||||
//! tCANObjFlags.
|
||||
//
|
||||
uint32_t ui32Flags;
|
||||
|
||||
//
|
||||
//! This value is the number of bytes of data in the message object.
|
||||
//
|
||||
uint32_t ui32MsgLen;
|
||||
|
||||
//
|
||||
//! This is a pointer to the message object's data.
|
||||
//
|
||||
uint8_t *pui8MsgData;
|
||||
}
|
||||
tCANMsgObject;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This structure is used for encapsulating the values associated with setting
|
||||
//! up the bit timing for a CAN controller. The structure is used when calling
|
||||
//! the CANGetBitTiming and CANSetBitTiming functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! This value holds the sum of the Synchronization, Propagation, and Phase
|
||||
//! Buffer 1 segments, measured in time quanta. The valid values for this
|
||||
//! setting range from 2 to 16.
|
||||
//
|
||||
uint32_t ui32SyncPropPhase1Seg;
|
||||
|
||||
//
|
||||
//! This value holds the Phase Buffer 2 segment in time quanta. The valid
|
||||
//! values for this setting range from 1 to 8.
|
||||
//
|
||||
uint32_t ui32Phase2Seg;
|
||||
|
||||
//
|
||||
//! This value holds the Resynchronization Jump Width in time quanta. The
|
||||
//! valid values for this setting range from 1 to 4.
|
||||
//
|
||||
uint32_t ui32SJW;
|
||||
|
||||
//
|
||||
//! This value holds the CAN_CLK divider used to determine time quanta.
|
||||
//! The valid values for this setting range from 1 to 1023.
|
||||
//
|
||||
uint32_t ui32QuantumPrescaler;
|
||||
}
|
||||
tCANBitClkParms;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This data type is used to identify the interrupt status register. This is
|
||||
//! used when calling the CANIntStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Read the CAN interrupt status information.
|
||||
//
|
||||
CAN_INT_STS_CAUSE,
|
||||
|
||||
//
|
||||
//! Read a message object's interrupt status.
|
||||
//
|
||||
CAN_INT_STS_OBJECT
|
||||
}
|
||||
tCANIntStsReg;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This data type is used to identify which of several status registers to
|
||||
//! read when calling the CANStatusGet() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Read the full CAN controller status.
|
||||
//
|
||||
CAN_STS_CONTROL,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects with a transmit request
|
||||
//! set.
|
||||
//
|
||||
CAN_STS_TXREQUEST,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects with new data available.
|
||||
//
|
||||
CAN_STS_NEWDAT,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects that are enabled.
|
||||
//
|
||||
CAN_STS_MSGVAL
|
||||
}
|
||||
tCANStsReg;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These definitions are used to specify interrupt sources to CANIntEnable()
|
||||
// and CANIntDisable().
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate error
|
||||
//! interrupts.
|
||||
//
|
||||
#define CAN_INT_ERROR 0x00000008
|
||||
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate status
|
||||
//! interrupts.
|
||||
//
|
||||
#define CAN_INT_STATUS 0x00000004
|
||||
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate any CAN
|
||||
//! interrupts. If this is not set, then no interrupts are generated
|
||||
//! by the CAN controller.
|
||||
//
|
||||
#define CAN_INT_MASTER 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This definition is used to determine the type of message object that is
|
||||
//! set up via a call to the CANMessageSet() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Transmit message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_TX,
|
||||
|
||||
//
|
||||
//! Transmit remote request message object
|
||||
//
|
||||
MSG_OBJ_TYPE_TX_REMOTE,
|
||||
|
||||
//
|
||||
//! Receive message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RX,
|
||||
|
||||
//
|
||||
//! Receive remote request message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RX_REMOTE,
|
||||
|
||||
//
|
||||
//! Remote frame receive remote, with auto-transmit message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RXTX_REMOTE
|
||||
}
|
||||
tMsgObjType;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following enumeration contains all error or status indicators that can
|
||||
// be returned when calling the CANStatusGet() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! CAN controller has entered a Bus Off state.
|
||||
//
|
||||
#define CAN_STATUS_BUS_OFF 0x00000080
|
||||
|
||||
//
|
||||
//! CAN controller error level has reached warning level.
|
||||
//
|
||||
#define CAN_STATUS_EWARN 0x00000040
|
||||
|
||||
//
|
||||
//! CAN controller error level has reached error passive level.
|
||||
//
|
||||
#define CAN_STATUS_EPASS 0x00000020
|
||||
|
||||
//
|
||||
//! A message was received successfully since the last read of this status.
|
||||
//
|
||||
#define CAN_STATUS_RXOK 0x00000010
|
||||
|
||||
//
|
||||
//! A message was transmitted successfully since the last read of this
|
||||
//! status.
|
||||
//
|
||||
#define CAN_STATUS_TXOK 0x00000008
|
||||
|
||||
//
|
||||
//! This is the mask for the last error code field.
|
||||
//
|
||||
#define CAN_STATUS_LEC_MSK 0x00000007
|
||||
|
||||
//
|
||||
//! There was no error.
|
||||
//
|
||||
#define CAN_STATUS_LEC_NONE 0x00000000
|
||||
|
||||
//
|
||||
//! A bit stuffing error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_STUFF 0x00000001
|
||||
|
||||
//
|
||||
//! A formatting error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_FORM 0x00000002
|
||||
|
||||
//
|
||||
//! An acknowledge error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_ACK 0x00000003
|
||||
|
||||
//
|
||||
//! The bus remained a bit level of 1 for longer than is allowed.
|
||||
//
|
||||
#define CAN_STATUS_LEC_BIT1 0x00000004
|
||||
|
||||
//
|
||||
//! The bus remained a bit level of 0 for longer than is allowed.
|
||||
//
|
||||
#define CAN_STATUS_LEC_BIT0 0x00000005
|
||||
|
||||
//
|
||||
//! A CRC error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_CRC 0x00000006
|
||||
|
||||
//
|
||||
//! This is the mask for the CAN Last Error Code (LEC).
|
||||
//
|
||||
#define CAN_STATUS_LEC_MASK 0x00000007
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CANBitTimingGet(uint32_t ui32Base, tCANBitClkParms *psClkParms);
|
||||
extern void CANBitTimingSet(uint32_t ui32Base, tCANBitClkParms *psClkParms);
|
||||
extern uint32_t CANBitRateSet(uint32_t ui32Base, uint32_t ui32SourceClock,
|
||||
uint32_t ui32BitRate);
|
||||
extern void CANDisable(uint32_t ui32Base);
|
||||
extern void CANEnable(uint32_t ui32Base);
|
||||
extern bool CANErrCntrGet(uint32_t ui32Base, uint32_t *pui32RxCount,
|
||||
uint32_t *pui32TxCount);
|
||||
extern void CANInit(uint32_t ui32Base);
|
||||
extern void CANIntClear(uint32_t ui32Base, uint32_t ui32IntClr);
|
||||
extern void CANIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void CANIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void CANIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
|
||||
extern uint32_t CANIntStatus(uint32_t ui32Base, tCANIntStsReg eIntStsReg);
|
||||
extern void CANIntUnregister(uint32_t ui32Base);
|
||||
extern void CANMessageClear(uint32_t ui32Base, uint32_t ui32ObjID);
|
||||
extern void CANMessageGet(uint32_t ui32Base, uint32_t ui32ObjID,
|
||||
tCANMsgObject *psMsgObject, bool bClrPendingInt);
|
||||
extern void CANMessageSet(uint32_t ui32Base, uint32_t ui32ObjID,
|
||||
tCANMsgObject *psMsgObject, tMsgObjType eMsgType);
|
||||
extern bool CANRetryGet(uint32_t ui32Base);
|
||||
extern void CANRetrySet(uint32_t ui32Base, bool bAutoRetry);
|
||||
extern uint32_t CANStatusGet(uint32_t ui32Base, tCANStsReg eStatusReg);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_CAN_H__
|
||||
@@ -1,452 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// comp.c - Driver for the analog comparator.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup comp_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "inc/hw_comp.h"
|
||||
#include "inc/hw_ints.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/comp.h"
|
||||
#include "driverlib/debug.h"
|
||||
#include "driverlib/interrupt.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Configures a comparator.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator to configure.
|
||||
//! \param ui32Config is the configuration of the comparator.
|
||||
//!
|
||||
//! This function configures a comparator. The \e ui32Config parameter is the
|
||||
//! result of a logical OR operation between the \b COMP_TRIG_xxx,
|
||||
//! \b COMP_INT_xxx, \b COMP_ASRCP_xxx, and \b COMP_OUTPUT_xxx values.
|
||||
//!
|
||||
//! The \b COMP_TRIG_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_TRIG_NONE to have no trigger to the ADC.
|
||||
//! - \b COMP_TRIG_HIGH to trigger the ADC when the comparator output is high.
|
||||
//! - \b COMP_TRIG_LOW to trigger the ADC when the comparator output is low.
|
||||
//! - \b COMP_TRIG_FALL to trigger the ADC when the comparator output goes low.
|
||||
//! - \b COMP_TRIG_RISE to trigger the ADC when the comparator output goes
|
||||
//! high.
|
||||
//! - \b COMP_TRIG_BOTH to trigger the ADC when the comparator output goes low
|
||||
//! or high.
|
||||
//!
|
||||
//! The \b COMP_INT_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_INT_HIGH to generate an interrupt when the comparator output is
|
||||
//! high.
|
||||
//! - \b COMP_INT_LOW to generate an interrupt when the comparator output is
|
||||
//! low.
|
||||
//! - \b COMP_INT_FALL to generate an interrupt when the comparator output goes
|
||||
//! low.
|
||||
//! - \b COMP_INT_RISE to generate an interrupt when the comparator output goes
|
||||
//! high.
|
||||
//! - \b COMP_INT_BOTH to generate an interrupt when the comparator output goes
|
||||
//! low or high.
|
||||
//!
|
||||
//! The \b COMP_ASRCP_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_ASRCP_PIN to use the dedicated Comp+ pin as the reference
|
||||
//! voltage.
|
||||
//! - \b COMP_ASRCP_PIN0 to use the Comp0+ pin as the reference voltage (this
|
||||
//! the same as \b COMP_ASRCP_PIN for the comparator 0).
|
||||
//! - \b COMP_ASRCP_REF to use the internally generated voltage as the
|
||||
//! reference voltage.
|
||||
//!
|
||||
//! The \b COMP_OUTPUT_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_OUTPUT_NORMAL to enable a non-inverted output from the comparator
|
||||
//! to a device pin.
|
||||
//! - \b COMP_OUTPUT_INVERT to enable an inverted output from the comparator to
|
||||
//! a device pin.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorConfigure(uint32_t ui32Base, uint32_t ui32Comp, uint32_t ui32Config)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Configure this comparator.
|
||||
//
|
||||
HWREG(ui32Base + (ui32Comp * 0x20) + COMP_O_ACCTL0) = ui32Config;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the internal reference voltage.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Ref is the desired reference voltage.
|
||||
//!
|
||||
//! This function sets the internal reference voltage value. The voltage is
|
||||
//! specified as one of the following values:
|
||||
//!
|
||||
//! - \b COMP_REF_OFF to turn off the reference voltage
|
||||
//! - \b COMP_REF_0V to set the reference voltage to 0 V
|
||||
//! - \b COMP_REF_0_1375V to set the reference voltage to 0.1375 V
|
||||
//! - \b COMP_REF_0_275V to set the reference voltage to 0.275 V
|
||||
//! - \b COMP_REF_0_4125V to set the reference voltage to 0.4125 V
|
||||
//! - \b COMP_REF_0_55V to set the reference voltage to 0.55 V
|
||||
//! - \b COMP_REF_0_6875V to set the reference voltage to 0.6875 V
|
||||
//! - \b COMP_REF_0_825V to set the reference voltage to 0.825 V
|
||||
//! - \b COMP_REF_0_928125V to set the reference voltage to 0.928125 V
|
||||
//! - \b COMP_REF_0_9625V to set the reference voltage to 0.9625 V
|
||||
//! - \b COMP_REF_1_03125V to set the reference voltage to 1.03125 V
|
||||
//! - \b COMP_REF_1_134375V to set the reference voltage to 1.134375 V
|
||||
//! - \b COMP_REF_1_1V to set the reference voltage to 1.1 V
|
||||
//! - \b COMP_REF_1_2375V to set the reference voltage to 1.2375 V
|
||||
//! - \b COMP_REF_1_340625V to set the reference voltage to 1.340625 V
|
||||
//! - \b COMP_REF_1_375V to set the reference voltage to 1.375 V
|
||||
//! - \b COMP_REF_1_44375V to set the reference voltage to 1.44375 V
|
||||
//! - \b COMP_REF_1_5125V to set the reference voltage to 1.5125 V
|
||||
//! - \b COMP_REF_1_546875V to set the reference voltage to 1.546875 V
|
||||
//! - \b COMP_REF_1_65V to set the reference voltage to 1.65 V
|
||||
//! - \b COMP_REF_1_753125V to set the reference voltage to 1.753125 V
|
||||
//! - \b COMP_REF_1_7875V to set the reference voltage to 1.7875 V
|
||||
//! - \b COMP_REF_1_85625V to set the reference voltage to 1.85625 V
|
||||
//! - \b COMP_REF_1_925V to set the reference voltage to 1.925 V
|
||||
//! - \b COMP_REF_1_959375V to set the reference voltage to 1.959375 V
|
||||
//! - \b COMP_REF_2_0625V to set the reference voltage to 2.0625 V
|
||||
//! - \b COMP_REF_2_165625V to set the reference voltage to 2.165625 V
|
||||
//! - \b COMP_REF_2_26875V to set the reference voltage to 2.26875 V
|
||||
//! - \b COMP_REF_2_371875V to set the reference voltage to 2.371875 V
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorRefSet(uint32_t ui32Base, uint32_t ui32Ref)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
|
||||
//
|
||||
// Set the voltage reference voltage as requested.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACREFCTL) = ui32Ref;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current comparator output value.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//!
|
||||
//! This function retrieves the current value of the comparator output.
|
||||
//!
|
||||
//! \return Returns \b true if the comparator output is high and \b false if
|
||||
//! the comparator output is low.
|
||||
//
|
||||
//*****************************************************************************
|
||||
bool
|
||||
ComparatorValueGet(uint32_t ui32Base, uint32_t ui32Comp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Return the appropriate value based on the comparator's present output
|
||||
// value.
|
||||
//
|
||||
if(HWREG(ui32Base + (ui32Comp * 0x20) + COMP_O_ACSTAT0) &
|
||||
COMP_ACSTAT0_OVAL)
|
||||
{
|
||||
return(true);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(false);
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the comparator interrupt.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//! \param pfnHandler is a pointer to the function to be called when the
|
||||
//! comparator interrupt occurs.
|
||||
//!
|
||||
//! This function sets the handler to be called when the comparator interrupt
|
||||
//! occurs and enables the interrupt in the interrupt controller. It is the
|
||||
//! interrupt handler's responsibility to clear the interrupt source via
|
||||
//! ComparatorIntClear().
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntRegister(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
void (*pfnHandler)(void))
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Register the interrupt handler, returning an error if an error occurs.
|
||||
//
|
||||
IntRegister(INT_COMP0_TM4C123 + ui32Comp, pfnHandler);
|
||||
|
||||
//
|
||||
// Enable the interrupt in the interrupt controller.
|
||||
//
|
||||
IntEnable(INT_COMP0_TM4C123 + ui32Comp);
|
||||
|
||||
//
|
||||
// Enable the comparator interrupt.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACINTEN) |= 1 << ui32Comp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Unregisters an interrupt handler for a comparator interrupt.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//!
|
||||
//! This function clears the handler to be called when a comparator interrupt
|
||||
//! occurs. This function also masks off the interrupt in the interrupt
|
||||
//! controller so that the interrupt handler no longer is called.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntUnregister(uint32_t ui32Base, uint32_t ui32Comp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Disable the comparator interrupt.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACINTEN) &= ~(1 << ui32Comp);
|
||||
|
||||
//
|
||||
// Disable the interrupt in the interrupt controller.
|
||||
//
|
||||
IntDisable(INT_COMP0_TM4C123 + ui32Comp);
|
||||
|
||||
//
|
||||
// Unregister the interrupt handler.
|
||||
//
|
||||
IntUnregister(INT_COMP0_TM4C123 + ui32Comp);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the comparator interrupt.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//!
|
||||
//! This function enables generation of an interrupt from the specified
|
||||
//! comparator. Only enabled comparator interrupts can be reflected
|
||||
//! to the processor.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntEnable(uint32_t ui32Base, uint32_t ui32Comp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Enable the comparator interrupt.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACINTEN) |= 1 << ui32Comp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the comparator interrupt.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//!
|
||||
//! This function disables generation of an interrupt from the specified
|
||||
//! comparator. Only enabled comparator interrupts can be reflected
|
||||
//! to the processor.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntDisable(uint32_t ui32Base, uint32_t ui32Comp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Disable the comparator interrupt.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACINTEN) &= ~(1 << ui32Comp);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current interrupt status.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//! \param bMasked is \b false if the raw interrupt status is required and
|
||||
//! \b true if the masked interrupt status is required.
|
||||
//!
|
||||
//! This function returns the interrupt status for the comparator. Either the
|
||||
//! raw or the masked interrupt status can be returned.
|
||||
//!
|
||||
//! \return \b true if the interrupt is asserted and \b false if it is not
|
||||
//! asserted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
bool
|
||||
ComparatorIntStatus(uint32_t ui32Base, uint32_t ui32Comp, bool bMasked)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Return either the interrupt status or the raw interrupt status as
|
||||
// requested.
|
||||
//
|
||||
if(bMasked)
|
||||
{
|
||||
return(((HWREG(ui32Base + COMP_O_ACMIS) >> ui32Comp) & 1) ? true :
|
||||
false);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(((HWREG(ui32Base + COMP_O_ACRIS) >> ui32Comp) & 1) ? true :
|
||||
false);
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Clears a comparator interrupt.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the comparator module.
|
||||
//! \param ui32Comp is the index of the comparator.
|
||||
//!
|
||||
//! The comparator interrupt is cleared, so that it no longer asserts. This
|
||||
//! function must be called in the interrupt handler to keep the handler from
|
||||
//! being called again immediately upon exit. Note that for a level-triggered
|
||||
//! interrupt, the interrupt cannot be cleared until it stops asserting.
|
||||
//!
|
||||
//! \note Because there is a write buffer in the Cortex-M processor, it may
|
||||
//! take several clock cycles before the interrupt source is actually cleared.
|
||||
//! Therefore, it is recommended that the interrupt source be cleared early in
|
||||
//! the interrupt handler (as opposed to the very last action) to avoid
|
||||
//! returning from the interrupt handler before the interrupt source is
|
||||
//! actually cleared. Failure to do so may result in the interrupt handler
|
||||
//! being immediately reentered (because the interrupt controller still sees
|
||||
//! the interrupt source asserted).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntClear(uint32_t ui32Base, uint32_t ui32Comp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == COMP_BASE);
|
||||
ASSERT(ui32Comp < 3);
|
||||
|
||||
//
|
||||
// Clear the interrupt.
|
||||
//
|
||||
HWREG(ui32Base + COMP_O_ACMIS) = 1 << ui32Comp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -1,141 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// comp.h - Prototypes for the analog comparator driver.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_COMP_H__
|
||||
#define __DRIVERLIB_COMP_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ComparatorConfigure() as the ui32Config
|
||||
// parameter. For each group (in other words, COMP_TRIG_xxx, COMP_INT_xxx, and
|
||||
// so on), one of the values may be selected and combined together with values
|
||||
// from the other groups via a logical OR.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define COMP_TRIG_NONE 0x00000000 // No ADC trigger
|
||||
#define COMP_TRIG_HIGH 0x00000880 // Trigger when high
|
||||
#define COMP_TRIG_LOW 0x00000800 // Trigger when low
|
||||
#define COMP_TRIG_FALL 0x00000820 // Trigger on falling edge
|
||||
#define COMP_TRIG_RISE 0x00000840 // Trigger on rising edge
|
||||
#define COMP_TRIG_BOTH 0x00000860 // Trigger on both edges
|
||||
#define COMP_INT_HIGH 0x00000010 // Interrupt when high
|
||||
#define COMP_INT_LOW 0x00000000 // Interrupt when low
|
||||
#define COMP_INT_FALL 0x00000004 // Interrupt on falling edge
|
||||
#define COMP_INT_RISE 0x00000008 // Interrupt on rising edge
|
||||
#define COMP_INT_BOTH 0x0000000C // Interrupt on both edges
|
||||
#define COMP_ASRCP_PIN 0x00000000 // Dedicated Comp+ pin
|
||||
#define COMP_ASRCP_PIN0 0x00000200 // Comp0+ pin
|
||||
#define COMP_ASRCP_REF 0x00000400 // Internal voltage reference
|
||||
#define COMP_OUTPUT_NORMAL 0x00000000 // Comparator output normal
|
||||
#define COMP_OUTPUT_INVERT 0x00000002 // Comparator output inverted
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ComparatorSetRef() as the ui32Ref parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define COMP_REF_OFF 0x00000000 // Turn off the internal reference
|
||||
#define COMP_REF_0V 0x00000300 // Internal reference of 0V
|
||||
#define COMP_REF_0_1375V 0x00000301 // Internal reference of 0.1375V
|
||||
#define COMP_REF_0_275V 0x00000302 // Internal reference of 0.275V
|
||||
#define COMP_REF_0_4125V 0x00000303 // Internal reference of 0.4125V
|
||||
#define COMP_REF_0_55V 0x00000304 // Internal reference of 0.55V
|
||||
#define COMP_REF_0_6875V 0x00000305 // Internal reference of 0.6875V
|
||||
#define COMP_REF_0_825V 0x00000306 // Internal reference of 0.825V
|
||||
#define COMP_REF_0_928125V 0x00000201 // Internal reference of 0.928125V
|
||||
#define COMP_REF_0_9625V 0x00000307 // Internal reference of 0.9625V
|
||||
#define COMP_REF_1_03125V 0x00000202 // Internal reference of 1.03125V
|
||||
#define COMP_REF_1_134375V 0x00000203 // Internal reference of 1.134375V
|
||||
#define COMP_REF_1_1V 0x00000308 // Internal reference of 1.1V
|
||||
#define COMP_REF_1_2375V 0x00000309 // Internal reference of 1.2375V
|
||||
#define COMP_REF_1_340625V 0x00000205 // Internal reference of 1.340625V
|
||||
#define COMP_REF_1_375V 0x0000030A // Internal reference of 1.375V
|
||||
#define COMP_REF_1_44375V 0x00000206 // Internal reference of 1.44375V
|
||||
#define COMP_REF_1_5125V 0x0000030B // Internal reference of 1.5125V
|
||||
#define COMP_REF_1_546875V 0x00000207 // Internal reference of 1.546875V
|
||||
#define COMP_REF_1_65V 0x0000030C // Internal reference of 1.65V
|
||||
#define COMP_REF_1_753125V 0x00000209 // Internal reference of 1.753125V
|
||||
#define COMP_REF_1_7875V 0x0000030D // Internal reference of 1.7875V
|
||||
#define COMP_REF_1_85625V 0x0000020A // Internal reference of 1.85625V
|
||||
#define COMP_REF_1_925V 0x0000030E // Internal reference of 1.925V
|
||||
#define COMP_REF_1_959375V 0x0000020B // Internal reference of 1.959375V
|
||||
#define COMP_REF_2_0625V 0x0000030F // Internal reference of 2.0625V
|
||||
#define COMP_REF_2_165625V 0x0000020D // Internal reference of 2.165625V
|
||||
#define COMP_REF_2_26875V 0x0000020E // Internal reference of 2.26875V
|
||||
#define COMP_REF_2_371875V 0x0000020F // Internal reference of 2.371875V
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void ComparatorConfigure(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
uint32_t ui32Config);
|
||||
extern void ComparatorRefSet(uint32_t ui32Base, uint32_t ui32Ref);
|
||||
extern bool ComparatorValueGet(uint32_t ui32Base, uint32_t ui32Comp);
|
||||
extern void ComparatorIntRegister(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
void (*pfnHandler)(void));
|
||||
extern void ComparatorIntUnregister(uint32_t ui32Base, uint32_t ui32Comp);
|
||||
extern void ComparatorIntEnable(uint32_t ui32Base, uint32_t ui32Comp);
|
||||
extern void ComparatorIntDisable(uint32_t ui32Base, uint32_t ui32Comp);
|
||||
extern bool ComparatorIntStatus(uint32_t ui32Base, uint32_t ui32Comp,
|
||||
bool bMasked);
|
||||
extern void ComparatorIntClear(uint32_t ui32Base, uint32_t ui32Comp);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_COMP_H__
|
||||
@@ -1,457 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// cpu.c - Instruction wrappers for special CPU instructions needed by the
|
||||
// drivers.
|
||||
//
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
#include "driverlib/cpu.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSID instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
uint32_t __attribute__((naked))
|
||||
CPUcpsid(void)
|
||||
{
|
||||
uint32_t ui32Ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ui32Ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ui32Ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm uint32_t
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsid i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function returning the state of PRIMASK (indicating whether
|
||||
// interrupts are enabled or disabled).
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
uint32_t __attribute__((naked))
|
||||
CPUprimask(void)
|
||||
{
|
||||
uint32_t ui32Ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ui32Ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ui32Ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm uint32_t
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSIE instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
uint32_t __attribute__((naked))
|
||||
CPUcpsie(void)
|
||||
{
|
||||
uint32_t ui32Ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ui32Ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ui32Ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm uint32_t
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsie i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the WFI instruction.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
void __attribute__((naked))
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
wfi;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for writing the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
void __attribute__((naked))
|
||||
CPUbasepriSet(uint32_t ui32NewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void
|
||||
CPUbasepriSet(uint32_t ui32NewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm void
|
||||
CPUbasepriSet(uint32_t ui32NewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
msr BASEPRI, r0;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void
|
||||
CPUbasepriSet(uint32_t ui32NewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for reading the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
uint32_t __attribute__((naked))
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
uint32_t ui32Ret;
|
||||
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ui32Ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ui32Ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm uint32_t
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
mrs r0, BASEPRI;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
@@ -1,75 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// cpu.h - Prototypes for the CPU instruction wrapper functions.
|
||||
//
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_CPU_H__
|
||||
#define __DRIVERLIB_CPU_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CPUcpsid(void);
|
||||
extern uint32_t CPUcpsie(void);
|
||||
extern uint32_t CPUprimask(void);
|
||||
extern void CPUwfi(void);
|
||||
extern uint32_t CPUbasepriGet(void);
|
||||
extern void CPUbasepriSet(uint32_t ui32NewBasepri);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_CPU_H__
|
||||
@@ -1,311 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc.c - Driver for the CRC module.
|
||||
//
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup crc_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "inc/hw_ccm.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/crc.h"
|
||||
#include "driverlib/debug.h"
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Set the configuration of CRC functionality with the EC module.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the EC module.
|
||||
//! \param ui32CRCConfig is the configuration of the CRC engine.
|
||||
//!
|
||||
//! This function configures the operation of the CRC engine within the EC
|
||||
//! module. The configuration is specified with the \e ui32CRCConfig argument.
|
||||
//! It is the logical OR of any of the following options:
|
||||
//!
|
||||
//! CRC Initialization Value
|
||||
//! - \b CRC_CFG_INIT_SEED - Initialize with seed value
|
||||
//! - \b CRC_CFG_INIT_0 - Initialize to all '0s'
|
||||
//! - \b CRC_CFG_INIT_1 - Initialize to all '1s'
|
||||
//!
|
||||
//! Input Data Size
|
||||
//! - \b CRC_CFG_SIZE_8BIT - Input data size of 8 bits
|
||||
//! - \b CRC_CFG_SIZE_32BIT - Input data size of 32 bits
|
||||
//!
|
||||
//! Post Process Reverse/Inverse
|
||||
//! - \b CRC_CFG_RESINV - Result inverse enable
|
||||
//! - \b CRC_CFG_OBR - Output reverse enable
|
||||
//!
|
||||
//! Input Bit Reverse
|
||||
//! - \b CRC_CFG_IBR - Bit reverse enable
|
||||
//!
|
||||
//! Endian Control
|
||||
//! - \b CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
|
||||
//! - \b CRC_CFG_ENDIAN_SHW - Swap half-word
|
||||
//!
|
||||
//! Operation Type
|
||||
//! - \b CRC_CFG_TYPE_P8005 - Polynomial 0x8005
|
||||
//! - \b CRC_CFG_TYPE_P1021 - Polynomial 0x1021
|
||||
//! - \b CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
|
||||
//! - \b CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
|
||||
//! - \b CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == CCM0_BASE);
|
||||
ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
|
||||
(ui32CRCConfig & CRC_CFG_INIT_0) ||
|
||||
(ui32CRCConfig & CRC_CFG_INIT_1) ||
|
||||
(ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
|
||||
(ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
|
||||
(ui32CRCConfig & CRC_CFG_RESINV) ||
|
||||
(ui32CRCConfig & CRC_CFG_OBR) ||
|
||||
(ui32CRCConfig & CRC_CFG_IBR) ||
|
||||
(ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
|
||||
(ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
|
||||
(ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
|
||||
(ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
|
||||
(ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
|
||||
(ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
|
||||
(ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
|
||||
|
||||
//
|
||||
// Write the control register with the configuration.
|
||||
//
|
||||
HWREG(ui32Base + CCM_O_CRCCTRL) = ui32CRCConfig;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Write the seed value for CRC operations in the EC module.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the EC module.
|
||||
//! \param ui32Seed is the seed value.
|
||||
//!
|
||||
//! This function writes the seed value for use with CRC operations in the
|
||||
//! EC module. This value is the start value for CRC operations. If this
|
||||
//! value is not written, then the residual seed from the previous operation
|
||||
//! is used as the starting value.
|
||||
//!
|
||||
//! \note The seed must be written only if \b CRC_CFG_INIT_SEED is
|
||||
//! set with the CRCConfigSet() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == CCM0_BASE);
|
||||
|
||||
//
|
||||
// Write the seed value to the seed register.
|
||||
//
|
||||
HWREG(ui32Base + CCM_O_CRCSEED) = ui32Seed;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Write data into the EC module for CRC operations.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the EC module.
|
||||
//! \param ui32Data is the data to be written.
|
||||
//!
|
||||
//! This function writes either 8 or 32 bits of data into the EC module for
|
||||
//! CRC operations. The distinction between 8 and 32 bits of data is made
|
||||
//! when the \b CRC_CFG_SIZE_8BIT or \b CRC_CFG_SIZE_32BIT flag
|
||||
//! is set using the CRCConfigSet() function.
|
||||
//!
|
||||
//! When writing 8 bits of data, ensure the data is in the least significant
|
||||
//! byte position. The remaining bytes should be written with zero. For
|
||||
//! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == CCM0_BASE);
|
||||
|
||||
//
|
||||
// Write the data
|
||||
//
|
||||
HWREG(ui32Base + CCM_O_CRCDIN) = ui32Data;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Reads the result of a CRC operation in the EC module.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the EC module.
|
||||
//! \param bPPResult is \b true to read the post-processed result, or \b false
|
||||
//! to read the unmodified result.
|
||||
//!
|
||||
//! This function reads either the unmodified CRC result or the post
|
||||
//! processed CRC result from the EC module. The post-processing options
|
||||
//! are selectable through \b CRC_CFG_RESINV and \b CRC_CFG_OBR
|
||||
//! parameters in the CRCConfigSet() function.
|
||||
//!
|
||||
//! \return The CRC result.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t
|
||||
CRCResultRead(uint32_t ui32Base, bool bPPResult)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == CCM0_BASE);
|
||||
|
||||
//
|
||||
// Depending on the value of bPPResult, read the appropriate register and
|
||||
// return value.
|
||||
//
|
||||
if(bPPResult)
|
||||
{
|
||||
return(HWREG(ui32Base + CCM_O_CRCRSLTPP));
|
||||
}
|
||||
else
|
||||
{
|
||||
return(HWREG(ui32Base + CCM_O_CRCSEED));
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Process data to generate a CRC with the EC module.
|
||||
//!
|
||||
//! \param ui32Base is the base address of the EC module.
|
||||
//! \param pui32DataIn is a pointer to an array of data that is processed.
|
||||
//! \param ui32DataLength is the number of data items that are processed
|
||||
//! to produce the CRC.
|
||||
//! \param bPPResult is \b true to read the post-processed result, or \b false
|
||||
//! to read the unmodified result.
|
||||
//!
|
||||
//! This function processes an array of data to produce a CRC result.
|
||||
//!
|
||||
//! The data in the array pointed to be \e pui32DataIn is either an array
|
||||
//! of bytes or an array or words depending on the selection of the input
|
||||
//! data size options \b CRC_CFG_SIZE_8BIT and
|
||||
//! \b CRC_CFG_SIZE_32BIT.
|
||||
//!
|
||||
//! This function returns either the unmodified CRC result or the
|
||||
//! post- processed CRC result from the EC module. The post-processing
|
||||
//! options are selectable through \b CRC_CFG_RESINV and
|
||||
//! \b CRC_CFG_OBR parameters.
|
||||
//!
|
||||
//! \return The CRC result.
|
||||
//
|
||||
//*****************************************************************************
|
||||
uint32_t
|
||||
CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
|
||||
uint32_t ui32DataLength, bool bPPResult)
|
||||
{
|
||||
uint8_t *pui8DataIn;
|
||||
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ui32Base == CCM0_BASE);
|
||||
|
||||
//
|
||||
// See if the CRC is operating in 8-bit or 32-bit mode.
|
||||
//
|
||||
if(HWREG(ui32Base + CCM_O_CRCCTRL) & CCM_CRCCTRL_SIZE)
|
||||
{
|
||||
//
|
||||
// The CRC is operating in 8-bit mode, so create an 8-bit pointer to
|
||||
// the data.
|
||||
//
|
||||
pui8DataIn = (uint8_t *)pui32DataIn;
|
||||
|
||||
//
|
||||
// Loop through the input data.
|
||||
//
|
||||
while(ui32DataLength--)
|
||||
{
|
||||
//
|
||||
// Write the next data byte.
|
||||
//
|
||||
HWREG(ui32Base + CCM_O_CRCDIN) = *pui8DataIn++;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//
|
||||
// The CRC is operating in 32-bit mode, so loop through the input data.
|
||||
//
|
||||
while(ui32DataLength--)
|
||||
{
|
||||
//
|
||||
// Write the next data word.
|
||||
//
|
||||
HWREG(ui32Base + CCM_O_CRCDIN) = *pui32DataIn++;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Return the result.
|
||||
//
|
||||
return(CRCResultRead(ui32Base, bPPResult));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -1,101 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc.h - Defines and Macros for CRC module.
|
||||
//
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_CRC_H__
|
||||
#define __DRIVERLIB_CRC_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used in the ui32Config argument of the
|
||||
// ECConfig function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define CRC_CFG_INIT_SEED 0x00000000 // Initialize with seed
|
||||
#define CRC_CFG_INIT_0 0x00004000 // Initialize to all '0s'
|
||||
#define CRC_CFG_INIT_1 0x00006000 // Initialize to all '1s'
|
||||
#define CRC_CFG_SIZE_8BIT 0x00001000 // Input Data Size
|
||||
#define CRC_CFG_SIZE_32BIT 0x00000000 // Input Data Size
|
||||
#define CRC_CFG_RESINV 0x00000200 // Result Inverse Enable
|
||||
#define CRC_CFG_OBR 0x00000100 // Output Reverse Enable
|
||||
#define CRC_CFG_IBR 0x00000080 // Bit reverse enable
|
||||
#define CRC_CFG_ENDIAN_SBHW 0x00000020 // Swap byte in half-word
|
||||
#define CRC_CFG_ENDIAN_SHW 0x00000010 // Swap half-word
|
||||
#define CRC_CFG_TYPE_P8005 0x00000000 // Polynomial 0x8005
|
||||
#define CRC_CFG_TYPE_P1021 0x00000001 // Polynomial 0x1021
|
||||
#define CRC_CFG_TYPE_P4C11DB7 0x00000002 // Polynomial 0x4C11DB7
|
||||
#define CRC_CFG_TYPE_P1EDC6F41 0x00000003 // Polynomial 0x1EDC6F41
|
||||
#define CRC_CFG_TYPE_TCPCHKSUM 0x00000008 // TCP checksum
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Function prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if 0
|
||||
extern void ECClockGatingReqest(uint32_t ui32Base, uint32_t ui32ECIP,
|
||||
bool bGate);
|
||||
#endif
|
||||
extern void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig);
|
||||
extern uint32_t CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
|
||||
uint32_t ui32DataLength, bool bPPResult);
|
||||
extern void CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data);
|
||||
extern uint32_t CRCResultRead(uint32_t ui32Base, bool bPPResult);
|
||||
extern void CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_CRC_H__
|
||||
@@ -1,70 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// debug.h - Macros for assisting debug of the driver library.
|
||||
//
|
||||
// Copyright (c) 2006-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_DEBUG_H__
|
||||
#define __DRIVERLIB_DEBUG_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototype for the function that is called when an invalid argument is passed
|
||||
// to an API. This is only used when doing a DEBUG build.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void __error__(char *pcFilename, uint32_t ui32Line);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The ASSERT macro, which does the actual assertion checking. Typically, this
|
||||
// will be for procedure arguments.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef DEBUG
|
||||
#define ASSERT(expr) do \
|
||||
{ \
|
||||
if(!(expr)) \
|
||||
{ \
|
||||
__error__(__FILE__, __LINE__); \
|
||||
} \
|
||||
} \
|
||||
while(0)
|
||||
#else
|
||||
#define ASSERT(expr)
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_DEBUG_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,140 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// des.h - Defines and Macros for the DES module.
|
||||
//
|
||||
// Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_DES_H__
|
||||
#define __DRIVERLIB_DES_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the direction with the
|
||||
// ui32Config argument in the DESConfig() function. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DES_CFG_DIR_DECRYPT 0x00000000
|
||||
#define DES_CFG_DIR_ENCRYPT 0x00000004
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to specify the operational with the
|
||||
// ui32Config argument in the DESConfig() function. Only one is permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DES_CFG_MODE_ECB 0x00000000
|
||||
#define DES_CFG_MODE_CBC 0x00000010
|
||||
#define DES_CFG_MODE_CFB 0x00000020
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used to select between single DES and triple DES
|
||||
// with the ui32Config argument in the DESConfig() function. Only one is
|
||||
// permitted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DES_CFG_SINGLE 0x00000000
|
||||
#define DES_CFG_TRIPLE 0x00000008
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used with the DESIntEnable(), DESIntDisable() and
|
||||
// DESIntStatus() functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DES_INT_CONTEXT_IN 0x00000001
|
||||
#define DES_INT_DATA_IN 0x00000002
|
||||
#define DES_INT_DATA_OUT 0x00000004
|
||||
#define DES_INT_DMA_CONTEXT_IN 0x00010000
|
||||
#define DES_INT_DMA_DATA_IN 0x00020000
|
||||
#define DES_INT_DMA_DATA_OUT 0x00040000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used with the DESEnableDMA() and DESDisableDMA()
|
||||
// functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define DES_DMA_CONTEXT_IN 0x00000080
|
||||
#define DES_DMA_DATA_OUT 0x00000040
|
||||
#define DES_DMA_DATA_IN 0x00000020
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void DESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void DESDataRead(uint32_t ui32Base, uint32_t *pui32Dest);
|
||||
extern bool DESDataReadNonBlocking(uint32_t ui32Base, uint32_t *pui32Dest);
|
||||
extern bool DESDataProcess(uint32_t ui32Base, uint32_t *pui32Src,
|
||||
uint32_t *pui32Dest, uint32_t ui32Length);
|
||||
extern void DESDataWrite(uint32_t ui32Base, uint32_t *pui32Src);
|
||||
extern bool DESDataWriteNonBlocking(uint32_t ui32Base, uint32_t *pui32Src);
|
||||
extern void DESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
|
||||
extern void DESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
|
||||
extern void DESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void DESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void DESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void DESIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
|
||||
extern uint32_t DESIntStatus(uint32_t ui32Base, bool bMasked);
|
||||
extern void DESIntUnregister(uint32_t ui32Base);
|
||||
extern bool DESIVSet(uint32_t ui32Base, uint32_t *pui32IVdata);
|
||||
extern void DESKeySet(uint32_t ui32Base, uint32_t *pui32Key);
|
||||
extern void DESLengthSet(uint32_t ui32Base, uint32_t ui32Length);
|
||||
extern void DESReset(uint32_t ui32Base);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_DES_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,284 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// eeprom.h - Prototypes for the EEPROM driver.
|
||||
//
|
||||
// Copyright (c) 2010-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_EEPROM_H__
|
||||
#define __DRIVERLIB_EEPROM_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup eeprom_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values returned by EEPROMInit.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
//! This value may be returned from a call to EEPROMInit(). It indicates that
|
||||
//! no previous write operations were interrupted by a reset event and that the
|
||||
//! EEPROM peripheral is ready for use.
|
||||
//
|
||||
#define EEPROM_INIT_OK 0
|
||||
|
||||
//
|
||||
//! This value may be returned from a call to EEPROMInit(). It indicates that
|
||||
//! a previous data or protection write operation was interrupted by a reset
|
||||
//! event and that the EEPROM peripheral was unable to clean up after the
|
||||
//! problem. This situation may be resolved with another reset or may be fatal
|
||||
//! depending upon the cause of the problem. For example, if the voltage to
|
||||
//! the part is unstable, retrying once the voltage has stabilized may clear
|
||||
//! the error.
|
||||
//
|
||||
#define EEPROM_INIT_ERROR 2
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Error indicators returned by various EEPROM API calls. These will be ORed
|
||||
// together into the final return code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
//! This return code bit indicates that an attempt was made to read from
|
||||
//! the EEPROM while a write operation was in progress.
|
||||
//
|
||||
#define EEPROM_RC_WRBUSY 0x00000020
|
||||
|
||||
//
|
||||
//! This return code bit indicates that an attempt was made to write a
|
||||
//! value but the destination permissions disallow write operations. This
|
||||
//! may be due to the destination block being locked, access protection set
|
||||
//! to prohibit writes or an attempt to write a password when one is already
|
||||
//! written.
|
||||
//
|
||||
#define EEPROM_RC_NOPERM 0x00000010
|
||||
|
||||
//
|
||||
//! This return code bit indicates that the EEPROM programming state machine
|
||||
//! is currently copying to or from the internal copy buffer to make room for
|
||||
//! a newly written value. It is provided as a status indicator and does not
|
||||
//! indicate an error.
|
||||
//
|
||||
#define EEPROM_RC_WKCOPY 0x00000008
|
||||
|
||||
//
|
||||
//! This return code bit indicates that the EEPROM programming state machine
|
||||
//! is currently erasing the internal copy buffer. It is provided as a
|
||||
//! status indicator and does not indicate an error.
|
||||
//
|
||||
#define EEPROM_RC_WKERASE 0x00000004
|
||||
|
||||
//
|
||||
//! This return code bit indicates that the EEPROM programming state machine
|
||||
//! is currently working. No new write operations should be attempted until
|
||||
//! this bit is clear.
|
||||
//
|
||||
#define EEPROM_RC_WORKING 0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EEPROMBlockProtectSet() in the ui32Protect
|
||||
// parameter, and returned by EEPROMBlockProtectGet().
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
//! This bit may be ORed with the protection option passed to
|
||||
//! EEPROMBlockProtectSet() or returned from EEPROMBlockProtectGet(). It
|
||||
//! restricts EEPROM access to threads running in supervisor mode and prevents
|
||||
//! access to an EEPROM block when the CPU is in user mode.
|
||||
//
|
||||
#define EEPROM_PROT_SUPERVISOR_ONLY 0x00000008
|
||||
|
||||
//
|
||||
//! This value may be passed to EEPROMBlockProtectSet() or returned from
|
||||
//! EEPROMBlockProtectGet(). It indicates that the block should offer
|
||||
//! read/write access when no password is set or when a password is set and
|
||||
//! the block is unlocked, and read-only access when a password is set but
|
||||
//! the block is locked.
|
||||
//
|
||||
#define EEPROM_PROT_RW_LRO_URW 0x00000000
|
||||
|
||||
//
|
||||
//! This value may be passed to EEPROMBlockProtectSet() or returned from
|
||||
//! EEPROMBlockProtectGet(). It indicates that the block should offer neither
|
||||
//! read nor write access unless it is protected by a password and unlocked.
|
||||
//
|
||||
#define EEPROM_PROT_NA_LNA_URW 0x00000001
|
||||
|
||||
//
|
||||
//! This value may be passed to EEPROMBlockProtectSet() or returned from
|
||||
//! EEPROMBlockProtectGet(). It indicates that the block should offer
|
||||
//! read-only access when no password is set or when a password is set and the
|
||||
//! block is unlocked. When a password is set and the block is locked, neither
|
||||
//! read nor write access is permitted.
|
||||
//
|
||||
#define EEPROM_PROT_RO_LNA_URO 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This value may be passed to EEPROMIntEnable() and EEPROMIntDisable() and is
|
||||
//! returned by EEPROMIntStatus() if an EEPROM interrupt is currently being
|
||||
//! signaled.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EEPROM_INT_PROGRAM 0x00000004
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the EEPROM block number containing a given offset address.
|
||||
//!
|
||||
//! \param ui32Addr is the linear, byte address of the EEPROM location whose
|
||||
//! block number is to be returned. This is a zero-based offset from the start
|
||||
//! of the EEPROM storage.
|
||||
//!
|
||||
//! This macro may be used to translate an EEPROM address offset into a
|
||||
//! block number suitable for use in any of the driver's block protection
|
||||
//! functions. The address provided is expressed as a byte offset from the
|
||||
//! base of the EEPROM.
|
||||
//!
|
||||
//! \return Returns the zero-based block number which contains the passed
|
||||
//! address.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EEPROMBlockFromAddr(ui32Addr) ((ui32Addr) >> 6)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the offset address of the first word in an EEPROM block.
|
||||
//!
|
||||
//! \param ui32Block is the index of the EEPROM block whose first word address
|
||||
//! is to be returned.
|
||||
//!
|
||||
//! This macro may be used to determine the address of the first word in a
|
||||
//! given EEPROM block. The address returned is expressed as a byte offset
|
||||
//! from the base of EEPROM storage.
|
||||
//!
|
||||
//! \return Returns the address of the first word in the given EEPROM block.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EEPROMAddrFromBlock(ui32Block) ((ui32Block) << 6)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t EEPROMInit(void);
|
||||
extern uint32_t EEPROMSizeGet(void);
|
||||
extern uint32_t EEPROMBlockCountGet(void);
|
||||
extern void EEPROMRead(uint32_t *pui32Data, uint32_t ui32Address,
|
||||
uint32_t ui32Count);
|
||||
extern uint32_t EEPROMProgram(uint32_t *pui32Data,
|
||||
uint32_t ui32Address,
|
||||
uint32_t ui32Count);
|
||||
extern uint32_t EEPROMProgramNonBlocking(uint32_t ui32Data,
|
||||
uint32_t ui32Address);
|
||||
extern uint32_t EEPROMStatusGet(void);
|
||||
extern uint32_t EEPROMMassErase(void);
|
||||
extern uint32_t EEPROMBlockProtectGet(uint32_t ui32Block);
|
||||
extern uint32_t EEPROMBlockProtectSet(uint32_t ui32Block,
|
||||
uint32_t ui32Protect);
|
||||
extern uint32_t EEPROMBlockPasswordSet(uint32_t ui32Block,
|
||||
uint32_t *pui32Password,
|
||||
uint32_t ui32Count);
|
||||
extern uint32_t EEPROMBlockLock(uint32_t ui32Block);
|
||||
extern uint32_t EEPROMBlockUnlock(uint32_t ui32Block,
|
||||
uint32_t *pui32Password,
|
||||
uint32_t ui32Count);
|
||||
extern void EEPROMBlockHide(uint32_t ui32Block);
|
||||
extern void EEPROMIntEnable(uint32_t ui32IntFlags);
|
||||
extern void EEPROMIntDisable(uint32_t ui32IntFlags);
|
||||
extern uint32_t EEPROMIntStatus(bool bMasked);
|
||||
extern void EEPROMIntClear(uint32_t ui32IntFlags);
|
||||
|
||||
#ifndef DEPRECATED
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following definitions appeared in previous revisions of this file
|
||||
// but have been deprecated and should not be used by applications.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
// This value used to be one of those which could be returned from a call to
|
||||
// EEPROMInit(). It transpires that it is was incorrect and has been removed
|
||||
// after EEPROMInit() was reworked for TivaWare 2.1.
|
||||
//
|
||||
#define EEPROM_INIT_RETRY 1
|
||||
|
||||
//
|
||||
// This return code is not available from any Tiva part and has been removed.
|
||||
//
|
||||
#define EEPROM_RC_INVPL 0x00000100
|
||||
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_EEPROM_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,122 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// flash.h - Prototypes for the flash driver.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_FLASH_H__
|
||||
#define __DRIVERLIB_FLASH_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FlashProtectSet(), and returned by
|
||||
// FlashProtectGet().
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
FlashReadWrite, // Flash can be read and written
|
||||
FlashReadOnly, // Flash can only be read
|
||||
FlashExecuteOnly // Flash can only be executed
|
||||
}
|
||||
tFlashProtection;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values passed to FlashIntEnable(), FlashIntDisable() and FlashIntClear() and
|
||||
// returned from FlashIntStatus().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
|
||||
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
|
||||
#define FLASH_INT_EEPROM 0x00000004 // EEPROM Interrupt Mask
|
||||
#define FLASH_INT_VOLTAGE_ERR 0x00000200 // Voltage Error Interrupt Mask
|
||||
#define FLASH_INT_DATA_ERR 0x00000400 // Invalid Data Interrupt Mask
|
||||
#define FLASH_INT_ERASE_ERR 0x00000800 // Erase Error Interrupt Mask
|
||||
#define FLASH_INT_PROGRAM_ERR 0x00002000 // Program Verify Error Interrupt Mask
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern int32_t FlashErase(uint32_t ui32Address);
|
||||
extern int32_t FlashProgram(uint32_t *pui32Data, uint32_t ui32Address,
|
||||
uint32_t ui32Count);
|
||||
extern tFlashProtection FlashProtectGet(uint32_t ui32Address);
|
||||
extern int32_t FlashProtectSet(uint32_t ui32Address,
|
||||
tFlashProtection eProtect);
|
||||
extern int32_t FlashProtectSave(void);
|
||||
extern int32_t FlashUserGet(uint32_t *pui32User0, uint32_t *pui32User1);
|
||||
extern int32_t FlashUserSet(uint32_t ui32User0, uint32_t ui32User1);
|
||||
extern int32_t FlashAllUserRegisterGet(uint32_t *pui32User0,
|
||||
uint32_t *pui32User1,
|
||||
uint32_t *pui32User2,
|
||||
uint32_t *pui32User3);
|
||||
extern int32_t FlashAllUserRegisterSet(uint32_t ui32User0,
|
||||
uint32_t ui32User1,
|
||||
uint32_t ui32User2,
|
||||
uint32_t ui32User3);
|
||||
extern int32_t FlashUserSave(void);
|
||||
extern int32_t FlashAllUserRegisterSave(void);
|
||||
extern void FlashIntRegister(void (*pfnHandler)(void));
|
||||
extern void FlashIntUnregister(void);
|
||||
extern void FlashIntEnable(uint32_t ui32IntFlags);
|
||||
extern void FlashIntDisable(uint32_t ui32IntFlags);
|
||||
extern uint32_t FlashIntStatus(bool bMasked);
|
||||
extern void FlashIntClear(uint32_t ui32IntFlags);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_FLASH_H__
|
||||
@@ -1,300 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// fpu.c - Routines for manipulating the floating-point unit in the Cortex-M
|
||||
// processor.
|
||||
//
|
||||
// Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup fpu_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
#include "inc/hw_nvic.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/fpu.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the floating-point unit.
|
||||
//!
|
||||
//! This function enables the floating-point unit, allowing the floating-point
|
||||
//! instructions to be executed. This function must be called prior to
|
||||
//! performing any hardware floating-point operations; failure to do so results
|
||||
//! in a NOCP usage fault.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUEnable(void)
|
||||
{
|
||||
//
|
||||
// Enable the coprocessors used by the floating-point unit.
|
||||
//
|
||||
HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
|
||||
~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
|
||||
NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the floating-point unit.
|
||||
//!
|
||||
//! This function disables the floating-point unit, preventing floating-point
|
||||
//! instructions from executing (generating a NOCP usage fault instead).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUDisable(void)
|
||||
{
|
||||
//
|
||||
// Disable the coprocessors used by the floating-point unit.
|
||||
//
|
||||
HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
|
||||
~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
|
||||
NVIC_CPAC_CP10_DIS | NVIC_CPAC_CP11_DIS);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the stacking of floating-point registers.
|
||||
//!
|
||||
//! This function enables the stacking of floating-point registers s0-s15 when
|
||||
//! an interrupt is handled. When enabled, space is reserved on the stack for
|
||||
//! the floating-point context and the floating-point state is saved into this
|
||||
//! stack space. Upon return from the interrupt, the floating-point context is
|
||||
//! restored.
|
||||
//!
|
||||
//! If the floating-point registers are not stacked, floating-point
|
||||
//! instructions cannot be safely executed in an interrupt handler because the
|
||||
//! values of s0-s15 are not likely to be preserved for the interrupted code.
|
||||
//! On the other hand, stacking the floating-point registers increases the
|
||||
//! stacking operation from 8 words to 26 words, also increasing the interrupt
|
||||
//! response latency.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUStackingEnable(void)
|
||||
{
|
||||
//
|
||||
// Enable automatic state preservation for the floating-point unit, and
|
||||
// disable lazy state preservation (meaning that the floating-point state
|
||||
// is always stacked when floating-point instructions are used).
|
||||
//
|
||||
HWREG(NVIC_FPCC) = (HWREG(NVIC_FPCC) & ~NVIC_FPCC_LSPEN) | NVIC_FPCC_ASPEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the lazy stacking of floating-point registers.
|
||||
//!
|
||||
//! This function enables the lazy stacking of floating-point registers s0-s15
|
||||
//! when an interrupt is handled. When lazy stacking is enabled, space is
|
||||
//! reserved on the stack for the floating-point context, but the
|
||||
//! floating-point state is not saved. If a floating-point instruction is
|
||||
//! executed from within the interrupt context, the floating-point context is
|
||||
//! first saved into the space reserved on the stack. On completion of the
|
||||
//! interrupt handler, the floating-point context is only restored if it was
|
||||
//! saved (as the result of executing a floating-point instruction).
|
||||
//!
|
||||
//! This method provides a compromise between fast interrupt response (because
|
||||
//! the floating-point state is not saved on interrupt entry) and the ability
|
||||
//! to use floating-point in interrupt handlers (because the floating-point
|
||||
//! state is saved if floating-point instructions are used).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPULazyStackingEnable(void)
|
||||
{
|
||||
//
|
||||
// Enable automatic and lazy state preservation for the floating-point
|
||||
// unit.
|
||||
//
|
||||
HWREG(NVIC_FPCC) |= NVIC_FPCC_ASPEN | NVIC_FPCC_LSPEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the stacking of floating-point registers.
|
||||
//!
|
||||
//! This function disables the stacking of floating-point registers s0-s15 when
|
||||
//! an interrupt is handled. When floating-point context stacking is disabled,
|
||||
//! floating-point operations performed in an interrupt handler destroy the
|
||||
//! floating-point context of the main thread of execution.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUStackingDisable(void)
|
||||
{
|
||||
//
|
||||
// Disable automatic and lazy state preservation for the floating-point
|
||||
// unit.
|
||||
//
|
||||
HWREG(NVIC_FPCC) &= ~(NVIC_FPCC_ASPEN | NVIC_FPCC_LSPEN);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the format of half-precision floating-point values.
|
||||
//!
|
||||
//! \param ui32Mode is the format for half-precision floating-point value,
|
||||
//! which is either \b FPU_HALF_IEEE or \b FPU_HALF_ALTERNATE.
|
||||
//!
|
||||
//! This function selects between the IEEE half-precision floating-point
|
||||
//! representation and the Cortex-M processor alternative representation. The
|
||||
//! alternative representation has a larger range but does not have a way to
|
||||
//! encode infinity (positive or negative) or NaN (quiet or signaling). The
|
||||
//! default setting is the IEEE format.
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUHalfPrecisionModeSet(uint32_t ui32Mode)
|
||||
{
|
||||
//
|
||||
// Set the half-precision floating-point format.
|
||||
//
|
||||
HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_AHP)) | ui32Mode;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the NaN mode.
|
||||
//!
|
||||
//! \param ui32Mode is the mode for NaN results; which is either
|
||||
//! \b FPU_NAN_PROPAGATE or \b FPU_NAN_DEFAULT.
|
||||
//!
|
||||
//! This function selects the handling of NaN results during floating-point
|
||||
//! computations. NaNs can either propagate (the default), or they can return
|
||||
//! the default NaN.
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUNaNModeSet(uint32_t ui32Mode)
|
||||
{
|
||||
//
|
||||
// Set the NaN mode.
|
||||
//
|
||||
HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_DN)) | ui32Mode;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the flush-to-zero mode.
|
||||
//!
|
||||
//! \param ui32Mode is the flush-to-zero mode; which is either
|
||||
//! \b FPU_FLUSH_TO_ZERO_DIS or \b FPU_FLUSH_TO_ZERO_EN.
|
||||
//!
|
||||
//! This function enables or disables the flush-to-zero mode of the
|
||||
//! floating-point unit. When disabled (the default), the floating-point unit
|
||||
//! is fully IEEE compliant. When enabled, values close to zero are treated as
|
||||
//! zero, greatly improving the execution speed at the expense of some accuracy
|
||||
//! (as well as IEEE compliance).
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPUFlushToZeroModeSet(uint32_t ui32Mode)
|
||||
{
|
||||
//
|
||||
// Set the flush-to-zero mode.
|
||||
//
|
||||
HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_FZ)) | ui32Mode;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the rounding mode for floating-point results.
|
||||
//!
|
||||
//! \param ui32Mode is the rounding mode.
|
||||
//!
|
||||
//! This function selects the rounding mode for floating-point results. After
|
||||
//! a floating-point operation, the result is rounded toward the specified
|
||||
//! value. The default mode is \b FPU_ROUND_NEAREST.
|
||||
//!
|
||||
//! The following rounding modes are available (as specified by \e ui32Mode):
|
||||
//!
|
||||
//! - \b FPU_ROUND_NEAREST - round toward the nearest value
|
||||
//! - \b FPU_ROUND_POS_INF - round toward positive infinity
|
||||
//! - \b FPU_ROUND_NEG_INF - round toward negative infinity
|
||||
//! - \b FPU_ROUND_ZERO - round toward zero
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
FPURoundingModeSet(uint32_t ui32Mode)
|
||||
{
|
||||
//
|
||||
// Set the rounding mode.
|
||||
//
|
||||
HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_RMODE_M)) | ui32Mode;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -1,113 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// fpu.h - Prototypes for the floatint point manipulation routines.
|
||||
//
|
||||
// Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_FPU_H__
|
||||
#define __DRIVERLIB_FPU_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPUHalfPrecisionSet as the ui32Mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_HALF_IEEE 0x00000000
|
||||
#define FPU_HALF_ALTERNATE 0x04000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPUNaNModeSet as the ui32Mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_NAN_PROPAGATE 0x00000000
|
||||
#define FPU_NAN_DEFAULT 0x02000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPUFlushToZeroModeSet as the ui32Mode
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_FLUSH_TO_ZERO_DIS 0x00000000
|
||||
#define FPU_FLUSH_TO_ZERO_EN 0x01000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPURoundingModeSet as the ui32Mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_ROUND_NEAREST 0x00000000
|
||||
#define FPU_ROUND_POS_INF 0x00400000
|
||||
#define FPU_ROUND_NEG_INF 0x00800000
|
||||
#define FPU_ROUND_ZERO 0x00c00000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPUEnable(void);
|
||||
extern void FPUDisable(void);
|
||||
extern void FPUStackingEnable(void);
|
||||
extern void FPULazyStackingEnable(void);
|
||||
extern void FPUStackingDisable(void);
|
||||
extern void FPUHalfPrecisionModeSet(uint32_t ui32Mode);
|
||||
extern void FPUNaNModeSet(uint32_t ui32Mode);
|
||||
extern void FPUFlushToZeroModeSet(uint32_t ui32Mode);
|
||||
extern void FPURoundingModeSet(uint32_t ui32Mode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_FPU_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,204 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// gpio.h - Defines and Macros for GPIO API.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_GPIO_H__
|
||||
#define __DRIVERLIB_GPIO_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following values define the bit field for the ui8Pins argument to
|
||||
// several of the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_PIN_0 0x00000001 // GPIO pin 0
|
||||
#define GPIO_PIN_1 0x00000002 // GPIO pin 1
|
||||
#define GPIO_PIN_2 0x00000004 // GPIO pin 2
|
||||
#define GPIO_PIN_3 0x00000008 // GPIO pin 3
|
||||
#define GPIO_PIN_4 0x00000010 // GPIO pin 4
|
||||
#define GPIO_PIN_5 0x00000020 // GPIO pin 5
|
||||
#define GPIO_PIN_6 0x00000040 // GPIO pin 6
|
||||
#define GPIO_PIN_7 0x00000080 // GPIO pin 7
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to GPIODirModeSet as the ui32PinIO parameter, and
|
||||
// returned from GPIODirModeGet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_DIR_MODE_IN 0x00000000 // Pin is a GPIO input
|
||||
#define GPIO_DIR_MODE_OUT 0x00000001 // Pin is a GPIO output
|
||||
#define GPIO_DIR_MODE_HW 0x00000002 // Pin is a peripheral function
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to GPIOIntTypeSet as the ui32IntType parameter,
|
||||
// and returned from GPIOIntTypeGet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_FALLING_EDGE 0x00000000 // Interrupt on falling edge
|
||||
#define GPIO_RISING_EDGE 0x00000004 // Interrupt on rising edge
|
||||
#define GPIO_BOTH_EDGES 0x00000001 // Interrupt on both edges
|
||||
#define GPIO_LOW_LEVEL 0x00000002 // Interrupt on low level
|
||||
#define GPIO_HIGH_LEVEL 0x00000006 // Interrupt on high level
|
||||
#define GPIO_DISCRETE_INT 0x00010000 // Interrupt for individual pins
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to GPIOPadConfigSet as the ui32Strength parameter,
|
||||
// and returned by GPIOPadConfigGet in the *pui32Strength parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_STRENGTH_2MA 0x00000001 // 2mA drive strength
|
||||
#define GPIO_STRENGTH_4MA 0x00000002 // 4mA drive strength
|
||||
#define GPIO_STRENGTH_6MA 0x00000065 // 6mA drive strength
|
||||
#define GPIO_STRENGTH_8MA 0x00000066 // 8mA drive strength
|
||||
#define GPIO_STRENGTH_8MA_SC 0x0000006E // 8mA drive with slew rate control
|
||||
#define GPIO_STRENGTH_10MA 0x00000075 // 10mA drive strength
|
||||
#define GPIO_STRENGTH_12MA 0x00000077 // 12mA drive strength
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to GPIOPadConfigSet as the ui32PadType parameter,
|
||||
// and returned by GPIOPadConfigGet in the *pui32PadType parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_PIN_TYPE_STD 0x00000008 // Push-pull
|
||||
#define GPIO_PIN_TYPE_STD_WPU 0x0000000A // Push-pull with weak pull-up
|
||||
#define GPIO_PIN_TYPE_STD_WPD 0x0000000C // Push-pull with weak pull-down
|
||||
#define GPIO_PIN_TYPE_OD 0x00000009 // Open-drain
|
||||
#define GPIO_PIN_TYPE_ANALOG 0x00000000 // Analog comparator
|
||||
#define GPIO_PIN_TYPE_WAKE_HIGH 0x00000208 // Hibernate wake, high
|
||||
#define GPIO_PIN_TYPE_WAKE_LOW 0x00000108 // Hibernate wake, low
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to GPIOIntEnable() and GPIOIntDisable() functions
|
||||
// in the ui32IntFlags parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define GPIO_INT_PIN_0 0x00000001
|
||||
#define GPIO_INT_PIN_1 0x00000002
|
||||
#define GPIO_INT_PIN_2 0x00000004
|
||||
#define GPIO_INT_PIN_3 0x00000008
|
||||
#define GPIO_INT_PIN_4 0x00000010
|
||||
#define GPIO_INT_PIN_5 0x00000020
|
||||
#define GPIO_INT_PIN_6 0x00000040
|
||||
#define GPIO_INT_PIN_7 0x00000080
|
||||
#define GPIO_INT_DMA 0x00000100
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void GPIODirModeSet(uint32_t ui32Port, uint8_t ui8Pins,
|
||||
uint32_t ui32PinIO);
|
||||
extern uint32_t GPIODirModeGet(uint32_t ui32Port, uint8_t ui8Pin);
|
||||
extern void GPIOIntTypeSet(uint32_t ui32Port, uint8_t ui8Pins,
|
||||
uint32_t ui32IntType);
|
||||
extern uint32_t GPIOIntTypeGet(uint32_t ui32Port, uint8_t ui8Pin);
|
||||
extern void GPIOPadConfigSet(uint32_t ui32Port, uint8_t ui8Pins,
|
||||
uint32_t ui32Strength, uint32_t ui32PadType);
|
||||
extern void GPIOPadConfigGet(uint32_t ui32Port, uint8_t ui8Pin,
|
||||
uint32_t *pui32Strength, uint32_t *pui32PadType);
|
||||
extern void GPIOIntEnable(uint32_t ui32Port, uint32_t ui32IntFlags);
|
||||
extern void GPIOIntDisable(uint32_t ui32Port, uint32_t ui32IntFlags);
|
||||
extern uint32_t GPIOIntStatus(uint32_t ui32Port, bool bMasked);
|
||||
extern void GPIOIntClear(uint32_t ui32Port, uint32_t ui32IntFlags);
|
||||
extern void GPIOIntRegister(uint32_t ui32Port, void (*pfnIntHandler)(void));
|
||||
extern void GPIOIntUnregister(uint32_t ui32Port);
|
||||
extern void GPIOIntRegisterPin(uint32_t ui32Port, uint32_t ui32Pin,
|
||||
void (*pfnIntHandler)(void));
|
||||
extern void GPIOIntUnregisterPin(uint32_t ui32Port, uint32_t ui32Pin);
|
||||
extern int32_t GPIOPinRead(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinWrite(uint32_t ui32Port, uint8_t ui8Pins, uint8_t ui8Val);
|
||||
extern void GPIOPinConfigure(uint32_t ui32PinConfig);
|
||||
extern void GPIOPinTypeADC(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeCAN(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeComparator(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeComparatorOutput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeDIVSCLK(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEPI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEthernetLED(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeEthernetMII(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOInput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOOutput(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeGPIOOutputOD(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeHibernateRTCCLK(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeI2C(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeI2CSCL(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeLCD(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeOneWire(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypePWM(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeQEI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeSSI(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeTimer(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeTrace(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUART(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUSBAnalog(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeUSBDigital(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeWakeHigh(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOPinTypeWakeLow(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern uint32_t GPIOPinWakeStatus(uint32_t ui32Port);
|
||||
extern void GPIODMATriggerEnable(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIODMATriggerDisable(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOADCTriggerEnable(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
extern void GPIOADCTriggerDisable(uint32_t ui32Port, uint8_t ui8Pins);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_GPIO_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,257 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// hibernate.h - API definition for the Hibernation module.
|
||||
//
|
||||
// Copyright (c) 2007-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_HIBERNATE_H__
|
||||
#define __DRIVERLIB_HIBERNATE_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros need to configure wake events for HibernateWakeSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_WAKE_PIN 0x00000010
|
||||
#define HIBERNATE_WAKE_RTC 0x00000008
|
||||
#define HIBERNATE_WAKE_LOW_BAT 0x00000200
|
||||
#define HIBERNATE_WAKE_GPIO 0x00000010
|
||||
#define HIBERNATE_WAKE_RESET 0x00100010
|
||||
#define HIBERNATE_WAKE_TAMPER 0x08000010
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros needed to configure low battery detect for HibernateLowBatSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_LOW_BAT_DETECT \
|
||||
0x00000020
|
||||
#define HIBERNATE_LOW_BAT_ABORT 0x000000A0
|
||||
#define HIBERNATE_LOW_BAT_1_9V 0x00000000
|
||||
#define HIBERNATE_LOW_BAT_2_1V 0x00002000
|
||||
#define HIBERNATE_LOW_BAT_2_3V 0x00004000
|
||||
#define HIBERNATE_LOW_BAT_2_5V 0x00006000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros defining interrupt source bits for the interrupt functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_INT_VDDFAIL 0x00000080
|
||||
#define HIBERNATE_INT_RESET_WAKE \
|
||||
0x00000040
|
||||
#define HIBERNATE_INT_GPIO_WAKE 0x00000020
|
||||
#define HIBERNATE_INT_WR_COMPLETE \
|
||||
0x00000010
|
||||
#define HIBERNATE_INT_PIN_WAKE 0x00000008
|
||||
#define HIBERNATE_INT_LOW_BAT 0x00000004
|
||||
#define HIBERNATE_INT_RTC_MATCH_0 \
|
||||
0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros defining oscillator configuration options for the
|
||||
// HibernateClockConfig() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_OSC_LFIOSC 0x00080000
|
||||
#define HIBERNATE_OSC_LOWDRIVE 0x00000000
|
||||
#define HIBERNATE_OSC_HIGHDRIVE 0x00020000
|
||||
#define HIBERNATE_OSC_DISABLE 0x00010000
|
||||
#define HIBERNATE_OUT_WRSTALL 0x20000000
|
||||
#define HIBERNATE_OUT_SYSCLK 0x00000001
|
||||
#define HIBERNATE_OUT_ALT1CLK 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used with the HibernateCounterMode() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_COUNTER_RTC 0x00000000
|
||||
#define HIBERNATE_COUNTER_12HR 0x00000001
|
||||
#define HIBERNATE_COUNTER_24HR 0x00000005
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Tamper event configuration options used with HibernateTamperEventsConfig().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_TAMPER_EVENTS_NO_HIB_WAKE \
|
||||
0x00000000
|
||||
#define HIBERNATE_TAMPER_EVENTS_HIB_WAKE \
|
||||
0x00000800
|
||||
#define HIBERNATE_TAMPER_EVENTS_NO_ERASE_HIB_MEM \
|
||||
0x00000000
|
||||
#define HIBERNATE_TAMPER_EVENTS_ERASE_LOW_HIB_MEM \
|
||||
0x00000100
|
||||
#define HIBERNATE_TAMPER_EVENTS_ERASE_HIGH_HIB_MEM \
|
||||
0x00000200
|
||||
#define HIBERNATE_TAMPER_EVENTS_ERASE_ALL_HIB_MEM \
|
||||
0x00000300
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Status flags returned by the HibernateTamperStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_TAMPER_STATUS_INACTIVE \
|
||||
0x00000010
|
||||
#define HIBERNATE_TAMPER_STATUS_ACTIVE \
|
||||
0x00000020
|
||||
#define HIBERNATE_TAMPER_STATUS_EVENT \
|
||||
0x00000040
|
||||
#define HIBERNATE_TAMPER_STATUS_EXT_OSC_ACTIVE \
|
||||
0x00000008
|
||||
#define HIBERNATE_TAMPER_STATUS_EXT_OSC_INACTIVE \
|
||||
0x00000002
|
||||
#define HIBERNATE_TAMPER_STATUS_EXT_OSC_VALID \
|
||||
0x00000004
|
||||
#define HIBERNATE_TAMPER_STATUS_EXT_OSC_FAILED \
|
||||
0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Configuration options used with HibernateTamperIOEnable().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_TAMPER_IO_TRIGGER_LOW \
|
||||
0x00000000
|
||||
#define HIBERNATE_TAMPER_IO_TRIGGER_HIGH \
|
||||
0x00000002
|
||||
#define HIBERNATE_TAMPER_IO_WPU_DISABLED \
|
||||
0x00000000
|
||||
#define HIBERNATE_TAMPER_IO_WPU_ENABLED \
|
||||
0x00000004
|
||||
#define HIBERNATE_TAMPER_IO_MATCH_SHORT \
|
||||
0x00000000
|
||||
#define HIBERNATE_TAMPER_IO_MATCH_LONG \
|
||||
0x00000008
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Tamper log event flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_TAMPER_EVENT_0 \
|
||||
0x00000001
|
||||
#define HIBERNATE_TAMPER_EVENT_1 \
|
||||
0x00000002
|
||||
#define HIBERNATE_TAMPER_EVENT_2 \
|
||||
0x00000004
|
||||
#define HIBERNATE_TAMPER_EVENT_3 \
|
||||
0x00000008
|
||||
#define HIBERNATE_TAMPER_EVENT_EXT_OSC \
|
||||
0x00010000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void HibernateGPIORetentionEnable(void);
|
||||
extern void HibernateGPIORetentionDisable(void);
|
||||
extern bool HibernateGPIORetentionGet(void);
|
||||
extern void HibernateEnableExpClk(uint32_t ui32HibClk);
|
||||
extern void HibernateDisable(void);
|
||||
extern void HibernateRTCEnable(void);
|
||||
extern void HibernateRTCDisable(void);
|
||||
extern void HibernateWakeSet(uint32_t ui32WakeFlags);
|
||||
extern uint32_t HibernateWakeGet(void);
|
||||
extern void HibernateLowBatSet(uint32_t ui32LowBatFlags);
|
||||
extern uint32_t HibernateLowBatGet(void);
|
||||
extern void HibernateRTCSet(uint32_t ui32RTCValue);
|
||||
extern uint32_t HibernateRTCGet(void);
|
||||
extern void HibernateRTCMatchSet(uint32_t ui32Match, uint32_t ui32Value);
|
||||
extern uint32_t HibernateRTCMatchGet(uint32_t ui32Match);
|
||||
extern void HibernateRTCTrimSet(uint32_t ui32Trim);
|
||||
extern uint32_t HibernateRTCTrimGet(void);
|
||||
extern void HibernateDataSet(uint32_t *pui32Data, uint32_t ui32Count);
|
||||
extern void HibernateDataGet(uint32_t *pui32Data, uint32_t ui32Count);
|
||||
extern void HibernateRequest(void);
|
||||
extern void HibernateIntEnable(uint32_t ui32IntFlags);
|
||||
extern void HibernateIntDisable(uint32_t ui32IntFlags);
|
||||
extern void HibernateIntRegister(void (*pfnHandler)(void));
|
||||
extern void HibernateIntUnregister(void);
|
||||
extern uint32_t HibernateIntStatus(bool bMasked);
|
||||
extern void HibernateIntClear(uint32_t ui32IntFlags);
|
||||
extern uint32_t HibernateIsActive(void);
|
||||
extern void HibernateRTCSSMatchSet(uint32_t ui32Match, uint32_t ui32Value);
|
||||
extern uint32_t HibernateRTCSSMatchGet(uint32_t ui32Match);
|
||||
extern uint32_t HibernateRTCSSGet(void);
|
||||
extern void HibernateClockConfig(uint32_t ui32Config);
|
||||
extern void HibernateBatCheckStart(void);
|
||||
extern uint32_t HibernateBatCheckDone(void);
|
||||
extern void HibernateCounterMode(uint32_t ui32Config);
|
||||
extern void HibernateCalendarSet(struct tm *psTime);
|
||||
extern int HibernateCalendarGet(struct tm *psTime);
|
||||
extern void HibernateCalendarMatchSet(uint32_t ui32Index, struct tm *psTime);
|
||||
extern void HibernateCalendarMatchGet(uint32_t ui32Index, struct tm *psTime);
|
||||
extern void HibernateTamperEnable(void);
|
||||
extern void HibernateTamperEventsConfig(uint32_t ui32Config);
|
||||
extern bool HibernateTamperEventsGet(uint32_t ui32Index, uint32_t *pui32RTC,
|
||||
uint32_t *pui32Event);
|
||||
extern void HibernateTamperEventsClear(void);
|
||||
extern void HibernateTamperEventsClearNoLock(void);
|
||||
extern void HibernateTamperUnLock(void);
|
||||
extern void HibernateTamperLock(void);
|
||||
extern void HibernateTamperDisable(void);
|
||||
extern void HibernateTamperIOEnable(uint32_t ui32Input, uint32_t ui32Config);
|
||||
extern void HibernateTamperIODisable(uint32_t ui32Input);
|
||||
extern uint32_t HibernateTamperStatusGet(void);
|
||||
extern void HibernateTamperExtOscRecover(void);
|
||||
extern bool HibernateTamperExtOscValid(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_HIBERNATE_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,362 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// i2c.h - Prototypes for the I2C Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_I2C_H__
|
||||
#define __DRIVERLIB_I2C_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines for the API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Interrupt defines.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_INT_MASTER 0x00000001
|
||||
#define I2C_INT_SLAVE 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master commands.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_CMD_SINGLE_SEND \
|
||||
0x00000007
|
||||
#define I2C_MASTER_CMD_SINGLE_RECEIVE \
|
||||
0x00000007
|
||||
#define I2C_MASTER_CMD_BURST_SEND_START \
|
||||
0x00000003
|
||||
#define I2C_MASTER_CMD_BURST_SEND_CONT \
|
||||
0x00000001
|
||||
#define I2C_MASTER_CMD_BURST_SEND_FINISH \
|
||||
0x00000005
|
||||
#define I2C_MASTER_CMD_BURST_SEND_STOP \
|
||||
0x00000004
|
||||
#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP \
|
||||
0x00000004
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_START \
|
||||
0x0000000b
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_CONT \
|
||||
0x00000009
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH \
|
||||
0x00000005
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP \
|
||||
0x00000004
|
||||
#define I2C_MASTER_CMD_QUICK_COMMAND \
|
||||
0x00000027
|
||||
#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND \
|
||||
0x00000013
|
||||
#define I2C_MASTER_CMD_FIFO_SINGLE_SEND \
|
||||
0x00000046
|
||||
#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE \
|
||||
0x00000046
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_SEND_START \
|
||||
0x00000042
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT \
|
||||
0x00000040
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH \
|
||||
0x00000044
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP \
|
||||
0x00000004
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START \
|
||||
0x0000004a
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT \
|
||||
0x00000048
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH \
|
||||
0x00000044
|
||||
#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP \
|
||||
0x00000004
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master glitch filter configuration.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_GLITCH_FILTER_DISABLED \
|
||||
0
|
||||
#define I2C_MASTER_GLITCH_FILTER_1 \
|
||||
0x00010000
|
||||
#define I2C_MASTER_GLITCH_FILTER_2 \
|
||||
0x00020000
|
||||
#define I2C_MASTER_GLITCH_FILTER_3 \
|
||||
0x00030000
|
||||
#define I2C_MASTER_GLITCH_FILTER_4 \
|
||||
0x00040000
|
||||
#define I2C_MASTER_GLITCH_FILTER_8 \
|
||||
0x00050000
|
||||
#define I2C_MASTER_GLITCH_FILTER_16 \
|
||||
0x00060000
|
||||
#define I2C_MASTER_GLITCH_FILTER_32 \
|
||||
0x00070000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master error status.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_ERR_NONE 0
|
||||
#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
|
||||
#define I2C_MASTER_ERR_DATA_ACK 0x00000008
|
||||
#define I2C_MASTER_ERR_ARB_LOST 0x00000010
|
||||
#define I2C_MASTER_ERR_CLK_TOUT 0x00000080
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Slave action requests
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_SLAVE_ACT_NONE 0
|
||||
#define I2C_SLAVE_ACT_RREQ 0x00000001 // Master has sent data
|
||||
#define I2C_SLAVE_ACT_TREQ 0x00000002 // Master has requested data
|
||||
#define I2C_SLAVE_ACT_RREQ_FBR 0x00000005 // Master has sent first byte
|
||||
#define I2C_SLAVE_ACT_OWN2SEL 0x00000008 // Master requested secondary slave
|
||||
#define I2C_SLAVE_ACT_QCMD 0x00000010 // Master has sent a Quick Command
|
||||
#define I2C_SLAVE_ACT_QCMD_DATA 0x00000020 // Master Quick Command value
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Miscellaneous I2C driver definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_MAX_RETRIES 1000 // Number of retries
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master interrupts.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_INT_RX_FIFO_FULL \
|
||||
0x00000800 // RX FIFO Full Interrupt
|
||||
#define I2C_MASTER_INT_TX_FIFO_EMPTY \
|
||||
0x00000400 // TX FIFO Empty Interrupt
|
||||
#define I2C_MASTER_INT_RX_FIFO_REQ \
|
||||
0x00000200 // RX FIFO Request Interrupt
|
||||
#define I2C_MASTER_INT_TX_FIFO_REQ \
|
||||
0x00000100 // TX FIFO Request Interrupt
|
||||
#define I2C_MASTER_INT_ARB_LOST \
|
||||
0x00000080 // Arb Lost Interrupt
|
||||
#define I2C_MASTER_INT_STOP 0x00000040 // Stop Condition Interrupt
|
||||
#define I2C_MASTER_INT_START 0x00000020 // Start Condition Interrupt
|
||||
#define I2C_MASTER_INT_NACK 0x00000010 // Addr/Data NACK Interrupt
|
||||
#define I2C_MASTER_INT_TX_DMA_DONE \
|
||||
0x00000008 // TX DMA Complete Interrupt
|
||||
#define I2C_MASTER_INT_RX_DMA_DONE \
|
||||
0x00000004 // RX DMA Complete Interrupt
|
||||
#define I2C_MASTER_INT_TIMEOUT 0x00000002 // Clock Timeout Interrupt
|
||||
#define I2C_MASTER_INT_DATA 0x00000001 // Data Interrupt
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Slave interrupts.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_SLAVE_INT_RX_FIFO_FULL \
|
||||
0x00000100 // RX FIFO Full Interrupt
|
||||
#define I2C_SLAVE_INT_TX_FIFO_EMPTY \
|
||||
0x00000080 // TX FIFO Empty Interrupt
|
||||
#define I2C_SLAVE_INT_RX_FIFO_REQ \
|
||||
0x00000040 // RX FIFO Request Interrupt
|
||||
#define I2C_SLAVE_INT_TX_FIFO_REQ \
|
||||
0x00000020 // TX FIFO Request Interrupt
|
||||
#define I2C_SLAVE_INT_TX_DMA_DONE \
|
||||
0x00000010 // TX DMA Complete Interrupt
|
||||
#define I2C_SLAVE_INT_RX_DMA_DONE \
|
||||
0x00000008 // RX DMA Complete Interrupt
|
||||
#define I2C_SLAVE_INT_STOP 0x00000004 // Stop Condition Interrupt
|
||||
#define I2C_SLAVE_INT_START 0x00000002 // Start Condition Interrupt
|
||||
#define I2C_SLAVE_INT_DATA 0x00000001 // Data Interrupt
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Slave FIFO configuration macros.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_SLAVE_TX_FIFO_ENABLE \
|
||||
0x00000002
|
||||
#define I2C_SLAVE_RX_FIFO_ENABLE \
|
||||
0x00000004
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C FIFO configuration macros.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_FIFO_CFG_TX_MASTER 0x00000000
|
||||
#define I2C_FIFO_CFG_TX_SLAVE 0x00008000
|
||||
#define I2C_FIFO_CFG_RX_MASTER 0x00000000
|
||||
#define I2C_FIFO_CFG_RX_SLAVE 0x80000000
|
||||
#define I2C_FIFO_CFG_TX_MASTER_DMA \
|
||||
0x00002000
|
||||
#define I2C_FIFO_CFG_TX_SLAVE_DMA \
|
||||
0x0000a000
|
||||
#define I2C_FIFO_CFG_RX_MASTER_DMA \
|
||||
0x20000000
|
||||
#define I2C_FIFO_CFG_RX_SLAVE_DMA \
|
||||
0xa0000000
|
||||
#define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
|
||||
#define I2C_FIFO_CFG_TX_TRIG_1 0x00000001
|
||||
#define I2C_FIFO_CFG_TX_TRIG_2 0x00000002
|
||||
#define I2C_FIFO_CFG_TX_TRIG_3 0x00000003
|
||||
#define I2C_FIFO_CFG_TX_TRIG_4 0x00000004
|
||||
#define I2C_FIFO_CFG_TX_TRIG_5 0x00000005
|
||||
#define I2C_FIFO_CFG_TX_TRIG_6 0x00000006
|
||||
#define I2C_FIFO_CFG_TX_TRIG_7 0x00000007
|
||||
#define I2C_FIFO_CFG_TX_TRIG_8 0x00000008
|
||||
#define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_1 0x00010000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_2 0x00020000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_3 0x00030000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_4 0x00040000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_5 0x00050000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_6 0x00060000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_7 0x00070000
|
||||
#define I2C_FIFO_CFG_RX_TRIG_8 0x00080000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C FIFO status.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_FIFO_RX_BELOW_TRIG_LEVEL \
|
||||
0x00040000
|
||||
#define I2C_FIFO_RX_FULL 0x00020000
|
||||
#define I2C_FIFO_RX_EMPTY 0x00010000
|
||||
#define I2C_FIFO_TX_BELOW_TRIG_LEVEL \
|
||||
0x00000004
|
||||
#define I2C_FIFO_TX_FULL 0x00000002
|
||||
#define I2C_FIFO_TX_EMPTY 0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void I2CIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
|
||||
extern void I2CIntUnregister(uint32_t ui32Base);
|
||||
extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void I2CTxFIFOFlush(uint32_t ui32Base);
|
||||
extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void I2CRxFIFOFlush(uint32_t ui32Base);
|
||||
extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
|
||||
extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
|
||||
extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
|
||||
uint8_t ui8Data);
|
||||
extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
|
||||
extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
|
||||
uint8_t *pui8Data);
|
||||
extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
|
||||
uint8_t ui8Length);
|
||||
extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
|
||||
extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
|
||||
uint32_t ui32Config);
|
||||
extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
|
||||
extern void I2CSlaveFIFODisable(uint32_t ui32Base);
|
||||
extern bool I2CMasterBusBusy(uint32_t ui32Base);
|
||||
extern bool I2CMasterBusy(uint32_t ui32Base);
|
||||
extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
|
||||
extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
|
||||
extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
|
||||
extern void I2CMasterDisable(uint32_t ui32Base);
|
||||
extern void I2CMasterEnable(uint32_t ui32Base);
|
||||
extern uint32_t I2CMasterErr(uint32_t ui32Base);
|
||||
extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
|
||||
bool bFast);
|
||||
extern void I2CMasterIntClear(uint32_t ui32Base);
|
||||
extern void I2CMasterIntDisable(uint32_t ui32Base);
|
||||
extern void I2CMasterIntEnable(uint32_t ui32Base);
|
||||
extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
|
||||
extern void I2CMasterIntEnableEx(uint32_t ui32Base,
|
||||
uint32_t ui32IntFlags);
|
||||
extern void I2CMasterIntDisableEx(uint32_t ui32Base,
|
||||
uint32_t ui32IntFlags);
|
||||
extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
|
||||
bool bMasked);
|
||||
extern void I2CMasterIntClearEx(uint32_t ui32Base,
|
||||
uint32_t ui32IntFlags);
|
||||
extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
|
||||
extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
|
||||
extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
|
||||
extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
|
||||
extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
|
||||
uint8_t ui8SlaveAddr,
|
||||
bool bReceive);
|
||||
extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
|
||||
extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
|
||||
extern void I2CSlaveDisable(uint32_t ui32Base);
|
||||
extern void I2CSlaveEnable(uint32_t ui32Base);
|
||||
extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
|
||||
extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
|
||||
uint8_t ui8SlaveAddr);
|
||||
extern void I2CSlaveIntClear(uint32_t ui32Base);
|
||||
extern void I2CSlaveIntDisable(uint32_t ui32Base);
|
||||
extern void I2CSlaveIntEnable(uint32_t ui32Base);
|
||||
extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
|
||||
uint32_t ui32IntFlags);
|
||||
extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
|
||||
extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
|
||||
extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
|
||||
bool bMasked);
|
||||
extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
|
||||
extern void I2CLoopbackEnable(uint32_t ui32Base);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_I2C_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,94 +0,0 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DRIVERLIB_INTERRUPT_H__
|
||||
#define __DRIVERLIB_INTERRUPT_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macro to generate an interrupt priority mask based on the number of bits
|
||||
// of priority supported by the hardware.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define INT_PRIORITY_MASK ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool IntMasterEnable(void);
|
||||
extern bool IntMasterDisable(void);
|
||||
extern void IntRegister(uint32_t ui32Interrupt, void (*pfnHandler)(void));
|
||||
extern void IntUnregister(uint32_t ui32Interrupt);
|
||||
extern void IntPriorityGroupingSet(uint32_t ui32Bits);
|
||||
extern uint32_t IntPriorityGroupingGet(void);
|
||||
extern void IntPrioritySet(uint32_t ui32Interrupt,
|
||||
uint8_t ui8Priority);
|
||||
extern int32_t IntPriorityGet(uint32_t ui32Interrupt);
|
||||
extern void IntEnable(uint32_t ui32Interrupt);
|
||||
extern void IntDisable(uint32_t ui32Interrupt);
|
||||
extern uint32_t IntIsEnabled(uint32_t ui32Interrupt);
|
||||
extern void IntPendSet(uint32_t ui32Interrupt);
|
||||
extern void IntPendClear(uint32_t ui32Interrupt);
|
||||
extern void IntPriorityMaskSet(uint32_t ui32PriorityMask);
|
||||
extern uint32_t IntPriorityMaskGet(void);
|
||||
extern void IntTrigger(uint32_t ui32Interrupt);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __DRIVERLIB_INTERRUPT_H__
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user