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[bsp][stm32] hardware i2c driver add support for STM32F1 series

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This commit is contained in:
zzk597
2024-12-13 17:46:07 -05:00
committed by GitHub
parent 74b2d3d3e1
commit 02a114985a
5 changed files with 270 additions and 122 deletions
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bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/dma_config.h
+46 -2
View File
@@ -19,6 +19,13 @@ extern "C" {
#endif
/* DMA1 channel1 */
#if defined(BSP_ADC1_USING_DMA) && !defined(ADC1_DMA_INSTANCE)
#define ADC1_DMA_IRQHandler DMA1_Channel1_IRQHandler
#define ADC1_DMA_RCC RCC_AHBENR_DMA1EN
#define ADC1_DMA_INSTANCE DMA1_Channel1
#define ADC1_DMA_IRQ DMA1_Channel1_IRQn
#endif
/* DMA1 channel2 */
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
@@ -56,6 +63,11 @@ extern "C" {
#define UART1_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART1_TX_DMA_INSTANCE DMA1_Channel4
#define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn
#elif defined(BSP_I2C2_TX_USING_DMA) && !defined(I2C2_TX_DMA_INSTANCE)
#define I2C2_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler
#define I2C2_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define I2C2_TX_DMA_INSTANCE DMA1_Channel4
#define I2C2_TX_DMA_IRQ DMA1_Channel4_IRQn
#endif
/* DMA1 channel5 */
@@ -64,12 +76,16 @@ extern "C" {
#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI2_TX_DMA_INSTANCE DMA1_Channel5
#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn
#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
#define UART1_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART1_RX_DMA_INSTANCE DMA1_Channel5
#define UART1_RX_DMA_IRQ DMA1_Channel5_IRQn
#elif defined(BSP_I2C2_RX_USING_DMA) && !defined(I2C2_RX_DMA_INSTANCE)
#define I2C2_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
#define I2C2_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define I2C2_RX_DMA_INSTANCE DMA1_Channel5
#define I2C2_RX_DMA_IRQ DMA1_Channel5_IRQn
#endif
/* DMA1 channel6 */
@@ -78,6 +94,11 @@ extern "C" {
#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART2_RX_DMA_INSTANCE DMA1_Channel6
#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn
#elif defined(BSP_I2C1_TX_USING_DMA) && !defined(I2C1_TX_DMA_INSTANCE)
#define I2C1_DMA_TX_IRQHandler DMA1_Channel6_IRQHandler
#define I2C1_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define I2C1_TX_DMA_INSTANCE DMA1_Channel6
#define I2C1_TX_DMA_IRQ DMA1_Channel6_IRQn
#endif
/* DMA1 channel7 */
@@ -86,6 +107,11 @@ extern "C" {
#define UART2_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART2_TX_DMA_INSTANCE DMA1_Channel7
#define UART2_TX_DMA_IRQ DMA1_Channel7_IRQn
#elif defined(BSP_I2C1_RX_USING_DMA) && !defined(I2C1_RX_DMA_INSTANCE)
#define I2C1_DMA_RX_IRQHandler DMA1_Channel7_IRQHandler
#define I2C1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define I2C1_RX_DMA_INSTANCE DMA1_Channel7
#define I2C1_RX_DMA_IRQ DMA1_Channel7_IRQn
#endif
/* DMA2 channel1 */
@@ -111,9 +137,27 @@ extern "C" {
#define UART4_RX_DMA_INSTANCE DMA2_Channel3
#define UART4_RX_DMA_IRQ DMA2_Channel3_IRQn
#endif
/* DMA2 channel4 */
#if defined(BSP_SDIO_TX_USING_DMA) && !defined(SDIO_TX_DMA_INSTANCE)
#define SDIO_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
#define SDIO_TX_DMA_RCC RCC_AHBENR_DMA2EN
#define SDIO_TX_DMA_INSTANCE DMA2_Channel4
#define SDIO_TX_DMA_IRQ DMA2_Channel4_5_IRQn
#elif defined(BSP_SDIO_RX_USING_DMA) && !defined(SDIO_RX_DMA_INSTANCE)
#define SDIO_DMA_RX_IRQHandler DMA2_Channel4_5_IRQHandler
#define SDIO_RX_DMA_RCC RCC_AHBENR_DMA2EN
#define SDIO_RX_DMA_INSTANCE DMA2_Channel4
#define SDIO_RX_DMA_IRQ DMA2_Channel4_5_IRQn
#endif
/* DMA2 channel5 */
#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
#if defined(BSP_ADC3_USING_DMA) && !defined(ADC3_DMA_INSTANCE)
#define ADC3_DMA_IRQHandler DMA2_Channel4_5_IRQHandler
#define ADC3_DMA_RCC RCC_AHBENR_DMA2EN
#define ADC3_DMA_INSTANCE DMA2_Channel5
#define ADC3_DMA_IRQ DMA2_Channel4_5_IRQn
#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
#define UART4_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
#define UART4_TX_DMA_RCC RCC_AHBENR_DMA2EN
#define UART4_TX_DMA_INSTANCE DMA2_Channel5
bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/i2c_hard_config.h
+129
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@@ -0,0 +1,129 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-02-06 Dyyt587 first version
* 2024-04-23 Zeidan Add I2Cx_xx_DMA_CONFIG
*/
#ifndef __I2C_HARD_CONFIG_H__
#define __I2C_HARD_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BSP_USING_HARD_I2C1
#ifndef I2C1_BUS_CONFIG
#define I2C1_BUS_CONFIG \
{ \
.Instance = I2C1, \
.timeout=0x1000, \
.name = "hwi2c1", \
.evirq_type = I2C1_EV_IRQn, \
.erirq_type = I2C1_ER_IRQn, \
}
#endif /* I2C1_BUS_CONFIG */
#endif /* BSP_USING_HARD_I2C1 */
#ifdef BSP_I2C1_TX_USING_DMA
#ifndef I2C1_TX_DMA_CONFIG
#define I2C1_TX_DMA_CONFIG \
{ \
.dma_rcc = I2C1_TX_DMA_RCC, \
.Instance = I2C1_TX_DMA_INSTANCE, \
.dma_irq = I2C1_TX_DMA_IRQ, \
}
#endif /* I2C1_TX_DMA_CONFIG */
#endif /* BSP_I2C1_TX_USING_DMA */
#ifdef BSP_I2C1_RX_USING_DMA
#ifndef I2C1_RX_DMA_CONFIG
#define I2C1_RX_DMA_CONFIG \
{ \
.dma_rcc = I2C1_RX_DMA_RCC, \
.Instance = I2C1_RX_DMA_INSTANCE, \
.dma_irq = I2C1_RX_DMA_IRQ, \
}
#endif /* I2C1_RX_DMA_CONFIG */
#endif /* BSP_I2C1_RX_USING_DMA */
#ifdef BSP_USING_HARD_I2C2
#ifndef I2C2_BUS_CONFIG
#define I2C2_BUS_CONFIG \
{ \
.Instance = I2C2, \
.timeout=0x1000, \
.name = "hwi2c2", \
.evirq_type = I2C2_EV_IRQn, \
.erirq_type = I2C2_ER_IRQn, \
}
#endif /* I2C2_BUS_CONFIG */
#endif /* BSP_USING_HARD_I2C2 */
#ifdef BSP_I2C2_TX_USING_DMA
#ifndef I2C2_TX_DMA_CONFIG
#define I2C2_TX_DMA_CONFIG \
{ \
.dma_rcc = I2C2_TX_DMA_RCC, \
.Instance = I2C2_TX_DMA_INSTANCE, \
.dma_irq = I2C2_TX_DMA_IRQ, \
}
#endif /* I2C2_TX_DMA_CONFIG */
#endif /* BSP_I2C2_TX_USING_DMA */
#ifdef BSP_I2C2_RX_USING_DMA
#ifndef I2C2_RX_DMA_CONFIG
#define I2C2_RX_DMA_CONFIG \
{ \
.dma_rcc = I2C2_RX_DMA_RCC, \
.Instance = I2C2_RX_DMA_INSTANCE, \
.dma_irq = I2C2_RX_DMA_IRQ, \
}
#endif /* I2C2_RX_DMA_CONFIG */
#endif /* BSP_I2C2_RX_USING_DMA */
#ifdef BSP_USING_HARD_I2C3
#ifndef I2C3_BUS_CONFIG
#define I2C3_BUS_CONFIG \
{ \
.Instance = I2C3, \
.timeout=0x1000, \
.name = "hwi2c3", \
.evirq_type = I2C3_EV_IRQn, \
.erirq_type = I2C3_ER_IRQn, \
}
#endif /* I2C3_BUS_CONFIG */
#endif /* BSP_USING_HARD_I2C3 */
#ifdef BSP_I2C3_TX_USING_DMA
#ifndef I2C3_TX_DMA_CONFIG
#define I2C3_TX_DMA_CONFIG \
{ \
.dma_rcc = I2C3_TX_DMA_RCC, \
.Instance = I2C3_TX_DMA_INSTANCE, \
.dma_irq = I2C3_TX_DMA_IRQ, \
}
#endif /* I2C3_TX_DMA_CONFIG */
#endif /* BSP_I2C3_TX_USING_DMA */
#ifdef BSP_I2C3_RX_USING_DMA
#ifndef I2C3_RX_DMA_CONFIG
#define I2C3_RX_DMA_CONFIG \
{ \
.dma_rcc = I2C3_RX_DMA_RCC, \
.Instance = I2C3_RX_DMA_INSTANCE, \
.dma_irq = I2C3_RX_DMA_IRQ, \
}
#endif /* I2C3_RX_DMA_CONFIG */
#endif /* BSP_I2C3_RX_USING_DMA */
#ifdef __cplusplus
}
#endif
#endif /*__I2C_HARD_CONFIG_H__ */
bsp/stm32/libraries/HAL_Drivers/drivers/drv_config.h
+1
View File
@@ -35,6 +35,7 @@ extern "C" {
#include "f1/sdio_config.h"
#include "f1/pwm_config.h"
#include "f1/usbd_config.h"
#include "f1/i2c_hard_config.h"
#include "f1/pulse_encoder_config.h"
#elif defined(SOC_SERIES_STM32F2)
#include "f2/dma_config.h"
bsp/stm32/libraries/HAL_Drivers/drivers/drv_hard_i2c.c
+78 -97
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File diff suppressed because it is too large Load Diff
bsp/stm32/libraries/HAL_Drivers/drivers/drv_hard_i2c.h
+16 -23
View File
@@ -11,14 +11,10 @@
#ifndef __DRV_HARD_I2C_H__
#define __DRV_HARD_I2C_H__
#include "drv_config.h"
#include <rtthread.h>
#include "rtdevice.h"
#include <rthw.h>
#include <drv_common.h>
#include "drv_dma.h"
#include "drv_config.h"
#include <ipc/completion.h>
#if defined(RT_USING_I2C) && defined(BSP_USING_I2C)
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
@@ -28,29 +24,28 @@ extern "C"
struct stm32_i2c_config
{
const char *name;
I2C_TypeDef *Instance;
rt_uint32_t timing;
rt_uint32_t timeout;
IRQn_Type evirq_type;
IRQn_Type erirq_type;
struct dma_config *dma_rx, *dma_tx;
const char *name;
I2C_TypeDef *Instance;
rt_uint32_t timing;
rt_uint32_t timeout;
IRQn_Type evirq_type;
IRQn_Type erirq_type;
struct dma_config *dma_rx;
struct dma_config *dma_tx;
};
struct stm32_i2c
{
I2C_HandleTypeDef handle;
I2C_HandleTypeDef handle;
struct stm32_i2c_config *config;
struct
{
DMA_HandleTypeDef handle_rx;
DMA_HandleTypeDef handle_tx;
DMA_HandleTypeDef handle_rx;
DMA_HandleTypeDef handle_tx;
} dma;
struct stm32_i2c_config *config;
struct rt_i2c_bus_device i2c_bus;
rt_uint8_t i2c_dma_flag;
struct rt_completion completion;
rt_uint8_t i2c_dma_flag;
struct rt_i2c_bus_device i2c_bus;
struct rt_completion completion;
};
#define I2C_USING_TX_DMA_FLAG (1U)
@@ -60,6 +55,4 @@ struct stm32_i2c
}
#endif
#endif /* BSP_USING_I2C */
#endif /* __DRV_I2C_H__ */