Merge pull request #469 from ArdaFu/master

[bsp][asm9260t] Add new bsp for ASM9260T
This commit is contained in:
Bernard Xiong
2015-05-04 17:53:37 +08:00
49 changed files with 6300 additions and 75 deletions
+1
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@@ -22,6 +22,7 @@ script:
env:
- RTT_BSP='simulator' RTT_CC='clang-analyze' RTT_EXEC_PATH=/usr/share/clang/scan-build
- RTT_BSP='CME_M7' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='asm9260t' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at91sam9260' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='avr32uc3b0' RTT_TOOL_CHAIN='atmel-avr32'
# - RTT_BSP='bf533' # no scons
@@ -0,0 +1,44 @@
;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Used to define address zones within the ARM address space (Memory).
;;
;; Name may be almost anything
;; AdrSpace must be Memory
;; StartAdr start of memory block
;; EndAdr end of memory block
;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
[Memory]
;; Name AdrSpace StartAdr EndAdr AccType Width
;Memory = SYSC0 Memory 0xFFFFE800 0xFFFFF9FF W
;Memory = SYSC1 Memory 0xFFFFFC00 0xFFFFFD7F W
;Memory = ROM Memory 0x00100000 0x00107FFF R
;Memory = BootMem Memory 0x00000000 0x000FFFFF R
;Memory = RAM0 Memory 0x00200000 0x00200FFF RW
;Memory = Periph Memory 0xFFFA0000 0xFFFE3FFF W
;Memory = USBH Memory 0x00500000 0x00503FFF W
;Memory = RAM1 Memory 0x00300000 0x00300FFF RW
;Memory = ExtDev Memory 0x10000000 0x8FFFFFFF RW
Memory = EMI_MEM Memory 0x00000000 0x3FFFFFFF RW
Memory = RAM Memory 0x40000000 0x40001FFF RW
Memory = AHB Memory 0x50000000 0x501FFFFF W
Memory = APB Memory 0x80000000 0x800BFFFF W
Memory = DMA0 Memory 0x80100000 0x8010FFFF W
Memory = DMA1 Memory 0x80200000 0x8020FFFF W
Memory = USB0 Memory 0x80300000 0x8030FFFF W
Memory = USB1 Memory 0x80400000 0x8040FFFF W
Memory = MAC Memory 0x80500000 0x8050FFFF W
Memory = NAND Memory 0x80600000 0x8060FFFF W
Memory = EMI_REG Memory 0x80700000 0x8070FFFF W
Memory = LCD Memory 0x80800000 0x8080FFFF W
Memory = SPI_FLASH Memory 0xF0000000 0xF7FFFFFF RW
Memory = ROM Memory 0xFFFF0000 0xFFFFFFFF R
TrustedRanges = true
UseSfrFilter = true
[SfrInclude]
File = ioASM9260T.ddf
@@ -0,0 +1,43 @@
[FILEFORMAT]
rev=1.6
[CHIP]
//Chip name
name=ASM9260T
//What endian modes does the chip support? (le_be8_be32(default), le_be8, le_be32, le, be8_be32, be8, be32)
endiansupport=le
//Does the chip support the thumb instruction set? (true(default), false)
thumbsupport=true
//Does the chip support the arm instruction set? (true(default), false)
armsupport=true
//Does the chip have an FPU coprocessor?
//(VFPv1,VFPv2,VFP9-S,None(default)
fpu=None
//Debugger interface, default JTAG=true, RTCK=true, SWD=true if Cortex cores, SWD=false if ARM cores, SWO_TraceD0=false
JTAG=true
RTCK=false
SWD=false
SWO_TraceD0=false
[CORE]
//Name of the ARM processor core
name=ARM926EJ-S
[DDF FILE]
//Name of the ddf file
name=AlphaScale\ASM9260T.ddf
[LINKER FILE]
//Name of the linker config file
name=$TOOLKIT_DIR$\config\linker\AlphaScale\sam9260t\sam9260t_sdram.icf
[FLASH LOADER]
name=$TOOLKIT_DIR$\config\flashloader\
@@ -0,0 +1,7 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<optionMenuItem>
<tag>ASM9260T</tag>
<display>AlphaScale ASM9260T</display>
<data>$CUR_DIR$\ASM9260T.i79</data>
</optionMenuItem>
@@ -0,0 +1,59 @@
//------------------------------------------------------------------------------
// Linker scatter for running in external SDRAM on the ASM9260T
// By ArdaFu 2015-04-29
//------------------------------------------------------------------------------
//
// Define a memory region that covers the entire 4 GB addressible space of the
// processor.
//
define memory mem with size = 4G;
//
// Define a region for the on-chip flash. size = 2MB
//
define region FLASH = mem:[from 0x20000000 to 0x201FFFFF];
//
// Define a region for the on-chip SRAM. size = 30MB
//
define region SRAM = mem:[from 0x20200000 to 0x21FFFFFF];
//
// Indicate that the read/write values should be initialized by copying from
// flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone. This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the RAM vector table at the start of SRAM.
//
place at start of SRAM { section VTABLE };
//
// Place all read/write items into SRAM.
//
place in SRAM { readwrite};
//
// RT-thread symbols
//
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
@@ -0,0 +1,7 @@
How to use:
(By ArdaFu 2015-04-29)
1. Copy %arm% folder to &IAR EWARM% folder
2. Restart your IDE.
3. Select AlphaScale ASM9260T at project options-> General Options -> Target-> Device.
4. Start debug :).
+14
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@@ -0,0 +1,14 @@
# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
+38
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@@ -0,0 +1,38 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
if GetDepend('RT_USING_WEBSERVER'):
objs = objs + SConscript(RTT_ROOT + '/components/net/webserver/SConscript', variant_dir='build/net/webserver', duplicate=0)
if GetDepend('RT_USING_RTGUI'):
objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
# libc testsuite
#objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
# make a building
DoBuilding(TARGET, objs)
+11
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@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
+76
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@@ -0,0 +1,76 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
*/
#include <rtthread.h>
#include <rtdevice.h>
void rt_init_thread_entry(void* parameter)
{
/* Initialization RT-Thread Components */
rt_components_init();
}
#ifdef RT_USING_LED
#include "led.h"
void rt_led_thread_entry(void* parameter)
{
rt_uint8_t cnt = 0;
led_init();
while(1)
{
/* light on leds for one second */
rt_thread_delay(40);
cnt++;
if(cnt & 0x01)
led_on(1);
else
led_off(1);
}
}
static void start_led_thread(void)
{
rt_thread_t led_thread;
led_thread = rt_thread_create("led", rt_led_thread_entry, RT_NULL, 512,
(RT_THREAD_PRIORITY_MAX / 8 * 5), 20);
if(led_thread != RT_NULL)
rt_thread_startup(led_thread);
}
#endif
int rt_application_init()
{
rt_thread_t init_thread;
init_thread = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 2048,
(RT_THREAD_PRIORITY_MAX / 8 * 2), 20);
if(init_thread != RT_NULL)
rt_thread_startup(init_thread);
#ifdef RT_USING_LED
start_led_thread();
#endif
return 0;
}
+90
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@@ -0,0 +1,90 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
* 2015-04-21 ArdaFu Using init componment module
* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
extern void rt_application_init(void);
#if defined(__CC_ARM)
extern int Image$$ER_ZI$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$ER_ZI$$ZI$$Limit)
#elif(defined(__GNUC__))
extern unsigned char __bss_end__;
#define HEAP_BEGIN (&__bss_end__)
#elif(defined(__ICCARM__))
#pragma section = ".noinit"
#define HEAP_BEGIN (__section_end(".noinit"))
#endif
#define HEAP_END (0x22000000)
/**
* This function will startup RT-Thread RTOS.
*/
static void rtthread_startup(void)
{
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize system timer*/
rt_system_timer_init();
/* initialize application */
rt_application_init();
/* initialize timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
+21
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@@ -0,0 +1,21 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'drivers')
# add the general drvers.
src = Split("""
board.c
usart.c
""")
# add Ethernet drvers.
if GetDepend('RT_USING_LED'):
src += ['led.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
+90
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@@ -0,0 +1,90 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
* 2015-05-02 ArdaFu Port from AT91SAM9260 BSP
*/
#include <rtthread.h>
#include <rthw.h>
#include <timer0.h>
#include "board.h"
#include <mmu.h>
#include "interrupt.h"
extern void rt_hw_interrupt_init(void);
extern void rt_hw_clock_init(void);
extern void rt_hw_uart_init(void);
static struct mem_desc hw_mem_desc[] =
{
{ 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB },/* None cached for 4G memory */
// visual start, visual end, phy start , props
{ 0x00000000, 0x000FFFFF, 0x20000000, RW_CB }, /* ISR Vector table */
{ 0x00200000, 0x00001FFF, 0x40000000, RW_CB }, /* 8K cached SRAM 0/1 */
{ 0x20000000, 0x21FFFFFF, 0x20000000, RW_CB }, /* 32M cached SDRAM */
{ 0x90000000, 0x90001FFF, 0x40000000, RW_NCNB },/* 4K SRAM0 + 4k SRAM1 */
{ 0xA0000000, 0xA1FFFFFF, 0x20000000, RW_NCNB },/* 32M none-cached SDRAM */
};
/**
* This function will handle rtos timer
*/
static void rt_systick_handler(int vector, void *param)
{
uint32_t ir = inl(HW_TIMER0_IR);
if (ir & 1UL)
rt_tick_increase();
outl(ir, REG_SET(HW_TIMER0_IR));
}
/**
* This function will init pit for system ticks
*/
static void rt_hw_timer_init()
{
hw_timer0_init();
/* install interrupt handler */
rt_hw_interrupt_install(INT_TIMER0, rt_systick_handler, RT_NULL, "SysTick");
rt_hw_interrupt_umask(INT_TIMER0);
}
/**
* This function will init at91sam9260 board
*/
void rt_hw_board_init(void)
{
/* initialize mmu */
rt_hw_mmu_init(hw_mem_desc, sizeof(hw_mem_desc)/sizeof(hw_mem_desc[0]));
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize the system clock */
//rt_hw_clock_init(); //set each pll etc.
/* initialize uart */
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
/* initialize timer0 */
rt_hw_timer_init();
}
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@@ -0,0 +1,32 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety add board.h to this bsp
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <asm9260t.h>
void rt_hw_board_init(void);
#endif
+47
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@@ -0,0 +1,47 @@
/*
* File : led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#include <rtthread.h>
#include <board.h>
#include "led.h"
#include "gpio.h"
//ASM9260T EVK pin 16-7 LED0, 0: ON, 1 : OFF
void led_init(void)
{
// enable IOCONFIG GPIO
outl(((1UL<<25) | (1UL<<4)) , REG_SET(HW_AHBCLKCTRL0));
HW_SetPinMux(16,7,0);
HW_GpioSetDir(16,7,1);
}
void led_on(int num)
{
HW_GpioClrVal(16, 7 );
}
void led_off(int num)
{
HW_GpioSetVal(16, 7 );
}
+32
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@@ -0,0 +1,32 @@
/*
* File : led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
*/
#ifndef __LED_H__
#define __LED_H__
void led_init(void);
void led_on(int num);
void led_off(int num);
#endif
File diff suppressed because it is too large Load Diff
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@@ -0,0 +1,71 @@
#------------------------------------------------
# SDRAM initialization script for the ASM9260T
#------------------------------------------------
define __setup_PLL
echo "Enabling PLL for CPU" \n
# outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
set *0x80040024 = 0x00000004
# outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
set *0x80040034 = 0x00000100
# outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
set *0x80040024 = 0x00000600
# outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
set *0x80040238 = 0x00000770
# outl(2, HW_CPUCLKDIV);
set *0x8004017C = 0x00000002
# outl(2, HW_SYSAHBCLKDIV);
set *0x80040180 = 0x00000002
# outl(480, HW_SYSPLLCTRL);
set *0x80040100 = 0x000001E0
# __delay(50)
set $i = 0
while $i != 500
set $i += 1
end
# outl(1, HW_MAINCLKSEL);
set *0x80040120 = 0x00000001
# outl(0, HW_MAINCLKUEN);
set *0x80040124 = 0x00000000
# outl(1, HW_MAINCLKUEN);
set *0x80040124 = 0x00000001
end
define __setup_SDRAM
echo "Enabling on-chip SDRAM" \n
# outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
set *0x80040024 = 0x00000040
# outl(0x00001188, HW_EMI_SCONR);
set *0x80700000 = 0x00001188
# outl(0x000a0500, HW_EMI_CTRL);
set *0x8004034c = 0x000a0500
# outl(0x20000000, HW_EMI_SCSLR2_LOW);
set *0x8070001c = 0x20000000
# outl(0x0000000c, HW_EMI_SMSKR2);
set *0x8070005c = 0x0000000c
# outl(0x024996d9, HW_EMI_STMG0R);
set *0x80700004 = 0x024996d9
# outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
set *0x80700094 = 0x00542b4f
# outl(0x00003288, HW_EMI_SCTLR);
set *0x8070000c = 0x00003288
end
# Step1: Connect to the J-Link gdb server
define reset
#target remote localhost:2331
monitor reset
# Step2: Reset peripheral (RSTC_CR)
echo "------- Prepare for debug ASM9260T -------" \n
__setup_PLL
__setup_SDRAM
# Step3: Load file(eg. getting-started project)
load
mon reg pc=0x20000000
#info reg
end
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@@ -0,0 +1,61 @@
//------------------------------------------------
// SDRAM initialization script for the ASM9260T
//------------------------------------------------
FUNC void __setup_PLL()
{
printf( "Enabling PLL for CPU\n");
// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
_WDWORD(0x80040024, 0x00000004);
// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
_WDWORD(0x80040034, 0x00000100);
// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
_WDWORD(0x80040024, 0x00000600);
// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
_WDWORD(0x80040238, 0x00000770);
// outl(2, HW_CPUCLKDIV);
_WDWORD(0x8004017C, 0x00000002);
// outl(2, HW_SYSAHBCLKDIV);
_WDWORD(0x80040180, 0x00000002);
// outl(480, HW_SYSPLLCTRL);
_WDWORD(0x80040100, 0x000001E0);
_sleep_(500);
// outl(1, HW_MAINCLKSEL);
_WDWORD(0x80040120, 0x00000001);
// outl(0, HW_MAINCLKUEN);
_WDWORD(0x80040124, 0x00000000);
// outl(1, HW_MAINCLKUEN);
_WDWORD(0x80040124, 0x00000001);
}
FUNC void __setup_SDRAM()
{
printf( "Enabling on-chip SDRAM\n");
// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
_WDWORD(0x80040024, 0x00000040);
// outl(0x00001188, HW_EMI_SCONR);
_WDWORD(0x80700000, 0x00001188);
// outl(0x000a0500, HW_EMI_CTRL);
_WDWORD(0x8004034c, 0x000a0500);
// outl(0x20000000, HW_EMI_SCSLR2_LOW);
_WDWORD(0x8070001c, 0x20000000);
// outl(0x0000000c, HW_EMI_SMSKR2);
_WDWORD(0x8070005c, 0x0000000c);
// outl(0x024996d9, HW_EMI_STMG0R);
_WDWORD(0x80700004, 0x024996d9);
// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
_WDWORD(0x80700094, 0x00542b4f);
// outl(0x00003288, HW_EMI_SCTLR);
_WDWORD(0x8070000c, 0x00003288);
}
printf( "------- Prepare for debug ASM9260T -------");
__setup_PLL();
__setup_SDRAM();
DEBUG_CLOCK = 2000000;
LOAD Objects\\template.axf INCREMENTAL
PC = 0x20000000;
g,main
+59
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@@ -0,0 +1,59 @@
//------------------------------------------------
// SDRAM initialization script for the ASM9260T
//------------------------------------------------
__setup_PLL()
{
__message "Enabling PLL for CPU\n";
// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
__writeMemory32(0x00000004, 0x80040024, "Memory");
// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
__writeMemory32(0x00000100, 0x80040034, "Memory");
// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
__writeMemory32(0x00000600, 0x80040024, "Memory");
// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
__writeMemory32(0x00000770, 0x80040238, "Memory");
// outl(2, HW_CPUCLKDIV);
__writeMemory32(0x00000002, 0x8004017C, "Memory");
// outl(2, HW_SYSAHBCLKDIV);
__writeMemory32(0x00000002, 0x80040180, "Memory");
// outl(480, HW_SYSPLLCTRL);
__writeMemory32(0x000001E0, 0x80040100, "Memory");
__delay(50);
// outl(1, HW_MAINCLKSEL);
__writeMemory32(0x00000001, 0x80040120, "Memory");
// outl(0, HW_MAINCLKUEN);
__writeMemory32(0x00000000, 0x80040124, "Memory");
// outl(1, HW_MAINCLKUEN);
__writeMemory32(0x00000001, 0x80040124, "Memory");
}
__setup_SDRAM()
{
__message "Enabling on-chip SDRAM\n";
// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
__writeMemory32(0x00000040, 0x80040024, "Memory");
// outl(0x00001188, HW_EMI_SCONR);
__writeMemory32(0x00001188, 0x80700000, "Memory");
// outl(0x000a0500, HW_EMI_CTRL);
__writeMemory32(0x000a0500, 0x8004034c, "Memory");
// outl(0x20000000, HW_EMI_SCSLR2_LOW);
__writeMemory32(0x20000000, 0x8070001c, "Memory");
// outl(0x0000000c, HW_EMI_SMSKR2);
__writeMemory32(0x0000000c, 0x8070005c, "Memory");
// outl(0x024996d9, HW_EMI_STMG0R);
__writeMemory32(0x024996d9, 0x80700004, "Memory");
// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
__writeMemory32(0x00542b4f, 0x80700094, "Memory");
// outl(0x00003288, HW_EMI_SCTLR);
__writeMemory32(0x00003288, 0x8070000c, "Memory");
}
execUserPreload()
{
__message "------- Prepare for debug ASM9260T -------";
__setup_PLL();
__setup_SDRAM();
}
+55
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@@ -0,0 +1,55 @@
//------------------------------------------------------------------------------
// Linker scatter for running in external SDRAM on the AT91SAM9260
//------------------------------------------------------------------------------
//
// Define a memory region that covers the entire 4 GB addressible space of the
// processor.
//
define memory mem with size = 4G;
//
// Define a region for the on-chip flash. size = 2MB
//
define region FLASH = mem:[from 0x20000000 to 0x201FFFFF];
//
// Define a region for the on-chip SRAM. size = 30MB
//
define region SRAM = mem:[from 0x20200000 to 0x21FFFFFF];
//
// Indicate that the read/write values should be initialized by copying from
// flash.
//
initialize by copy { readwrite };
//
// Indicate that the noinit values should be left alone. This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };
//
// Place the interrupt vectors at the start of flash.
//
place at start of FLASH { readonly section .intvec };
//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
//
// Place the RAM vector table at the start of SRAM.
//
place at start of SRAM { section VTABLE };
//
// Place all read/write items into SRAM.
//
place in SRAM { readwrite};
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
+90
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@@ -0,0 +1,90 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
SECTIONS
{
. = 0x20000000;
. = ALIGN(4);
.text :
{
*(.init)
*(.text)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
}
. = ALIGN(4);
.rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) *(.eh_frame) }
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(4);
.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
}
. = ALIGN(4);
.nobss : { *(.nobss) }
. = ALIGN(4);
__bss_start__ = .;
.bss : { *(.bss)}
__bss_end__ = .;
/* stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_end = .;
}
+27
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@@ -0,0 +1,27 @@
;*------------------------------------------------------------------------------
;* Linker scatter for running in external SDRAM on the ASM9260T
;*----------------------------------------------------------------------------*/
Load_region 0x20000000 0x00200000
{
Fixed_region 0x20000000
{
* (RESET +First)
.ANY (+RO +RW)
}
ARM_LIB_HEAP +0 EMPTY 0x1000
{
}
ARM_LIB_STACK +0 EMPTY 0x1000
{
}
; Application ZI data (.bss)
ER_ZI +0
{
* (+ZI)
}
}
+12
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@@ -0,0 +1,12 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
CPPPATH = [cwd]
# The set of source files associated with this SConscript file.
src = Glob('*.c')
group = DefineGroup('platform', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
File diff suppressed because it is too large Load Diff
+62
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@@ -0,0 +1,62 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#include "asm9260t.h"
#include "rtthread.h"
void HW_SetPinMux(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t mux_type)
{
rt_uint32_t addr = HW_IOCON(port, pin);
rt_uint32_t val = inl(addr); // read origin value
val &= ~7UL; // clear MUX field
val |= mux_type; // set MUX field with new value
outl(val ,addr); // Set new value
}
void HW_GpioSetDir(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t isOut)
{
rt_uint32_t addr = HW_GPIO_DATA_BASE | ((port>>2)<<16) | 0x8000;
rt_uint32_t val;
addr = isOut? REG_SET(addr) : REG_CLR(addr);
val = (1 << ((port%4)*8+pin));
outl(val, addr);
}
void HW_GpioSetVal(rt_uint8_t port, rt_uint8_t pin)
{
rt_uint32_t addr, val;
addr = REG_SET(HW_GPIO_DATA_BASE | ((port>>2)<<16));
val = (1 << ((port%4)*8+pin));
outl(val, addr);
}
void HW_GpioClrVal(rt_uint8_t port, rt_uint8_t pin)
{
rt_uint32_t addr, val;
addr = REG_CLR(HW_GPIO_DATA_BASE | ((port>>2)<<16));
val = (1 << ((port%4)*8+pin));
outl(val, addr);
}
+31
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@@ -0,0 +1,31 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#ifndef __GPIO_H__
#define __GPIO_H__
extern void HW_SetPinMux(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t mux_type);
extern void HW_GpioSetDir(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t isOut);
extern void HW_GpioSetVal(rt_uint8_t port, rt_uint8_t pin);
extern void HW_GpioClrVal(rt_uint8_t port, rt_uint8_t pin);
#endif
File diff suppressed because it is too large Load Diff
+97
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@@ -0,0 +1,97 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
#define INT_IRQ 0x00
#define INT_FIQ 0x01
// IRQ Source
#define INT_ARM_COMMRX 0
#define INT_ARM_COMMTX 1
#define INT_RTC 2
#define INT_GPIO0 3
#define INT_GPIO1 4
#define INT_GPIO2 5
#define INT_GPIO3 6
#define INT_GPIO4_IIS1 7
#define INT_USB0 8
#define INT_USB1 9
#define INT_USB0_DMA 10
#define INT_USB1_DMA 11
#define INT_MAC 12
#define INT_MAC_PMT 13
#define INT_NAND 14
#define INT_UART0 15
#define INT_UART1 16
#define INT_UART2 17
#define INT_UART3 18
#define INT_UART4 19
#define INT_UART5 20
#define INT_UART6 21
#define INT_UART7 22
#define INT_UART8 23
#define INT_UART9 24
#define INT_I2S0 25
#define INT_I2C0 26
#define INT_I2C1 27
#define INT_CAMIF 28
#define INT_TIMER0 29
#define INT_TIMER1 30
#define INT_TIMER2 31
#define INT_TIMER3 32
#define INT_ADC0 33
#define INT_DAC0 34
#define INT_USB0_RESUME_HOSTDISCONNECT 35
#define INT_USB0_VBUSVALID 36
#define INT_USB1_RESUME_HOSTDISCONNECT 37
#define INT_USB1_VBUSVALID 38
#define INT_DMA0_CH0 39
#define INT_DMA0_CH1 40
#define INT_DMA0_CH2 41
#define INT_DMA0_CH3 42
#define INT_DMA0_CH4 43
#define INT_DMA0_CH5 44
#define INT_DMA0_CH6 45
#define INT_DMA0_CH7 46
#define INT_DMA1_CH0 47
#define INT_DMA1_CH1 48
#define INT_DMA1_CH2 49
#define INT_DMA1_CH3 50
#define INT_DMA1_CH4 51
#define INT_DMA1_CH5 52
#define INT_DMA1_CH6 53
#define INT_DMA1_CH7 54
#define INT_WATCHDOG 55
#define INT_CAN0 56
#define INT_CAN1 57
#define INT_QEI 58
#define INT_MCPWM 59
#define INT_SPI0 60
#define INT_SPI1 61
#define INT_QUADSPI0 62
#define INT_SSP0 63
#endif
+37
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@@ -0,0 +1,37 @@
/*
* File : reset.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety modified from mini2440
* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
*/
#include <rtthread.h>
void machine_reset(void)
{
}
void machine_shutdown(void)
{
}
@@ -0,0 +1,31 @@
/*
* File : rt_low_level_gcc.inc
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
/*--------- Stack size of CPU modes ------------------------------------------*/
.equ UND_STK_SIZE, 2048
.equ SVC_STK_SIZE, 4096
.equ ABT_STK_SIZE, 2048
.equ IRQ_STK_SIZE, 4096
.equ FIQ_STK_SIZE, 4096
.equ SYS_STK_SIZE, 2048
@@ -0,0 +1,31 @@
/*
* File : rt_low_level_iar.inc
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
/*-------- Stack size of CPU modes -------------------------------------------*/
#define UND_STK_SIZE 512
#define SVC_STK_SIZE 4096
#define ABT_STK_SIZE 512
#define IRQ_STK_SIZE 1024
#define FIQ_STK_SIZE 1024
#define SYS_STK_SIZE 512
+30
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@@ -0,0 +1,30 @@
/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
*/
void rt_low_level_init(void)
{
}
@@ -0,0 +1,32 @@
;/*
; * File : rt_low_level_keil.inc
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
; *
; * This program is free software; you can redistribute it and/or modify
; * it under the terms of the GNU General Public License as published by
; * the Free Software Foundation; either version 2 of the License, or
; * (at your option) any later version.
; *
; * This program is distributed in the hope that it will be useful,
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; * GNU General Public License for more details.
; *
; * You should have received a copy of the GNU General Public License along
; * with this program; if not, write to the Free Software Foundation, Inc.,
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
; *
; * Change Logs:
; * Date Author Notes
; * 2015-04-14 ArdaFu first version
; */
;/*-------- Stack size of CPU modes ------------------------------------------*/
UND_STK_SIZE EQU 512
SVC_STK_SIZE EQU 4096
ABT_STK_SIZE EQU 512
IRQ_STK_SIZE EQU 1024
FIQ_STK_SIZE EQU 1024
SYS_STK_SIZE EQU 512
END
File diff suppressed because it is too large Load Diff
+55
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@@ -0,0 +1,55 @@
/*
* File : timer0.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-29 ArdaFu first version
*/
#include "timer0.h"
#include "asm9260t.h"
#include "rtthread.h"
void hw_timer0_init(void)
{
uint32_t pclk;
// enable timer0's clock, reset timer0
outl((1<<4), REG_SET(HW_AHBCLKCTRL1));
outl((1<<4), REG_CLR(HW_PRESETCTRL1));
outl((1<<4), REG_SET(HW_PRESETCTRL1));
outl((1<<0), REG_CLR(HW_TIMER0_TCR));
outl((3<<0), REG_CLR(HW_TIMER0_CTCR));
outl((3<<0), REG_CLR(HW_TIMER0_DIR));
outl(0, REG_CLR(HW_TIMER0_PR));
outl(0, REG_CLR(HW_TIMER0_PC));
outl((7<<0), REG_CLR(HW_TIMER0_MCR));
outl((3<<0), REG_SET(HW_TIMER0_MCR));
pclk = (inl(HW_SYSPLLCTRL)&0x1FF)*1000000u/4u;
outl(pclk/RT_TICK_PER_SECOND, HW_TIMER0_MR0);
outl((1<<4), REG_SET(HW_TIMER0_TCR));
outl((1<<4), REG_CLR(HW_TIMER0_TCR));
outl((1<<0), REG_SET(HW_TIMER0_TCR));
}
+34
View File
@@ -0,0 +1,34 @@
/*
* File : timer0.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-29 ArdaFu first version
*/
#ifndef __HW_TIMER0_H__
#define __HW_TIMER0_H__
////////////////////////////////////////////////////////////////////////////////
#include "stdint.h"
extern void hw_timer0_init(void);
////////////////////////////////////////////////////////////////////////////////
#endif /* __HW_TIMER0_H__ */
+112
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@@ -0,0 +1,112 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#include "asm9260t.h"
#include "rtthread.h"
#include "uart.h"
void Hw_UartDisable(HW_USART_TypeDef* uartBase)
{
uartBase->INTR[R_CLR] = ASM_UART_INTR_RXIEN | ASM_UART_INTR_TXIEN | ASM_UART_INTR_RTIS;
uartBase->CTRL2[R_CLR] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE;
}
void Hw_UartEnable(HW_USART_TypeDef* uartBase)
{
uartBase->CTRL2[R_CLR] = 0x0000C000UL; //clear CTSEN and RTSEN
uartBase->CTRL2[R_SET] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE | ASM_UART_CTRL2_USARTEN;
uartBase->INTR[R_SET] = ASM_UART_INTR_RXIEN | ASM_UART_INTR_RTIEN;
}
void Hw_UartReset(HW_USART_TypeDef* uartBase)
{
uartBase->CTRL0[R_CLR] = ASM_UART_CTRL0_SFTRST | ASM_UART_CTRL0_CLKGATE | ASM_UART_CTRL0_RXTO_ENABLE;
uartBase->CTRL0[R_SET] = ASM_UART_CTRL0_SFTRST | ASM_UART_CTRL0_CLKGATE | ASM_UART_CTRL0_RXTO_ENABLE;
}
void Hw_UartConfig(HW_USART_TypeDef* uartBase,int baudRate, int dataBits, int stopBits,int parity)
{
rt_uint32_t mode = ASM_UART_LINECTRL_FEN;
switch (dataBits)
{
case 8:
mode |= ASM_UART_LINECTRL_WLEN8;
break;
case 7:
mode |= ASM_UART_LINECTRL_WLEN7;
break;
case 6:
mode |= ASM_UART_LINECTRL_WLEN6;
break;
case 5:
mode |= ASM_UART_LINECTRL_WLEN5;
break;
default:
mode |= ASM_UART_LINECTRL_WLEN8;
break;
}
switch (stopBits)
{
case 2:
mode |= ASM_UART_LINECTRL_STP2;
break;
case 1:
default:
break;
}
switch (parity)
{
case 1:
mode |= ASM_UART_LINECTRL_PEN;
break;
case 2:
mode |= ASM_UART_LINECTRL_PEN | ASM_UART_LINECTRL_EPS;
break;
case 0:
default:
break;
}
//16bit nBaudDivint
mode |= (((12000000 <<2 ) / baudRate) & UART_BAUD_DIVINT_MASK) << 10;
//6bit nNaudDivfrac
mode |= (((12000000 <<2 ) / baudRate) & UART_BAUD_DIVFRAC_MASK) << 8;
uartBase->LINECTRL[R_VAL] = mode;
}
void Hw_UartInit(int index)
{
// uart0 = bit11, uart9 = bit20
int ctrl_bit = index + 11;
outl(1UL<<ctrl_bit,REG_SET(HW_AHBCLKCTRL0)); //UART4 ENABLE bit15
outl(0x1, HW_UART0CLKDIV + index*4); //UART4 div 2
outl(1UL<<ctrl_bit,REG_CLR(HW_AHBCLKCTRL0)); //UART4 clk gate
outl(1UL<<ctrl_bit,REG_SET(HW_AHBCLKCTRL0)); //UART4 clk gate
outl(1UL<<ctrl_bit,REG_CLR(HW_PRESETCTRL0)); //UART4 reset
outl(1UL<<ctrl_bit,REG_SET(HW_PRESETCTRL0)); //UART4 reset
}
+111
View File
@@ -0,0 +1,111 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#ifndef __UART_H__
#define __UART_H__
#define R_VAL 0
#define R_SET 1
#define R_CLR 2
#define R_TOG 3
typedef struct
{
volatile rt_uint32_t CTRL0[4];
volatile rt_uint32_t CTRL1[4];
volatile rt_uint32_t CTRL2[4];
volatile rt_uint32_t LINECTRL[4];
volatile rt_uint32_t INTR[4];
volatile rt_uint32_t DATA[4];
volatile rt_uint32_t STAT[4];
volatile const rt_uint32_t DEBUG[4];
volatile rt_uint32_t ILPR[4];
volatile rt_uint32_t RS485CTRL[4];
volatile rt_uint32_t RS485ADRMATCH[4];
volatile rt_uint32_t RS485DLY[4];
volatile rt_uint32_t AUTOBAUD[4];
volatile rt_uint32_t CTRL3[4];
volatile rt_uint32_t ISO7816CTRL[4];
volatile rt_uint32_t ISO7816ERRCNT[4];
volatile rt_uint32_t ISO7816STATUS[4];
} HW_USART_TypeDef;
#define USART0 ((HW_USART_TypeDef *)UART0_BASE)
#define USART1 ((HW_USART_TypeDef *)UART1_BASE)
#define USART2 ((HW_USART_TypeDef *)UART2_BASE)
#define USART3 ((HW_USART_TypeDef *)UART3_BASE)
#define USART4 ((HW_USART_TypeDef *)UART4_BASE)
#define USART5 ((HW_USART_TypeDef *)UART5_BASE)
#define USART6 ((HW_USART_TypeDef *)UART6_BASE)
#define USART7 ((HW_USART_TypeDef *)UART7_BASE)
#define USART8 ((HW_USART_TypeDef *)UART8_BASE)
#define USART9 ((HW_USART_TypeDef *)UART9_BASE)
#define ASM_UART_INTR_RXIS (1UL << 4)
#define ASM_UART_INTR_TXIS (1UL << 5)
#define ASM_UART_INTR_RTIS (1UL << 6)
#define ASM_UART_INTR_RXIEN (1UL << 20)
#define ASM_UART_INTR_TXIEN (1UL << 21)
#define ASM_UART_INTR_RTIEN (1UL << 22)
#define UART_BAUD_DIVINT_MASK 0x003FFFC0UL
#define UART_BAUD_DIVFRAC_MASK 0x0000003FUL
#define UART_FIFO_ENABLE 0x00000010UL
#define MAIN_CLOCK_EXT12M 0
#define MAIN_CLOCK_SYSPLL 1
#define UART_INT_FIFO_LV_SEL_MASK 0x00770000UL
#define RXTIMEOUT_ENABLE 0x01000000UL
#define RXTIMEOUT_MASK 0x00FF0000UL
#define ASM_UART_CTRL0_SFTRST (1UL << 31)
#define ASM_UART_CTRL0_CLKGATE (1UL << 30)
#define ASM_UART_CTRL0_RXTO_ENABLE (1UL << 24)
#define ASM_UART_CTRL2_USARTEN (1UL << 0)
#define ASM_UART_CTRL2_TXE (1UL << 8)
#define ASM_UART_CTRL2_RXE (1UL << 9)
#define ASM_UART_LINECTRL_PEN (1UL << 1)
#define ASM_UART_LINECTRL_EPS (1UL << 2)
#define ASM_UART_LINECTRL_STP2 (1UL << 3)
#define ASM_UART_LINECTRL_FEN (1UL << 4)
#define ASM_UART_LINECTRL_WLEN5 (0UL << 5)
#define ASM_UART_LINECTRL_WLEN6 (1UL << 5)
#define ASM_UART_LINECTRL_WLEN7 (2UL << 5)
#define ASM_UART_LINECTRL_WLEN8 (3UL << 5)
#define ASM_UART_LINECTRL_SPS (1UL << 7)
#define ASM_UART_STAT_TXFF (1UL << 25)
#define ASM_UART_STAT_RXFE (1UL << 24)
extern void Hw_UartDisable(HW_USART_TypeDef* uartBase);
extern void Hw_UartEnable(HW_USART_TypeDef* uartBase);
extern void Hw_UartReset(HW_USART_TypeDef* uartBase);
extern void Hw_UartConfig(HW_USART_TypeDef* uartBase, int baudRate,
int dataBits, int stopBits, int parity);
extern void Hw_UartInit(int index);
#endif
File diff suppressed because it is too large Load Diff
+139
View File
@@ -0,0 +1,139 @@
import os
ARCH = 'arm'
CPU = 'arm926'
# toolchains options
CROSS_TOOL = 'gcc'
#------- toolchains path -------------------------------------------------------
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
# EXEC_PATH = 'D:/ArdaArmTools/Sourcery_Lite/bin'
EXEC_PATH = 'D:/ArdaArmTools/GNUARM_4.9_2015q1/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
IAR_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
#BUILD = 'debug'
BUILD = 'release'
CORE = 'arm926ej-s'
MAP_FILE = 'rtthread.map'
LINK_FILE = 'link_scripts/sdram'
TARGET_NAME = 'rtthread.bin'
#------- GCC settings ----------------------------------------------------------
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
#PREFIX = 'arm-none-linux-gnueabi-'
CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'axf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=arm926ej-s'
CFLAGS = DEVICE
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
AFLAGS += ' -Iplatform'
LFLAGS = DEVICE
LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
LFLAGS += ' -T ' + LINK_FILE + '.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
POST_ACTION += SIZE + ' $TARGET\n'
#------- Keil settings ---------------------------------------------------------
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
EXEC_PATH += '/arm/armcc/bin/'
DEVICE = ' --cpu=' + CORE
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
AFLAGS = DEVICE + ' -Iplatform'
LFLAGS = DEVICE + ' --strict'
LFLAGS += ' --info sizes --info totals --info unused --info veneers'
LFLAGS += ' --list ' + MAP_FILE
LFLAGS += ' --scatter ' + LINK_FILE + '.scat'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
POST_ACTION += 'fromelf -z $TARGET\n'
#------- IAR settings ----------------------------------------------------------
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'axf'
DEVICE = CORE
CFLAGS = '--cpu=' + DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --endian=little'
CFLAGS += ' -e'
CFLAGS += ' --fpu=none'
CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' --silent'
AFLAGS = '--cpu '+ DEVICE
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --fpu none'
AFLAGS += ' -S'
AFLAGS += ' -Iplatform'
if BUILD == 'debug':
CFLAGS += ' --debug'
CFLAGS += ' -On'
else:
CFLAGS += ' -Oh'
LFLAGS = '--config ' + LINK_FILE +'.icf'
LFLAGS += ' --entry __iar_program_start'
LFLAGS += ' --map ' + MAP_FILE
LFLAGS += ' --silent'
EXEC_PATH = IAR_PATH + '/arm/bin/'
POST_ACTION = 'ielftool --silent --bin $TARGET ' + TARGET_NAME
File diff suppressed because it is too large Load Diff
+10
View File
@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\template.ewp</path>
</project>
<batchBuild/>
</workspace>
+175
View File
@@ -0,0 +1,175 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>18432000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>16</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>Datasheet</Title>
<Path>DATASHTS\ATMEL\AT91SAM9260_DS.PDF</Path>
</Book>
<Book>
<Number>1</Number>
<Title>Summary</Title>
<Path>DATASHTS\ATMEL\AT91SAM9260_DC.PDF</Path>
</Book>
</Books>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>0</tLdApp>
<tGomain>0</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\jlink\at91sam9260.ini</tIfile>
<pMon>Segger\JLTAgdi.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JLTAgdi</Key>
<Name>-O558 -J1 -Y1000 -Z1 -FO0 -FD200000 -FC800 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2ARM</Key>
<Name>-UV2077N9E -O47 -S0 -C0 -N00("ARM926EJ-S Core") -D00(0792603F) -L00(4) -FO7 -FD300000 -FC1000 -FN1 -FF0AT91SAM9_DF_P1056_CS1 -FS020000000 -FL083BE00)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>
File diff suppressed because it is too large Load Diff
+26 -43
View File
@@ -146,7 +146,7 @@ void at91_aic_init(rt_uint32_t *priority)
*/
for (i = 0; i < AIC_IRQS; i++) {
/* Put irq number in Source Vector Register: */
at91_sys_write(AT91_AIC_SVR(i), i);
at91_sys_write(AT91_AIC_SVR(i), i); // no-used
/* Active Low interrupt, with the specified priority */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
//AT91_AIC_SRCTYPE_FALLING
@@ -201,12 +201,11 @@ static void at91_gpio_irq_init()
*/
void rt_hw_interrupt_init(void)
{
rt_int32_t i;
register rt_uint32_t idx;
rt_uint32_t *priority = at91sam9260_default_irq_priority;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
at91_extern_irq = (1UL << AT91SAM9260_ID_IRQ0) | (1UL << AT91SAM9260_ID_IRQ1)
| (1UL << AT91SAM9260_ID_IRQ2);
/* Initialize the AIC interrupt controller */
at91_aic_init(priority);
@@ -341,7 +340,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
/*@}*/
/*
static int at91_aic_set_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
@@ -354,13 +353,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQ_TYPE_LEVEL_LOW:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
// only supported on external interrupts
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))
srctype = AT91_AIC_SRCTYPE_LOW;
else
return -1;
break;
case IRQ_TYPE_EDGE_FALLING:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
// only supported on external interrupts
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))
srctype = AT91_AIC_SRCTYPE_FALLING;
else
return -1;
@@ -373,54 +374,36 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
return 0;
}
rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq, rt_uint32_t* id)
*/
rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
{
rt_uint32_t irqstat;
//volatile rt_uint32_t irqstat;
rt_uint32_t id;
if (fiq_irq == INT_FIQ)
{
*id = 0;
}
else //IRQ
{
/* get irq number */
*id = (rt_uint32_t)at91_sys_read(AT91_AIC_IVR);
/* clear pending register */
irqstat = (rt_uint32_t)at91_sys_read(AT91_AIC_ISR);
}
return 0;
return irqstat;
//IRQ
/* AIC need this dummy read */
at91_sys_read(AT91_AIC_IVR);
/* clear pending register */
id = at91_sys_read(AT91_AIC_ISR);
return id;
}
void rt_hw_interrupt_ack(rt_uint32_t fiq_irq)
void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
{
/* new FIQ generation */
if (fiq_irq == INT_FIQ)
{
/* new FIQ generation */
return;
}
else
{
// EIOCR must be write any value after interrupt,
/* new IRQ generation */
// EIOCR must be write any value after interrupt,
// or else can't response next interrupt
/* new IRQ generation */
at91_sys_write(AT91_AIC_EOICR, 0x55555555);
}
at91_sys_write(AT91_AIC_EOICR, 0x0);
}
#ifdef RT_USING_FINSH
void list_irq(void)
{
+15 -9
View File
@@ -1,17 +1,26 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2011, RT-Thread Development Team
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2013-07-06 Bernard first version
* 2015-04-14 ArdaFu first version
*/
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
@@ -19,7 +28,4 @@
#define INT_FIQ 0x01
rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq, rt_uint32_t* id);
void rt_hw_interrupt_ack(rt_uint32_t fiq_irq);
#endif
+14 -23
View File
@@ -25,8 +25,9 @@
#include <rtthread.h>
#include <rthw.h>
#include <interrupt.h>
#define INT_IRQ 0x00
#define INT_FIQ 0x01
extern struct rt_thread *rt_current_thread;
#ifdef RT_USING_FINSH
@@ -171,24 +172,18 @@ void rt_hw_trap_resv(struct rt_hw_register *regs)
rt_hw_cpu_shutdown();
}
extern struct rt_irq_desc irq_desc[];
extern rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq);
extern void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id);
void rt_hw_trap_irq()
{
rt_isr_handler_t isr_func;
rt_uint32_t irqstat;
rt_uint32_t irq;
void *param;
extern struct rt_irq_desc irq_desc[];
/* get irq number */
irqstat = rt_hw_interrupt_get_active(INT_IRQ, &irq);
if (irqstat == 0)
{
rt_kprintf("No interrupt occur\n");
rt_hw_interrupt_ack(INT_IRQ);
return;
}
irq = rt_hw_interrupt_get_active(INT_IRQ);
/* get interrupt service routine */
isr_func = irq_desc[irq].handler;
@@ -197,26 +192,20 @@ void rt_hw_trap_irq()
/* turn to interrupt service routine */
isr_func(irq, param);
rt_hw_interrupt_ack(INT_IRQ);
rt_hw_interrupt_ack(INT_IRQ, irq);
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[irq].counter ++;
#endif
}
void rt_hw_trap_fiq()
{
rt_isr_handler_t isr_func;
rt_uint32_t irqstat;
rt_uint32_t irq;
void *param;
extern struct rt_irq_desc irq_desc[];
/* get irq number */
irqstat = rt_hw_interrupt_get_active(INT_FIQ, &irq);
if (irqstat == 0)
{
rt_kprintf("No interrupt occur\n");
rt_hw_interrupt_ack(INT_FIQ);
return;
}
irq = rt_hw_interrupt_get_active(INT_FIQ);
/* get interrupt service routine */
isr_func = irq_desc[irq].handler;
@@ -225,6 +214,8 @@ void rt_hw_trap_fiq()
/* turn to interrupt service routine */
isr_func(irq, param);
rt_hw_interrupt_ack(INT_FIQ);
rt_hw_interrupt_ack(INT_FIQ, irq);
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[irq].counter ++;
#endif
}