Fix gcc prefix and update libopencm3. (#2922)

* Fix gcc prefix and update libopencm3. See: https://github.com/libopencm3/libopencm3/commit/7be50a5e75ed2d163d38a6759347c5e778ac02ab https://github.com/libopencm3/libopencm3/commit/034dbf20ff8c54dcbee5238390b37a0d35180f44 * update luftboot * Update linker scripts. * Update deprecated function. * Update rcc_clock_scale structure. * Add compatibility defines.
2026-05-25 23:46:04 +08:00 · 2023-01-25 14:11:53 +01:00
parent c08a472eaa
commit f60c68c130
28 changed files with 85 additions and 73 deletions
@@ -7,25 +7,25 @@
 # This is the common Makefile for finding the arm compiler
 # for bare metal systems like on the ARM7TDMI, cortex M3/4

-PREFIX ?= arm-none-eabi
+PREFIX ?= arm-none-eabi-

-ifeq ($(shell which $(PREFIX)-gcc),)
+ifeq ($(shell which $(PREFIX)gcc),)
  ifneq ($(MAKECMDGOALS),clean)
    $(warning Warning: arm-none-eabi-gcc cross-compiler not found! Some tools might not be able to build correctly)
  endif
 endif

-CC    = $(PREFIX)-gcc
-CXX   = $(PREFIX)-g++
-LD    = $(PREFIX)-g++
-AR    = $(PREFIX)-ar
-CP    = $(PREFIX)-objcopy
-DMP   = $(PREFIX)-objdump
-NM    = $(PREFIX)-nm
-SIZE  = $(PREFIX)-size
-STRIP = $(PREFIX)-strip
+CC    = $(PREFIX)gcc
+CXX   = $(PREFIX)g++
+LD    = $(PREFIX)g++
+AR    = $(PREFIX)ar
+CP    = $(PREFIX)objcopy
+DMP   = $(PREFIX)objdump
+NM    = $(PREFIX)nm
+SIZE  = $(PREFIX)size
+STRIP = $(PREFIX)strip

-GDB = $(shell which $(PREFIX)-gdb)
+GDB = $(shell which $(PREFIX)gdb)
 ifeq ($(GDB),)
 GDB = $(shell which gdb-multiarch)
 endif
@@ -9,15 +9,15 @@
 # If HARD_FLOAT is defined try to find armhf cross compiler, otherwise default to softfloat

 ifdef HARD_FLOAT
-PREFIX ?= arm-linux-gnueabihf
+PREFIX ?= arm-linux-gnueabihf-
 else
-PREFIX ?= arm-linux-gnueabi
+PREFIX ?= arm-linux-gnueabi-
 endif

 #
 # if gcc can't be found in path, try the codesourcery toolchain in /usr/local/codesourcery
 #
-ifeq ($(shell which $(PREFIX)-gcc),)
+ifeq ($(shell which $(PREFIX)gcc),)
 ifndef HARD_FLOAT
  TOOLCHAIN=$(shell find -L /usr/local/codesourcery -maxdepth 2 -type d -name arm-none-linux-gnueabi 2>/dev/null | head -n 1)
  ifneq ($(TOOLCHAIN),)
@@ -27,7 +27,7 @@ endif
 endif

 # if toolchain could not be found, print some useful info
-ifeq ($(shell which $(PREFIX)-gcc),)
+ifeq ($(shell which $(PREFIX)gcc),)
  # no suitable toolchain found...
  ifdef HARD_FLOAT
    $(error Error: arm-linux-gnueabihf-gcc cross-compiler not found! Please install the gcc-arm-linux-gnueabihf package.)
@@ -36,17 +36,17 @@ ifeq ($(shell which $(PREFIX)-gcc),)
  endif
 endif

-CC    = $(PREFIX)-gcc
-CXX   = $(PREFIX)-g++
-LD    = $(PREFIX)-g++
-AR    = $(PREFIX)-ar
-CP    = $(PREFIX)-objcopy
-DMP   = $(PREFIX)-objdump
-NM    = $(PREFIX)-nm
-SIZE  = $(PREFIX)-size
-STRIP = $(PREFIX)-strip
+CC    = $(PREFIX)gcc
+CXX   = $(PREFIX)g++
+LD    = $(PREFIX)g++
+AR    = $(PREFIX)ar
+CP    = $(PREFIX)objcopy
+DMP   = $(PREFIX)objdump
+NM    = $(PREFIX)nm
+SIZE  = $(PREFIX)size
+STRIP = $(PREFIX)strip

-GDB = $(shell which $(PREFIX)-gdb)
+GDB = $(shell which $(PREFIX)gdb)
 ifeq ($(GDB),)
 GDB = $(shell which gdb-multiarch)
 endif
@@ -31,5 +31,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
-
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,5 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
+INCLUDE cortex-m-generic.ld
+
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
+INCLUDE cortex-m-generic.ld
@@ -34,5 +34,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
-/* INCLUDE cortex-m-generic.ld */
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,5 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
+
@@ -33,4 +33,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
+INCLUDE cortex-m-generic.ld
@@ -32,5 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
-
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -32,5 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
-
+INCLUDE cortex-m-generic.ld
@@ -52,7 +52,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
    .hpre = RCC_CFGR_HPRE_DIV_NONE,
    .ppre1 = RCC_CFGR_PPRE_DIV_4,
    .ppre2 = RCC_CFGR_PPRE_DIV_2,
-    .power_save = 1,
+    .voltage_scale = PWR_SCALE1,
    .flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS,
    .ahb_frequency  = 48000000,
    .apb1_frequency = 12000000,
@@ -66,7 +66,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
    .hpre = RCC_CFGR_HPRE_DIV_NONE,
    .ppre1 = RCC_CFGR_PPRE_DIV_2,
    .ppre2 = RCC_CFGR_PPRE_DIV_NONE,
-    .power_save = 1,
+    .voltage_scale = PWR_SCALE1,
    .flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS,
    .ahb_frequency  = 84000000,
    .apb1_frequency = 42000000,
@@ -80,7 +80,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
    .hpre = RCC_CFGR_HPRE_DIV_NONE,
    .ppre1 = RCC_CFGR_PPRE_DIV_4,
    .ppre2 = RCC_CFGR_PPRE_DIV_2,
-    .power_save = 1,
+    .voltage_scale = PWR_SCALE1,
    .flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS,
    .ahb_frequency  = 120000000,
    .apb1_frequency = 30000000,
@@ -227,40 +227,40 @@ void mcu_arch_init(void)
 #if EXT_CLK == 8000000
 #if defined(STM32F1)
  PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 72MHz.")
-  rcc_clock_setup_in_hse_8mhz_out_72mhz();
+  rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ])
 #elif defined(STM32F4)
 #if AHB_CLK == 84000000
  PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 84MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
 #else
  PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 168MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
 #endif
 #endif
 #elif EXT_CLK == 12000000
 #if defined(STM32F1)
  PRINT_CONFIG_MSG("Using 12MHz external clock to PLL it to 72MHz.")
-  rcc_clock_setup_in_hse_12mhz_out_72mhz();
+  rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE12_72MHZ]);
 #elif defined(STM32F4)
  PRINT_CONFIG_MSG("Using 12MHz external clock to PLL it to 168MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
 #endif
 #elif EXT_CLK == 16000000
 #if defined(STM32F4)
  PRINT_CONFIG_MSG("Using 16MHz external clock to PLL it to 168MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
 #endif
 #elif EXT_CLK == 24000000
 #if defined(STM32F4)
  PRINT_CONFIG_MSG("Using 24MHz external clock to PLL it to 168MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
 #elif defined(STM32F1)
  rcc_clock_setup_in_hse_24mhz_out_24mhz_pprz();
 #endif
 #elif EXT_CLK == 25000000
 #if defined(STM32F4)
  PRINT_CONFIG_MSG("Using 25MHz external clock to PLL it to 168MHz.")
-  rcc_clock_setup_hse_3v3(&rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+  rcc_clock_setup_pll(&rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
 #endif
 #else
 #error EXT_CLK is either set to an unsupported frequency or not defined at all. Please check!
@@ -132,6 +132,10 @@
 #endif
 #endif

+#define RST_ADC1 RST_ADC
+#define RST_ADC2 RST_ADC
+#define RST_ADC3 RST_ADC
+
 #else // !STM32F4
 // ADC 3 not supported on STM32F1
 #undef USE_AD3
@@ -435,16 +439,18 @@ static inline void adc_init_rcc(void)
  /* Enable ADC peripheral clocks. */
 #if USE_AD1
  rcc_periph_clock_enable(RCC_ADC1);
+  rcc_periph_reset_pulse(RST_ADC1);
 #endif
 #if USE_AD2
  rcc_periph_clock_enable(RCC_ADC2);
+  rcc_periph_reset_pulse(RST_ADC2);
 #endif
 #if USE_AD3
  rcc_periph_clock_enable(RCC_ADC3);
+  rcc_periph_reset_pulse(RST_ADC3);
 #endif

  /* Time Base configuration */
-  timer_reset(TIM_ADC);
  timer_set_mode(TIM_ADC, TIM_CR1_CKD_CK_INT,
                 TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
  /* timer counts with ADC_TIMER_FREQUENCY */
@@ -1134,9 +1134,9 @@ static void i2c_stm32_setbitrate(struct i2c_periph *periph, int bitrate)

    // 1)
 #ifdef STM32F1
-    i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_36MHZ);
+    i2c_set_clock_frequency(i2c, 36);
 #else // STM32F4
-    i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_42MHZ);
+    i2c_set_clock_frequency(i2c, 42);
 #endif
    // 2)
    //i2c_set_fast_mode(i2c);
@@ -59,7 +59,8 @@ void actuators_pwm_arch_channel_init(uint32_t timer_peripheral,
 void set_servo_timer(uint32_t timer, uint32_t freq, uint8_t channels_mask)
 {
  // WARNING, this reset is only implemented for TIM1-8 in libopencm3!!
-  timer_reset(timer);
+  
+  //FIXME removed deprecated timer_reset(timer), should it be replaced by rcc_periph_reset_pulse(RST_TIMx) ?

  /* Timer global mode:
   * - No divider.
@@ -61,48 +61,56 @@ static uint32_t timer_rollover_cnt;
 PRINT_CONFIG_MSG("Using TIM1 for PPM input.")
 #define PPM_TIMER           TIM1
 #define RCC_TIM_PPM         RCC_TIM1
+#define RST_TIM_PPM         RST_TIM1

 #elif USE_PPM_TIM2

 PRINT_CONFIG_MSG("Using TIM2 for PPM input.")
 #define PPM_TIMER           TIM2
 #define RCC_TIM_PPM         RCC_TIM2
+#define RST_TIM_PPM         RST_TIM2

 #elif USE_PPM_TIM3

 PRINT_CONFIG_MSG("Using TIM3 for PPM input.")
 #define PPM_TIMER           TIM3
 #define RCC_TIM_PPM         RCC_TIM3
+#define RST_TIM_PPM         RST_TIM3

 #elif USE_PPM_TIM4

 PRINT_CONFIG_MSG("Using TIM4 for PPM input.")
 #define PPM_TIMER           TIM4
 #define RCC_TIM_PPM         RCC_TIM4
+#define RST_TIM_PPM         RST_TIM4

 #elif USE_PPM_TIM5

 PRINT_CONFIG_MSG("Using TIM5 for PPM input.")
 #define PPM_TIMER           TIM5
 #define RCC_TIM_PPM         RCC_TIM5
+#define RST_TIM_PPM         RST_TIM5

 #elif USE_PPM_TIM8

 PRINT_CONFIG_MSG("Using TIM8 for PPM input.")
 #define PPM_TIMER           TIM8
 #define RCC_TIM_PPM         RCC_TIM8
+#define RST_TIM_PPM         RST_TIM8

 #elif USE_PPM_TIM9

 PRINT_CONFIG_MSG("Using TIM9 for PPM input.")
 #define PPM_TIMER           TIM9
 #define RCC_TIM_PPM         RCC_TIM9
+#define RST_TIM_PPM         RST_TIM9

 #elif USE_PPM_TIM12

 PRINT_CONFIG_MSG("Using TIM12 for PPM input.")
 #define PPM_TIMER           TIM12
 #define RCC_TIM_PPM         RCC_TIM12
+#define RST_TIM_PPM         RST_TIM12

 #else
 #error Unknown PPM input timer configuration.
@@ -117,7 +125,7 @@ void ppm_arch_init(void)
  gpio_setup_pin_af(PPM_GPIO_PORT, PPM_GPIO_PIN, PPM_GPIO_AF, FALSE);

  /* Time Base configuration */
-  timer_reset(PPM_TIMER);
+  rcc_periph_reset_pulse(RST_TIM_PPM);
  timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
                 TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
  timer_set_period(PPM_TIMER, 0xFFFF);
@@ -33,4 +33,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -32,4 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -30,4 +30,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -31,4 +31,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f4.ld
+INCLUDE cortex-m-generic.ld
@@ -32,5 +32,4 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
-
+INCLUDE cortex-m-generic.ld
@@ -33,5 +33,5 @@ MEMORY
 }

 /* Include the common ld script. */
-INCLUDE libopencm3_stm32f1.ld
+INCLUDE cortex-m-generic.ld

@@ -36,7 +36,7 @@
 #include <libopencm3/usb/cdc.h>
 #include <libopencm3/cm3/scb.h>
 #include <libopencm3/stm32/desig.h>
-#include <libopencm3/stm32/otg_fs.h>
+#include <libopencm3/usb/dwc/otg_fs.h>

 #include "mcu_periph/usb_serial.h"

@@ -230,7 +230,7 @@ uint8_t usbd_control_buffer[128];
 * CDC device control request
 * (from libopencm3 examples)
 */
-static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, uint8_t **buf,
+static enum usbd_request_return_codes cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, uint8_t **buf,
                                  uint16_t *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req))
 {
  (void)complete;
@@ -256,16 +256,16 @@ static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *
      local_buf[8] = req->wValue & 3;
      local_buf[9] = 0;
      usbd_ep_write_packet(usbd_dev, 0x83, local_buf, 10);
-      return 1;
+      return USBD_REQ_HANDLED;
    }
    case USB_CDC_REQ_SET_LINE_CODING:
      if (*len < sizeof(struct usb_cdc_line_coding)) {
-        return 0;
+        return USBD_REQ_NOTSUPP;
      }

-      return 1;
+      return USBD_REQ_HANDLED;
    default:
-      return 0;
+      return USBD_REQ_NOTSUPP;
  }
 }