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[stm32][f1][spi] fix gpio init slave mode

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see #1371
This commit is contained in:
Felix Ruess
2015-10-02 15:22:30 +02:00
parent b11577cc33
commit a4496a9fee
1 changed files with 10 additions and 24 deletions
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sw/airborne/arch/stm32/mcu_periph/spi_arch.c
+10 -24
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@@ -1248,18 +1248,11 @@ void spi1_slave_arch_init(void) {
rcc_periph_clock_enable(RCC_SPI1);
// Configure GPIOs: SCK, MISO and MOSI
// TODO configure lisa board files to use gpio_setup_pin_af function
gpio_set_mode(GPIO_BANK_SPI1_SCK, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT,
GPIO_SPI1_SCK | GPIO_SPI1_MOSI);
gpio_set_mode(GPIO_BANK_SPI1_MISO, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL,
GPIO_SPI1_MISO);
gpio_set_mode(GPIO_BANK_SPI1_NSS, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT,
GPIO_SPI1_NSS);
gpio_setup_pin_af(GPIO_BANK_SPI1_MISO, GPIO_SPI1_MISO, 0, TRUE);
gpio_setup_pin_af(GPIO_BANK_SPI1_MOSI, GPIO_SPI1_MOSI, 0, FALSE);
gpio_setup_pin_af(GPIO_BANK_SPI1_SCK, GPIO_SPI1_SCK, 0, FALSE);
// set NSS as input
gpio_setup_pin_af(GPIO_BANK_SPI1_NSS, GPIO_SPI1_NSS, 0, FALSE);
// reset SPI
spi_reset(SPI1);
@@ -1342,18 +1335,11 @@ void spi2_slave_arch_init(void) {
rcc_periph_clock_enable(RCC_SPI2);
// Configure GPIOs: SCK, MISO and MOSI
// TODO configure lisa board files to use gpio_setup_pin_af function
gpio_set_mode(GPIO_BANK_SPI2_SCK, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT,
GPIO_SPI2_SCK | GPIO_SPI2_MOSI);
gpio_set_mode(GPIO_BANK_SPI2_MISO, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL,
GPIO_SPI2_MISO);
gpio_set_mode(GPIO_BANK_SPI2_NSS, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT,
GPIO_SPI2_NSS);
gpio_setup_pin_af(GPIO_BANK_SPI2_MISO, GPIO_SPI1_MISO, 0, TRUE);
gpio_setup_pin_af(GPIO_BANK_SPI2_MOSI, GPIO_SPI2_MOSI, 0, FALSE);
gpio_setup_pin_af(GPIO_BANK_SPI2_SCK, GPIO_SPI2_SCK, 0, FALSE);
// set NSS as input
gpio_setup_pin_af(GPIO_BANK_SPI2_NSS, GPIO_SPI2_NSS, 0, FALSE);
// reset SPI
spi_reset(SPI2);