mirror of
https://github.com/paparazzi/paparazzi.git
synced 2026-06-05 23:49:00 +08:00
moving i2c automaton to hw
This commit is contained in:
Gautier Hattenberger
@@ -54,6 +54,65 @@ extern void i2c0_hw_init(void);
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#define I2c0ClearStart() { I2C0CONCLR = _BV(STAC); }
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#define I2c0ClearIT() { I2C0CONCLR = _BV(SIC); }
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#define I2c0Automaton(state) { \
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switch (state) { \
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case I2C_START: \
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case I2C_RESTART: \
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I2c0SendByte(i2c0_slave_addr); \
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I2c0ClearStart(); \
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i2c0_index = 0; \
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break; \
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case I2C_MR_DATA_ACK: \
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if (i2c0_index < i2c0_len_r) { \
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i2c0_buf[i2c0_index] = I2C_DATA_REG; \
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i2c0_index++; \
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I2c0Receive(i2c0_index < i2c0_len_r - 1); \
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} \
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else { \
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/* error , we should have got NACK */ \
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I2c0SendStop(); \
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} \
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break; \
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case I2C_MR_SLA_ACK: /* At least one char */ \
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/* Wait and reply with ACK or NACK */ \
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I2c0Receive(i2c0_index < i2c0_len_r - 1); \
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break; \
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case I2C_MR_SLA_NACK: \
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case I2C_MT_SLA_NACK: \
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I2c0SendStart(); \
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break; \
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case I2C_MT_SLA_ACK: \
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case I2C_MT_DATA_ACK: \
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if (i2c0_index < i2c0_len_w) { \
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I2c0SendByte(i2c0_buf[i2c0_index]); \
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i2c0_index++; \
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} else { \
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if (i2c0_trx) { \
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i2c0_trx = 0; \
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i2c0_index = 0; \
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i2c0_slave_addr |= 1; \
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I2c0SendStart(); \
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} else { \
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if (i2c0_stop_after_transmit) { \
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I2c0SendStop(); \
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} else { \
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I2c0Finished(); \
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} \
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} \
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} \
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break; \
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case I2C_MR_DATA_NACK: \
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if (i2c0_index < i2c0_len_r) { \
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i2c0_buf[i2c0_index] = I2C_DATA_REG; \
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} \
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I2c0SendStop(); \
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break; \
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default: \
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I2c0SendStop(); \
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/* FIXME log error */ \
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} \
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} \
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#endif /* USE_I2C0 */
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@@ -81,6 +140,88 @@ extern void i2c1_hw_init(void);
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#define I2c1ClearStart() { I2C1CONCLR = _BV(STAC); }
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#define I2c1ClearIT() { I2C1CONCLR = _BV(SIC); }
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#define I2c1Automaton(state) { \
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switch (state) { \
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case I2C_START: \
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case I2C_RESTART: \
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I2c1SendByte(i2c1_slave_addr); \
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I2c1ClearStart(); \
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i2c1_index = 0; \
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break; \
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case I2C_MR_DATA_ACK: \
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if (i2c1_index < i2c1_len_r) { \
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i2c1_buf[i2c1_index] = I2C1_DATA_REG; \
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i2c1_index++; \
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I2c1Receive(i2c1_index < i2c1_len_r - 1); \
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} \
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else { \
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/* error , we should have got NACK */ \
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I2c1SendStop(); \
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} \
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break; \
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case I2C_MR_SLA_ACK: /* At least one char */ \
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/* Wait and reply with ACK or NACK */ \
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I2c1Receive(i2c1_index < i2c1_len_r - 1); \
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break; \
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case I2C_MR_SLA_NACK: \
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case I2C_MT_SLA_NACK: \
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I2c1SendStart(); \
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break; \
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case I2C_MT_SLA_ACK: \
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case I2C_MT_DATA_ACK: \
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if (i2c1_index < i2c1_len_w) { \
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I2c1SendByte(i2c1_buf[i2c1_index]); \
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i2c1_index++; \
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} else { \
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if (i2c1_trx) { \
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i2c1_trx = 0; \
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i2c1_index = 0; \
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i2c1_slave_addr |= 1; \
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I2c1SendStart(); \
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} else { \
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I2c1SendStop(); \
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} \
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} \
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break; \
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case I2C_MR_DATA_NACK: \
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if (i2c1_index < i2c1_len_r) { \
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i2c1_buf[i2c1_index] = I2C1_DATA_REG; \
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} \
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I2c1SendStop(); \
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break; \
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default: \
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I2c1SendStop(); \
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/* LED_ON(2); FIXME log error */ \
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} \
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} \
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#endif /* USE_I2C1 */
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#ifdef USE_I2C2
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extern void i2c0_hw_init(void);
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#define I2c0SendAck() { I2C0CONSET = _BV(AA); }
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#define I2c0Finished() { \
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if (i2c0_finished) *i2c0_finished = TRUE; \
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i2c0_status = I2C_IDLE; \
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}
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#define I2c0SendStop() { \
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I2C0CONSET = _BV(STO); \
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I2c0Finished(); \
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}
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#define I2c0SendStart() { I2C0CONSET = _BV(STA); }
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#define I2c0SendByte(b) { I2C_DATA_REG = b; }
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#define I2c0Receive(_ack) { \
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if (_ack) I2C0CONSET = _BV(AA); \
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else I2C0CONCLR = _BV(AAC); \
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}
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#define I2c0ClearStart() { I2C0CONCLR = _BV(STAC); }
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#define I2c0ClearIT() { I2C0CONCLR = _BV(SIC); }
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#endif
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#endif /* I2C_HW_H */
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@@ -103,65 +103,6 @@ extern volatile uint8_t i2c0_trx;
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extern volatile bool_t* i2c0_finished;
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#define I2c0Automaton(state) { \
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switch (state) { \
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case I2C_START: \
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case I2C_RESTART: \
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I2c0SendByte(i2c0_slave_addr); \
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I2c0ClearStart(); \
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i2c0_index = 0; \
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break; \
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case I2C_MR_DATA_ACK: \
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if (i2c0_index < i2c0_len_r) { \
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i2c0_buf[i2c0_index] = I2C_DATA_REG; \
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i2c0_index++; \
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I2c0Receive(i2c0_index < i2c0_len_r - 1); \
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} \
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else { \
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/* error , we should have got NACK */ \
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I2c0SendStop(); \
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} \
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break; \
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case I2C_MR_SLA_ACK: /* At least one char */ \
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/* Wait and reply with ACK or NACK */ \
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I2c0Receive(i2c0_index < i2c0_len_r - 1); \
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break; \
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case I2C_MR_SLA_NACK: \
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case I2C_MT_SLA_NACK: \
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I2c0SendStart(); \
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break; \
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case I2C_MT_SLA_ACK: \
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case I2C_MT_DATA_ACK: \
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if (i2c0_index < i2c0_len_w) { \
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I2c0SendByte(i2c0_buf[i2c0_index]); \
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i2c0_index++; \
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} else { \
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if (i2c0_trx) { \
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i2c0_trx = 0; \
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i2c0_index = 0; \
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i2c0_slave_addr |= 1; \
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I2c0SendStart(); \
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} else { \
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if (i2c0_stop_after_transmit) { \
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I2c0SendStop(); \
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} else { \
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I2c0Finished(); \
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} \
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} \
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} \
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break; \
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case I2C_MR_DATA_NACK: \
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if (i2c0_index < i2c0_len_r) { \
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i2c0_buf[i2c0_index] = I2C_DATA_REG; \
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} \
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I2c0SendStop(); \
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break; \
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default: \
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I2c0SendStop(); \
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/* FIXME log error */ \
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} \
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} \
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#endif /* USE_I2C0 */
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#ifdef USE_I2C1
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@@ -187,61 +128,6 @@ extern volatile uint8_t i2c1_trx;
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extern volatile bool_t* i2c1_finished;
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#define I2c1Automaton(state) { \
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switch (state) { \
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case I2C_START: \
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case I2C_RESTART: \
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I2c1SendByte(i2c1_slave_addr); \
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I2c1ClearStart(); \
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i2c1_index = 0; \
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break; \
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case I2C_MR_DATA_ACK: \
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if (i2c1_index < i2c1_len_r) { \
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i2c1_buf[i2c1_index] = I2C1_DATA_REG; \
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i2c1_index++; \
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I2c1Receive(i2c1_index < i2c1_len_r - 1); \
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} \
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else { \
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/* error , we should have got NACK */ \
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I2c1SendStop(); \
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} \
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break; \
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case I2C_MR_SLA_ACK: /* At least one char */ \
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/* Wait and reply with ACK or NACK */ \
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I2c1Receive(i2c1_index < i2c1_len_r - 1); \
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break; \
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case I2C_MR_SLA_NACK: \
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case I2C_MT_SLA_NACK: \
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I2c1SendStart(); \
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break; \
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case I2C_MT_SLA_ACK: \
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case I2C_MT_DATA_ACK: \
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if (i2c1_index < i2c1_len_w) { \
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I2c1SendByte(i2c1_buf[i2c1_index]); \
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i2c1_index++; \
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} else { \
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if (i2c1_trx) { \
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i2c1_trx = 0; \
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i2c1_index = 0; \
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i2c1_slave_addr |= 1; \
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I2c1SendStart(); \
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} else { \
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I2c1SendStop(); \
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} \
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} \
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break; \
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case I2C_MR_DATA_NACK: \
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if (i2c1_index < i2c1_len_r) { \
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i2c1_buf[i2c1_index] = I2C1_DATA_REG; \
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} \
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I2c1SendStop(); \
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break; \
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default: \
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I2c1SendStop(); \
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/* LED_ON(2); FIXME log error */ \
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} \
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} \
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#endif /* USE_I2C1 */
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