[stm32] F4: fix ppm input timer frequency for TIM2

- krooz: don't use TIM2 for PWM
- change to 6 ticks per usec to fit all frequencies
- on the F1 we assume to run at 72MHz for HCLK and both timer clocks
  TIM1 -> APB2 = HCLK = 72MHz
  TIM2 -> 2 * APB1 = 2 * 36MHz = 72MHz
- on the F4 we assume 2 * AHB clock:
  TIM1 -> 2 * APB2 = 168MHz
  TIM2 -> 2 * APB1 = 84MHz

closes #470
This commit is contained in:
Felix Ruess
2013-07-09 11:34:43 +02:00
parent 72ce97b0da
commit 82707b869b
3 changed files with 43 additions and 8 deletions
@@ -52,6 +52,20 @@ uint32_t ppm_last_pulse_time;
bool_t ppm_data_valid;
static uint32_t timer_rollover_cnt;
/*
* Timer clock frequency (before prescaling) is twice the frequency
* of the APB domain to which the timer is connected.
*/
#ifdef STM32F1
/**
* HCLK = 72MHz, Timer clock also 72MHz since
* TIM1_CLK = APB2 = 72MHz
* TIM2_CLK = 2 * APB1 = 2 * 32MHz
*/
#define PPM_TIMER_CLK AHB_CLK
#endif
#if USE_PPM_TIM2
PRINT_CONFIG_MSG("Using TIM2 for PPM input.")
@@ -60,6 +74,14 @@ PRINT_CONFIG_MSG("Using TIM2 for PPM input.")
#define PPM_PERIPHERAL RCC_APB1ENR_TIM2EN
#define PPM_TIMER TIM2
#ifdef STM32F4
/* Since APB prescaler != 1 :
* Timer clock frequency (before prescaling) is twice the frequency
* of the APB domain to which the timer is connected.
*/
#define PPM_TIMER_CLK (rcc_ppre1_frequency * 2)
#endif
#elif USE_PPM_TIM1
PRINT_CONFIG_MSG("Using TIM1 for PPM input.")
@@ -68,6 +90,12 @@ PRINT_CONFIG_MSG("Using TIM1 for PPM input.")
#define PPM_PERIPHERAL RCC_APB2ENR_TIM1EN
#define PPM_TIMER TIM1
#ifdef STM32F4
#define PPM_TIMER_CLK (rcc_ppre2_frequency * 2)
#endif
#else
#error Unknown PPM input timer configuration.
#endif
void ppm_arch_init ( void ) {
@@ -86,7 +114,7 @@ void ppm_arch_init ( void ) {
timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(PPM_TIMER, 0xFFFF);
timer_set_prescaler(PPM_TIMER, (AHB_CLK / (RC_PPM_TICKS_PER_USEC*ONE_MHZ_CLK)) - 1);
timer_set_prescaler(PPM_TIMER, (PPM_TIMER_CLK / (RC_PPM_TICKS_PER_USEC*ONE_MHZ_CLK)) - 1);
/* TIM configuration: Input Capture mode ---------------------
The Rising edge is used as active edge
@@ -96,7 +124,7 @@ void ppm_arch_init ( void ) {
#elif defined PPM_PULSE_TYPE && PPM_PULSE_TYPE == PPM_PULSE_TYPE_NEGATIVE
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_FALLING);
#else
#error "Unknown PM_PULSE_TYPE"
#error "Unknown PPM_PULSE_TYPE"
#endif
timer_ic_set_input(PPM_TIMER, PPM_CHANNEL, PPM_TIMER_INPUT);
timer_ic_set_prescaler(PPM_TIMER, PPM_CHANNEL, TIM_IC_PSC_OFF);
@@ -33,10 +33,17 @@
#include "mcu_periph/sys_time.h"
/**
* The ppm counter is running at cpu freq / 72 or 168 / 8
* so the counter has 1/8 us resolution
* The ppm counter is set-up to have 1/6 us resolution.
*
* The timer clock frequency (before prescaling):
* STM32F1:
* TIM1 -> APB2 = HCLK = 72MHz
* TIM2 -> 2 * APB1 = 2 * 36MHz = 72MHz
* STM32F4:
* TIM1 -> 2 * APB2 = 2 * 84MHz = 168MHz
* TIM2 -> 2 * APB1 = 2 * 42MHz = 84MHz
*/
#define RC_PPM_TICKS_PER_USEC 8
#define RC_PPM_TICKS_PER_USEC 6
#define RC_PPM_TICKS_OF_USEC(_v) ((_v)*RC_PPM_TICKS_PER_USEC)
#define RC_PPM_SIGNED_TICKS_OF_USEC(_v) (int32_t)((_v)*RC_PPM_TICKS_PER_USEC)
+3 -3
View File
@@ -3,7 +3,7 @@
#define BOARD_KROOZ
/* Krooz/M has a 12MHz external clock and 168MHz internal. */
/* KroozSD has a 12MHz external clock and 168MHz internal. */
#define EXT_CLK 12000000
#define AHB_CLK 168000000
@@ -210,7 +210,7 @@
#define BOARD_HAS_BARO 1
/* PWM */
#define PWM_USE_TIM2 1
//#define PWM_USE_TIM2 1
#define PWM_USE_TIM3 1
#define PWM_USE_TIM4 1
#define PWM_USE_TIM5 1
@@ -383,7 +383,7 @@
#define USE_PPM_TIM2 1
#define PPM_CHANNEL TIM_IC2
#define PPM_TIMER_INPUT TIM_IC_IN_TI1
#define PPM_TIMER_INPUT TIM_IC_IN_TI2
#define PPM_IRQ NVIC_TIM2_IRQ
//#define PPM_IRQ2 NVIC_TIM2_UP_TIM10_IRQ
// Capture/Compare InteruptEnable and InterruptFlag