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[stm32] hack to make UART4/5 work with spektrum macros

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Since UART4/5 is already defined in libopencm3 the macros don't work for those.
(Compared to e.g. UART1 which is actually USART1 in libopencm3).

So just define RADIO_CONTROL_SPEKTRUM_[PRIMARY|SECONDARY]_PORT to SPEKTRUM_UARTx instead of UARTx.
This makes it at least possible to configure the secondary spektrum port (UART5 on Lisa) properly.
This commit is contained in:
Felix Ruess
2013-04-29 21:42:29 +02:00
parent 23881847e3
commit 7ddd1d60b5
4 changed files with 101 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files
conf/firmwares/subsystems/shared/radio_control_spektrum.makefile
+2 -2
View File
@@ -13,13 +13,13 @@ endif
ifneq ($(RADIO_CONTROL_LED),none)
ap.CFLAGS += -DRADIO_CONTROL_LED=$(RADIO_CONTROL_LED)
endif
ap.CFLAGS += -DRADIO_CONTROL_SPEKTRUM_PRIMARY_PORT=$(RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT)
ap.CFLAGS += -DRADIO_CONTROL_SPEKTRUM_PRIMARY_PORT=SPEKTRUM_$(RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT)
ap.CFLAGS += -DOVERRIDE_$(RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT)_IRQ_HANDLER -DUSE_TIM6_IRQ
# enable the second spektrum port if so configured
ifdef USE_SECONDARY_SPEKTRUM_RECEIVER
ifneq ($(USE_SECONDARY_SPEKTRUM_RECEIVER),0)
ap.CFLAGS += -DRADIO_CONTROL_SPEKTRUM_SECONDARY_PORT=$(RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT)
ap.CFLAGS += -DRADIO_CONTROL_SPEKTRUM_SECONDARY_PORT=SPEKTRUM_$(RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT)
ap.CFLAGS += -DOVERRIDE_$(RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT)_IRQ_HANDLER
endif
endif
sw/airborne/arch/stm32/subsystems/radio_control/spektrum_arch.c
+29 -27
View File
@@ -536,31 +536,33 @@ void SpektrumUartInit(void) {
#ifdef RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT
/* init RCC */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPDEN);
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_UART5EN);
rcc_peripheral_enable_clock(&RCC_APB2ENR, SecondaryUart(_RCC_GPIO));
rcc_peripheral_enable_clock(SecondaryUart(_RCC_REG), SecondaryUart(_RCC_DEV));
/* Enable USART interrupts */
nvic_set_priority(NVIC_UART5_IRQ, 3);
nvic_enable_irq(NVIC_UART5_IRQ);
nvic_set_priority(SecondaryUart(_IRQ), 3);
nvic_enable_irq(SecondaryUart(_IRQ));
/* Init GPIOS */;
/* Secondary UART Rx pin as floating input */
gpio_set_mode(GPIO_BANK_UART5_RX, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT, GPIO_UART5_RX);
gpio_set_mode(SecondaryUart(_BANK), GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT, SecondaryUart(_PIN));
SecondaryUart(_REMAP);
/* Configure secondary UART */
usart_set_baudrate(UART5, 115200);
usart_set_databits(UART5, 8);
usart_set_stopbits(UART5, USART_STOPBITS_1);
usart_set_parity(UART5, USART_PARITY_NONE);
usart_set_flow_control(UART5, USART_FLOWCONTROL_NONE);
usart_set_mode(UART5, USART_MODE_RX);
usart_set_baudrate(SecondaryUart(_DEV), 115200);
usart_set_databits(SecondaryUart(_DEV), 8);
usart_set_stopbits(SecondaryUart(_DEV), USART_STOPBITS_1);
usart_set_parity(SecondaryUart(_DEV), USART_PARITY_NONE);
usart_set_flow_control(SecondaryUart(_DEV), USART_FLOWCONTROL_NONE);
usart_set_mode(SecondaryUart(_DEV), USART_MODE_RX);
/* Enable Secondary UART Receive interrupts */
USART_CR1(UART5) |= USART_CR1_RXNEIE;
USART_CR1(SecondaryUart(_DEV)) |= USART_CR1_RXNEIE;
/* Enable the Primary UART */
usart_enable(UART5);
usart_enable(SecondaryUart(_DEV));
#endif
}
@@ -593,16 +595,16 @@ void PrimaryUart(_ISR)(void) {
*
*****************************************************************************/
#ifdef RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT
void uart5_isr(void) {
void SecondaryUart(_ISR)(void) {
if (((USART_CR1(UART5) & USART_CR1_TXEIE) != 0) &&
((USART_SR(UART5) & USART_SR_TXE) != 0)) {
USART_CR1(UART5) &= ~USART_CR1_TXEIE;
if (((USART_CR1(SecondaryUart(_DEV)) & USART_CR1_TXEIE) != 0) &&
((USART_SR(SecondaryUart(_DEV)) & USART_SR_TXE) != 0)) {
USART_CR1(SecondaryUart(_DEV)) &= ~USART_CR1_TXEIE;
}
if (((USART_CR1(UART5) & USART_CR1_RXNEIE) != 0) &&
((USART_SR(UART5) & USART_SR_RXNE) != 0)) {
uint8_t b = usart_recv(UART5);
if (((USART_CR1(SecondaryUart(_DEV)) & USART_CR1_RXNEIE) != 0) &&
((USART_SR(SecondaryUart(_DEV)) & USART_SR_RXNE) != 0)) {
uint8_t b = usart_recv(SecondaryUart(_DEV));
SpektrumParser(b, &SecondarySpektrumState, TRUE);
}
@@ -667,14 +669,14 @@ void radio_control_spektrum_try_bind(void) {
#ifdef RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPDEN);
rcc_peripheral_enable_clock(&RCC_APB2ENR, SecondaryUart(_RCC_GPIO));
/* Slave receiver Rx push-pull */
gpio_set_mode(GPIO_BANK_UART5_RX, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL, GPIO_UART5_RX);
gpio_set_mode(SecondaryUart(_BANK), GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL, SecondaryUart(_PIN));
/* Slave receiver RX line, drive high */
gpio_set(GPIO_BANK_UART5_RX, GPIO_UART5_RX);
gpio_set(SecondaryUart(_BANK), SecondaryUart(_PIN));
#endif
/* We have no idea how long the window for allowing binding after
@@ -692,9 +694,9 @@ void radio_control_spektrum_try_bind(void) {
#ifdef RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT
for (int i = 0; i < SLAVE_RECEIVER_PULSES; i++)
{
gpio_clear(GPIO_BANK_UART5_RX, GPIO_UART5_RX);
gpio_clear(SecondaryUart(_BANK), SecondaryUart(_PIN));
DelayUs(120);
gpio_set(GPIO_BANK_UART5_RX, GPIO_UART5_RX);
gpio_set(SecondaryUart(_BANK), SecondaryUart(_PIN));
DelayUs(120);
}
#endif /* RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT */
sw/airborne/boards/lisa_l_1.0.h
+40
View File
@@ -38,6 +38,46 @@
#define SPI_SELECT_SLAVE4_PORT GPIOC
#define SPI_SELECT_SLAVE4_PIN GPIO12
/*
* Spektrum
*/
/* The line that is pulled low at power up to initiate the bind process */
#define SPEKTRUM_BIND_PIN GPIO3
#define SPEKTRUM_BIND_PIN_PORT GPIOC
#define SPEKTRUM_BIND_PIN_RCC_IOP RCC_APB2ENR_IOPCEN
#define SPEKTRUM_UART1_RCC_GPIO RCC_APB2ENR_IOPAEN
#define SPEKTRUM_UART1_RCC_REG &RCC_APB2ENR
#define SPEKTRUM_UART1_RCC_DEV RCC_APB2ENR_USART1EN
#define SPEKTRUM_UART1_BANK GPIO_BANK_USART1_RX
#define SPEKTRUM_UART1_PIN GPIO_USART1_RX
#define SPEKTRUM_UART1_IRQ NVIC_USART1_IRQ
#define SPEKTRUM_UART1_ISR usart1_isr
#define SPEKTRUM_UART1_DEV USART1
#define SPEKTRUM_UART1_REMAP {}
#define SPEKTRUM_UART3_RCC_GPIO RCC_APB2ENR_IOPCEN
#define SPEKTRUM_UART3_RCC_REG &RCC_APB1ENR
#define SPEKTRUM_UART3_RCC_DEV RCC_APB1ENR_USART3EN
#define SPEKTRUM_UART3_BANK GPIO_BANK_USART3_PR_RX
#define SPEKTRUM_UART3_PIN GPIO_USART3_PR_RX
#define SPEKTRUM_UART3_IRQ NVIC_USART3_IRQ
#define SPEKTRUM_UART3_ISR usart3_isr
#define SPEKTRUM_UART3_DEV USART3
#define SPEKTRUM_UART3_REMAP {AFIO_MAPR |= AFIO_MAPR_USART3_REMAP_PARTIAL_REMAP;}
#define SPEKTRUM_UART5_RCC_GPIO RCC_APB2ENR_IOPDEN
#define SPEKTRUM_UART5_RCC_REG &RCC_APB1ENR
#define SPEKTRUM_UART5_RCC_DEV RCC_APB1ENR_UART5EN
#define SPEKTRUM_UART5_BANK GPIO_BANK_UART5_RX
#define SPEKTRUM_UART5_PIN GPIO_UART5_RX
#define SPEKTRUM_UART5_IRQ NVIC_UART5_IRQ
#define SPEKTRUM_UART5_ISR uart5_isr
#define SPEKTRUM_UART5_DEV UART5
#define SPEKTRUM_UART5_REMAP {}
/*
* PPM input
*/
sw/airborne/boards/lisa_m_common.h
+30 -23
View File
@@ -29,29 +29,6 @@
#define SPI_SELECT_SLAVE5_PORT GPIOC
#define SPI_SELECT_SLAVE5_PIN GPIO4
/*
* UART
*/
#define UART1_RCC_GPIO RCC_APB2ENR_IOPAEN
#define UART1_RCC_REG &RCC_APB2ENR
#define UART1_RCC_DEV RCC_APB2ENR_USART1EN
#define UART1_BANK GPIO_BANK_USART1_RX
#define UART1_PIN GPIO_USART1_RX
#define UART1_IRQ NVIC_USART1_IRQ
#define UART1_ISR usart1_isr
#define UART1_DEV USART1
#define UART1_REMAP {}
#define UART3_RCC_GPIO RCC_APB2ENR_IOPCEN
#define UART3_RCC_REG &RCC_APB1ENR
#define UART3_RCC_DEV RCC_APB1ENR_USART3EN
#define UART3_BANK GPIO_BANK_USART3_PR_RX
#define UART3_PIN GPIO_USART3_PR_RX
#define UART3_IRQ NVIC_USART3_IRQ
#define UART3_ISR usart3_isr
#define UART3_DEV USART3
#define UART3_REMAP {AFIO_MAPR |= AFIO_MAPR_USART3_REMAP_PARTIAL_REMAP;}
/*
* Spektrum
@@ -61,6 +38,36 @@
#define SPEKTRUM_BIND_PIN_PORT GPIOC
#define SPEKTRUM_BIND_PIN_RCC_IOP RCC_APB2ENR_IOPCEN
#define SPEKTRUM_UART1_RCC_GPIO RCC_APB2ENR_IOPAEN
#define SPEKTRUM_UART1_RCC_REG &RCC_APB2ENR
#define SPEKTRUM_UART1_RCC_DEV RCC_APB2ENR_USART1EN
#define SPEKTRUM_UART1_BANK GPIO_BANK_USART1_RX
#define SPEKTRUM_UART1_PIN GPIO_USART1_RX
#define SPEKTRUM_UART1_IRQ NVIC_USART1_IRQ
#define SPEKTRUM_UART1_ISR usart1_isr
#define SPEKTRUM_UART1_DEV USART1
#define SPEKTRUM_UART1_REMAP {}
#define SPEKTRUM_UART3_RCC_GPIO RCC_APB2ENR_IOPCEN
#define SPEKTRUM_UART3_RCC_REG &RCC_APB1ENR
#define SPEKTRUM_UART3_RCC_DEV RCC_APB1ENR_USART3EN
#define SPEKTRUM_UART3_BANK GPIO_BANK_USART3_PR_RX
#define SPEKTRUM_UART3_PIN GPIO_USART3_PR_RX
#define SPEKTRUM_UART3_IRQ NVIC_USART3_IRQ
#define SPEKTRUM_UART3_ISR usart3_isr
#define SPEKTRUM_UART3_DEV USART3
#define SPEKTRUM_UART3_REMAP {AFIO_MAPR |= AFIO_MAPR_USART3_REMAP_PARTIAL_REMAP;}
#define SPEKTRUM_UART5_RCC_GPIO RCC_APB2ENR_IOPDEN
#define SPEKTRUM_UART5_RCC_REG &RCC_APB1ENR
#define SPEKTRUM_UART5_RCC_DEV RCC_APB1ENR_UART5EN
#define SPEKTRUM_UART5_BANK GPIO_BANK_UART5_RX
#define SPEKTRUM_UART5_PIN GPIO_UART5_RX
#define SPEKTRUM_UART5_IRQ NVIC_UART5_IRQ
#define SPEKTRUM_UART5_ISR uart5_isr
#define SPEKTRUM_UART5_DEV UART5
#define SPEKTRUM_UART5_REMAP {}
/* PPM
*