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Ported ppm radio control driver to libopencm3.

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This commit is contained in:
Piotr Esden-Tempski
2012-04-24 17:02:00 +02:00
parent 7310881816
commit 73550d0ffd
1 changed files with 31 additions and 48 deletions
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sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c
+31 -48
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@@ -27,6 +27,7 @@
#include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/f1/gpio.h>
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/nvic.h>
#include "mcu_periph/sys_time.h"
@@ -45,81 +46,63 @@ void tim2_isr(void);
void ppm_arch_init ( void ) {
#warning "Needs porting to libopencm3"
#if 0
/* TIM2 channel 2 pin (PA.01) configuration */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* TIM2 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN);
/* GPIOA clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
/* TIM2 channel 2 pin (PA.01) configuration */
gpio_set_mode(GPIOA, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT, GPIO1);
/* Time Base configuration */
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = 0x8;
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
timer_reset(TIM2);
timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(TIM2, 0xFFFF);
timer_set_prescaler(TIM2, 0x8);
/* TIM2 configuration: Input Capture mode ---------------------
The external signal is connected to TIM2 CH2 pin (PA.01)
The Rising edge is used as active edge,
------------------------------------------------------------ */
TIM_ICInitTypeDef TIM_ICInitStructure;
TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;
TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
TIM_ICInitStructure.TIM_ICFilter = 0x00;
TIM_ICInit(TIM2, &TIM_ICInitStructure);
timer_ic_set_polarity(TIM2, TIM_IC2, TIM_IC_RISING);
timer_ic_set_input(TIM2, TIM_IC2, TIM_IC_IN_TI2);
timer_ic_set_prescaler(TIM2, TIM_IC2, TIM_IC_PSC_OFF);
timer_ic_set_filter(TIM2, TIM_IC2, TIM_IC_OFF);
/* Enable the TIM2 global Interrupt */
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable the TIM2 global Interrupt. */
nvic_set_priority(NVIC_TIM2_IRQ, 2);
nvic_enable_irq(NVIC_TIM2_IRQ);
/* Enable the CC2 and Update interrupt requests. */
timer_enable_irq(TIM2, TIM_DIER_CC2IE | TIM_DIER_UIE);
/* Enable capture channel. */
timer_ic_enable(TIM2, TIM_IC2);
/* TIM2 enable counter */
TIM_Cmd(TIM2, ENABLE);
/* Enable the CC2 Interrupt Request */
TIM_ITConfig(TIM2, TIM_IT_CC2|TIM_IT_Update, ENABLE);
timer_enable_counter(TIM2);
ppm_last_pulse_time = 0;
ppm_cur_pulse = RADIO_CONTROL_NB_CHANNEL;
timer_rollover_cnt = 0;
#endif
}
void tim2_isr(void) {
#if 0
if(TIM_GetITStatus(TIM2, TIM_IT_CC2) == SET) {
TIM_ClearITPendingBit(TIM2, TIM_IT_CC2);
if((TIM2_SR & TIM_SR_CC2IF) != 0) {
timer_clear_flag(TIM2, TIM_SR_CC2IF);
uint32_t now = TIM_GetCapture2(TIM2) + timer_rollover_cnt;
uint32_t now = timer_get_counter(TIM2) + timer_rollover_cnt;
DecodePpmFrame(now);
}
else if(TIM_GetITStatus(TIM2, TIM_IT_Update) == SET) {
else if((TIM2_SR & TIM_SR_UIF) != 0) {
timer_rollover_cnt+=(1<<16);
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
timer_clear_flag(TIM2, TIM_SR_UIF);
}
#endif
}