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added a second reset procedure in case of crc error - this one is less tested

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I put it as default. I left the other one in an ifdef in case you prefer safety to testing new code
This commit is contained in:
Antoine Drouin
2010-08-11 17:51:30 +00:00
parent 680d733e60
commit 6a175eac61
1 changed files with 73 additions and 17 deletions
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sw/airborne/lisa/arch/stm32/lisa_overo_link_arch.h
+73 -17
View File
@@ -4,14 +4,63 @@
#include <stm32/spi.h>
#if 1
/*
*
* This is the version that got less tested
*
*/
#define OveroLinkEvent(_data_received_handler, _crc_failed_handler) { \
if (overo_link.status == DATA_AVAILABLE) { /* set by DMA interrupt */ \
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE)==RESET); \
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); \
uint8_t foo1 __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI1); \
overo_link.timeout = 0; \
if((SPI_I2S_GetFlagStatus(SPI1, SPI_FLAG_CRCERR)) == RESET) { \
LED_TOGGLE(OVERO_LINK_LED_OK); \
LED_OFF(OVERO_LINK_LED_KO); \
overo_link.msg_cnt++; \
_data_received_handler(); \
overo_link_arch_prepare_next_transfert(); \
} \
else { \
LED_OFF(OVERO_LINK_LED_OK); \
LED_ON(OVERO_LINK_LED_KO); \
overo_link.crc_err_cnt++; \
overo_link.crc_error = TRUE; \
_crc_failed_handler(); \
} \
overo_link.status = IDLE; \
} \
if (overo_link.crc_error && /* if we've had a bad crc */ \
!GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_4)) { /* and we're not selected anymore */ \
uint8_t foo2 __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI1); \
foo2 = SPI_I2S_ReceiveData(SPI1); \
violently_reset_spi(); \
overo_link_arch_prepare_next_transfert(); \
overo_link.crc_error = FALSE; \
} \
}
#else
/*
*
* This is the version that works
*
*/
#define OveroLinkEvent(_data_received_handler, _crc_failed_handler) { \
if (overo_link.status == DATA_AVAILABLE) { \
overo_link.timeout = 0; \
/* FIXME : we should probably add a limit here and do something */\
/* FIXME : we should probably add a limit here and do something */ \
/* radical in case we exceed it */ \
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE)==RESET); \
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY)==SET); \
uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI1); \
uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI1); \
if((SPI_I2S_GetFlagStatus(SPI1, SPI_FLAG_CRCERR)) == RESET) { \
LED_TOGGLE(OVERO_LINK_LED_OK); \
LED_OFF(OVERO_LINK_LED_KO); \
@@ -25,25 +74,32 @@
/* probably want a limit here */ \
while (!GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_4)); \
uint8_t foo2 __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI1); \
SPI_I2S_DeInit(SPI1); \
SPI_Cmd(SPI1, DISABLE); \
SPI_InitTypeDef SPI_InitStructure; \
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; \
SPI_InitStructure.SPI_Mode = SPI_Mode_Slave; \
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; \
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; \
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; \
SPI_InitStructure.SPI_NSS = SPI_NSS_Hard; \
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; \
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; \
SPI_InitStructure.SPI_CRCPolynomial = 0x31; \
SPI_Init(SPI1, &SPI_InitStructure); \
SPI_CalculateCRC(SPI1, ENABLE); \
SPI_Cmd(SPI1, ENABLE); \
violently_reset_spi(); \
} \
overo_link_arch_prepare_next_transfert(); \
overo_link.status = IDLE; \
} \
}
#endif
#define violently_reset_spi() { \
SPI_I2S_DeInit(SPI1); \
SPI_Cmd(SPI1, DISABLE); \
SPI_InitTypeDef SPI_InitStructure; \
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; \
SPI_InitStructure.SPI_Mode = SPI_Mode_Slave; \
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; \
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; \
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; \
SPI_InitStructure.SPI_NSS = SPI_NSS_Hard; \
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; \
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; \
SPI_InitStructure.SPI_CRCPolynomial = 0x31; \
SPI_Init(SPI1, &SPI_InitStructure); \
SPI_CalculateCRC(SPI1, ENABLE); \
SPI_Cmd(SPI1, ENABLE); \
}
#endif /* LISA_OVERO_LINK_ARCH_H */