mirror of
https://github.com/paparazzi/paparazzi.git
synced 2026-05-22 12:28:03 +08:00
adding preliminary support for sc18is600 spi to I2C converter
This commit is contained in:
Antoine Drouin
@@ -0,0 +1,283 @@
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#include "peripherals/booz_sc18is600.h"
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#include <stm32/rcc.h>
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#include <stm32/spi.h>
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#include <stm32/exti.h>
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#include <stm32/misc.h>
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#include <stm32/dma.h>
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#include <stm32/gpio.h>
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/* commands definition */
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#define Sc18Is600_Cmd_Write 0x00
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#define Sc18Is600_Cmd_Read 0x01
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#define Sc18Is600_Cmd_Read_After_Write 0x02
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#define Sc18Is600_Cmd_Write_After_Write 0x03
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#define Sc18Is600_Cmd_Read_Buffer 0x06
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#define Sc18Is600_Cmd_Write_To_Reg 0x20
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#define Sc18Is600_Cmd_Read_From_Reg 0x21
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#define Sc18Is600_Cmd_Power_Down 0x30
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extern void exti2_irq_handler(void);
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extern void dma1_c4_irq_handler(void);
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static inline void sc18is600_setup_SPI_DMA(uint8_t _len);
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void sc18is600_arch_init(void) {
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/* set slave select as output and assert it ( on PB12) */
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Sc18Is600Unselect();
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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/* configure external interrupt exti2 on PD2( data ready ) */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_AFIO, ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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EXTI_InitTypeDef EXTI_InitStructure;
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GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource2);
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EXTI_InitStructure.EXTI_Line = EXTI_Line2;
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EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
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EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
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EXTI_InitStructure.EXTI_LineCmd = ENABLE;
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EXTI_Init(&EXTI_InitStructure);
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = EXTI2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Enable DMA1 channel4 IRQ Channel */
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NVIC_InitTypeDef NVIC_init_struct = {
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.NVIC_IRQChannel = DMA1_Channel4_IRQn,
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.NVIC_IRQChannelPreemptionPriority = 0,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE
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};
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NVIC_Init(&NVIC_init_struct);
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/* Enable SPI2 Periph clock -------------------------------------------------*/
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
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/* Configure GPIOs: SCK, MISO and MOSI --------------------------------*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
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/* configure SPI */
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SPI_InitTypeDef SPI_InitStructure;
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SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
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SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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SPI_Init(SPI2, &SPI_InitStructure);
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/* Enable SPI */
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SPI_Cmd(SPI2, ENABLE);
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/* Enable SPI_2 DMA clock ---------------------------------------------------*/
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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}
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static inline void sc18is600_setup_SPI_DMA(uint8_t _len) {
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/* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
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DMA_DeInit(DMA1_Channel4);
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DMA_InitTypeDef DMA_initStructure_4 = {
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.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
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.DMA_MemoryBaseAddr = (uint32_t)sc18is600.priv_rx_buf,
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.DMA_DIR = DMA_DIR_PeripheralSRC,
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.DMA_BufferSize = _len,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_VeryHigh,
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.DMA_M2M = DMA_M2M_Disable
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};
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DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
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/* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
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DMA_DeInit(DMA1_Channel5);
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DMA_InitTypeDef DMA_initStructure_5 = {
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.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
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.DMA_MemoryBaseAddr = (uint32_t)sc18is600.priv_tx_buf,
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.DMA_DIR = DMA_DIR_PeripheralDST,
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.DMA_BufferSize = _len,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_Medium,
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.DMA_M2M = DMA_M2M_Disable
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};
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DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
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/* Enable SPI_2 Rx request */
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
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/* Enable DMA1 Channel4 */
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DMA_Cmd(DMA1_Channel4, ENABLE);
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/* Enable SPI_2 Tx request */
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
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/* Enable DMA1 Channel5 */
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DMA_Cmd(DMA1_Channel5, ENABLE);
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/* Enable DMA1 Channel4 Transfer Complete interrupt */
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DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
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}
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void sc18is600_transmit(uint8_t addr, uint8_t len) {
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sc18is600.transaction = Sc18Is600Transmit;
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sc18is600.status = Sc18Is600SendingRequest;
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Write; // write command
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sc18is600.priv_tx_buf[1] = len;
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sc18is600.priv_tx_buf[2] = addr;
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Sc18Is600Select();
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sc18is600_setup_SPI_DMA(len+3);
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}
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void sc18is600_receive(uint8_t addr, uint8_t len) {
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}
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void sc18is600_tranceive(uint8_t addr, uint8_t len_tx, uint8_t len_rx) {
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sc18is600.transaction = Sc18Is600Transcieve;
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sc18is600.status = Sc18Is600SendingRequest;
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sc18is600.rx_len = len_rx;
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Read_After_Write; // read after write command
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sc18is600.priv_tx_buf[1] = len_tx;
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sc18is600.priv_tx_buf[2] = len_rx;
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sc18is600.priv_tx_buf[3] = addr;
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sc18is600.priv_tx_buf[4+len_tx] = addr;
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Sc18Is600Select();
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sc18is600_setup_SPI_DMA(len_tx+5);
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}
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void sc18is600_write_to_register(uint8_t addr, uint8_t value) {
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sc18is600.transaction = Sc18Is600WriteRegister;
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sc18is600.status = Sc18Is600SendingRequest;
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Write_To_Reg; // write to register
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sc18is600.priv_tx_buf[1] = addr;
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sc18is600.priv_tx_buf[2] = value;
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Sc18Is600Select();
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sc18is600_setup_SPI_DMA(3);
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}
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void sc18is600_read_from_register(uint8_t addr) {
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sc18is600.transaction = Sc18Is600ReadRegister;
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sc18is600.status = Sc18Is600SendingRequest;
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Read_From_Reg; // read from register
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sc18is600.priv_tx_buf[1] = addr;
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sc18is600.priv_tx_buf[2] = 0;
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Sc18Is600Select();
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sc18is600_setup_SPI_DMA(3);
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}
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#define ReadI2CStatReg() { \
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Read_From_Reg; \
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sc18is600.priv_tx_buf[1] = Sc18Is600_I2CStat; \
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sc18is600.priv_tx_buf[2] = 0; \
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Sc18Is600Select(); \
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sc18is600_setup_SPI_DMA(3); \
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}
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void exti2_irq_handler(void) {
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/* clear EXTI */
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if(EXTI_GetITStatus(EXTI_Line2) != RESET)
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EXTI_ClearITPendingBit(EXTI_Line2);
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switch (sc18is600.transaction) {
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case Sc18Is600Receive:
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case Sc18Is600Transmit:
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case Sc18Is600Transcieve:
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if (sc18is600.status == Sc18Is600WaitingForI2C) {
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sc18is600.status = Sc18Is600ReadingI2CStat;
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ReadI2CStatReg();
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}
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break;
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case Sc18Is600ReadRegister:
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case Sc18Is600WriteRegister:
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// should not happen
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break;
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default:
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break;
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}
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}
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void dma1_c4_irq_handler(void) {
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DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
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/* Disable SPI_2 Rx and TX request */
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
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/* Disable DMA1 Channel4 and 5 */
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DMA_Cmd(DMA1_Channel4, DISABLE);
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DMA_Cmd(DMA1_Channel5, DISABLE);
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switch (sc18is600.transaction) {
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case Sc18Is600ReadRegister:
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case Sc18Is600WriteRegister:
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sc18is600.status = Sc18Is600TransactionComplete;
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Sc18Is600Unselect();
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break;
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case Sc18Is600Transmit:
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if (sc18is600.status==Sc18Is600SendingRequest) {
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sc18is600.status = Sc18Is600WaitingForI2C;
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Sc18Is600Unselect();
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}
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else if (sc18is600.status == Sc18Is600ReadingI2CStat) {
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sc18is600.i2c_status = sc18is600.priv_rx_buf[2];
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sc18is600.status = Sc18Is600TransactionComplete;
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Sc18Is600Unselect();
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}
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break;
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case Sc18Is600Receive:
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case Sc18Is600Transcieve:
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if (sc18is600.status==Sc18Is600SendingRequest) {
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sc18is600.status = Sc18Is600WaitingForI2C;
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Sc18Is600Unselect();
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}
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else if (sc18is600.status == Sc18Is600ReadingI2CStat) {
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sc18is600.status = Sc18Is600ReadingBuffer;
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sc18is600.priv_tx_buf[0] = Sc18Is600_Cmd_Read_Buffer;
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// debug
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for (int i=1; i<sc18is600.rx_len+1; i++) sc18is600.priv_tx_buf[i] = 0;
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Sc18Is600Select();
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sc18is600_setup_SPI_DMA(sc18is600.rx_len+1);
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}
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else if (sc18is600.status == Sc18Is600ReadingBuffer) {
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sc18is600.status = Sc18Is600TransactionComplete;
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Sc18Is600Unselect();
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}
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break;
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default:
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break;
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}
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}
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@@ -0,0 +1,9 @@
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#ifndef BOOZ_SC18IS600_ARCH_H
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#define BOOZ_SC18IS600_ARCH_H
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#define Sc18Is600Unselect() GPIOB->BSRR = GPIO_Pin_12
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#define Sc18Is600Select() GPIOB->BRR = GPIO_Pin_12
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#endif /* BOOZ_SC18IS600_ARCH_H */
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@@ -0,0 +1,11 @@
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#include "booz/peripherals/booz_sc18is600.h"
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struct Sc18Is600 sc18is600;
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void sc18is600_init(void) {
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sc18is600.status = Sc18Is600Idle;
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sc18is600_arch_init();
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}
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@@ -0,0 +1,55 @@
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#ifndef SC18IS600_H
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#define SC18IS600_H
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#include "std.h"
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/* Register definitions */
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#define Sc18Is600_IOConfig 0x00
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#define Sc18Is600_IOState 0x01
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#define Sc18Is600_I2CClock 0x02
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#define Sc18Is600_I2CTO 0x03
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#define Sc18Is600_I2CStat 0x04
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#define Sc18Is600_I2CAdr 0x05
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enum Sc18Is600Status {
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Sc18Is600Idle,
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Sc18Is600SendingRequest,
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Sc18Is600WaitingForI2C,
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Sc18Is600ReadingI2CStat,
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Sc18Is600ReadingBuffer,
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Sc18Is600TransactionComplete,
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};
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enum Sc18Is600Transaction {
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Sc18Is600Transmit,
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Sc18Is600Receive,
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Sc18Is600Transcieve,
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Sc18Is600ReadRegister,
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Sc18Is600WriteRegister,
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};
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#define SC18IS600_BUF_LEN 96
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struct Sc18Is600 {
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enum Sc18Is600Status status;
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enum Sc18Is600Transaction transaction;
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uint8_t priv_tx_buf[SC18IS600_BUF_LEN];
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uint8_t priv_rx_buf[SC18IS600_BUF_LEN];
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uint8_t rx_len;
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uint8_t i2c_status;
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};
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extern struct Sc18Is600 sc18is600;
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extern void sc18is600_init(void);
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extern void sc18is600_transmit(uint8_t addr, uint8_t len);
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extern void sc18is600_receive(uint8_t addr, uint8_t len);
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extern void sc18is600_tranceive(uint8_t addr, uint8_t len_tx, uint8_t len_rx);
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extern void sc18is600_write_to_register(uint8_t addr, uint8_t value);
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extern void sc18is600_read_from_register(uint8_t addr);
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#include "peripherals/booz_sc18is600_arch.h"
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extern void sc18is600_arch_init(void);
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#endif /* SC18IS600_H */
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@@ -0,0 +1,117 @@
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/*
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* $Id$
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*
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* Copyright (C) 2009 Antoine Drouin <poinix@gmail.com>
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*
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* This file is part of paparazzi.
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*
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||||
* paparazzi is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
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||||
* paparazzi is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with paparazzi; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, 59 Temple Place - Suite 330,
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||||
* Boston, MA 02111-1307, USA.
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*/
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#include <stm32/gpio.h>
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#include <stm32/flash.h>
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#include <stm32/misc.h>
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#include BOARD_CONFIG
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#include "init_hw.h"
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#include "sys_time.h"
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#include "downlink.h"
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#include "booz/peripherals/booz_sc18is600.h"
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static inline void main_init( void );
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static inline void main_periodic_task( void );
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static inline void main_event_task( void );
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static inline void main_spi2_init(void);
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int main(void) {
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main_init();
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while(1) {
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if (sys_time_periodic())
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main_periodic_task();
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main_event_task();
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}
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return 0;
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}
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static inline void main_init( void ) {
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hw_init();
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sys_time_init();
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sc18is600_init();
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main_spi2_init();
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}
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static inline void main_periodic_task( void ) {
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// LED_TOGGLE(6);
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RunOnceEvery(10,
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{
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DOWNLINK_SEND_ALIVE(DefaultChannel, 16, MD5SUM);
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LED_PERIODIC();
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});
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|
||||
static uint8_t foo=0;
|
||||
switch (foo) {
|
||||
case 2:
|
||||
/* set I2C clock to 400khz */
|
||||
sc18is600_write_to_register(Sc18Is600_I2CClock, 0x05);
|
||||
break;
|
||||
case 3:
|
||||
/* read it back, just to check */
|
||||
sc18is600_read_from_register(Sc18Is600_I2CClock);
|
||||
break;
|
||||
case 4:
|
||||
/* set gyro range to 2000deg/s : write 0x03 to register at addr 0x16 */
|
||||
sc18is600.priv_tx_buf[3] = 0x16;
|
||||
sc18is600.priv_tx_buf[4] = 0x03;
|
||||
sc18is600_transmit(0xD0, 2);
|
||||
break;
|
||||
case 5:
|
||||
/* reads 8 bytes from address 0x1b */
|
||||
sc18is600.priv_tx_buf[4] = 0x1b;
|
||||
sc18is600_tranceive(0xD0, 1, 8);
|
||||
break;
|
||||
}
|
||||
|
||||
if (foo< 5) foo++;
|
||||
|
||||
}
|
||||
|
||||
static inline void main_event_task( void ) {
|
||||
|
||||
}
|
||||
|
||||
|
||||
static inline void main_spi2_init( void ) {
|
||||
|
||||
/* set mag ss as output and assert it (on PC12) ------------------------------*/
|
||||
/* set mag reset as output and assert it (on PC13) ------------------------------*/
|
||||
/* set eeprom ss as output and assert it (on PC14) ------------------------------*/
|
||||
GPIOC->BSRR = GPIO_Pin_12;
|
||||
GPIOC->BSRR = GPIO_Pin_13;
|
||||
GPIOC->BSRR = GPIO_Pin_14;
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13|GPIO_Pin_14;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user