mirror of
https://github.com/paparazzi/paparazzi.git
synced 2026-06-05 23:49:00 +08:00
fix naming error: rename ms2001 to ms2100
This commit is contained in:
@@ -126,12 +126,12 @@ main_stm32.srcs += lisa/lisa_overo_link.c lisa/arch/stm32/lisa_overo_link_arch.c
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#booz IMU
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#main_stm32.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
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#main_stm32.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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#main_stm32.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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#main_stm32.srcs += $(SRC_FIRMWARE)/imu.c
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#main_stm32.CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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#main_stm32.srcs += $(SRC_FIRMWARE)/imu/imu_b2.c $(SRC_FIRMWARE)/imu/arch/$(ARCH)/imu_b2_arch.c
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#main_stm32.srcs += peripherals/max1168.c $(SRC_ARCH)/peripherals/max1168_arch.c
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#main_stm32.srcs += peripherals/ms2001.c $(SRC_ARCH)/peripherals/ms2001_arch.c
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#main_stm32.srcs += peripherals/ms2100.c $(SRC_ARCH)/peripherals/ms2100_arch.c
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#main_stm32.srcs += math/pprz_trig_int.c
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#crista IMU
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@@ -335,14 +335,14 @@ test_imu_b2.srcs += downlink.c pprz_transport.c
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test_imu_b2.srcs += math/pprz_trig_int.c
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test_imu_b2.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
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test_imu_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001 -DIMU_B2_VERSION_1_1
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test_imu_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100 -DIMU_B2_VERSION_1_1
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test_imu_b2.srcs += $(SRC_SUBSYSTEMS)/imu.c
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test_imu_b2.CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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test_imu_b2.CFLAGS += -DMAX_1168_DRDY_PORT_SOURCE=$(MAX_1168_DRDY_PORT_SOURCE)
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test_imu_b2.CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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test_imu_b2.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
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test_imu_b2.srcs += peripherals/max1168.c $(SRC_ARCH)/peripherals/max1168_arch.c
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test_imu_b2.srcs += peripherals/ms2001.c $(SRC_ARCH)/peripherals/ms2001_arch.c
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test_imu_b2.srcs += peripherals/ms2100.c $(SRC_ARCH)/peripherals/ms2100_arch.c
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#
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# test IMU b2 1.2
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@@ -424,12 +424,12 @@ test_imu_b2.srcs += downlink.c pprz_transport.c
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test_imu_b2.srcs += math/pprz_trig_int.c
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test_imu_b2.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
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test_imu_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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test_imu_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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test_imu_b2.srcs += $(SRC_SUBSYSTEMS)/imu.c
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test_imu_b2.CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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test_imu_b2.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
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test_imu_b2.srcs += peripherals/max1168.c $(SRC_ARCH)/peripherals/max1168_arch.c
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test_imu_b2.srcs += peripherals/ms2001.c $(SRC_ARCH)/peripherals/ms2001_arch.c
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test_imu_b2.srcs += peripherals/ms2100.c $(SRC_ARCH)/peripherals/ms2100_arch.c
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#
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@@ -884,33 +884,33 @@ test_max1168.CFLAGS += -DDOWNLINK -DDOWNLINK_TRANSPORT=PprzTransport -DDOWNLINK_
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test_max1168.srcs += downlink.c pprz_transport.c
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#
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# test ms2001
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# test ms2100
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#
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test_ms2001.ARCHDIR = $(ARCH)
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test_ms2001.CFLAGS = -I$(SRC_LISA) -I$(ARCH) -I$(SRC_BOOZ) -I$(SRC_BOOZ_ARCH) -DPERIPHERALS_AUTO_INIT
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test_ms2001.CFLAGS += -DBOARD_CONFIG=$(BOARD_CFG)
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test_ms2001.srcs = $(SRC_LISA)/test/lisa_test_ms2001.c \
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test_ms2100.ARCHDIR = $(ARCH)
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test_ms2100.CFLAGS = -I$(SRC_LISA) -I$(ARCH) -I$(SRC_BOOZ) -I$(SRC_BOOZ_ARCH) -DPERIPHERALS_AUTO_INIT
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test_ms2100.CFLAGS += -DBOARD_CONFIG=$(BOARD_CFG)
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test_ms2100.srcs = $(SRC_LISA)/test/lisa_test_ms2100.c \
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$(SRC_ARCH)/stm32_exceptions.c \
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$(SRC_ARCH)/stm32_vector_table.c
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test_ms2001.CFLAGS += -DUSE_LED
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test_ms2001.srcs += $(SRC_ARCH)/led_hw.c
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test_ms2100.CFLAGS += -DUSE_LED
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test_ms2100.srcs += $(SRC_ARCH)/led_hw.c
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test_ms2001.CFLAGS += -DUSE_SYS_TIME -DSYS_TIME_LED=1
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test_ms2001.CFLAGS += -DPERIODIC_TASK_PERIOD='SYS_TICS_OF_SEC(1./512.)'
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test_ms2001.srcs += sys_time.c $(SRC_ARCH)/sys_time_hw.c
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test_ms2100.CFLAGS += -DUSE_SYS_TIME -DSYS_TIME_LED=1
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test_ms2100.CFLAGS += -DPERIODIC_TASK_PERIOD='SYS_TICS_OF_SEC(1./512.)'
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test_ms2100.srcs += sys_time.c $(SRC_ARCH)/sys_time_hw.c
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test_ms2001.CFLAGS += -DUSE_SPI2
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test_ms2001.CFLAGS += -DUSE_DMA1_C4_IRQ -DMS2001_HANDLES_DMA_IRQ
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test_ms2001.CFLAGS += -DUSE_SPI2_IRQ -DMS2001_HANDLES_SPI_IRQ
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test_ms2001.srcs += peripherals/ms2001.c \
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$(SRC_ARCH)/peripherals/ms2001_arch.c
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test_ms2100.CFLAGS += -DUSE_SPI2
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test_ms2100.CFLAGS += -DUSE_DMA1_C4_IRQ -DMS2100_HANDLES_DMA_IRQ
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test_ms2100.CFLAGS += -DUSE_SPI2_IRQ -DMS2100_HANDLES_SPI_IRQ
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test_ms2100.srcs += peripherals/ms2100.c \
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$(SRC_ARCH)/peripherals/ms2100_arch.c
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test_ms2001.CFLAGS += -DUSE_UART1 -DUART1_BAUD=B57600
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test_ms2001.srcs += $(SRC_ARCH)/mcu_periph/uart_arch.c
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test_ms2100.CFLAGS += -DUSE_UART1 -DUART1_BAUD=B57600
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test_ms2100.srcs += $(SRC_ARCH)/mcu_periph/uart_arch.c
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test_ms2001.CFLAGS += -DDOWNLINK -DDOWNLINK_TRANSPORT=PprzTransport -DDOWNLINK_DEVICE=Uart1
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test_ms2001.srcs += downlink.c pprz_transport.c
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test_ms2100.CFLAGS += -DDOWNLINK -DDOWNLINK_TRANSPORT=PprzTransport -DDOWNLINK_DEVICE=Uart1
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test_ms2100.srcs += downlink.c pprz_transport.c
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#
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# test adxl345
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@@ -1092,12 +1092,12 @@ ptw.srcs += downlink.c pprz_transport.c
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# IMU
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ptw.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
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ptw.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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ptw.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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ptw.srcs += $(SRC_SUBSYSTEMS)/imu.c
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ptw.CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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ptw.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
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ptw.srcs += peripherals/max1168.c $(SRC_ARCH)/peripherals/max1168_arch.c
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ptw.srcs += peripherals/ms2001.c $(SRC_ARCH)/peripherals/ms2001_arch.c
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ptw.srcs += peripherals/ms2100.c $(SRC_ARCH)/peripherals/ms2100_arch.c
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ptw.srcs += math/pprz_trig_int.c
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ptw.srcs += $(SRC_BOOZ)/booz2_commands.c
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@@ -1351,12 +1351,12 @@ hs_gyro_b2.srcs += downlink.c pprz_transport.c
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hs_gyro_b2.srcs += math/pprz_trig_int.c
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hs_gyro_b2.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
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hs_gyro_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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hs_gyro_b2.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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hs_gyro_b2.srcs += $(SRC_SUBSYSTEMS)/imu.c
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hs_gyro_b2.CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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hs_gyro_b2.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
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hs_gyro_b2.srcs += peripherals/max1168.c $(SRC_ARCH)/peripherals/max1168_arch.c
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hs_gyro_b2.srcs += peripherals/ms2001.c $(SRC_ARCH)/peripherals/ms2001_arch.c
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hs_gyro_b2.srcs += peripherals/ms2100.c $(SRC_ARCH)/peripherals/ms2100_arch.c
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#
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# Spits every samples of one axis of gyro on IMU crista
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@@ -52,7 +52,7 @@ imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
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#ifeq ($(ARCH), lpc21)
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imu_CFLAGS += -DSSP_VIC_SLOT=9
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imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
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#FIXME ms2001 not used on this imu
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#FIXME ms2100 not used on this imu
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#else ifeq ($(ARCH), stm32)
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#imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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#imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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@@ -42,7 +42,7 @@
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# imu Booz2 v1.1
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imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
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imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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imu_CFLAGS += -DIMU_B2_VERSION_1_1
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imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
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imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
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@@ -51,13 +51,13 @@ imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
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imu_srcs += peripherals/max1168.c
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imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
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imu_srcs += peripherals/ms2001.c
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imu_srcs += $(SRC_ARCH)/peripherals/ms2001_arch.c
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imu_srcs += peripherals/ms2100.c
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imu_srcs += $(SRC_ARCH)/peripherals/ms2100_arch.c
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ifeq ($(ARCH), lpc21)
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imu_CFLAGS += -DSSP_VIC_SLOT=9
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imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
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imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
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imu_CFLAGS += -DMS2100_DRDY_VIC_SLOT=11
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else ifeq ($(ARCH), stm32)
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imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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@@ -57,8 +57,8 @@ imu_srcs += $(SRC_ARCH)/peripherals/hmc5843_arch.c
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ifeq ($(ARCH), lpc21)
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imu_CFLAGS += -DSSP_VIC_SLOT=9
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imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
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#FIXME ms2001 not used on this imu
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imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
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#FIXME ms2100 not used on this imu
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imu_CFLAGS += -DMS2100_DRDY_VIC_SLOT=11
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else ifeq ($(ARCH), stm32)
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imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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@@ -42,7 +42,7 @@
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# imu Booz2 v1.1
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imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
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imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
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imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2100
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imu_CFLAGS += -DIMU_B2_VERSION_1_1
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imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
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imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
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@@ -51,13 +51,13 @@ imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
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imu_srcs += peripherals/max1168.c
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imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
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imu_srcs += peripherals/ms2001.c
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imu_srcs += $(SRC_ARCH)/peripherals/ms2001_arch.c
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imu_srcs += peripherals/ms2100.c
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imu_srcs += $(SRC_ARCH)/peripherals/ms2100_arch.c
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ifeq ($(ARCH), lpc21)
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imu_CFLAGS += -DSSP_VIC_SLOT=9
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imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
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imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
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imu_CFLAGS += -DMS2100_DRDY_VIC_SLOT=11
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else ifeq ($(ARCH), stm32)
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imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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@@ -57,8 +57,8 @@ imu_srcs += $(SRC_ARCH)/peripherals/hmc5843_arch.c
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ifeq ($(ARCH), lpc21)
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imu_CFLAGS += -DSSP_VIC_SLOT=9
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imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
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#FIXME ms2001 not used on this imu
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imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
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#FIXME ms2100 not used on this imu
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imu_CFLAGS += -DMS2100_DRDY_VIC_SLOT=11
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else ifeq ($(ARCH), stm32)
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imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
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imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
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@@ -1,50 +0,0 @@
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/* PNI ms2001 connected on SPI1 */
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/*
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IMU b2
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SS on P1.28
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RESET on P1.19
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DRDY on P0.30 ( EINT3)
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*/
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#include "peripherals/ms2001.h"
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volatile uint8_t ms2001_cur_axe;
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static void EXTINT_ISR(void) __attribute__((naked));
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void ms2001_arch_init( void ) {
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ms2001_cur_axe = 0;
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/* configure SS pin */
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Ms2001Unselect(); /* pin idles high */
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SetBit(MS2001_SS_IODIR, MS2001_SS_PIN); /* pin is output */
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/* configure RESET pin */
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Ms2001Reset(); /* pin idles low */
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SetBit(MS2001_RESET_IODIR, MS2001_RESET_PIN); /* pin is output */
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/* configure DRDY pin */
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/* connected pin to EXINT */
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MS2001_DRDY_PINSEL |= MS2001_DRDY_PINSEL_VAL << MS2001_DRDY_PINSEL_BIT;
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SetBit(EXTMODE, MS2001_DRDY_EINT); /* EINT is edge trigered */
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SetBit(EXTPOLAR,MS2001_DRDY_EINT); /* EINT is trigered on rising edge */
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SetBit(EXTINT,MS2001_DRDY_EINT); /* clear pending EINT */
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/* initialize interrupt vector */
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VICIntSelect &= ~VIC_BIT( MS2001_DRDY_VIC_IT ); /* select EINT as IRQ source */
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VICIntEnable = VIC_BIT( MS2001_DRDY_VIC_IT ); /* enable it */
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_VIC_CNTL(MS2001_DRDY_VIC_SLOT) = VIC_ENABLE | MS2001_DRDY_VIC_IT;
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_VIC_ADDR(MS2001_DRDY_VIC_SLOT) = (uint32_t)EXTINT_ISR; // address of the ISR
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}
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void EXTINT_ISR(void) {
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ISR_ENTRY();
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/* no, we won't do anything asynchronously, so just notify */
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ms2001_status = MS2001_GOT_EOC;
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/* clear EINT */
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EXTINT = (1<<MS2001_DRDY_EINT);
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VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
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ISR_EXIT();
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}
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@@ -0,0 +1,50 @@
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/* PNI ms2100 connected on SPI1 */
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/*
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IMU b2
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SS on P1.28
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RESET on P1.19
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DRDY on P0.30 ( EINT3)
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*/
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#include "peripherals/ms2100.h"
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volatile uint8_t ms2100_cur_axe;
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static void EXTINT_ISR(void) __attribute__((naked));
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void ms2100_arch_init( void ) {
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ms2100_cur_axe = 0;
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/* configure SS pin */
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Ms2001Unselect(); /* pin idles high */
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SetBit(MS2100_SS_IODIR, MS2100_SS_PIN); /* pin is output */
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/* configure RESET pin */
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Ms2001Reset(); /* pin idles low */
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SetBit(MS2100_RESET_IODIR, MS2100_RESET_PIN); /* pin is output */
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/* configure DRDY pin */
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/* connected pin to EXINT */
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MS2100_DRDY_PINSEL |= MS2100_DRDY_PINSEL_VAL << MS2100_DRDY_PINSEL_BIT;
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SetBit(EXTMODE, MS2100_DRDY_EINT); /* EINT is edge trigered */
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SetBit(EXTPOLAR,MS2100_DRDY_EINT); /* EINT is trigered on rising edge */
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SetBit(EXTINT,MS2100_DRDY_EINT); /* clear pending EINT */
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/* initialize interrupt vector */
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VICIntSelect &= ~VIC_BIT( MS2100_DRDY_VIC_IT ); /* select EINT as IRQ source */
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VICIntEnable = VIC_BIT( MS2100_DRDY_VIC_IT ); /* enable it */
|
||||
_VIC_CNTL(MS2100_DRDY_VIC_SLOT) = VIC_ENABLE | MS2100_DRDY_VIC_IT;
|
||||
_VIC_ADDR(MS2100_DRDY_VIC_SLOT) = (uint32_t)EXTINT_ISR; // address of the ISR
|
||||
|
||||
}
|
||||
|
||||
void EXTINT_ISR(void) {
|
||||
ISR_ENTRY();
|
||||
/* no, we won't do anything asynchronously, so just notify */
|
||||
ms2100_status = MS2100_GOT_EOC;
|
||||
/* clear EINT */
|
||||
EXTINT = (1<<MS2100_DRDY_EINT);
|
||||
VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
|
||||
ISR_EXIT();
|
||||
}
|
||||
+22
-22
@@ -1,5 +1,5 @@
|
||||
#ifndef MS2001_ARCH_H
|
||||
#define MS2001_ARCH_H
|
||||
#ifndef MS2100_ARCH_H
|
||||
#define MS2100_ARCH_H
|
||||
|
||||
#include <stdlib.h> // for abs
|
||||
|
||||
@@ -14,45 +14,45 @@
|
||||
|
||||
|
||||
|
||||
extern volatile uint8_t ms2001_cur_axe;
|
||||
extern volatile uint8_t ms2100_cur_axe;
|
||||
|
||||
#define Ms2001Select() SetBit(MS2001_SS_IOCLR,MS2001_SS_PIN)
|
||||
#define Ms2001Unselect() SetBit(MS2001_SS_IOSET,MS2001_SS_PIN)
|
||||
#define Ms2001Select() SetBit(MS2100_SS_IOCLR,MS2100_SS_PIN)
|
||||
#define Ms2001Unselect() SetBit(MS2100_SS_IOSET,MS2100_SS_PIN)
|
||||
|
||||
#define Ms2001Reset() SetBit(MS2001_RESET_IOCLR,MS2001_RESET_PIN)
|
||||
#define Ms2001Set() SetBit(MS2001_RESET_IOSET,MS2001_RESET_PIN)
|
||||
#define Ms2001Reset() SetBit(MS2100_RESET_IOCLR,MS2100_RESET_PIN)
|
||||
#define Ms2001Set() SetBit(MS2100_RESET_IOSET,MS2100_RESET_PIN)
|
||||
|
||||
#define Ms2001OnSpiInt() { \
|
||||
switch (ms2001_status) { \
|
||||
case MS2001_SENDING_REQ: \
|
||||
switch (ms2100_status) { \
|
||||
case MS2100_SENDING_REQ: \
|
||||
{ \
|
||||
/* read dummy control byte reply */ \
|
||||
uint8_t foo __attribute__ ((unused)) = SSPDR; \
|
||||
ms2001_status = MS2001_WAITING_EOC; \
|
||||
ms2100_status = MS2100_WAITING_EOC; \
|
||||
Ms2001Unselect(); \
|
||||
SSP_ClearRti(); \
|
||||
SSP_DisableRti(); \
|
||||
SSP_Disable(); \
|
||||
} \
|
||||
break; \
|
||||
case MS2001_READING_RES: \
|
||||
case MS2100_READING_RES: \
|
||||
{ \
|
||||
int16_t new_val; \
|
||||
new_val = SSPDR << 8; \
|
||||
new_val += SSPDR; \
|
||||
if (abs(new_val) < 2000) \
|
||||
ms2001_values[ms2001_cur_axe] = new_val; \
|
||||
ms2100_values[ms2100_cur_axe] = new_val; \
|
||||
Ms2001Unselect(); \
|
||||
SSP_ClearRti(); \
|
||||
SSP_DisableRti(); \
|
||||
SSP_Disable(); \
|
||||
ms2001_cur_axe++; \
|
||||
if (ms2001_cur_axe > 2) { \
|
||||
ms2001_cur_axe = 0; \
|
||||
ms2001_status = MS2001_DATA_AVAILABLE; \
|
||||
ms2100_cur_axe++; \
|
||||
if (ms2100_cur_axe > 2) { \
|
||||
ms2100_cur_axe = 0; \
|
||||
ms2100_status = MS2100_DATA_AVAILABLE; \
|
||||
} \
|
||||
else \
|
||||
ms2001_status = MS2001_IDLE; \
|
||||
ms2100_status = MS2100_IDLE; \
|
||||
} \
|
||||
break; \
|
||||
} \
|
||||
@@ -61,19 +61,19 @@ extern volatile uint8_t ms2001_cur_axe;
|
||||
|
||||
#define Ms2001SendReq() { \
|
||||
Ms2001Select(); \
|
||||
ms2001_status = MS2001_SENDING_REQ; \
|
||||
ms2100_status = MS2100_SENDING_REQ; \
|
||||
Ms2001Set(); \
|
||||
SSP_ClearRti(); \
|
||||
SSP_EnableRti(); \
|
||||
Ms2001Reset(); \
|
||||
uint8_t control_byte = (ms2001_cur_axe+1) << 0 | \
|
||||
MS2001_DIVISOR << 4; \
|
||||
uint8_t control_byte = (ms2100_cur_axe+1) << 0 | \
|
||||
MS2100_DIVISOR << 4; \
|
||||
SSP_Send(control_byte); \
|
||||
SSP_Enable(); \
|
||||
}
|
||||
|
||||
#define Ms2001ReadRes() { \
|
||||
ms2001_status = MS2001_READING_RES; \
|
||||
ms2100_status = MS2100_READING_RES; \
|
||||
Ms2001Select(); \
|
||||
/* trigger 2 bytes read */ \
|
||||
SSP_Send(0); \
|
||||
@@ -85,4 +85,4 @@ extern volatile uint8_t ms2001_cur_axe;
|
||||
|
||||
|
||||
|
||||
#endif /* MS2001_ARCH_H */
|
||||
#endif /* MS2100_ARCH_H */
|
||||
@@ -101,7 +101,7 @@ void imu_periodic(void) {
|
||||
|
||||
|
||||
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
|
||||
static void SSP_ISR(void) {
|
||||
ISR_ENTRY();
|
||||
@@ -109,12 +109,12 @@ static void SSP_ISR(void) {
|
||||
switch (imu_ssp_status) {
|
||||
case IMU_SSP_STA_BUSY_MAX1168:
|
||||
Max1168OnSpiInt();
|
||||
if (ms2001_status == MS2001_IDLE || ms2001_status == MS2001_GOT_EOC) {
|
||||
if (ms2100_status == MS2100_IDLE || ms2100_status == MS2100_GOT_EOC) {
|
||||
ImuSetSSP8bits();
|
||||
if (ms2001_status == MS2001_IDLE) {
|
||||
if (ms2100_status == MS2100_IDLE) {
|
||||
Ms2001SendReq();
|
||||
}
|
||||
else { /* MS2001_GOT_EOC */
|
||||
else { /* MS2100_GOT_EOC */
|
||||
Ms2001ReadRes();
|
||||
}
|
||||
imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
|
||||
@@ -125,7 +125,7 @@ static void SSP_ISR(void) {
|
||||
break;
|
||||
case IMU_SSP_STA_BUSY_MS2100:
|
||||
Ms2001OnSpiInt();
|
||||
if (ms2001_status == MS2001_IDLE) {
|
||||
if (ms2100_status == MS2100_IDLE) {
|
||||
Ms2001SendReq();
|
||||
imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
|
||||
}
|
||||
@@ -142,7 +142,7 @@ static void SSP_ISR(void) {
|
||||
ISR_EXIT();
|
||||
}
|
||||
|
||||
#else //no IMU_B2_MAG_MS2001
|
||||
#else //no IMU_B2_MAG_MS2100
|
||||
|
||||
static void SSP_ISR(void) {
|
||||
ISR_ENTRY();
|
||||
@@ -162,4 +162,4 @@ static void SSP_ISR(void) {
|
||||
ISR_EXIT();
|
||||
}
|
||||
|
||||
#endif //no IMU_B2_MAG_MS2001
|
||||
#endif //no IMU_B2_MAG_MS2100
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
9 I2C0_VIC_SLOT
|
||||
I2C1_VIC_SLOT
|
||||
11 SSP_VIC_SLOT
|
||||
11 MS2001_DRDY_VIC_SLOT
|
||||
11 MS2100_DRDY_VIC_SLOT
|
||||
|
||||
12 MICROMAG_DRDY_VIC_SLOT
|
||||
12 MAX11040_DRDY_VIC_SLOT
|
||||
|
||||
@@ -47,11 +47,11 @@ void imu_feed_gyro_accel(void) {
|
||||
|
||||
|
||||
void imu_feed_mag(void) {
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
ms2001_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
|
||||
ms2001_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
|
||||
ms2001_values[IMU_MAG_Z_CHAN] = sensors.mag.value.z;
|
||||
ms2001_status = MS2001_DATA_AVAILABLE;
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
ms2100_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
|
||||
ms2100_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
|
||||
ms2100_values[IMU_MAG_Z_CHAN] = sensors.mag.value.z;
|
||||
ms2100_status = MS2100_DATA_AVAILABLE;
|
||||
#elif defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_AMI601
|
||||
ami601_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
|
||||
ami601_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
|
||||
|
||||
+12
-12
@@ -21,7 +21,7 @@
|
||||
* Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include "peripherals/ms2001.h"
|
||||
#include "peripherals/ms2100.h"
|
||||
|
||||
#include <stm32/rcc.h>
|
||||
#include <stm32/spi.h>
|
||||
@@ -29,16 +29,16 @@
|
||||
#include <stm32/misc.h>
|
||||
#include <stm32/dma.h>
|
||||
|
||||
uint8_t ms2001_cur_axe;
|
||||
int16_t ms2001_last_reading; // can't write in place because that stupid beast
|
||||
uint8_t ms2100_cur_axe;
|
||||
int16_t ms2100_last_reading; // can't write in place because that stupid beast
|
||||
// stips stupid values once in a while that I need
|
||||
// to filter - high time we get rid of this crap hardware
|
||||
// and no, I checked with the logic analyzer, timing are
|
||||
// within specs
|
||||
|
||||
void ms2001_arch_init( void ) {
|
||||
void ms2100_arch_init( void ) {
|
||||
|
||||
ms2001_cur_axe = 0;
|
||||
ms2100_cur_axe = 0;
|
||||
|
||||
/* set mag SS and reset as output and assert them (SS on PC12 reset on PC13) ----*/
|
||||
Ms2001Unselect();
|
||||
@@ -58,7 +58,7 @@ void ms2001_arch_init( void ) {
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
#ifdef MS2001_HANDLES_DMA_IRQ
|
||||
#ifdef MS2100_HANDLES_DMA_IRQ
|
||||
/* Enable DMA1 channel4 IRQ Channel */
|
||||
NVIC_InitTypeDef NVIC_init_structure_dma = {
|
||||
.NVIC_IRQChannel = DMA1_Channel4_IRQn,
|
||||
@@ -67,9 +67,9 @@ void ms2001_arch_init( void ) {
|
||||
.NVIC_IRQChannelCmd = ENABLE
|
||||
};
|
||||
NVIC_Init(&NVIC_init_structure_dma);
|
||||
#endif /* MS2001_HANDLES_DMA_IRQ */
|
||||
#endif /* MS2100_HANDLES_DMA_IRQ */
|
||||
|
||||
#ifdef MS2001_HANDLES_SPI_IRQ
|
||||
#ifdef MS2100_HANDLES_SPI_IRQ
|
||||
NVIC_InitTypeDef NVIC_init_structure_spi = {
|
||||
.NVIC_IRQChannel = SPI2_IRQn,
|
||||
.NVIC_IRQChannelPreemptionPriority = 0,
|
||||
@@ -77,19 +77,19 @@ void ms2001_arch_init( void ) {
|
||||
.NVIC_IRQChannelCmd = ENABLE
|
||||
};
|
||||
NVIC_Init(&NVIC_init_structure_spi);
|
||||
#endif /* MS2001_HANDLES_SPI_IRQ */
|
||||
#endif /* MS2100_HANDLES_SPI_IRQ */
|
||||
|
||||
}
|
||||
|
||||
#ifdef MS2001_HANDLES_SPI_IRQ
|
||||
#ifdef MS2100_HANDLES_SPI_IRQ
|
||||
void spi2_irq_handler(void) {
|
||||
Ms2001OnSpiIrq();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef MS2001_HANDLES_DMA_IRQ
|
||||
#ifdef MS2100_HANDLES_DMA_IRQ
|
||||
void dma1_c4_irq_handler(void) {
|
||||
Ms2001OnDmaIrq();
|
||||
}
|
||||
#endif /* MS2001_HANDLES_DMA_IRQ */
|
||||
#endif /* MS2100_HANDLES_DMA_IRQ */
|
||||
+22
-22
@@ -1,5 +1,5 @@
|
||||
#ifndef MS2001_ARCH_H
|
||||
#define MS2001_ARCH_H
|
||||
#ifndef MS2100_ARCH_H
|
||||
#define MS2100_ARCH_H
|
||||
|
||||
/*
|
||||
* $Id$
|
||||
@@ -27,8 +27,8 @@
|
||||
#include <stm32/gpio.h>
|
||||
#include <stm32/spi.h>
|
||||
|
||||
extern uint8_t ms2001_cur_axe;
|
||||
extern int16_t ms2001_last_reading;
|
||||
extern uint8_t ms2100_cur_axe;
|
||||
extern int16_t ms2100_last_reading;
|
||||
|
||||
#define Ms2001Select() GPIOC->BRR = GPIO_Pin_12
|
||||
#define Ms2001Unselect() GPIOC->BSRR = GPIO_Pin_12
|
||||
@@ -42,10 +42,10 @@ extern int16_t ms2001_last_reading;
|
||||
Ms2001Select(); \
|
||||
__IO uint32_t nCount = 4;for(; nCount != 0; nCount--); \
|
||||
Ms2001Reset(); \
|
||||
ms2001_status = MS2001_SENDING_REQ; \
|
||||
ms2100_status = MS2100_SENDING_REQ; \
|
||||
nCount = 4;for(; nCount != 0; nCount--); \
|
||||
Ms2001Set(); \
|
||||
uint16_t ctl_byte = ((ms2001_cur_axe+1) | (MS2001_DIVISOR << 4)); \
|
||||
uint16_t ctl_byte = ((ms2100_cur_axe+1) | (MS2100_DIVISOR << 4)); \
|
||||
nCount = 20;for(; nCount != 0; nCount--); \
|
||||
SPI_Cmd(SPI2, DISABLE); \
|
||||
SPI_InitTypeDef SPI_InitStructure = { \
|
||||
@@ -66,7 +66,7 @@ extern int16_t ms2001_last_reading;
|
||||
}
|
||||
|
||||
#define Ms2001ReadRes() { \
|
||||
ms2001_status = MS2001_READING_RES; \
|
||||
ms2100_status = MS2100_READING_RES; \
|
||||
Ms2001Select(); \
|
||||
SPI_Cmd(SPI2, DISABLE); \
|
||||
SPI_InitTypeDef SPI_InitStructure = { \
|
||||
@@ -88,7 +88,7 @@ extern int16_t ms2001_last_reading;
|
||||
DMA_InitTypeDef DMA_InitStructure; \
|
||||
DMA_DeInit(DMA1_Channel4); \
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
|
||||
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(&ms2001_last_reading); \
|
||||
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(&ms2100_last_reading); \
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; \
|
||||
DMA_InitStructure.DMA_BufferSize = 1; \
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; \
|
||||
@@ -102,7 +102,7 @@ extern int16_t ms2001_last_reading;
|
||||
/* SPI2_Tx_DMA_Channel configuration ------------------------------------*/ \
|
||||
DMA_DeInit(DMA1_Channel5); \
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
|
||||
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ms2001_values; \
|
||||
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ms2100_values; \
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; \
|
||||
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; \
|
||||
DMA_Init(DMA1_Channel5, &DMA_InitStructure); \
|
||||
@@ -123,33 +123,33 @@ extern int16_t ms2001_last_reading;
|
||||
}
|
||||
|
||||
#define Ms2001OnDmaIrq() { \
|
||||
/* ASSERT((ms2001_status == MS2001_READING_RES), \
|
||||
* DEBUG_MS2001, MS2001_ERR_SPURIOUS_DMA_IRQ); \
|
||||
/* ASSERT((ms2100_status == MS2100_READING_RES), \
|
||||
* DEBUG_MS2100, MS2100_ERR_SPURIOUS_DMA_IRQ); \
|
||||
*/ \
|
||||
if (abs(ms2001_last_reading) < 1000) \
|
||||
ms2001_values[ms2001_cur_axe] = ms2001_last_reading; \
|
||||
if (abs(ms2100_last_reading) < 1000) \
|
||||
ms2100_values[ms2100_cur_axe] = ms2100_last_reading; \
|
||||
Ms2001Unselect(); \
|
||||
ms2001_cur_axe++; \
|
||||
if (ms2001_cur_axe > 2) { \
|
||||
ms2001_cur_axe = 0; \
|
||||
ms2001_status = MS2001_DATA_AVAILABLE; \
|
||||
ms2100_cur_axe++; \
|
||||
if (ms2100_cur_axe > 2) { \
|
||||
ms2100_cur_axe = 0; \
|
||||
ms2100_status = MS2100_DATA_AVAILABLE; \
|
||||
} \
|
||||
else \
|
||||
ms2001_status = MS2001_IDLE; \
|
||||
ms2100_status = MS2100_IDLE; \
|
||||
SPI_Cmd(SPI2, DISABLE); \
|
||||
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \
|
||||
}
|
||||
|
||||
#define Ms2001OnSpiIrq() { \
|
||||
/* ASSERT((ms2001_status == MS2001_SENDING_REQ), \
|
||||
* DEBUG_MS2001, MS2001_ERR_SPURIOUS_SPI_IRQ); \
|
||||
/* ASSERT((ms2100_status == MS2100_SENDING_REQ), \
|
||||
* DEBUG_MS2100, MS2100_ERR_SPURIOUS_SPI_IRQ); \
|
||||
*/ \
|
||||
/* read unused control byte reply */ \
|
||||
uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI2); \
|
||||
Ms2001Unselect(); \
|
||||
ms2001_status = MS2001_WAITING_EOC; \
|
||||
ms2100_status = MS2100_WAITING_EOC; \
|
||||
SPI_Cmd(SPI2, DISABLE); \
|
||||
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, DISABLE); \
|
||||
}
|
||||
|
||||
#endif /* MS2001_ARCH_H */
|
||||
#endif /* MS2100_ARCH_H */
|
||||
@@ -91,12 +91,12 @@ void dma1_c4_irq_handler(void) {
|
||||
case IMU_SSP_STA_BUSY_MAX1168:
|
||||
Max1168OnDmaIrq();
|
||||
SPI_Cmd(SPI2, DISABLE);
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
if (ms2001_status == MS2001_IDLE) {
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
if (ms2100_status == MS2100_IDLE) {
|
||||
Ms2001SendReq();
|
||||
imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
|
||||
}
|
||||
else if (ms2001_status == MS2001_WAITING_EOC && Ms2001HasEOC()) {
|
||||
else if (ms2100_status == MS2100_WAITING_EOC && Ms2001HasEOC()) {
|
||||
Ms2001ReadRes();
|
||||
imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
|
||||
}
|
||||
@@ -105,7 +105,7 @@ void dma1_c4_irq_handler(void) {
|
||||
imu_ssp_status = IMU_SSP_STA_IDLE;
|
||||
break;
|
||||
case IMU_SSP_STA_BUSY_MS2100:
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
Ms2001OnDmaIrq();
|
||||
#endif
|
||||
break;
|
||||
@@ -117,7 +117,7 @@ void dma1_c4_irq_handler(void) {
|
||||
|
||||
|
||||
void spi2_irq_handler(void) {
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
Ms2001OnSpiIrq();
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -62,23 +62,23 @@
|
||||
|
||||
|
||||
|
||||
/* MS2001 on SSP, IMU connector */
|
||||
#define MS2001_SS_PIN 28
|
||||
#define MS2001_SS_IODIR IO1DIR
|
||||
#define MS2001_SS_IOSET IO1SET
|
||||
#define MS2001_SS_IOCLR IO1CLR
|
||||
/* MS2100 on SSP, IMU connector */
|
||||
#define MS2100_SS_PIN 28
|
||||
#define MS2100_SS_IODIR IO1DIR
|
||||
#define MS2100_SS_IOSET IO1SET
|
||||
#define MS2100_SS_IOCLR IO1CLR
|
||||
|
||||
#define MS2001_RESET_PIN 19
|
||||
#define MS2001_RESET_IODIR IO1DIR
|
||||
#define MS2001_RESET_IOSET IO1SET
|
||||
#define MS2001_RESET_IOCLR IO1CLR
|
||||
#define MS2100_RESET_PIN 19
|
||||
#define MS2100_RESET_IODIR IO1DIR
|
||||
#define MS2100_RESET_IOSET IO1SET
|
||||
#define MS2100_RESET_IOCLR IO1CLR
|
||||
|
||||
#define MS2001_DRDY_PIN 30
|
||||
#define MS2001_DRDY_PINSEL PINSEL1
|
||||
#define MS2001_DRDY_PINSEL_BIT 28
|
||||
#define MS2001_DRDY_PINSEL_VAL 2
|
||||
#define MS2001_DRDY_EINT 3
|
||||
#define MS2001_DRDY_VIC_IT VIC_EINT3
|
||||
#define MS2100_DRDY_PIN 30
|
||||
#define MS2100_DRDY_PINSEL PINSEL1
|
||||
#define MS2100_DRDY_PINSEL_BIT 28
|
||||
#define MS2100_DRDY_PINSEL_VAL 2
|
||||
#define MS2100_DRDY_EINT 3
|
||||
#define MS2100_DRDY_VIC_IT VIC_EINT3
|
||||
|
||||
/* PWM5 on CAM connector */
|
||||
/* P0.21 */
|
||||
|
||||
@@ -1,123 +0,0 @@
|
||||
/*
|
||||
* $Id$
|
||||
*
|
||||
* Copyright (C) 2010 Antoine Drouin <poinix@gmail.com>
|
||||
*
|
||||
* This file is part of paparazzi.
|
||||
*
|
||||
* paparazzi is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* paparazzi is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with paparazzi; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, 59 Temple Place - Suite 330,
|
||||
* Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include <stm32/gpio.h>
|
||||
#include <stm32/flash.h>
|
||||
#include <stm32/misc.h>
|
||||
#include <stm32/spi.h>
|
||||
#include <stm32/dma.h>
|
||||
#include <stm32/exti.h>
|
||||
|
||||
#include BOARD_CONFIG
|
||||
#include "mcu.h"
|
||||
#include "sys_time.h"
|
||||
#include "downlink.h"
|
||||
#include "peripherals/ms2001.h"
|
||||
|
||||
static inline void main_init( void );
|
||||
static inline void main_periodic_task( void );
|
||||
static inline void main_event_task( void );
|
||||
|
||||
static inline void main_spi2_init(void);
|
||||
|
||||
int main(void) {
|
||||
main_init();
|
||||
|
||||
while(1) {
|
||||
if (sys_time_periodic())
|
||||
main_periodic_task();
|
||||
main_event_task();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static inline void main_init( void ) {
|
||||
mcu_init();
|
||||
sys_time_init();
|
||||
ms2001_init();
|
||||
main_spi2_init();
|
||||
}
|
||||
|
||||
static inline void main_periodic_task( void ) {
|
||||
RunOnceEvery(10,
|
||||
{
|
||||
DOWNLINK_SEND_BOOT(DefaultChannel, &cpu_time_sec);
|
||||
LED_PERIODIC();
|
||||
});
|
||||
|
||||
switch(ms2001_status) {
|
||||
case MS2001_IDLE:
|
||||
Ms2001SendReq();
|
||||
break;
|
||||
case MS2001_WAITING_EOC:
|
||||
if (Ms2001HasEOC()) {
|
||||
Ms2001ReadRes();
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void main_event_task( void ) {
|
||||
if (ms2001_status == MS2001_DATA_AVAILABLE) {
|
||||
RunOnceEvery(10, {
|
||||
DOWNLINK_SEND_IMU_MAG_RAW(DefaultChannel,
|
||||
&ms2001_values[0],
|
||||
&ms2001_values[1],
|
||||
&ms2001_values[2]);
|
||||
});
|
||||
ms2001_status = MS2001_IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void main_spi2_init( void ) {
|
||||
|
||||
/* set max1168 slave select as output and assert it ( on PB12) */
|
||||
GPIOB->BSRR = GPIO_Pin_12;
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* Enable SPI2 Periph clock -------------------------------------------------*/
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
|
||||
/* Configure GPIOs: SCK, MISO and MOSI --------------------------------*/
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
|
||||
|
||||
|
||||
/* Enable SPI_2 DMA clock ---------------------------------------------------*/
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* $Id$
|
||||
*
|
||||
* Copyright (C) 2009 Antoine Drouin <poinix@gmail.com>
|
||||
* Copyright (C) 2010 Antoine Drouin <poinix@gmail.com>
|
||||
*
|
||||
* This file is part of paparazzi.
|
||||
*
|
||||
@@ -56,46 +56,51 @@ int main(void) {
|
||||
static inline void main_init( void ) {
|
||||
mcu_init();
|
||||
sys_time_init();
|
||||
max1168_init();
|
||||
ms2100_init();
|
||||
main_spi2_init();
|
||||
}
|
||||
|
||||
static inline void main_periodic_task( void ) {
|
||||
// LED_TOGGLE(6);
|
||||
max1168_read();
|
||||
RunOnceEvery(10,
|
||||
{
|
||||
DOWNLINK_SEND_BOOT(DefaultChannel, &cpu_time_sec);
|
||||
LED_PERIODIC();
|
||||
});
|
||||
|
||||
}
|
||||
|
||||
static inline void main_event_task( void ) {
|
||||
if (max1168_status == STA_MAX1168_DATA_AVAILABLE) {
|
||||
RunOnceEvery(10, {
|
||||
DOWNLINK_SEND_IMU_GYRO_RAW(DefaultChannel, &max1168_values[0], &max1168_values[1], &max1168_values[2]);
|
||||
DOWNLINK_SEND_IMU_ACCEL_RAW(DefaultChannel, &max1168_values[3], &max1168_values[4], &max1168_values[6]);
|
||||
// DOWNLINK_SEND_BOOT(DefaultChannel, &max1168_values[7]); });
|
||||
});
|
||||
max1168_status = STA_MAX1168_IDLE;
|
||||
switch(ms2100_status) {
|
||||
case MS2100_IDLE:
|
||||
Ms2001SendReq();
|
||||
break;
|
||||
case MS2100_WAITING_EOC:
|
||||
if (Ms2001HasEOC()) {
|
||||
Ms2001ReadRes();
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void main_event_task( void ) {
|
||||
if (ms2100_status == MS2100_DATA_AVAILABLE) {
|
||||
RunOnceEvery(10, {
|
||||
DOWNLINK_SEND_IMU_MAG_RAW(DefaultChannel,
|
||||
&ms2100_values[0],
|
||||
&ms2100_values[1],
|
||||
&ms2100_values[2]);
|
||||
});
|
||||
ms2100_status = MS2100_IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void main_spi2_init( void ) {
|
||||
|
||||
/* set mag ss as output and assert it (on PC12) ------------------------------*/
|
||||
/* set mag reset as output and assert it (on PC13) ------------------------------*/
|
||||
GPIOC->BSRR = GPIO_Pin_12;
|
||||
GPIOC->BSRR = GPIO_Pin_13;
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||
/* set max1168 slave select as output and assert it ( on PB12) */
|
||||
GPIOB->BSRR = GPIO_Pin_12;
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* Enable SPI2 Periph clock -------------------------------------------------*/
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
@@ -108,24 +113,11 @@ static inline void main_spi2_init( void ) {
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
|
||||
|
||||
/* SPI Master configuration --------------------------------------------------*/
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
|
||||
/* Enable SPI */
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
|
||||
/* Enable SPI_2 DMA clock ---------------------------------------------------*/
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -21,21 +21,21 @@
|
||||
* Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include "ms2001.h"
|
||||
#include "ms2100.h"
|
||||
|
||||
volatile uint8_t ms2001_status;
|
||||
volatile int16_t ms2001_values[MS2001_NB_AXIS];
|
||||
volatile uint8_t ms2100_status;
|
||||
volatile int16_t ms2100_values[MS2100_NB_AXIS];
|
||||
|
||||
void ms2001_init( void ) {
|
||||
void ms2100_init( void ) {
|
||||
|
||||
ms2001_arch_init();
|
||||
ms2100_arch_init();
|
||||
|
||||
uint8_t i;
|
||||
for (i=0; i<MS2001_NB_AXIS; i++)
|
||||
ms2001_values[i] = 0;
|
||||
ms2001_status = MS2001_IDLE;
|
||||
for (i=0; i<MS2100_NB_AXIS; i++)
|
||||
ms2100_values[i] = 0;
|
||||
ms2100_status = MS2100_IDLE;
|
||||
}
|
||||
|
||||
void ms2001_reset() {
|
||||
ms2001_status = MS2001_IDLE;
|
||||
void ms2100_reset() {
|
||||
ms2100_status = MS2100_IDLE;
|
||||
}
|
||||
@@ -21,39 +21,39 @@
|
||||
* Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#ifndef MS2001_H
|
||||
#define MS2001_H
|
||||
#ifndef MS2100_H
|
||||
#define MS2100_H
|
||||
|
||||
|
||||
#include "std.h"
|
||||
#define MS2001_NB_AXIS 3
|
||||
#define MS2100_NB_AXIS 3
|
||||
|
||||
extern void ms2001_init( void );
|
||||
extern void ms2001_read( void );
|
||||
extern void ms2001_reset( void);
|
||||
extern void ms2100_init( void );
|
||||
extern void ms2100_read( void );
|
||||
extern void ms2100_reset( void);
|
||||
|
||||
#define MS2001_IDLE 0
|
||||
#define MS2001_BUSY 1
|
||||
#define MS2001_SENDING_REQ 2
|
||||
#define MS2001_WAITING_EOC 3
|
||||
#define MS2001_GOT_EOC 4
|
||||
#define MS2001_READING_RES 5
|
||||
#define MS2001_DATA_AVAILABLE 6
|
||||
#define MS2100_IDLE 0
|
||||
#define MS2100_BUSY 1
|
||||
#define MS2100_SENDING_REQ 2
|
||||
#define MS2100_WAITING_EOC 3
|
||||
#define MS2100_GOT_EOC 4
|
||||
#define MS2100_READING_RES 5
|
||||
#define MS2100_DATA_AVAILABLE 6
|
||||
|
||||
extern volatile uint8_t ms2001_status;
|
||||
extern volatile int16_t ms2001_values[MS2001_NB_AXIS];
|
||||
extern volatile uint8_t ms2100_status;
|
||||
extern volatile int16_t ms2100_values[MS2100_NB_AXIS];
|
||||
|
||||
/* underlying architecture */
|
||||
#include "peripherals/ms2001_arch.h"
|
||||
#include "peripherals/ms2100_arch.h"
|
||||
/* must be implemented by underlying architecture */
|
||||
extern void ms2001_arch_init( void );
|
||||
extern void ms2100_arch_init( void );
|
||||
|
||||
#define MS2001_DIVISOR_128 2
|
||||
#define MS2001_DIVISOR_256 3
|
||||
#define MS2001_DIVISOR_512 4
|
||||
#define MS2001_DIVISOR_1024 5
|
||||
#define MS2100_DIVISOR_128 2
|
||||
#define MS2100_DIVISOR_256 3
|
||||
#define MS2100_DIVISOR_512 4
|
||||
#define MS2100_DIVISOR_1024 5
|
||||
|
||||
#define MS2001_DIVISOR MS2001_DIVISOR_1024
|
||||
#define MS2100_DIVISOR MS2100_DIVISOR_1024
|
||||
|
||||
|
||||
#endif /* MS2001_H */
|
||||
#endif /* MS2100_H */
|
||||
@@ -28,8 +28,8 @@ void imu_impl_init(void) {
|
||||
imu_b2_arch_init();
|
||||
|
||||
max1168_init();
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
ms2001_init();
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
ms2100_init();
|
||||
#elif defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_AMI601
|
||||
ami601_init();
|
||||
#elif defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_HMC5843
|
||||
|
||||
@@ -31,7 +31,7 @@
|
||||
|
||||
/* type of magnetometer */
|
||||
#define IMU_B2_MAG_NONE 0
|
||||
#define IMU_B2_MAG_MS2001 1
|
||||
#define IMU_B2_MAG_MS2100 1
|
||||
#define IMU_B2_MAG_AMI601 2
|
||||
|
||||
|
||||
@@ -142,14 +142,14 @@
|
||||
#endif /* IMU_B2_VERSION_1_2 */
|
||||
|
||||
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
|
||||
#include "peripherals/ms2001.h"
|
||||
#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
|
||||
#include "peripherals/ms2100.h"
|
||||
#define ImuMagEvent(_mag_handler) { \
|
||||
if (ms2001_status == MS2001_DATA_AVAILABLE) { \
|
||||
imu.mag_unscaled.x = ms2001_values[IMU_MAG_X_CHAN]; \
|
||||
imu.mag_unscaled.y = ms2001_values[IMU_MAG_Y_CHAN]; \
|
||||
imu.mag_unscaled.z = ms2001_values[IMU_MAG_Z_CHAN]; \
|
||||
ms2001_status = MS2001_IDLE; \
|
||||
if (ms2100_status == MS2100_DATA_AVAILABLE) { \
|
||||
imu.mag_unscaled.x = ms2100_values[IMU_MAG_X_CHAN]; \
|
||||
imu.mag_unscaled.y = ms2100_values[IMU_MAG_Y_CHAN]; \
|
||||
imu.mag_unscaled.z = ms2100_values[IMU_MAG_Z_CHAN]; \
|
||||
ms2100_status = MS2100_IDLE; \
|
||||
_mag_handler(); \
|
||||
} \
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user