mirror of
https://github.com/paparazzi/paparazzi.git
synced 2026-06-04 05:42:49 +08:00
[uart] less macros: uart_getch function and uart_char_available static inline function
if uart is hardcoded, use function directly
This commit is contained in:
@@ -59,34 +59,34 @@ int main( void ) {
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while(1) {
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if (T0TC > (rx_time+((PCLK / T0_PCLK_DIV) / BLINK_MIN))) LED_OFF(1);
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if (T0TC > (tx_time+((PCLK / T0_PCLK_DIV) / BLINK_MIN))) LED_OFF(2);
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if (Uart0ChAvailable() && VCOM_check_free_space(1)) {
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if (uart_char_available(&uart0) && VCOM_check_free_space(1)) {
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LED_ON(1);
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rx_time = T0TC;
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inc = Uart0Getch();
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inc = uart_getch(&uart0);
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VCOM_putchar(inc);
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}
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if (VCOM_check_available() && Uart0CheckFreeSpace(1)) {
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if (VCOM_check_available() && uart_check_free_space(&uart0, 1)) {
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LED_ON(2);
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tx_time = T0TC;
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inc = VCOM_getchar();
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Uart0Transmit(inc);
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uart_transmit(&uart0, inc);
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}
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}
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#else
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while(1) {
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if (T0TC > (rx_time+((PCLK / T0_PCLK_DIV) / BLINK_MIN))) LED_OFF(1);
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if (T0TC > (tx_time+((PCLK / T0_PCLK_DIV) / BLINK_MIN))) LED_OFF(2);
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if (Uart1ChAvailable() && VCOM_check_free_space(1)) {
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if (uart_char_available(&uart1) && VCOM_check_free_space(1)) {
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LED_ON(1);
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rx_time = T0TC;
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inc = Uart1Getch();
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inc = uart_getch(&uart1);
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VCOM_putchar(inc);
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}
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if (VCOM_check_available() && Uart1CheckFreeSpace(1)) {
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if (VCOM_check_available() && uart_check_free_space(&uart1, 1)) {
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LED_ON(2);
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tx_time = T0TC;
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inc = VCOM_getchar();
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Uart1Transmit(inc);
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uart_transmit(&uart1, inc);
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}
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}
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#endif
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@@ -449,10 +449,10 @@ int do_log(void)
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#ifdef USE_UART0
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temp = 0;
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while (Uart0ChAvailable() && (temp++ < 128))
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while (uart_char_available(&uart0) && (temp++ < 128))
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{
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// LED_TOGGLE(LED_GREEN);
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inc = Uart0Getch();
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inc = uart_getch(&uart1);
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#ifdef LOG_XBEE
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log_xbee(inc, LOG_SOURCE_UART0);
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#else
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@@ -466,10 +466,10 @@ int do_log(void)
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#endif
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#ifdef USE_UART1
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temp = 0;
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while (Uart1ChAvailable() && (temp++ < 128))
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while (uart_char_available(&uart1) && (temp++ < 128))
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{
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// LED_TOGGLE(LED_GREEN);
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inc = Uart1Getch();
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inc = uart_getch(&uart1);
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#ifdef LOG_XBEE
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log_xbee(inc, LOG_SOURCE_UART1);
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#else
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@@ -54,12 +54,12 @@ struct __attribute__ ((packed)) spistream_uart_msg {
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// Use 3 static instances of this struct in uart_transfer_event
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// instead of a myriad of repetitive static vars:
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struct uart_state {
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struct spistream_uart_msg * msg;
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uint32_t timeout;
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uint32_t num_rx_bytes;
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uint8_t enabled;
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uint8_t has_data;
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uint8_t sent;
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struct spistream_uart_msg * msg;
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uint32_t timeout;
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uint32_t num_rx_bytes;
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uint8_t enabled;
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uint8_t has_data;
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uint8_t sent;
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};
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static struct spistream_uart_msg spistream_uart1_msg;
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@@ -103,7 +103,7 @@ static inline void main_init(void) {
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spistream_uart3_msg.uart_id = 3;
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#ifdef SPISTREAM_DEBUG
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uart_debug_transfer_init();
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uart_debug_transfer_init();
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#endif
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spistream_init(&on_spistream_msg_received,
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@@ -120,13 +120,13 @@ static inline void on_spistream_msg_received(uint8_t msg_id,
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uint8_t * data,
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uint16_t num_bytes)
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{
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spistream_send_msg(data, num_bytes, SPISTREAM_NO_WAIT);
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spistream_send_msg(data, num_bytes, SPISTREAM_NO_WAIT);
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}
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static inline void on_spistream_msg_sent(uint8_t msg_id) {
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if(spistream_wait_for_num_transfers > 0) {
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if(spistream_wait_for_num_transfers > 0) {
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spistream_wait_for_num_transfers--;
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}
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}
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}
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static inline void main_periodic(void)
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@@ -135,7 +135,7 @@ static inline void main_periodic(void)
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RunOnceEvery(1, {
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LED_PERIODIC();
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});
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});
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}
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/**
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@@ -165,18 +165,18 @@ static inline void main_event(void)
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OveroLinkEvent(on_overo_link_msg_received, on_overo_link_crc_failed);
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#ifdef SPISTREAM_DEBUG
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uart_debug_transfer_event();
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uart_debug_transfer_event();
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#else
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uart_transfer_event();
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uart_transfer_event();
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#endif
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}
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#ifdef SPISTREAM_DEBUG
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static inline void uart_debug_transfer_init(void) {
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uint16_t idx;
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for(idx = 1; idx < 700; idx++) {
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spistream_debug_msg.uart_data[idx] = idx % 40;
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}
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uint16_t idx;
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for(idx = 1; idx < 700; idx++) {
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spistream_debug_msg.uart_data[idx] = idx % 40;
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}
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}
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#endif
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@@ -189,40 +189,40 @@ static inline void uart_debug_transfer_init(void) {
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*/
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#ifdef SPISTREAM_DEBUG
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static inline void uart_debug_transfer_event(void) {
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static uint16_t len = 0;
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static uint16_t timeout = 1;
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static uint16_t len = 0;
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static uint16_t timeout = 1;
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if(timeout-- == 0) {
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timeout = 8000;
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if(spistream_wait_for_num_transfers == 0)
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{
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LED_OFF(6);
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len++;
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if(len > 700) { len = 500; }
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if(timeout-- == 0) {
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timeout = 8000;
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if(spistream_wait_for_num_transfers == 0)
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{
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LED_OFF(6);
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len++;
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if(len > 700) { len = 500; }
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spistream_debug_msg.uart_id = 1;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1-20,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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spistream_debug_msg.uart_id = 2;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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spistream_debug_msg.uart_id = 3;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1+20,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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}
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else {
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LED_ON(6);
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}
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}
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spistream_debug_msg.uart_id = 1;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1-20,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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spistream_debug_msg.uart_id = 2;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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spistream_debug_msg.uart_id = 3;
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if(spistream_send_msg((uint8_t *)&spistream_debug_msg,
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len+1+20,
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SPISTREAM_WAIT_FOR_READ)) { // +1 for UART id byte
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spistream_wait_for_num_transfers++;
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}
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}
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else {
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LED_ON(6);
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}
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}
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}
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#endif
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@@ -243,106 +243,106 @@ static inline void uart_transfer_event(void) {
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static uint8_t uart3_has_data = 0;
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static uint8_t trigger_send = 0;
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static uint8_t uart1_enabled = 1;
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static uint8_t uart2_enabled = 1;
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static uint8_t uart3_enabled = 1;
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static uint8_t uart1_enabled = 1;
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static uint8_t uart2_enabled = 1;
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static uint8_t uart3_enabled = 1;
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// We cache data availability, so it doesn't change between checks:
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uart1_has_data = Uart1ChAvailable();
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uart2_has_data = Uart2ChAvailable();
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uart3_has_data = Uart3ChAvailable();
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uart1_has_data = uart_char_available(&uart1);
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uart2_has_data = uart_char_available(&uart2);
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uart3_has_data = uart_char_available(&uart3);
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// Fill stage: Read data from UARTs into buffers, or increment
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// their timeouts if no data is available:
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if(!uart1_sent && uart1_has_data) {
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spistream_uart1_msg.uart_data[uart1_num_rx_bytes] = Uart1Getch();
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timeout_uart1 = 0;
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if(uart1_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart1_num_rx_bytes++; }
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} else { if(timeout_uart1 < timeout_trig) { timeout_uart1++; } }
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// Fill stage: Read data from UARTs into buffers, or increment
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// their timeouts if no data is available:
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if(!uart1_sent && uart1_has_data) {
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spistream_uart1_msg.uart_data[uart1_num_rx_bytes] = uart_getch(&uart1);
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timeout_uart1 = 0;
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if(uart1_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart1_num_rx_bytes++; }
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} else { if(timeout_uart1 < timeout_trig) { timeout_uart1++; } }
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if(!uart2_sent && uart2_has_data) {
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spistream_uart2_msg.uart_data[uart2_num_rx_bytes] = Uart2Getch();
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timeout_uart2 = 0;
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if(uart2_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart2_num_rx_bytes++; }
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} else { if(timeout_uart2 < timeout_trig) { timeout_uart2++; } }
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if(!uart2_sent && uart2_has_data) {
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spistream_uart2_msg.uart_data[uart2_num_rx_bytes] = uart_getch(&uart2);
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timeout_uart2 = 0;
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if(uart2_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart2_num_rx_bytes++; }
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} else { if(timeout_uart2 < timeout_trig) { timeout_uart2++; } }
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if(!uart3_sent && uart3_has_data) {
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spistream_uart3_msg.uart_data[uart3_num_rx_bytes] = Uart3Getch();
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timeout_uart3 = 0;
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if(uart3_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart3_num_rx_bytes++; }
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} else { if(timeout_uart3 < timeout_trig) { timeout_uart3++; } }
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if(!uart3_sent && uart3_has_data) {
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spistream_uart3_msg.uart_data[uart3_num_rx_bytes] = uart_getch(&uart3);
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timeout_uart3 = 0;
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if(uart3_num_rx_bytes < SPISTREAM_MAX_MESSAGE_LENGTH)
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{ uart3_num_rx_bytes++; }
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} else { if(timeout_uart3 < timeout_trig) { timeout_uart3++; } }
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trigger_send = ((!uart1_enabled ||
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(timeout_uart1 >= timeout_trig)) &&
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(!uart2_enabled ||
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(timeout_uart2 >= timeout_trig)) &&
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(!uart3_enabled ||
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(timeout_uart3 >= timeout_trig)));
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trigger_send = ((!uart1_enabled ||
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(timeout_uart1 >= timeout_trig)) &&
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(!uart2_enabled ||
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(timeout_uart2 >= timeout_trig)) &&
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(!uart3_enabled ||
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(timeout_uart3 >= timeout_trig)));
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// Send stage: If all UART timeouts reach the timeout
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// trigger value and have accumulated data to send
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if(trigger_send) {
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// Send stage: If all UART timeouts reach the timeout
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// trigger value and have accumulated data to send
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if(trigger_send) {
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// If there was no new data on any UART for some time
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// and there is data in every rx buffer:
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if(spistream_wait_for_num_transfers > 0)
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{
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// Warning LED: Could not finish all transactions
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// from last call.
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LED_ON(6);
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}
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else
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{
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LED_OFF(6);
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if(spistream_wait_for_num_transfers > 0)
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{
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// Warning LED: Could not finish all transactions
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// from last call.
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LED_ON(6);
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}
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else
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{
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LED_OFF(6);
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uart1_sent = !uart1_enabled; // If we set uartX_sent to 1 here, it
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uart2_sent = !uart2_enabled; // is just ignored for every read poll
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uart3_sent = !uart3_enabled; // as it seems to have been read already.
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uart1_sent = !uart1_enabled; // If we set uartX_sent to 1 here, it
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uart2_sent = !uart2_enabled; // is just ignored for every read poll
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uart3_sent = !uart3_enabled; // as it seems to have been read already.
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if(!uart1_sent && uart1_num_rx_bytes > 0) {
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if(spistream_send_msg((uint8_t *)&spistream_uart1_msg,
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uart1_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart1_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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if(spistream_send_msg((uint8_t *)&spistream_uart1_msg,
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uart1_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart1_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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if(!uart2_sent && uart1_num_rx_bytes > 0) {
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if(spistream_send_msg((uint8_t *)&spistream_uart2_msg,
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uart1_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart2_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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if(spistream_send_msg((uint8_t *)&spistream_uart2_msg,
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uart1_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart2_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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if(!uart3_sent && uart3_num_rx_bytes > 0) {
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if(spistream_send_msg((uint8_t *)&spistream_uart3_msg,
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uart3_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart3_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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if(spistream_send_msg((uint8_t *)&spistream_uart3_msg,
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uart3_num_rx_bytes+1, // +1 for UART id
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SPISTREAM_WAIT_FOR_READ)) {
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uart3_sent = 1;
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spistream_wait_for_num_transfers++;
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}
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}
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// Transaction completed, reset state.
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// Note: Only reset when all uart buffers have been transmitted,
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// otherwise the timeout would start from the beginning and the
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// loop phase shifts (aka "you're in the deep").
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uart1_num_rx_bytes = 0;
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uart2_num_rx_bytes = 0;
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uart3_num_rx_bytes = 0;
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timeout_uart1 = 0;
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timeout_uart2 = 0;
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timeout_uart3 = 0;
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uart1_sent = 0;
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uart2_sent = 0;
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uart3_sent = 0;
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// Transaction completed, reset state.
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// Note: Only reset when all uart buffers have been transmitted,
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// otherwise the timeout would start from the beginning and the
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// loop phase shifts (aka "you're in the deep").
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uart1_num_rx_bytes = 0;
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uart2_num_rx_bytes = 0;
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uart3_num_rx_bytes = 0;
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timeout_uart1 = 0;
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timeout_uart2 = 0;
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timeout_uart3 = 0;
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uart1_sent = 0;
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uart2_sent = 0;
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uart3_sent = 0;
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}
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}
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}
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@@ -56,11 +56,10 @@ static inline void main_periodic_task( void ) {
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static inline void main_event_task( void ) {
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if (Uart2ChAvailable())
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Uart1Transmit(Uart2Getch());
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if (Uart1ChAvailable())
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Uart2Transmit(Uart1Getch());
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if (uart_char_available(&uart2))
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uart_transmit(&uart1, uart_getch(&uart2));
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if (uart_char_available(&uart1))
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uart_transmit(&uart2, uart_getch(&uart1));
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}
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|
||||
@@ -267,9 +267,9 @@ static void test_uart_periodic(void) {
|
||||
|
||||
if (idx_tx<sizeof(buf_src)) {
|
||||
switch (direction) {
|
||||
case OneToThree : Uart1Transmit(buf_src[idx_tx]); break;
|
||||
case ThreeToOne : Uart3Transmit(buf_src[idx_tx]); break;
|
||||
default: break;
|
||||
case OneToThree : uart_transmit(&uart1, buf_src[idx_tx]); break;
|
||||
case ThreeToOne : uart_transmit(&uart3, buf_src[idx_tx]); break;
|
||||
default: break;
|
||||
}
|
||||
idx_tx++;
|
||||
}
|
||||
@@ -278,8 +278,8 @@ static void test_uart_periodic(void) {
|
||||
|
||||
static void test_uart_event(void) {
|
||||
|
||||
if (Uart3ChAvailable()) {
|
||||
buf_dest[idx_rx] = Uart3Getch();
|
||||
if (uart_char_available(&uart3)) {
|
||||
buf_dest[idx_rx] = uart_getch(&uart3);
|
||||
if (idx_rx<sizeof(buf_src)) {
|
||||
DOWNLINK_SEND_DEBUG(DefaultChannel, DefaultDevice, sizeof(buf_src), buf_dest);
|
||||
idx_rx++;
|
||||
@@ -296,8 +296,8 @@ static void test_uart_event(void) {
|
||||
}
|
||||
}
|
||||
|
||||
if (Uart1ChAvailable()) {
|
||||
buf_dest[idx_rx] = Uart1Getch();
|
||||
if (uart_char_available(&uart1)) {
|
||||
buf_dest[idx_rx] = uart_getch(&uart1);
|
||||
if (idx_rx<sizeof(buf_src)) {
|
||||
DOWNLINK_SEND_DEBUG(DefaultChannel, DefaultDevice, sizeof(buf_src), buf_dest);
|
||||
idx_rx++;
|
||||
|
||||
@@ -47,12 +47,12 @@ static inline void main_init( void ) {
|
||||
static inline void main_periodic( void ) {
|
||||
char ch;
|
||||
|
||||
Uart1Transmit('a');
|
||||
Uart2Transmit('b');
|
||||
Uart3Transmit('c');
|
||||
uart_transmit(&uart1, 'a');
|
||||
uart_transmit(&uart2, 'b');
|
||||
uart_transmit(&uart3, 'c');
|
||||
|
||||
if (Uart1ChAvailable()) {
|
||||
ch = Uart1Getch();
|
||||
if (uart_char_available(&uart1)) {
|
||||
ch = uart_getch(&uart1);
|
||||
if (ch == 'a') {
|
||||
LED_OFF(0);
|
||||
LED_ON(1);
|
||||
@@ -65,8 +65,8 @@ static inline void main_periodic( void ) {
|
||||
LED_OFF(1);
|
||||
}
|
||||
|
||||
if (Uart2ChAvailable()) {
|
||||
ch = Uart2Getch();
|
||||
if (uart_char_available(&uart2)) {
|
||||
ch = uart_getch(&uart2);
|
||||
if (ch == 'b') {
|
||||
LED_OFF(2);
|
||||
LED_ON(3);
|
||||
@@ -79,8 +79,8 @@ static inline void main_periodic( void ) {
|
||||
LED_OFF(3);
|
||||
}
|
||||
|
||||
if (Uart3ChAvailable()) {
|
||||
ch = Uart3Getch();
|
||||
if (uart_char_available(&uart3)) {
|
||||
ch = uart_getch(&uart3);
|
||||
if (ch == 'c') {
|
||||
LED_OFF(4);
|
||||
LED_ON(5);
|
||||
|
||||
@@ -55,16 +55,16 @@ static inline void main_init( void ) {
|
||||
static inline void main_periodic( void ) {
|
||||
char ch;
|
||||
|
||||
Uart1Transmit('a');
|
||||
Uart2Transmit('b');
|
||||
Uart3Transmit('c');
|
||||
Uart5Transmit('d');
|
||||
uart_transmit(&uart1, 'a');
|
||||
uart_transmit(&uart2, 'b');
|
||||
uart_transmit(&uart3, 'c');
|
||||
uart_transmit(&uart5, 'd');
|
||||
|
||||
LED_OFF(1);
|
||||
LED_OFF(2);
|
||||
|
||||
if (Uart1ChAvailable()) {
|
||||
ch = Uart1Getch();
|
||||
if (uart_char_available(&uart1)) {
|
||||
ch = uart_getch(&uart1);
|
||||
if (ch == 'a') {
|
||||
LED_ON(1);
|
||||
} else {
|
||||
@@ -72,8 +72,8 @@ static inline void main_periodic( void ) {
|
||||
}
|
||||
}
|
||||
|
||||
if (Uart2ChAvailable()) {
|
||||
ch = Uart2Getch();
|
||||
if (uart_char_available(&uart2)) {
|
||||
ch = uart_getch(&uart2);
|
||||
if (ch == 'b') {
|
||||
LED_ON(1);
|
||||
} else {
|
||||
@@ -81,8 +81,8 @@ static inline void main_periodic( void ) {
|
||||
}
|
||||
}
|
||||
|
||||
if (Uart3ChAvailable()) {
|
||||
ch = Uart3Getch();
|
||||
if (uart_char_available(&uart3)) {
|
||||
ch = uart_getch(&uart3);
|
||||
if (ch == 'c') {
|
||||
LED_ON(1);
|
||||
} else {
|
||||
@@ -90,8 +90,8 @@ static inline void main_periodic( void ) {
|
||||
}
|
||||
}
|
||||
|
||||
if (Uart5ChAvailable()) {
|
||||
ch = Uart5Getch();
|
||||
if (uart_char_available(&uart5)) {
|
||||
ch = uart_getch(&uart5);
|
||||
if (ch == 'd') {
|
||||
LED_ON(1);
|
||||
} else {
|
||||
|
||||
@@ -57,3 +57,8 @@ bool_t uart_check_free_space(struct uart_periph* p, uint8_t len) {
|
||||
return (uint16_t)(space - 1) >= len;
|
||||
}
|
||||
|
||||
uint8_t uart_getch(struct uart_periph* p) {
|
||||
uint8_t ret = p->rx_buf[p->rx_extract_idx];
|
||||
p->rx_extract_idx = (p->rx_extract_idx + 1) % UART_RX_BUFFER_SIZE;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -73,14 +73,11 @@ extern void uart_periph_init(struct uart_periph* p);
|
||||
extern void uart_periph_set_baudrate(struct uart_periph* p, enum UartBaud, bool_t hw_flow_control);
|
||||
extern void uart_transmit(struct uart_periph* p, uint8_t data);
|
||||
extern bool_t uart_check_free_space(struct uart_periph* p, uint8_t len);
|
||||
extern uint8_t uart_getch(struct uart_periph* p);
|
||||
|
||||
#define UartChAvailable(_p) (_p.rx_insert_idx != _p.rx_extract_idx)
|
||||
|
||||
#define UartGetch(_p) ({ \
|
||||
uint8_t ret = _p.rx_buf[_p.rx_extract_idx]; \
|
||||
_p.rx_extract_idx = (_p.rx_extract_idx + 1)%UART_RX_BUFFER_SIZE; \
|
||||
ret; \
|
||||
})
|
||||
static inline bool_t uart_char_available(struct uart_periph* p) {
|
||||
return (p->rx_insert_idx != p->rx_extract_idx);
|
||||
}
|
||||
|
||||
|
||||
#ifdef USE_UART0
|
||||
@@ -91,8 +88,8 @@ extern void uart0_init(void);
|
||||
#define Uart0CheckFreeSpace(_x) uart_check_free_space(&uart0, _x)
|
||||
#define Uart0Transmit(_x) uart_transmit(&uart0, _x)
|
||||
#define Uart0SendMessage() {}
|
||||
#define Uart0ChAvailable() UartChAvailable(uart0)
|
||||
#define Uart0Getch() UartGetch(uart0)
|
||||
#define Uart0ChAvailable() uart_char_available(&uart0)
|
||||
#define Uart0Getch() uart_getch(&uart0)
|
||||
#define Uart0TxRunning uart0.tx_running
|
||||
#define Uart0SetBaudrate(_b) uart_periph_set_baudrate(&uart0, _b, FALSE)
|
||||
|
||||
@@ -115,8 +112,8 @@ extern void uart1_init(void);
|
||||
#define Uart1CheckFreeSpace(_x) uart_check_free_space(&uart1, _x)
|
||||
#define Uart1Transmit(_x) uart_transmit(&uart1, _x)
|
||||
#define Uart1SendMessage() {}
|
||||
#define Uart1ChAvailable() UartChAvailable(uart1)
|
||||
#define Uart1Getch() UartGetch(uart1)
|
||||
#define Uart1ChAvailable() uart_char_available(&uart1)
|
||||
#define Uart1Getch() uart_getch(&uart1)
|
||||
#define Uart1TxRunning uart1.tx_running
|
||||
#if UART1_HW_FLOW_CONTROL
|
||||
#define Uart1SetBaudrate(_b) uart_periph_set_baudrate(&uart1, _b, TRUE)
|
||||
@@ -143,8 +140,8 @@ extern void uart2_init(void);
|
||||
#define Uart2CheckFreeSpace(_x) uart_check_free_space(&uart2, _x)
|
||||
#define Uart2Transmit(_x) uart_transmit(&uart2, _x)
|
||||
#define Uart2SendMessage() {}
|
||||
#define Uart2ChAvailable() UartChAvailable(uart2)
|
||||
#define Uart2Getch() UartGetch(uart2)
|
||||
#define Uart2ChAvailable() uart_char_available(&uart2)
|
||||
#define Uart2Getch() uart_getch(&uart2)
|
||||
#define Uart2TxRunning uart2.tx_running
|
||||
#define Uart2SetBaudrate(_b) uart_periph_set_baudrate(&uart2, _b, FALSE)
|
||||
|
||||
@@ -167,8 +164,8 @@ extern void uart3_init(void);
|
||||
#define Uart3CheckFreeSpace(_x) uart_check_free_space(&uart3, _x)
|
||||
#define Uart3Transmit(_x) uart_transmit(&uart3, _x)
|
||||
#define Uart3SendMessage() {}
|
||||
#define Uart3ChAvailable() UartChAvailable(uart3)
|
||||
#define Uart3Getch() UartGetch(uart3)
|
||||
#define Uart3ChAvailable() uart_char_available(&uart3)
|
||||
#define Uart3Getch() uart_getch(&uart3)
|
||||
#define Uart3TxRunning uart3.tx_running
|
||||
#define Uart3SetBaudrate(_b) uart_periph_set_baudrate(&uart3, _b, FALSE)
|
||||
|
||||
@@ -191,8 +188,8 @@ extern void uart5_init(void);
|
||||
#define Uart5CheckFreeSpace(_x) uart_check_free_space(&uart5, _x)
|
||||
#define Uart5Transmit(_x) uart_transmit(&uart5, _x)
|
||||
#define Uart5SendMessage() {}
|
||||
#define Uart5ChAvailable() UartChAvailable(uart5)
|
||||
#define Uart5Getch() UartGetch(uart5)
|
||||
#define Uart5ChAvailable() uart_char_available(&uart5)
|
||||
#define Uart5Getch() uart_getch(&uart5)
|
||||
#define Uart5TxRunning uart5.tx_running
|
||||
#define Uart5SetBaudrate(_b) uart_periph_set_baudrate(&uart5, _b, FALSE)
|
||||
|
||||
|
||||
@@ -37,7 +37,7 @@ static inline void main_init( void ) {
|
||||
mcu_init();
|
||||
sys_time_register_timer((1./PERIODIC_FREQUENCY), NULL);
|
||||
led_init();
|
||||
Uart0Init();
|
||||
uart_init(&uart0);
|
||||
|
||||
spi_init();
|
||||
sd_card_init();
|
||||
|
||||
@@ -42,10 +42,10 @@ int main (int argc, char** argv) {
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART0
|
||||
Uart0Init();
|
||||
uart_periph_init(&uart0);
|
||||
#endif
|
||||
#ifdef USE_UART1
|
||||
Uart1Init();
|
||||
uart_periph_init(&uart1);
|
||||
#endif
|
||||
|
||||
mcu_int_enable();
|
||||
|
||||
Reference in New Issue
Block a user