Huang Qi 6ea3bc1217 riscv/debug: Add support for steppoint ...

Steppoint can be implemented by icount(instruction count)
from RISC-V debug extension, but it may not implemented in all RISC-V cores.

Unfortunately, the currently supported RISC-V cores do not implement it.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

2024-08-01 13:57:51 +08:00

..

arm

arch/xmc4 : i2c driver

2024-07-30 18:23:19 +08:00

arm64

zynq-mpsoc/zcu111: independent JTAG configs from normal nsh configs

2024-07-30 12:41:30 -03:00

avr

at32uc3a0: Initial work for SimpleMachines' Mizar32-A

2024-07-15 20:46:41 +08:00

ceva

Revert "irq: remove restore_critical_section in irq"

2024-07-02 15:46:20 +08:00

dummy

…

hc

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

mips

spin_lock: inline spin_lock

2024-07-15 02:29:30 +08:00

misoc

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

or1k

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

renesas

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

risc-v

riscv/debug: Add support for steppoint

2024-08-01 13:57:51 +08:00

sim

arch/sim/Makefile: add openh264 & x264 include path

2024-07-16 08:33:50 -03:00

sparc

spin_lock: inline spin_lock

2024-07-15 02:29:30 +08:00

tricore

tricore/cmake: add support of cmake build for tricore

2024-07-18 13:40:49 +08:00

x86

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

x86_64

arch/intel64/irq.h: rename rdtsc macros

2024-07-30 21:53:08 +08:00

xtensa

up_copy_section: Improve function description

2024-07-31 02:33:12 +08:00

z16

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

z80

sched: move nxsched_dumponexit() to task_exithook

2024-06-30 17:30:42 +08:00

CMakeLists.txt

…

Kconfig

libc/x86_64: port string functions from bionic

2024-07-02 23:59:18 +08:00