libc/x86_64: port string functions from bionic

port optimized string functions for x86_64 from Bionic (BSD licensed)

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>

LICENSE

@@ -8634,3 +8634,43 @@ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 SUCH DAMAGE.
+
+libs/libc/machine/x86_64/gnu/arch_memcmp.S
+libs/libc/machine/x86_64/gnu/arch_memset_avx2.S
+libs/libc/machine/x86_64/gnu/arch_memset_sse2.S
+libs/libc/machine/x86_64/gnu/arch_stpcpy.S
+libs/libc/machine/x86_64/gnu/arch_stpncpy.S
+libs/libc/machine/x86_64/gnu/arch_strcat.S
+libs/libc/machine/x86_64/gnu/arch_strcpy.S
+libs/libc/machine/x86_64/gnu/arch_strlen.S
+libs/libc/machine/x86_64/gnu/arch_strncmp.S
+libs/libc/machine/x86_64/gnu/arch_strncpy.S
+libs/libc/machine/x86_64/gnu/cache.h
+======================
+Copyright (c) 2014, Intel Corporation
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright notice,
+    * this list of conditions and the following disclaimer.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+    * this list of conditions and the following disclaimer in the documentation
+    * and/or other materials provided with the distribution.
+
+    * Neither the name of Intel Corporation nor the names of its contributors
+    * may be used to endorse or promote products derived from this software
+    * without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

arch/Kconfig

@@ -138,6 +138,7 @@ config ARCH_X86_64
 	select ARCH_HAVE_INTERRUPTSTACK
 	select ARCH_HAVE_CUSTOMOPT
 	select LIBC_ARCH_ELF_64BIT if LIBC_ARCH_ELF
+	select ARCH_TOOLCHAIN_GNU
 	---help---
 		x86-64 architectures.
 

libs/libc/machine/Kconfig

@@ -128,6 +128,14 @@ config LIBC_ARCH_STRNCASECMP
 	bool
 	default n
 
+config LIBC_ARCH_STPCPY
+	bool
+	default n
+
+config LIBC_ARCH_STPNCPY
+	bool
+	default n
+
 config LIBC_ARCH_ELF
 	bool
 	default n
@@ -788,6 +796,9 @@ endif
 if ARCH_X86
 source "libs/libc/machine/x86/Kconfig"
 endif
+if ARCH_X86_64
+source "libs/libc/machine/x86_64/Kconfig"
+endif
 if ARCH_XTENSA
 source "libs/libc/machine/xtensa/Kconfig"
 endif

libs/libc/machine/Make.defs

@@ -37,6 +37,9 @@ endif
 ifeq ($(CONFIG_ARCH_X86),y)
 include $(TOPDIR)/libs/libc/machine/x86/Make.defs
 endif
+ifeq ($(CONFIG_ARCH_X86_64),y)
+include $(TOPDIR)/libs/libc/machine/x86_64/Make.defs
+endif
 ifeq ($(CONFIG_ARCH_XTENSA),y)
 include $(TOPDIR)/libs/libc/machine/xtensa/Make.defs
 endif

libs/libc/machine/x86_64/CMakeLists.txt

@@ -17,3 +17,9 @@
 # the License.
 #
 # ##############################################################################
+
+add_subdirectory(gnu)
+
+set(SRCS)
+
+target_sources(c PRIVATE ${SRCS})

libs/libc/machine/x86_64/Kconfig

@@ -2,3 +2,94 @@
 # For a description of the syntax of this configuration file,
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
+
+if ARCH_TOOLCHAIN_GNU && ALLOW_BSD_COMPONENTS
+
+config X86_64_MEMCMP
+	bool "Enable optimized memcmp() for X86_64"
+	select LIBC_ARCH_MEMCMP
+	depends on ARCH_HAVE_SSE41
+	---help---
+		Enable optimized X86_64 specific memcmp() library function
+
+config X86_64_MEMMOVE
+	bool "Enable optimized memmove()/memcpy() for X86_64"
+	default n
+	select LIBC_ARCH_MEMMOVE
+	select LIBC_ARCH_MEMCPY
+	---help---
+		Enable optimized X86_64 specific memmove()/memcpy() library function
+
+config X86_64_MEMSET
+	bool "Enable optimized memset() for X86_64"
+	default n
+	select LIBC_ARCH_MEMSET
+	---help---
+		Enable optimized X86_64 specific memset() library function
+
+config X86_64_STPCPY
+	bool "Enable optimized stpcpy() for X86_64"
+	default n
+	select LIBC_ARCH_STPCPY
+	---help---
+		Enable optimized X86_64 specific stpcpy() library function
+
+config X86_64_STPNCPY
+	bool "Enable optimized stpncpy() for X86_64"
+	default n
+	select LIBC_ARCH_STPNCPY
+	---help---
+		Enable optimized X86_64 specific stpncpy() library function
+
+config X86_64_STRCAT
+	bool "Enable optimized strcat() for X86_64"
+	default n
+	select LIBC_ARCH_STRCAT
+	---help---
+		Enable optimized X86_64 specific strcat() library function
+
+config X86_64_STRCMP
+	bool "Enable optimized strcmp() for X86_64"
+	default n
+	select LIBC_ARCH_STRCMP
+	depends on ARCH_HAVE_SSSE3
+	---help---
+		Enable optimized X86_64 specific strcmp() library function
+
+config X86_64_STRNCMP
+	bool "Enable optimized strncmp() for X86_64"
+	default n
+	select LIBC_ARCH_STRNCMP
+	depends on ARCH_HAVE_SSSE3
+	---help---
+		Enable optimized X86_64 specific strncmp() library function
+
+config X86_64_STRCPY
+	bool "Enable optimized strcpy() for X86_64"
+	default n
+	select LIBC_ARCH_STRCPY
+	---help---
+		Enable optimized X86_64 specific strcpy() library function
+
+config X86_64_STRLEN
+	bool "Enable optimized strlen() for X86_64"
+	default n
+	select LIBC_ARCH_STRLEN
+	---help---
+		Enable optimized X86_64 specific strlen() library function
+
+config X86_64_STRNCPY
+	bool "Enable optimized strncpy() for X86_64"
+	default n
+	select LIBC_ARCH_STRNCPY
+	---help---
+		Enable optimized X86_64 specific strncpy() library function
+
+config X86_64_STRNCMP
+	bool "Enable optimized strncmp() for X86_64"
+	default n
+	select LIBC_ARCH_STRNCMP
+	---help---
+		Enable optimized X86_64 specific strncmp() library function
+
+endif # ARCH_TOOLCHAIN_GNU && ALLOW_BSD_COMPONENTS

libs/libc/machine/x86_64/Make.defs

@@ -0,0 +1,75 @@
+############################################################################
+# libs/libc/machine/x86_64/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+ifeq ($(CONFIG_X86_64_MEMCMP),y)
+ASRCS += arch_memcmp.S
+endif
+
+ifeq ($(CONFIG_X86_64_MEMMOVE),y)
+ASRCS += arch_memmove.S
+endif
+
+ifeq ($(CONFIG_X86_64_MEMSET),y)
+  ifeq ($(CONFIG_ARCH_X86_64_AVX),y)
+    ASRCS += arch_memset_avx2.S
+  else
+    ASRCS += arch_memset_sse2.S
+  endif
+endif
+
+ifeq ($(CONFIG_X86_64_STPCPY),y)
+ASRCS += arch_stpcpy.S
+endif
+
+ifeq ($(CONFIG_X86_64_STPNCPY),y)
+ASRCS += arch_stpncpy.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRCAT),y)
+ASRCS += arch_strcat.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRCMP),y)
+ASRCS += arch_strcmp.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRCPY),y)
+ASRCS += arch_strcpy.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRLEN),y)
+ASRCS += arch_strlen.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRNCPY),y)
+ASRCS += arch_strncpy.S
+endif
+
+ifeq ($(CONFIG_X86_64_STRNCMP),y)
+ASRCS += arch_strncmp.S
+endif
+
+ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
+DEPPATH += --dep-path machine/x86_64/gnu
+VPATH += :machine/x86_64/gnu
+endif
+
+DEPPATH += --dep-path machine/x86_64
+VPATH += :machine/x86_64

libs/libc/machine/x86_64/gnu/CMakeLists.txt

@@ -0,0 +1,71 @@
+# ##############################################################################
+# libs/libc/machine/X86_64/gnu/CMakeLists.txt
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+if(CONFIG_X86_64_MEMCMP)
+  list(APPEND SRCS arch_memcmp.S)
+endif()
+
+if(CONFIG_X86_64_MEMMOVE)
+  list(APPEND SRCS arch_memmove.S)
+endif()
+
+if(CONFIG_X86_64_MEMSET)
+  if(CONFIG_ARCH_X86_64_AVX)
+    list(APPEND SRCS arch_memset_avx2.S)
+  else()
+    list(APPEND SRCS arch_memset_sse2.S)
+  endif()
+endif()
+
+if(CONFIG_X86_64_STPCPY)
+  list(APPEND SRCS arch_stpcpy.S)
+endif()
+
+if(CONFIG_X86_64_STPNCPY)
+  list(APPEND SRCS arch_stpncpy.S)
+endif()
+
+if(CONFIG_X86_64_STRCAT)
+  list(APPEND SRCS arch_strcat.S)
+endif()
+
+if(CONFIG_X86_64_STRCMP)
+  list(APPEND SRCS arch_strcmp.S)
+endif()
+
+if(CONFIG_X86_64_STRCPY)
+  list(APPEND SRCS arch_strcpy.S)
+endif()
+
+if(CONFIG_X86_64_STRLEN)
+  list(APPEND SRCS arch_strlen.S)
+endif()
+
+if(CONFIG_X86_64_STRNCPY)
+  list(APPEND SRCS arch_strncpy.S)
+endif()
+
+if(CONFIG_X86_64_STRNCMP)
+  list(APPEND SRCS arch_strncmp.S)
+endif()
+
+target_sources(c PRIVATE ${SRCS})

libs/libc/machine/x86_64/gnu/arch_memset_avx2.S

@@ -0,0 +1,179 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_memset_avx2.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#include "cache.h"
+
+/*********************************************************************************
+ * Pre-processor Definitions
+ *********************************************************************************/
+
+#ifndef L
+# define L(label)	.L##label
+#endif
+
+#ifndef ALIGN
+# define ALIGN(n)	.p2align n
+#endif
+
+#define ENTRY(__f)         \
+  .text;                   \
+  .global __f;             \
+  .balign 16;              \
+  .type __f, @function;    \
+__f:                       \
+  .cfi_startproc;
+
+#define END(__f) \
+  .cfi_endproc;  \
+  .size __f, .- __f;
+
+/*********************************************************************************
+ * Public Functions
+ *********************************************************************************/
+
+	.section .text.avx2,"ax",@progbits
+
+ENTRY(memset)
+	movq	%rdi, %rax
+	and	$0xff, %rsi
+	mov	$0x0101010101010101, %rcx
+	imul	%rsi, %rcx
+	cmpq	$16, %rdx
+	jae	L(16bytesormore)
+	testb	$8, %dl
+	jnz	L(8_15bytes)
+	testb	$4, %dl
+	jnz	L(4_7bytes)
+	testb	$2, %dl
+	jnz	L(2_3bytes)
+	testb	$1, %dl
+	jz	1f
+	movb	%cl, (%rdi)
+1:	ret
+
+L(8_15bytes):
+	movq	%rcx, (%rdi)
+	movq	%rcx, -8(%rdi, %rdx)
+	ret
+
+L(4_7bytes):
+	movl	%ecx, (%rdi)
+	movl	%ecx, -4(%rdi, %rdx)
+	ret
+
+L(2_3bytes):
+	movw	%cx, (%rdi)
+	movw	%cx, -2(%rdi, %rdx)
+	ret
+
+	ALIGN (4)
+L(16bytesormore):
+	movd	%rcx, %xmm0
+	pshufd	$0, %xmm0, %xmm0
+	movdqu	%xmm0, (%rdi)
+	movdqu	%xmm0, -16(%rdi, %rdx)
+	cmpq	$32, %rdx
+	jbe	L(done)
+	movdqu	%xmm0, 16(%rdi)
+	movdqu	%xmm0, -32(%rdi, %rdx)
+	cmpq	$64, %rdx
+	jbe	L(done)
+	movdqu	%xmm0, 32(%rdi)
+	movdqu	%xmm0, 48(%rdi)
+	movdqu	%xmm0, -64(%rdi, %rdx)
+	movdqu	%xmm0, -48(%rdi, %rdx)
+	cmpq	$128, %rdx
+	jbe	L(done)
+	vpbroadcastb %xmm0, %ymm0
+	vmovdqu	%ymm0, 64(%rdi)
+	vmovdqu	%ymm0, 96(%rdi)
+	vmovdqu	%ymm0, -128(%rdi, %rdx)
+	vmovdqu	%ymm0, -96(%rdi, %rdx)
+	cmpq	$256, %rdx
+	jbe	L(done)
+
+	ALIGN (4)
+	leaq	128(%rdi), %rcx
+	andq	$-128, %rcx
+	movq	%rdx, %r8
+	addq	%rdi, %rdx
+	andq	$-128, %rdx
+	cmpq	%rcx, %rdx
+	je	L(done)
+
+#ifdef SHARED_CACHE_SIZE
+	cmp	$SHARED_CACHE_SIZE, %r8
+#else
+	cmp	__x86_64_shared_cache_size(%rip), %r8
+#endif
+	ja	L(non_temporal_loop)
+
+	ALIGN (4)
+L(normal_loop):
+	vmovdqa	%ymm0, (%rcx)
+	vmovdqa	%ymm0, 32(%rcx)
+	vmovdqa	%ymm0, 64(%rcx)
+	vmovdqa	%ymm0, 96(%rcx)
+	addq	$128, %rcx
+	cmpq	%rcx, %rdx
+	jne	L(normal_loop)
+	jmp	L(done)
+
+	ALIGN (4)
+L(non_temporal_loop):
+	movntdq	 %xmm0, (%rcx)
+	movntdq	 %xmm0, 16(%rcx)
+	movntdq	 %xmm0, 32(%rcx)
+	movntdq	 %xmm0, 48(%rcx)
+	movntdq	 %xmm0, 64(%rcx)
+	movntdq	 %xmm0, 80(%rcx)
+	movntdq	 %xmm0, 96(%rcx)
+	movntdq	 %xmm0, 112(%rcx)
+	leaq	128(%rcx), %rcx
+	cmpq	%rcx, %rdx
+	jne	L(non_temporal_loop)
+	/* We used non-temporal stores, so we need a fence here. */
+	sfence
+
+L(done):
+  /* We used the ymm registers, and that can break SSE2 performance
+   * unless you do this.
+   */
+	vzeroupper
+	ret
+
+END(memset)

libs/libc/machine/x86_64/gnu/arch_memset_sse2.S

@@ -0,0 +1,166 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_memset_sse2.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#include "cache.h"
+
+/*********************************************************************************
+ * Pre-processor Definitions
+ *********************************************************************************/
+
+#ifndef L
+# define L(label)	.L##label
+#endif
+
+#ifndef ALIGN
+# define ALIGN(n)	.p2align n
+#endif
+
+#define ENTRY(__f)         \
+  .text;                   \
+  .global __f;             \
+  .balign 16;              \
+  .type __f, @function;    \
+__f:                       \
+  .cfi_startproc;
+
+#define END(__f) \
+  .cfi_endproc;  \
+  .size __f, .- __f;
+
+/*********************************************************************************
+ * Public Functions
+ *********************************************************************************/
+
+	.section .text.sse2,"ax",@progbits
+
+ENTRY(memset)
+	movq	%rdi, %rax
+	and	$0xff, %rsi
+	mov	$0x0101010101010101, %rcx
+	imul	%rsi, %rcx
+	cmpq	$16, %rdx
+	jae	L(16bytesormore)
+	testb	$8, %dl
+	jnz	L(8_15bytes)
+	testb	$4, %dl
+	jnz	L(4_7bytes)
+	testb	$2, %dl
+	jnz	L(2_3bytes)
+	testb	$1, %dl
+	jz	L(return)
+	movb	%cl, (%rdi)
+L(return):
+	ret
+
+L(8_15bytes):
+	movq	%rcx, (%rdi)
+	movq	%rcx, -8(%rdi, %rdx)
+	ret
+
+L(4_7bytes):
+	movl	%ecx, (%rdi)
+	movl	%ecx, -4(%rdi, %rdx)
+	ret
+
+L(2_3bytes):
+	movw	%cx, (%rdi)
+	movw	%cx, -2(%rdi, %rdx)
+	ret
+
+	ALIGN (4)
+L(16bytesormore):
+	movd	%rcx, %xmm0
+	pshufd	$0, %xmm0, %xmm0
+	movdqu	%xmm0, (%rdi)
+	movdqu	%xmm0, -16(%rdi, %rdx)
+	cmpq	$32, %rdx
+	jbe	L(32bytesless)
+	movdqu	%xmm0, 16(%rdi)
+	movdqu	%xmm0, -32(%rdi, %rdx)
+	cmpq	$64, %rdx
+	jbe	L(64bytesless)
+	movdqu	%xmm0, 32(%rdi)
+	movdqu	%xmm0, 48(%rdi)
+	movdqu	%xmm0, -64(%rdi, %rdx)
+	movdqu	%xmm0, -48(%rdi, %rdx)
+	cmpq	$128, %rdx
+	ja	L(128bytesmore)
+L(32bytesless):
+L(64bytesless):
+	ret
+
+	ALIGN (4)
+L(128bytesmore):
+	leaq	64(%rdi), %rcx
+	andq	$-64, %rcx
+	movq	%rdx, %r8
+	addq	%rdi, %rdx
+	andq	$-64, %rdx
+	cmpq	%rcx, %rdx
+	je	L(return)
+
+#ifdef SHARED_CACHE_SIZE
+	cmp	$SHARED_CACHE_SIZE, %r8
+#else
+	cmp	__x86_64_shared_cache_size(%rip), %r8
+#endif
+	ja	L(128bytesmore_nt)
+
+	ALIGN (4)
+L(128bytesmore_normal):
+	movdqa	%xmm0, (%rcx)
+	movaps	%xmm0, 0x10(%rcx)
+	movaps	%xmm0, 0x20(%rcx)
+	movaps	%xmm0, 0x30(%rcx)
+	addq	$64, %rcx
+	cmpq	%rcx, %rdx
+	jne	L(128bytesmore_normal)
+	ret
+
+	ALIGN (4)
+L(128bytesmore_nt):
+	movntdq	%xmm0, (%rcx)
+	movntdq	%xmm0, 0x10(%rcx)
+	movntdq	%xmm0, 0x20(%rcx)
+	movntdq	%xmm0, 0x30(%rcx)
+	leaq	64(%rcx), %rcx
+	cmpq	%rcx, %rdx
+	jne	L(128bytesmore_nt)
+	sfence
+	ret
+
+END(memset)

libs/libc/machine/x86_64/gnu/arch_stpcpy.S

@@ -0,0 +1,40 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_stpcpy.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#define USE_AS_STPCPY
+#define STRCPY		stpcpy
+#include "arch_strcpy.S"

libs/libc/machine/x86_64/gnu/arch_stpncpy.S

@@ -0,0 +1,41 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_strpcpy.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#define USE_AS_STRNCPY
+#define USE_AS_STPCPY
+#define STRCPY		stpncpy
+#include "arch_strcpy.S"

libs/libc/machine/x86_64/gnu/arch_strcat.S

@@ -0,0 +1,98 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_strcat.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/*********************************************************************************
+ * Pre-processor Definitions
+ *********************************************************************************/
+
+#ifndef STRCAT
+# define STRCAT		strcat
+#endif
+
+#ifndef L
+# define L(label)		.L##label
+#endif
+
+#ifndef cfi_startproc
+# define cfi_startproc		 .cfi_startproc
+#endif
+
+#ifndef cfi_endproc
+# define cfi_endproc		.cfi_endproc
+#endif
+
+#ifndef ENTRY
+# define ENTRY(name)      \
+	.type name,  @function; \
+	.globl name;            \
+	.p2align 4;             \
+name:                     \
+	cfi_startproc
+#endif
+
+#ifndef END
+# define END(name)    \
+	cfi_endproc;        \
+	.size name, .-name
+#endif
+
+#define USE_AS_STRCAT
+
+/*********************************************************************************
+ * Public Functions
+ *********************************************************************************/
+
+.text
+ENTRY (STRCAT)
+	mov	%rdi, %r9
+#ifdef USE_AS_STRNCAT
+	mov	%rdx, %r8
+#endif
+
+#define RETURN jmp L(Strcpy)
+#include "arch_strlen.S"
+
+#undef RETURN
+#define RETURN ret
+
+L(Strcpy):
+	lea	(%r9, %rax), %rdi
+	mov	%rsi, %rcx
+	mov	%r9, %rax	/* save result */
+
+#ifdef USE_AS_STRNCAT
+	test	%r8, %r8
+	jz	L(ExitZero)
+# define USE_AS_STRNCPY
+#endif
+#include "arch_strcpy.S"

libs/libc/machine/x86_64/gnu/arch_strlen.S

@@ -0,0 +1,305 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_strlen.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/*********************************************************************************
+ * Pre-processor Definitions
+ *********************************************************************************/
+
+#ifndef USE_AS_STRCAT
+
+#ifndef STRLEN
+# define STRLEN		strlen
+#endif
+
+#ifndef L
+# define L(label)	.L##label
+#endif
+
+#ifndef cfi_startproc
+# define cfi_startproc			.cfi_startproc
+#endif
+
+#ifndef cfi_endproc
+# define cfi_endproc			.cfi_endproc
+#endif
+
+#ifndef ENTRY
+# define ENTRY(name)			\
+	.type name,  @function;	\
+	.globl name;            \
+	.p2align 4;			        \
+name:					            \
+	cfi_startproc
+#endif
+
+#ifndef END
+# define END(name)  \
+	cfi_endproc;			\
+	.size name, .-name
+#endif
+#define RETURN ret
+
+/*********************************************************************************
+ * Public Functions
+ *********************************************************************************/
+
+	.section .text.sse2,"ax",@progbits
+ENTRY (STRLEN)
+/* end ifndef USE_AS_STRCAT */
+#endif
+	xor	%rax, %rax
+	mov	%edi, %ecx
+	and	$0x3f, %ecx
+	pxor	%xmm0, %xmm0
+	cmp	$0x30, %ecx
+	ja	L(next)
+	movdqu	(%rdi), %xmm1
+	pcmpeqb	%xmm1, %xmm0
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit_less16)
+	mov	%rdi, %rax
+	and	$-16, %rax
+	jmp	L(align16_start)
+L(next):
+	mov	%rdi, %rax
+	and	$-16, %rax
+	pcmpeqb	(%rax), %xmm0
+	mov	$-1, %r10d
+	sub	%rax, %rcx
+	shl	%cl, %r10d
+	pmovmskb %xmm0, %edx
+	and	%r10d, %edx
+	jnz	L(exit)
+L(align16_start):
+	pxor	%xmm0, %xmm0
+	pxor	%xmm1, %xmm1
+	pxor	%xmm2, %xmm2
+	pxor	%xmm3, %xmm3
+	pcmpeqb	16(%rax), %xmm0
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit16)
+
+	pcmpeqb	32(%rax), %xmm1
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit32)
+
+	pcmpeqb	48(%rax), %xmm2
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit48)
+
+	pcmpeqb	64(%rax), %xmm3
+	pmovmskb %xmm3, %edx
+	test	%edx, %edx
+	jnz	L(exit64)
+
+	pcmpeqb	80(%rax), %xmm0
+	add	$64, %rax
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit16)
+
+	pcmpeqb	32(%rax), %xmm1
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit32)
+
+	pcmpeqb	48(%rax), %xmm2
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit48)
+
+	pcmpeqb	64(%rax), %xmm3
+	pmovmskb %xmm3, %edx
+	test	%edx, %edx
+	jnz	L(exit64)
+
+	pcmpeqb	80(%rax), %xmm0
+	add	$64, %rax
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit16)
+
+	pcmpeqb	32(%rax), %xmm1
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit32)
+
+	pcmpeqb	48(%rax), %xmm2
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit48)
+
+	pcmpeqb	64(%rax), %xmm3
+	pmovmskb %xmm3, %edx
+	test	%edx, %edx
+	jnz	L(exit64)
+
+	pcmpeqb	80(%rax), %xmm0
+	add	$64, %rax
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit16)
+
+	pcmpeqb	32(%rax), %xmm1
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit32)
+
+	pcmpeqb	48(%rax), %xmm2
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit48)
+
+	pcmpeqb	64(%rax), %xmm3
+	pmovmskb %xmm3, %edx
+	test	%edx, %edx
+	jnz	L(exit64)
+
+	test	$0x3f, %rax
+	jz	L(align64_loop)
+
+	pcmpeqb	80(%rax), %xmm0
+	add	$80, %rax
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit)
+
+	test	$0x3f, %rax
+	jz	L(align64_loop)
+
+	pcmpeqb	16(%rax), %xmm1
+	add	$16, %rax
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit)
+
+	test	$0x3f, %rax
+	jz	L(align64_loop)
+
+	pcmpeqb	16(%rax), %xmm2
+	add	$16, %rax
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit)
+
+	test	$0x3f, %rax
+	jz	L(align64_loop)
+
+	pcmpeqb	16(%rax), %xmm3
+	add	$16, %rax
+	pmovmskb %xmm3, %edx
+	test	%edx, %edx
+	jnz	L(exit)
+
+	add	$16, %rax
+	.p2align 4
+	L(align64_loop):
+	movaps	(%rax),	%xmm4
+	pminub	16(%rax), 	%xmm4
+	movaps	32(%rax), 	%xmm5
+	pminub	48(%rax), 	%xmm5
+	add	$64, 	%rax
+	pminub	%xmm4,	%xmm5
+	pcmpeqb	%xmm0,	%xmm5
+	pmovmskb %xmm5,	%edx
+	test	%edx,	%edx
+	jz	L(align64_loop)
+
+
+	pcmpeqb	-64(%rax), %xmm0
+	sub	$80, 	%rax
+	pmovmskb %xmm0, %edx
+	test	%edx, %edx
+	jnz	L(exit16)
+
+	pcmpeqb	32(%rax), %xmm1
+	pmovmskb %xmm1, %edx
+	test	%edx, %edx
+	jnz	L(exit32)
+
+	pcmpeqb	48(%rax), %xmm2
+	pmovmskb %xmm2, %edx
+	test	%edx, %edx
+	jnz	L(exit48)
+
+	pcmpeqb	64(%rax), %xmm3
+	pmovmskb %xmm3, %edx
+	sub	%rdi, %rax
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	add	$64, %rax
+	RETURN
+
+	.p2align 4
+L(exit):
+	sub	%rdi, %rax
+L(exit_less16):
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	RETURN
+	.p2align 4
+L(exit16):
+	sub	%rdi, %rax
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	add	$16, %rax
+	RETURN
+	.p2align 4
+L(exit32):
+	sub	%rdi, %rax
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	add	$32, %rax
+	RETURN
+	.p2align 4
+L(exit48):
+	sub	%rdi, %rax
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	add	$48, %rax
+	RETURN
+	.p2align 4
+L(exit64):
+	sub	%rdi, %rax
+	bsf	%rdx, %rdx
+	add	%rdx, %rax
+	add	$64, %rax
+#ifndef USE_AS_STRCAT
+	RETURN
+
+END (STRLEN)
+#endif

libs/libc/machine/x86_64/gnu/arch_strncmp.S

@@ -0,0 +1,40 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_strncmp.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#define USE_AS_STRNCMP
+#define STRCMP		strncmp
+#include "arch_strcmp.S"

libs/libc/machine/x86_64/gnu/arch_strncpy.S

@@ -0,0 +1,40 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/arch_strncpy.S
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+ *********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ *********************************************************************************/
+
+#define USE_AS_STRNCPY
+#define STRCPY		strncpy
+#include "arch_strcpy.S"

libs/libc/machine/x86_64/gnu/cache.h

@@ -0,0 +1,49 @@
+/*********************************************************************************
+ * libs/libc/machine/x86_64/gnu/cache.h
+ *
+ * Copyright (c) 2014, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *     * Redistributions of source code must retain the above copyright notice,
+ *     * this list of conditions and the following disclaimer.
+ *
+ *     * Redistributions in binary form must reproduce the above copyright notice,
+ *     * this list of conditions and the following disclaimer in the documentation
+ *     * and/or other materials provided with the distribution.
+ *
+ *     * Neither the name of Intel Corporation nor the names of its contributors
+ *     * may be used to endorse or promote products derived from this software
+ *     * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *********************************************************************************/
+
+#ifndef __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H
+#define __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H
+
+/*********************************************************************************
+ * Pre-processor Definitions
+ *********************************************************************************/
+
+/* Values are optimized for Core Architecture */
+
+#define SHARED_CACHE_SIZE (4096 * 1024)  /* Core Architecture L2 Cache */
+#define DATA_CACHE_SIZE   (24 * 1024)    /* Core Architecture L1 Data Cache */
+
+#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
+#define DATA_CACHE_SIZE_HALF   (DATA_CACHE_SIZE / 2)
+
+#endif  /* __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H */

libs/libc/string/lib_stpcpy.c

@@ -43,7 +43,7 @@
  *
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STPCPY
+#ifndef CONFIG_LIBC_ARCH_STPCPY
 #undef stpcpy /* See mm/README.txt */
 FAR char *stpcpy(FAR char *dest, FAR const char *src)
 {