buxiasen a938926b52 arch/sim: add JB_ALIGN0 for x64 to ensure the align ...

Or will cause the fork break as call will auto push 1 item.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>

2026-01-13 10:29:24 +08:00

..

arm

nuttx/arch: merge tickless and tick process

2026-01-12 16:20:42 +08:00

arm64

barrier: add UP_RMB UP_WMB

2025-12-22 10:22:06 -03:00

avr

nuttx/arch: merge tickless and tick process

2026-01-12 16:20:42 +08:00

ceva

barrier: add UP_RMB UP_WMB

2025-12-22 10:22:06 -03:00

dummy

…

hc

…

mips

sched:use tcb_s inside of task_tcb_s , remove all cast

2025-12-22 17:55:45 +08:00

misoc

arch/Toolchain.defs: use _start entry

2025-12-16 13:07:37 -03:00

or1k

arch/Toolchain.defs: use _start entry

2025-12-16 13:07:37 -03:00

renesas

…

risc-v

nuttx/arch: merge tickless and tick process

2026-01-12 16:20:42 +08:00

sim

arch/sim: add JB_ALIGN0 for x64 to ensure the align

2026-01-13 10:29:24 +08:00

sparc

nuttx/arch: merge tickless and tick process

2026-01-12 16:20:42 +08:00

tricore

barrier: add UP_RMB UP_WMB

2025-12-22 10:22:06 -03:00

x86

arch/Toolchain.defs: use _start entry

2025-12-16 13:07:37 -03:00

x86_64

barrier: add UP_RMB UP_WMB

2025-12-22 10:22:06 -03:00

xtensa

nuttx/arch: merge tickless and tick process

2026-01-12 16:20:42 +08:00

z16

…

z80

arch/Toolchain.defs: use _start entry

2025-12-16 13:07:37 -03:00

CMakeLists.txt

…

Kconfig

arch:use ARCH_64BIT to mark arch is support 64bit

2025-12-18 22:05:12 +08:00