mirror of
https://github.com/apache/nuttx.git
synced 2026-05-22 13:52:22 +08:00
yangao1
15eb317be2
(gdb) bt
#0 arch_strlen () at machine/arm64/gnu/arch_strlen.S:119
#1 0x000000004043a2c0 in strchr (s=s@entry=0x408e5e40 "HELLO WORLD", c=c@entry=87) at machine/arch_libc.c:252
#2 0x0000000040504c6c in strchr (c=87, s=0x408e5e40 "HELLO WORLD") at /home/mi/ssd/dev-system/nuttx/include/string.h:306
#3 test_strchr () at hello_main.c:79
#4 hello_main (argc=argc@entry=1, argv=argv@entry=0x40b5c090) at hello_main.c:132
#5 0x000000004043d958 in nxtask_startup (entrypt=0x40504ba0 <hello_main>, argc=argc@entry=1, argv=argv@entry=0x40b5c090) at sched/task_startup.c:72
#6 0x00000000403f1ab4 in nxtask_start () at task/task_start.c:104
#7 0x0000000000000000 in ?? ()
Signed-off-by: yangao1 <yangao1@xiaomi.com>
198 lines
6.0 KiB
ArmAsm
198 lines
6.0 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/arm64/arch_strnlen.S
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-FileCopyrightText: 2013, Linaro Limited, All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of the Linaro nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include "libc.h"
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#ifdef LIBC_BUILD_STRNLEN
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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*/
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/* Arguments and results. */
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#define srcin x0
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#define len x0
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#define limit x1
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/* Locals and temporaries. */
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#define src x2
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#define data1 x3
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#define data2 x4
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#define data2a x5
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#define has_nul1 x6
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#define has_nul2 x7
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#define tmp1 x8
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#define tmp2 x9
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#define tmp3 x10
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#define tmp4 x11
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#define zeroones x12
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#define pos x13
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#define limit_wd x14
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.macro def_fn f p2align=0
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.text
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.p2align \p2align
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.global \f
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.type \f, %function
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\f:
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.endm
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#define REP8_01 0x0101010101010101
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#define REP8_7f 0x7f7f7f7f7f7f7f7f
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#define REP8_80 0x8080808080808080
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.text
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.p2align 6
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.Lstart:
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/* Pre-pad to ensure critical loop begins an icache line. */
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.rep 7
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nop
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.endr
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/* Put this code here to avoid wasting more space with pre-padding. */
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.Lhit_limit:
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mov len, limit
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ret
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def_fn ARCH_LIBCFUN(strnlen)
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.cfi_sections .debug_frame
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.cfi_startproc
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cbz limit, .Lhit_limit
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mov zeroones, #REP8_01
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bic src, srcin, #15
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ands tmp1, srcin, #15
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b.ne .Lmisaligned
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/* Calculate the number of full and partial words -1. */
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sub limit_wd, limit, #1 /* Limit != 0, so no underflow. */
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lsr limit_wd, limit_wd, #4 /* Convert to Qwords. */
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/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
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(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
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can be done in parallel across the entire word. */
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/* The inner loop deals with two Dwords at a time. This has a
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slightly higher start-up cost, but we should win quite quickly,
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especially on cores with a high number of issue slots per
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cycle, as we get much better parallelism out of the operations. */
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/* Start of critical section -- keep to one 64Byte cache line. */
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.Lloop:
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ldp data1, data2, [src], #16
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.Lrealigned:
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sub tmp1, data1, zeroones
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orr tmp2, data1, #REP8_7f
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sub tmp3, data2, zeroones
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orr tmp4, data2, #REP8_7f
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bic has_nul1, tmp1, tmp2
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bic has_nul2, tmp3, tmp4
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subs limit_wd, limit_wd, #1
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orr tmp1, has_nul1, has_nul2
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ccmp tmp1, #0, #0, pl /* NZCV = 0000 */
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b.eq .Lloop
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/* End of critical section -- keep to one 64Byte cache line. */
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orr tmp1, has_nul1, has_nul2
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cbz tmp1, .Lhit_limit /* No null in final Qword. */
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/* We know there's a null in the final Qword. The easiest thing
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to do now is work out the length of the string and return
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MIN (len, limit). */
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sub len, src, srcin
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cbz has_nul1, .Lnul_in_data2
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#ifdef __AARCH64EB__
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mov data2, data1
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#endif
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sub len, len, #8
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mov has_nul2, has_nul1
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.Lnul_in_data2:
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#ifdef __AARCH64EB__
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/* For big-endian, carry propagation (if the final byte in the
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string is 0x01) means we cannot use has_nul directly. The
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easiest way to get the correct byte is to byte-swap the data
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and calculate the syndrome a second time. */
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rev data2, data2
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sub tmp1, data2, zeroones
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orr tmp2, data2, #REP8_7f
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bic has_nul2, tmp1, tmp2
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#endif
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sub len, len, #8
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rev has_nul2, has_nul2
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clz pos, has_nul2
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add len, len, pos, lsr #3 /* Bits to bytes. */
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cmp len, limit
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csel len, len, limit, ls /* Return the lower value. */
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ret
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.Lmisaligned:
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/* Deal with a partial first word.
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We're doing two things in parallel here;
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1) Calculate the number of words (but avoiding overflow if
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limit is near ULONG_MAX) - to do this we need to work out
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limit + tmp1 - 1 as a 65-bit value before shifting it;
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2) Load and mask the initial data words - we force the bytes
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before the ones we are interested in to 0xff - this ensures
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early bytes will not hit any zero detection. */
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sub limit_wd, limit, #1
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neg tmp4, tmp1
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cmp tmp1, #8
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and tmp3, limit_wd, #15
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lsr limit_wd, limit_wd, #4
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mov tmp2, #~0
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ldp data1, data2, [src], #16
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lsl tmp4, tmp4, #3 /* Bytes beyond alignment -> bits. */
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add tmp3, tmp3, tmp1
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#ifdef __AARCH64EB__
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/* Big-endian. Early bytes are at MSB. */
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lsl tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#else
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#endif
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add limit_wd, limit_wd, tmp3, lsr #4
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orr data1, data1, tmp2
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orr data2a, data2, tmp2
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csinv data1, data1, xzr, le
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csel data2, data2, data2a, le
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b .Lrealigned
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.cfi_endproc
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.size ARCH_LIBCFUN(strnlen), . - .Lstart /* Include pre-padding in size. */
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#endif
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