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54040c6888
Add support for ARMv6-M and ARMv8-M Baseline architectures (Cortex-M0/M0+/M23) in the mcount profiling function. These cores only support limited Thumb-1 instruction set and require different assembly instructions compared to ARMv7-M and higher. Changes: - Use MOVS+BICS instead of BIC for bit clearing on M0/M23 - Separate register restore for limited push/pop instructions - Use BX instead of direct POP to PC on M0/M23 Signed-off-by: yinshengkai <yinshengkai@bytedance.com>